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authorShengjiu Wang <b02247@freescale.com>2014-04-27 22:59:28 -0400
committerShengjiu Wang <b02247@freescale.com>2014-04-29 00:42:53 -0400
commit0673acf93a40e5b26b667b627dc62b81b377cc70 (patch)
tree7b78018b0dfaccad18f39c65761e1f3c8834f871 /include/dt-bindings/clock
parentc626c77caa8d381254b24556ac78a96ab2936937 (diff)
ENGR00310878-1 Asoc: fsl: refine clock tree for ESAI
There are three clock for ESAI, esai_extal, esai_ipg, esai_mem. Make the clock for ESAI more clear. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/imx6sx-clock.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h
index 0cc658b7e436..421d8bb76f2f 100644
--- a/include/dt-bindings/clock/imx6sx-clock.h
+++ b/include/dt-bindings/clock/imx6sx-clock.h
@@ -162,7 +162,7 @@
162#define IMX6SX_CLK_ECSPI5 149 162#define IMX6SX_CLK_ECSPI5 149
163#define IMX6SX_CLK_EPIT1 150 163#define IMX6SX_CLK_EPIT1 150
164#define IMX6SX_CLK_EPIT2 151 164#define IMX6SX_CLK_EPIT2 151
165#define IMX6SX_CLK_ESAI 152 165#define IMX6SX_CLK_ESAI_EXTAL 152
166#define IMX6SX_CLK_WAKEUP 153 166#define IMX6SX_CLK_WAKEUP 153
167#define IMX6SX_CLK_GPT_BUS 154 167#define IMX6SX_CLK_GPT_BUS 154
168#define IMX6SX_CLK_GPT_SERIAL 155 168#define IMX6SX_CLK_GPT_SERIAL 155
@@ -249,6 +249,8 @@
249#define IMX6SX_CLK_ASRC_MEM 236 249#define IMX6SX_CLK_ASRC_MEM 236
250#define IMX6SX_CLK_SAI1_IPG 237 250#define IMX6SX_CLK_SAI1_IPG 237
251#define IMX6SX_CLK_SAI2_IPG 238 251#define IMX6SX_CLK_SAI2_IPG 238
252#define IMX6SX_CLK_CLK_END 239 252#define IMX6SX_CLK_ESAI_IPG 239
253#define IMX6SX_CLK_ESAI_MEM 240
254#define IMX6SX_CLK_CLK_END 241
253 255
254#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */ 256#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */