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authorFancy Fang <B47543@freescale.com>2013-11-27 03:41:38 -0500
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:47:24 -0400
commitdc1731ec7c55c14bc78898fb23924f4031803017 (patch)
tree6b156ba84d22d02520f53ca5fcf234cea53e9d57 /drivers/dma
parentb777cac31d64102eeebc94759951c2d1824e77e7 (diff)
ENGR00289859 PXP: fix that multi users may access PXP hardware simultaneously
After the patch 6320ada11093ef0a4ded9065d6ae284a9129f7d6, there still exists some cases that more than one user would set PXP hardware registers before the previous task done. Now use another mutex lock to make sure that registers settings can only happen when PXP hardware is idle. Signed-off-by: Fancy Fang <B47543@freescale.com>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/pxp/pxp_dma_v2.c15
1 files changed, 4 insertions, 11 deletions
diff --git a/drivers/dma/pxp/pxp_dma_v2.c b/drivers/dma/pxp/pxp_dma_v2.c
index 55c35b35a875..6ec441b97810 100644
--- a/drivers/dma/pxp/pxp_dma_v2.c
+++ b/drivers/dma/pxp/pxp_dma_v2.c
@@ -48,6 +48,7 @@
48static LIST_HEAD(head); 48static LIST_HEAD(head);
49static int timeout_in_ms = 600; 49static int timeout_in_ms = 600;
50static unsigned int block_size; 50static unsigned int block_size;
51struct mutex hard_lock;
51 52
52struct pxp_dma { 53struct pxp_dma {
53 struct dma_device dma; 54 struct dma_device dma;
@@ -70,7 +71,6 @@ struct pxps {
70 struct device *dev; 71 struct device *dev;
71 struct pxp_dma pxp_dma; 72 struct pxp_dma pxp_dma;
72 struct pxp_channel channel[NR_PXP_VIRT_CHANNEL]; 73 struct pxp_channel channel[NR_PXP_VIRT_CHANNEL];
73 wait_queue_head_t done;
74 struct work_struct work; 74 struct work_struct work;
75 75
76 /* describes most recent processing configuration */ 76 /* describes most recent processing configuration */
@@ -88,9 +88,6 @@ struct pxps {
88#define PXP_DEF_BUFS 2 88#define PXP_DEF_BUFS 2
89#define PXP_MIN_PIX 8 89#define PXP_MIN_PIX 8
90 90
91#define PXP_WAITCON ((__raw_readl(pxp->base + HW_PXP_STAT) & \
92 BM_PXP_STAT_IRQ) != BM_PXP_STAT_IRQ)
93
94static uint32_t pxp_s0_formats[] = { 91static uint32_t pxp_s0_formats[] = {
95 PXP_PIX_FMT_RGB32, 92 PXP_PIX_FMT_RGB32,
96 PXP_PIX_FMT_RGB565, 93 PXP_PIX_FMT_RGB565,
@@ -1321,7 +1318,7 @@ static irqreturn_t pxp_irq(int irq, void *dev_id)
1321 list_splice_init(&desc->tx_list, &pxp_chan->free_list); 1318 list_splice_init(&desc->tx_list, &pxp_chan->free_list);
1322 list_move(&desc->list, &pxp_chan->free_list); 1319 list_move(&desc->list, &pxp_chan->free_list);
1323 1320
1324 wake_up_interruptible(&pxp->done); 1321 mutex_unlock(&hard_lock);
1325 pxp->pxp_ongoing = 0; 1322 pxp->pxp_ongoing = 0;
1326 mod_timer(&pxp->clk_timer, jiffies + msecs_to_jiffies(timeout_in_ms)); 1323 mod_timer(&pxp->clk_timer, jiffies + msecs_to_jiffies(timeout_in_ms));
1327 1324
@@ -1437,7 +1434,6 @@ static void pxp_issue_pending(struct dma_chan *chan)
1437 struct pxp_dma *pxp_dma = to_pxp_dma(chan->device); 1434 struct pxp_dma *pxp_dma = to_pxp_dma(chan->device);
1438 struct pxps *pxp = to_pxp(pxp_dma); 1435 struct pxps *pxp = to_pxp(pxp_dma);
1439 unsigned long flags0, flags; 1436 unsigned long flags0, flags;
1440 int ret;
1441 1437
1442 spin_lock_irqsave(&pxp->lock, flags0); 1438 spin_lock_irqsave(&pxp->lock, flags0);
1443 spin_lock_irqsave(&pxp_chan->lock, flags); 1439 spin_lock_irqsave(&pxp_chan->lock, flags);
@@ -1455,10 +1451,7 @@ static void pxp_issue_pending(struct dma_chan *chan)
1455 spin_unlock_irqrestore(&pxp->lock, flags0); 1451 spin_unlock_irqrestore(&pxp->lock, flags0);
1456 1452
1457 pxp_clk_enable(pxp); 1453 pxp_clk_enable(pxp);
1458again: 1454 mutex_lock(&hard_lock);
1459 ret = wait_event_interruptible_exclusive(pxp->done, PXP_WAITCON);
1460 if (ret < 0)
1461 goto again;
1462 1455
1463 spin_lock_irqsave(&pxp->lock, flags); 1456 spin_lock_irqsave(&pxp->lock, flags);
1464 pxp->pxp_ongoing = 1; 1457 pxp->pxp_ongoing = 1;
@@ -1795,6 +1788,7 @@ static int pxp_probe(struct platform_device *pdev)
1795 1788
1796 spin_lock_init(&pxp->lock); 1789 spin_lock_init(&pxp->lock);
1797 mutex_init(&pxp->clk_mutex); 1790 mutex_init(&pxp->clk_mutex);
1791 mutex_init(&hard_lock);
1798 1792
1799 pxp->base = devm_request_and_ioremap(&pdev->dev, res); 1793 pxp->base = devm_request_and_ioremap(&pdev->dev, res);
1800 if (pxp->base == NULL) { 1794 if (pxp->base == NULL) {
@@ -1834,7 +1828,6 @@ static int pxp_probe(struct platform_device *pdev)
1834 dump_pxp_reg(pxp); 1828 dump_pxp_reg(pxp);
1835 1829
1836 INIT_WORK(&pxp->work, clkoff_callback); 1830 INIT_WORK(&pxp->work, clkoff_callback);
1837 init_waitqueue_head(&pxp->done);
1838 init_timer(&pxp->clk_timer); 1831 init_timer(&pxp->clk_timer);
1839 pxp->clk_timer.function = pxp_clkoff_timer; 1832 pxp->clk_timer.function = pxp_clkoff_timer;
1840 pxp->clk_timer.data = (unsigned long)pxp; 1833 pxp->clk_timer.data = (unsigned long)pxp;