drm/i915: Kill off now unused gen6+ AGP code

v2: Accidently removed an ILK case in i9xx_setup (Nicely found by Chris)

CC: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by [v1] : Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 0 insertions, 91 deletions

diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 6ec0fff79bc2..1042c1b90376 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -62,12 +62,6 @@
 #define I810_PTE_LOCAL          0x00000002
 #define I810_PTE_VALID          0x00000001
 #define I830_PTE_SYSTEM_CACHED  0x00000006
-/* GT PTE cache control fields */
-#define GEN6_PTE_UNCACHED       0x00000002
-#define HSW_PTE_UNCACHED        0x00000000
-#define GEN6_PTE_LLC            0x00000004
-#define GEN6_PTE_LLC_MLC        0x00000006
-#define GEN6_PTE_GFDT           0x00000008
 
 #define I810_SMRAM_MISCC        0x70
 #define I810_GFX_MEM_WIN_SIZE   0x00010000
@@ -97,7 +91,6 @@
 #define G4x_GMCH_SIZE_VT_2M     (G4x_GMCH_SIZE_2M | G4x_GMCH_SIZE_VT_EN)
 
 #define GFX_FLSH_CNTL           0x2170 /* 915+ */
-#define GFX_FLSH_CNTL_VLV       0x101008
 
 #define I810_DRAM_CTL           0x3000
 #define I810_DRAM_ROW_0         0x00000001
@@ -148,29 +141,6 @@
 #define INTEL_I7505_AGPCTRL     0x70
 #define INTEL_I7505_MCHCFG      0x50
 
-#define SNB_GMCH_CTRL   0x50
-#define SNB_GMCH_GMS_STOLEN_MASK        0xF8
-#define SNB_GMCH_GMS_STOLEN_32M         (1 << 3)
-#define SNB_GMCH_GMS_STOLEN_64M         (2 << 3)
-#define SNB_GMCH_GMS_STOLEN_96M         (3 << 3)
-#define SNB_GMCH_GMS_STOLEN_128M        (4 << 3)
-#define SNB_GMCH_GMS_STOLEN_160M        (5 << 3)
-#define SNB_GMCH_GMS_STOLEN_192M        (6 << 3)
-#define SNB_GMCH_GMS_STOLEN_224M        (7 << 3)
-#define SNB_GMCH_GMS_STOLEN_256M        (8 << 3)
-#define SNB_GMCH_GMS_STOLEN_288M        (9 << 3)
-#define SNB_GMCH_GMS_STOLEN_320M        (0xa << 3)
-#define SNB_GMCH_GMS_STOLEN_352M        (0xb << 3)
-#define SNB_GMCH_GMS_STOLEN_384M        (0xc << 3)
-#define SNB_GMCH_GMS_STOLEN_416M        (0xd << 3)
-#define SNB_GMCH_GMS_STOLEN_448M        (0xe << 3)
-#define SNB_GMCH_GMS_STOLEN_480M        (0xf << 3)
-#define SNB_GMCH_GMS_STOLEN_512M        (0x10 << 3)
-#define SNB_GTT_SIZE_0M                 (0 << 8)
-#define SNB_GTT_SIZE_1M                 (1 << 8)
-#define SNB_GTT_SIZE_2M                 (2 << 8)
-#define SNB_GTT_SIZE_MASK               (3 << 8)
-
 /* pci devices ids */
 #define PCI_DEVICE_ID_INTEL_E7221_HB    0x2588
 #define PCI_DEVICE_ID_INTEL_E7221_IG    0x258a
@@ -219,66 +189,5 @@
 #define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB          0x0062
 #define PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB    0x006a
 #define PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG           0x0046
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB              0x0100  /* Desktop */
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT1_IG          0x0102
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT2_IG          0x0112
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_GT2_PLUS_IG     0x0122
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB            0x0104  /* Mobile */
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT1_IG        0x0106
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT2_IG        0x0116
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_GT2_PLUS_IG   0x0126
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_HB            0x0108  /* Server */
-#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_IG            0x010A
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_HB                0x0150  /* Desktop */
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_GT1_IG            0x0152
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_GT2_IG            0x0162
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_HB              0x0154  /* Mobile */
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_GT1_IG          0x0156
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_GT2_IG          0x0166
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB              0x0158  /* Server */
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG          0x015A
-#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT2_IG          0x016A
-#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB               0x0F00 /* VLV1 */
-#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG               0x0F30
-#define PCI_DEVICE_ID_INTEL_HASWELL_HB                  0x0400 /* Desktop */
-#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG            0x0402
-#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG            0x0412
-#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_PLUS_IG       0x0422
-#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB                0x0404 /* Mobile */
-#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG            0x0406
-#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG            0x0416
-#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_PLUS_IG       0x0426
-#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB                0x0408 /* Server */
-#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG            0x040a
-#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG            0x041a
-#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_PLUS_IG       0x042a
-#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB                0x0c04
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT1_IG        0x0C02
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_IG        0x0C12
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_PLUS_IG   0x0C22
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT1_IG        0x0C06
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_IG        0x0C16
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_PLUS_IG   0x0C26
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT1_IG        0x0C0A
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_IG        0x0C1A
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_PLUS_IG   0x0C2A
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT1_IG        0x0A02
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_IG        0x0A12
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_PLUS_IG   0x0A22
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT1_IG        0x0A06
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_IG        0x0A16
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_PLUS_IG   0x0A26
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT1_IG        0x0A0A
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_IG        0x0A1A
-#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_PLUS_IG   0x0A2A
-#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT1_IG        0x0D12
-#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_IG        0x0D22
-#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_PLUS_IG   0x0D32
-#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT1_IG        0x0D16
-#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_IG        0x0D26
-#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_PLUS_IG   0x0D36
-#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT1_IG        0x0D1A
-#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_IG        0x0D2A
-#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_PLUS_IG   0x0D3A
 
 #endif