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authorFugang Duan <b38611@freescale.com>2014-06-19 04:52:17 -0400
committerFugang Duan <b38611@freescale.com>2014-06-19 04:52:17 -0400
commit8e98d50d406301396fba80a7f0cb4d01a0ba79ec (patch)
tree41202e4687bd3e0d7d7fead40ad858d2b347481b
parent29261d49d1b750e2cf990799ce08a8b01930f728 (diff)
i2c: imx: fix the i2c bus hang issue when do repeat restart
Test i2c device Maxim max44009, datasheet is located at: http://www.maximintegrated.com/datasheet/index.mvp/id/7175 The max44009 support repeat operation like: read -> repeat restart -> read/write The current i2c imx host controller driver don't support this operation that causes i2c bus hang due to "MTX" is cleared in .i2c_imx_read(). If "read" is the last message there have no problem, so the current driver supports all SMbus operation like: write -> repeat restart -> read/write IMX i2c controller for master receiver has some limitation: - If it is the last byte for one operation, it must generate STOP signal before read I2DR to prevent controller from generating another clock cycle. - If it is the last byte in the read, and then do repeat restart, it must set "MTX" before read I2DR to prevent controller from generating another extra clock cycle. The patch is to fix the issue. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-rwxr-xr-x[-rw-r--r--]drivers/i2c/busses/i2c-imx.c42
1 files changed, 31 insertions, 11 deletions
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 9782527a8668..3172e87f4be8 100644..100755
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -362,7 +362,8 @@ static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
362 return 0; 362 return 0;
363} 363}
364 364
365static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) 365static int i2c_imx_read(struct imx_i2c_struct *i2c_imx,
366 struct i2c_msg *msgs, bool is_lastmsg)
366{ 367{
367 int i, result; 368 int i, result;
368 unsigned int temp; 369 unsigned int temp;
@@ -398,15 +399,30 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
398 if (result) 399 if (result)
399 return result; 400 return result;
400 if (i == (msgs->len - 1)) { 401 if (i == (msgs->len - 1)) {
401 /* It must generate STOP before read I2DR to prevent 402 if (is_lastmsg) {
402 controller from generating another clock cycle */ 403 /*
403 dev_dbg(&i2c_imx->adapter.dev, 404 * It must generate STOP before read I2DR to prevent
404 "<%s> clear MSTA\n", __func__); 405 * controller from generating another clock cycle
405 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 406 */
406 temp &= ~(I2CR_MSTA | I2CR_MTX); 407 dev_dbg(&i2c_imx->adapter.dev,
407 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 408 "<%s> clear MSTA\n", __func__);
408 i2c_imx_bus_busy(i2c_imx, 0); 409 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
409 i2c_imx->stopped = 1; 410 temp &= ~(I2CR_MSTA | I2CR_MTX);
411 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
412 i2c_imx_bus_busy(i2c_imx, 0);
413 i2c_imx->stopped = 1;
414 } else {
415 /*
416 * For i2c master receiver repeat restart operation like:
417 * read -> repeat MSTA -> read/write
418 * The controller must set MTX before read the last byte in
419 * the first read operation, otherwise the first read cost
420 * one extra clock cycle.
421 */
422 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
423 temp |= I2CR_MTX;
424 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
425 }
410 } else if (i == (msgs->len - 2)) { 426 } else if (i == (msgs->len - 2)) {
411 dev_dbg(&i2c_imx->adapter.dev, 427 dev_dbg(&i2c_imx->adapter.dev,
412 "<%s> set TXAK\n", __func__); 428 "<%s> set TXAK\n", __func__);
@@ -427,6 +443,7 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
427{ 443{
428 unsigned int i, temp; 444 unsigned int i, temp;
429 int result; 445 int result;
446 bool is_lastmsg = false;
430 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter); 447 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
431 448
432 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 449 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
@@ -438,6 +455,9 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
438 455
439 /* read/write data */ 456 /* read/write data */
440 for (i = 0; i < num; i++) { 457 for (i = 0; i < num; i++) {
458 if (i == num - 1)
459 is_lastmsg = true;
460
441 if (i) { 461 if (i) {
442 dev_dbg(&i2c_imx->adapter.dev, 462 dev_dbg(&i2c_imx->adapter.dev,
443 "<%s> repeated start\n", __func__); 463 "<%s> repeated start\n", __func__);
@@ -468,7 +488,7 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
468 (temp & I2SR_RXAK ? 1 : 0)); 488 (temp & I2SR_RXAK ? 1 : 0));
469#endif 489#endif
470 if (msgs[i].flags & I2C_M_RD) 490 if (msgs[i].flags & I2C_M_RD)
471 result = i2c_imx_read(i2c_imx, &msgs[i]); 491 result = i2c_imx_read(i2c_imx, &msgs[i], is_lastmsg);
472 else 492 else
473 result = i2c_imx_write(i2c_imx, &msgs[i]); 493 result = i2c_imx_write(i2c_imx, &msgs[i]);
474 if (result) 494 if (result)