ENGR00317376-1 pwm: i.MX: Don't reset PWMv2 when doing configuration

The patch for ENGR00308394 resets PWMv2 every time we do configuration.
This may make the PWM period unstable if we only tune duty period continuously,
and finally cause unstable PWM backlight light issue happen.

Revert "ENGR00308394 pwm: i.MX: Avoid sample fifo overflow for i.MX pwm version2"

This reverts commit 545c7383dfba874180b394f8b00b563a6541e158.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>

1 files changed, 1 insertions, 18 deletions

diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
index 0b59694a2f01..517f933fe490 100644
--- a/drivers/pwm/pwm-imx.c
+++ b/drivers/pwm/pwm-imx.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc.
  * simple driver for PWM (Pulse Width Modulator) controller
  *
  * This program is free software; you can redistribute it and/or modify
@@ -15,7 +15,6 @@
 #include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/clk.h>
-#include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/pwm.h>
 #include <linux/of_device.h>
@@ -39,11 +38,8 @@
 #define MX3_PWMCR_DBGEN                 (1 << 22)
 #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
 #define MX3_PWMCR_CLKSRC_IPG      (1 << 16)
-#define MX3_PWMCR_SWR             (1 << 3)
 #define MX3_PWMCR_EN              (1 << 0)
 
-#define MX3_PWM_SWR_LOOP          5
-
 struct imx_chip {
         struct clk      *clk_per;
         struct clk      *clk_ipg;
@@ -107,23 +103,10 @@ static int imx_pwm_config_v2(struct pwm_chip *chip,
                 struct pwm_device *pwm, int duty_ns, int period_ns)
 {
         struct imx_chip *imx = to_imx_chip(chip);
-        struct device *dev = chip->dev;
         unsigned long long c;
         unsigned long period_cycles, duty_cycles, prescale;
-        int wait_count = 0;
         u32 cr;
 
-        /* do software reset in case fifo overflows */
-        writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR);
-        do {
-                usleep_range(200, 1000);
-                cr = readl(imx->mmio_base + MX3_PWMCR);
-        } while ((cr & MX3_PWMCR_SWR) &&
-                 (wait_count++ < MX3_PWM_SWR_LOOP));
-
-        if (cr & MX3_PWMCR_SWR)
-                dev_warn(dev, "software reset timeout\n");
-
         c = clk_get_rate(imx->clk_per);
         c = c * period_ns;
         do_div(c, 1000000000);