ENGR00313508-01 ARM: imx6sx: add enet sleep mode support

Add enet sleep mode support for imx6sx arm2 platforms.

Signed-off-by: Fugang Duan <B38611@freescale.com>

3 files changed, 74 insertions, 1 deletions

diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c
index f711895e7019..5d6e50d28b2a 100644
--- a/arch/arm/mach-imx/mach-imx6sx.c
+++ b/arch/arm/mach-imx/mach-imx6sx.c
@@ -10,8 +10,10 @@
 #include <linux/can/platform/flexcan.h>
 #include <linux/clk-provider.h>
 #include <linux/delay.h>
+#include <linux/fec.h>
 #include <linux/gpio.h>
 #include <linux/irqchip.h>
+#include <linux/netdevice.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_gpio.h>
@@ -30,6 +32,7 @@
 #include "hardware.h"
 
 static struct flexcan_platform_data flexcan_pdata[2];
+static struct fec_platform_data fec_pdata[2];
 static int flexcan_en_gpio;
 static int flexcan_stby_gpio;
 static int flexcan0_en;
@@ -109,6 +112,21 @@ static void __init imx6sx_enet_clk_sel(void)
 static int ar8031_phy_fixup(struct phy_device *dev)
 {
         u16 val;
+        unsigned char *addr = NULL;
+
+        /* Fill Wake-on-LAN Internal Address */
+        if (dev->attached_dev) {
+                addr = dev->attached_dev->dev_addr;
+                phy_write(dev, 0xd, 0x3);
+                phy_write(dev, 0xe, 0x804A);
+                phy_write(dev, 0xd, 0xc003);
+                val = (addr[0] << 0x8) | addr[1];
+                phy_write(dev, 0xe, val);
+                val = (addr[2] << 0x8) | addr[3];
+                phy_write(dev, 0xe, val);
+                val = (addr[4] << 0x8) | addr[5];
+                phy_write(dev, 0xe, val);
+        }
 
         /* Set RGMII IO voltage to 1.8V */
         phy_write(dev, 0x1d, 0x1f);
@@ -139,17 +157,68 @@ static void __init imx6sx_enet_phy_init(void)
                         ar8031_phy_fixup);
 }
 
+static void imx6sx_fec1_stop_enable(int enabled)
+{
+        struct regmap *gpr;
+
+        gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
+        if (!IS_ERR(gpr)) {
+                if (enabled)
+                        regmap_update_bits(gpr, IOMUXC_GPR4,
+                                IMX6SX_GPR4_FEC_ENET1_STOP_REQ,
+                                IMX6SX_GPR4_FEC_ENET1_STOP_REQ);
+                else
+                        regmap_update_bits(gpr, IOMUXC_GPR4,
+                                IMX6SX_GPR4_FEC_ENET1_STOP_REQ, 0);
+
+        } else
+                pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
+}
+
+static void imx6sx_fec2_stop_enable(int enabled)
+{
+        struct regmap *gpr;
+
+        gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
+        if (!IS_ERR(gpr)) {
+                if (enabled)
+                        regmap_update_bits(gpr, IOMUXC_GPR4,
+                                IMX6SX_GPR4_FEC_ENET2_STOP_REQ,
+                                IMX6SX_GPR4_FEC_ENET2_STOP_REQ);
+                else
+                        regmap_update_bits(gpr, IOMUXC_GPR4,
+                                IMX6SX_GPR4_FEC_ENET2_STOP_REQ, 0);
+
+        } else
+                pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
+}
+
+static void __init imx6sx_enet_plt_init(void)
+{
+        struct device_node *np;
+
+        np = of_find_node_by_path("/soc/aips-bus@02100000/ethernet@02188000");
+        if (np && of_get_property(np, "fsl,magic-packet", NULL))
+                fec_pdata[0].sleep_mode_enable = imx6sx_fec1_stop_enable;
+        np = of_find_node_by_path("/soc/aips-bus@02100000/ethernet@021b4000");
+        if (np && of_get_property(np, "fsl,magic-packet", NULL))
+                fec_pdata[1].sleep_mode_enable = imx6sx_fec2_stop_enable;
+}
+
 static inline void imx6sx_enet_init(void)
 {
         imx6_enet_mac_init("fsl,imx6sx-fec");
         imx6sx_enet_phy_init();
         imx6sx_enet_clk_sel();
+        imx6sx_enet_plt_init();
 }
 
 /* Add auxdata to pass platform data */
 static const struct of_dev_auxdata imx6sx_auxdata_lookup[] __initconst = {
         OF_DEV_AUXDATA("fsl,imx6q-flexcan", 0x02090000, NULL, &flexcan_pdata[0]),
         OF_DEV_AUXDATA("fsl,imx6q-flexcan", 0x02094000, NULL, &flexcan_pdata[1]),
+        OF_DEV_AUXDATA("fsl,imx6sx-fec", 0x02188000, NULL, &fec_pdata[0]),
+        OF_DEV_AUXDATA("fsl,imx6sx-fec", 0x021b4000, NULL, &fec_pdata[1]),
         { /* sentinel */ }
 };
 
diff --git a/include/linux/fec.h b/include/linux/fec.h
index bcff455d1d53..ef3c72ca6a66 100644
--- a/include/linux/fec.h
+++ b/include/linux/fec.h
@@ -3,7 +3,7 @@
  * Copyright (c) 2009 Orex Computed Radiography
  *   Baruch Siach <baruch@tkos.co.il>
  *
- * Copyright (C) 2010 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2014 Freescale Semiconductor, Inc.
  *
  * Header file for the FEC platform data
  *
@@ -19,6 +19,7 @@
 struct fec_platform_data {
         phy_interface_t phy;
         unsigned char mac[ETH_ALEN];
+        void (*sleep_mode_enable)(int enabled);
 };
 
 #endif
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index c570e71471c4..dc7f6633768b 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -399,6 +399,9 @@
 #define IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK      (0x3 << 17)
 #define IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_EXT       (0x3 << 13)
 
+#define IMX6SX_GPR4_FEC_ENET1_STOP_REQ          (0x1 << 3)
+#define IMX6SX_GPR4_FEC_ENET2_STOP_REQ          (0x1 << 4)
+
 #define IMX6SX_GPR5_DISP_MUX_LDB_CTRL_MASK              (0x1 << 3)
 #define IMX6SX_GPR5_DISP_MUX_LDB_CTRL_LCDIF1    (0x0 << 3)
 #define IMX6SX_GPR5_DISP_MUX_LDB_CTRL_LCDIF2    (0x1 << 3)