<feed xmlns='http://www.w3.org/2005/Atom'>
<title>litmus-rt-imx6.git/include/linux/mfd, branch master</title>
<subtitle>LITMUS^RT and MC^2 V1 support for the i.MX6 processor family.</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/'/>
<entry>
<title>ENGR00322021-1 pcie: pcie dbi reg can not be accessed</title>
<updated>2014-07-09T08:38:51+00:00</updated>
<author>
<name>Richard Zhu</name>
<email>r65037@freescale.com</email>
</author>
<published>2014-07-09T08:37:37+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/commit/?id=02a092b8e5dfd6226498b53fcd26fb350bd31e5c'/>
<id>02a092b8e5dfd6226498b53fcd26fb350bd31e5c</id>
<content type='text'>
fixed the but that the pcie dbi reg can't be accessed
on the 2014.04 version.

Signed-off-by: Richard Zhu &lt;r65037@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
fixed the but that the pcie dbi reg can't be accessed
on the 2014.04 version.

Signed-off-by: Richard Zhu &lt;r65037@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ENGR00317086-2 gpr: Add dcic mux define in gpr head file</title>
<updated>2014-07-03T08:16:55+00:00</updated>
<author>
<name>Sandor Yu</name>
<email>R01008@freescale.com</email>
</author>
<published>2014-07-01T07:48:57+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/commit/?id=afdee488043af1ca3568f3a7a69e0d4b019e92b4'/>
<id>afdee488043af1ca3568f3a7a69e0d4b019e92b4</id>
<content type='text'>
Add dcic mux bit define in gpr head file for both imx6q and imx6sx.

Signed-off-by: Sandor Yu &lt;R01008@freescale.com&gt;
(cherry picked from commit 216ccc9b67f51935c08387cac31da35fb3fb4568)
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add dcic mux bit define in gpr head file for both imx6q and imx6sx.

Signed-off-by: Sandor Yu &lt;R01008@freescale.com&gt;
(cherry picked from commit 216ccc9b67f51935c08387cac31da35fb3fb4568)
</pre>
</div>
</content>
</entry>
<entry>
<title>ENGR00313508-01 ARM: imx6sx: add enet sleep mode support</title>
<updated>2014-05-15T07:55:06+00:00</updated>
<author>
<name>Fugang Duan</name>
<email>b38611@freescale.com</email>
</author>
<published>2014-05-13T06:21:30+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/commit/?id=4bcf608a8a5b74f595faab5b6cb4f4e84e711471'/>
<id>4bcf608a8a5b74f595faab5b6cb4f4e84e711471</id>
<content type='text'>
Add enet sleep mode support for imx6sx arm2 platforms.

Signed-off-by: Fugang Duan &lt;B38611@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add enet sleep mode support for imx6sx arm2 platforms.

Signed-off-by: Fugang Duan &lt;B38611@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ENGR00307014-05 Add imx6sx vadc gpr register define</title>
<updated>2014-04-18T02:19:12+00:00</updated>
<author>
<name>Sandor Yu</name>
<email>R01008@freescale.com</email>
</author>
<published>2014-04-16T07:11:36+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/commit/?id=b70eec17811c0f0179b1688ac5297659650623f8'/>
<id>b70eec17811c0f0179b1688ac5297659650623f8</id>
<content type='text'>
Add imx6sx vadc gpr register define.

Signed-off-by: Sandor Yu &lt;R01008@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add imx6sx vadc gpr register define.

Signed-off-by: Sandor Yu &lt;R01008@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ENGR00302472-2 ARM: imx6q: Add imx6sx LDB mux ctrl bit definitions</title>
<updated>2014-04-16T13:57:56+00:00</updated>
<author>
<name>Liu Ying</name>
<email>Ying.Liu@freescale.com</email>
</author>
<published>2014-03-10T06:38:19+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/commit/?id=839479a02802a4d3493bb01790f812f01f898a38'/>
<id>839479a02802a4d3493bb01790f812f01f898a38</id>
<content type='text'>
This patch adds LDB mux ctrl bit definitions for imx6sx.
The bit DISP_MUX_LDB_MUX_CTRL is defined in the register IOMUXC_GPR5.

Signed-off-by: Liu Ying &lt;Ying.Liu@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds LDB mux ctrl bit definitions for imx6sx.
The bit DISP_MUX_LDB_MUX_CTRL is defined in the register IOMUXC_GPR5.

Signed-off-by: Liu Ying &lt;Ying.Liu@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ENGR00302472-1 ARM: imx6q: Add imx6dl LVDS mux ctrl bit definitions</title>
<updated>2014-04-16T13:57:56+00:00</updated>
<author>
<name>Liu Ying</name>
<email>Ying.Liu@freescale.com</email>
</author>
<published>2014-03-10T06:25:56+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/commit/?id=4cd4b027fa46eabddcfb9f81331bca76932c1ced'/>
<id>4cd4b027fa46eabddcfb9f81331bca76932c1ced</id>
<content type='text'>
This patch adds LVDS mux ctrl bit definitions for imx6dl.
The bits LVDS0/1_MUX_CTL are defined in the register IOMUXC_GPR3.

Signed-off-by: Liu Ying &lt;Ying.Liu@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds LVDS mux ctrl bit definitions for imx6dl.
The bits LVDS0/1_MUX_CTL are defined in the register IOMUXC_GPR3.

Signed-off-by: Liu Ying &lt;Ying.Liu@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ENGR00299323-13 ARM:imx:imx6sx: add enet init for imx6sx platform</title>
<updated>2014-04-16T13:57:31+00:00</updated>
<author>
<name>Fugang Duan</name>
<email>B38611@freescale.com</email>
</author>
<published>2014-02-15T04:43:26+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/commit/?id=d9ccbb28d31b8214b0809ff6b6848311190c0a9f'/>
<id>d9ccbb28d31b8214b0809ff6b6848311190c0a9f</id>
<content type='text'>
- Init GPR1 register to select enet1 and enet2 refrence clock from
  internal PLL.
- Add enet MAC address checking from fuse.
- Add some phy fixup, set RGMII IO voltage to 1.8V.

Signed-off-by: Fugang Duan &lt;B38611@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Init GPR1 register to select enet1 and enet2 refrence clock from
  internal PLL.
- Add enet MAC address checking from fuse.
- Add some phy fixup, set RGMII IO voltage to 1.8V.

Signed-off-by: Fugang Duan &lt;B38611@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: imx6q: Add PCIe bits to GPR syscon definition</title>
<updated>2014-04-16T13:47:17+00:00</updated>
<author>
<name>Sean Cross</name>
<email>xobs@kosagi.com</email>
</author>
<published>2013-09-26T03:24:46+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/commit/?id=1df113e0681eee92d53963e881548a8895f35c76'/>
<id>1df113e0681eee92d53963e881548a8895f35c76</id>
<content type='text'>
PCIe requires additional bits be defined for GPR8 and GPR12.

Signed-off-by: Sean Cross &lt;xobs@kosagi.com&gt;
Signed-off-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
(cherry picked from commit 8d6a35fb13406f87d926fffeee0d70360ce3077d)
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
PCIe requires additional bits be defined for GPR8 and GPR12.

Signed-off-by: Sean Cross &lt;xobs@kosagi.com&gt;
Signed-off-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
(cherry picked from commit 8d6a35fb13406f87d926fffeee0d70360ce3077d)
</pre>
</div>
</content>
</entry>
<entry>
<title>ENGR00288567 Revert "ENGR00275213-2 ARM: imx6q: update the pcie bits definitions of gpr"</title>
<updated>2014-04-16T13:47:16+00:00</updated>
<author>
<name>Richard Zhu</name>
<email>r65037@freescale.com</email>
</author>
<published>2013-11-07T08:39:38+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/commit/?id=946d5f2c34cefa148c049b0311a9cf667e109017'/>
<id>946d5f2c34cefa148c049b0311a9cf667e109017</id>
<content type='text'>
switch to community upstreamed pcie driver.
Revert "ENGR00275213-2 ARM: imx6q: update the pcie bits definitions of gpr"
This reverts commit 0ddad708c7484a8b5d2016d31fda2bd8b9b8f275.

Signed-off-by: Richard Zhu &lt;r65037@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
switch to community upstreamed pcie driver.
Revert "ENGR00275213-2 ARM: imx6q: update the pcie bits definitions of gpr"
This reverts commit 0ddad708c7484a8b5d2016d31fda2bd8b9b8f275.

Signed-off-by: Richard Zhu &lt;r65037@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ENGR00276832-1 pmic: max17135: port driver codes to 3.10 kernel</title>
<updated>2014-04-16T13:01:34+00:00</updated>
<author>
<name>Robby Cai</name>
<email>R63905@freescale.com</email>
</author>
<published>2013-08-14T02:14:26+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-imx6.git/commit/?id=204ee4b0312a3dcfa84e196f3981d10a9017e462'/>
<id>204ee4b0312a3dcfa84e196f3981d10a9017e462</id>
<content type='text'>
It's ported from v3.5.7 kernel, which contains a sensor driver
and regulator driver. It's used for E-Ink panel.

add a parameter for mfd_add_devices() due to the propotype change.
use IS_ERR() to check the return value for devm_regulator_get().

Signed-off-by: Robby Cai &lt;R63905@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It's ported from v3.5.7 kernel, which contains a sensor driver
and regulator driver. It's used for E-Ink panel.

add a parameter for mfd_add_devices() due to the propotype change.
use IS_ERR() to check the return value for devm_regulator_get().

Signed-off-by: Robby Cai &lt;R63905@freescale.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
