litmus-rt-imx6.git/arch/mips/alchemy/common/Makefile, branch master

USB: move common alchemy USB routines to arch/mips/alchemy/common.c

2012-10-22T18:29:12+00:00

A previous patch converted the Alchemy platform to use the OHCI and EHCI
platform drivers. As a result, all the common logic to handle USB present in
drivers/usb/host/alchemy-common.c has no reason to remain here, so we move it
to arch/mips/alchemy/common/usb.c which is a more appropriate place. This
change was suggested by Manuel Lauss.

Signed-off-by: Florian Fainelli 
Acked-by: Alan Stern 
Signed-off-by: Greg Kroah-Hartman

MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.

2011-12-08T10:42:16+00:00

With a generic plat_irq_dispatch (for Alchemy at least) code for both
interrupt controller types can coexist in a single kernel image and be
autodetected at runtime.

Signed-off-by: Manuel Lauss 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2935/
Signed-off-by: Ralf Baechle

MIPS: Alchemy: Au1300 SoC support

2011-12-07T22:02:05+00:00

Add basic support for the Au1300 variant(s):
- New GPIO/Interrupt controller
- DBDMA ids
- USB setup
- MMC support
- enable various PSC drivers
- detection code.

Signed-off-by: Manuel Lauss 
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2866/
Signed-off-by: Ralf Baechle

MIPS: Alchemy: Redo PCI as platform driver

2011-10-24T22:34:24+00:00

- Rewrite Alchemy PCI support as a platform driver.
- Fixup boards which have PCI.

Run-tested on DB1500 and DB1550.

Signed-off-by: Manuel Lauss 
To: Linux-MIPS 
Patchwork: https://patchwork.linux-mips.org/patch/2706/
Signed-off-by: Ralf Baechle 

 delete mode 100644 arch/mips/alchemy/common/pci.c
 delete mode 100644 arch/mips/pci/fixup-au1000.c
 delete mode 100644 arch/mips/pci/ops-au1000.c
 create mode 100644 arch/mips/pci/pci-alchemy.c

MIPS: Alchemy: support multiple GPIO styles in one kernel

2011-10-24T22:34:23+00:00

For GPIOLIB=y decide at runtime which gpiochips to register;
in the GPIOLIB=n case, the gpio headers need to be reshuffled
a bit to make multiple implementations coexist peacefully.

Signed-off-by: Manuel Lauss 
To: Linux-MIPS 
Patchwork: https://patchwork.linux-mips.org/patch/2679/
Signed-off-by: Ralf Baechle

MIPS: Move Alchemy Makefile parts to their own Platform file.

2010-08-05T12:25:46+00:00

[Ralf: Remove a forgotten -Werror in Pb1200 Makefile.]

Signed-off-by: Manuel Lauss 
To: Linux-MIPS 
Cc: Sam Ravnborg 
Cc: Manuel Lauss 
Patchwork: https://patchwork.linux-mips.org/patch/1319/
Signed-off-by: Ralf Baechle

MIPS: Alchemy: get rid of common/reset.c

2010-02-27T11:53:04+00:00

Implement reset / poweroff in the board code instead.  The peripheral reset
code is gone too since YAMON which all in-tree boards use does the same
work when it boots.

Signed-off-by: Manuel Lauss 
Signed-off-by: Yoichi Yuasa 
Cc: Linux-MIPS 
Patchwork: http://patchwork.linux-mips.org/patch/783/
Patchwork: http://patchwork.linux-mips.org/patch/882/
Signed-off-by: Ralf Baechle

MIPS: Alchemy: Only build AU1000 INTC code for compatible cpus

2010-02-27T11:53:02+00:00

Use the GPIO config symbol to only build Au1000 interrupt code on chips with
compatible hw.

Signed-off-by: Manuel Lauss 
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/670/
Signed-off-by: Ralf Baechle

MIPS: Alchemy: prom_putchar is board dependent

2010-02-27T11:52:55+00:00

This patch replaces the general alchemy prom_putchar() implementation
in favor of board-specific versions:  The UART where the output of
prom_putchar is directed to really depends on the board, the current
implementation hardcodes this on a per-SoC basis which is just wrong.

So a generic uart tx function is provided in the alchemy headers,
and the boards can provide their own prom_putchar with custom
destination uart, and all in-kernel alchemy boards support
early printk.

Signed-off-by: Manuel Lauss 
Signed-off-by: Ralf Baechle

MIPS: Alchemy: Rewrite GPIO support.

2009-06-17T10:06:28+00:00

The current in-kernel Alchemy GPIO support is far too inflexible for
all my use cases.  To address this, the following changes are made:

* create generic functions which deal with manipulating the on-chip
  GPIO1/2 blocks.  Such functions are universally useful.
* Macros for GPIO2 shared interrupt management and block control.
* support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.

  If CONFIG_GPIOLIB is not enabled, provide linux gpio framework
  compatibility by directly inlining the GPIO1/2 functions.  GPIO access
  is limited to on-chip ones and they can be accessed as documented in
  the datasheets (GPIO0-31 and 200-215).

  If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and
  one for GPIO2, are registered.  GPIOs can still be accessed by using
  the numberspace established in the databooks.

  However this is not yet flexible enough for my uses:  My Alchemy
  systems have a documented "external" gpio interface (fixed, different
  numberspace) and can support a variety of baseboards, some of which
  are equipped with I2C gpio expanders.  I want to be able to provide
  the default 16 GPIOs of the CPU board numbered as 0..15 and also
  support gpio expanders, if present, starting as gpio16.

  To achieve this, a new Kconfig symbol for Alchemy is introduced,
  CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal
  that they don't want the Alchemy numberspace exposed to the outside
  world, but instead want to provide their own.  Boards are now respon-
  sible for providing the linux gpio interface glue code (either in a
  custom gpio.h header (in board include directory) or with gpio_chips).

  To make the board-specific inlined gpio functions work, the MIPS
  Makefile must be changed so that the mach-au1x00/gpio.h header is
  included _after_ the board headers, by moving the inclusion of
  the mach-au1x00/ to the end of the header list.

  See arch/mips/include/asm/mach-au1x00/gpio.h for more info.

Signed-off-by: Manuel Lauss 
Acked-by: Florian Fainelli 
Signed-off-by: Ralf Baechle