litmus-rt-imx6.git/Documentation/devicetree/bindings/iommu/nvidia,tegra30-smmu.txt, branch master LITMUS^RT and MC^2 V1 support for the i.MX6 processor family. iommu/tegra: smmu: Add device tree support for SMMU 2012-06-25T11:50:43+00:00 Hiroshi Doyu hdoyu@nvidia.com 2012-06-25T11:23:55+00:00 0760e8faa960f8ee991fa4acb802db4e20661281 The necessary info is expected to pass from DT. For more precise resource reservation, there shouldn't be any overlapping of register range between SMMU and MC. SMMU register offset needs to be calculated correctly, based on its register bank. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> 
The necessary info is expected to pass from DT.

For more precise resource reservation, there shouldn't be any
overlapping of register range between SMMU and MC. SMMU register
offset needs to be calculated correctly, based on its register bank.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>