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* mfd: mfd_cell is now implicitly available to wl1273 driversAndres Salomon2011-03-23
| | | | | | | | The cell's platform_data is now accessed with a helper function; change clients to use that, and remove the now-unused data_size. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: mfd_cell is now implicitly available to t7166xb driversAndres Salomon2011-03-23
| | | | | | | | | | No need to explicitly set the cell's platform_data/data_size. Modify clients to use mfd_get_cell helper function instead of accessing platform_data directly. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: mfd_cell is now implicitly available to timberdale driversAndres Salomon2011-03-23
| | | | | | | | | | | | The cell's platform_data is now accessed with a helper function; change clients to use that, and remove the now-unused data_size. Note that the mfd's platform_data is marked __devinitdata. This is still correct in all cases except for the timbgpio driver, whose remove hook has been changed to no longer reference the pdata. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: mfd_cell is now implicitly available to htc-pasic3 driversAndres Salomon2011-03-23
| | | | | | | No need to explicitly set the cell's platform_data/data_size. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: mfd_cell is now implicitly available to asic3 driversAndres Salomon2011-03-23
| | | | | | | | | | No need to explicitly set the cell's platform_data/data_size. Modify clients to use mfd_get_cell helper function instead of accessing platform_data directly. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: mfd_cell is now implicitly available to ab3100 driversAndres Salomon2011-03-23
| | | | | | | | The cell's platform_data is now accessed with a helper function; change clients to use that, and remove the now-unused data_size. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: mfd_cell is now implicitly available to ab3550 driverAndres Salomon2011-03-23
| | | | | | | | | | | No clients (in mainline kernel, I'm told that drivers exist in external trees that are planned for mainline inclusion) make use of this, nor do they make use of platform_data, so nothing really had to change here. The .data_size field is unused, so its usage gets removed. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: mfd_cell is now implicitly available to jz4740 driversAndres Salomon2011-03-23
| | | | | | | | | | | No need to explicitly set the cell's platform_data/data_size. Modify clients to use mfd_get_cell helper function instead of accessing platform_data directly. Signed-off-by: Andres Salomon <dilinger@queued.net> Acked-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd-core: Unconditionally add mfd_cell to every platform_deviceAndres Salomon2011-03-23
| | | | | | | | | | | | | | | | | | | | | Previously, one would set the mfd_cell's platform_data/data_size to point to the current mfd_cell in order to pass that information along to drivers. This causes the current mfd_cell to always be available to drivers. It also adds a wrapper function for fetching the mfd cell from a platform device, similar to what originally existed for mfd devices. Drivers who previously used platform_data for other purposes can still use it; the difference is that mfd_get_data() must be used to access it (and the pdata structure is no longer allocated in mfd_add_devices). Note that mfd_get_data is intentionally vague (in name) about where the data is stored; variable name changes can come later without having to touch brazillions of drivers. Signed-off-by: Andres Salomon <dilinger@queued.net> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Enabling twl4030_wdt and pwrbutton only for TritonKeerthy2011-03-23
| | | | | | | | | | Enabling twl4030_wdt and twl4030_pwrbutton only for Triton i.e for TWL4030 and TWL5030. This is to be excluded for Phoenix TWL6030. Tested OMAP4 blaze, OMAP2430, OMAP3630 boot up. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Balaji T K <balajitk@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Put WM8994 into reset when suspendingMark Brown2011-03-23
| | | | | | | | | | Ensure that the chip is in the lowest power mode possible when suspended by performing a soft reset on it. On early silicon revisions the lowest power modes can't be entered without using reset so we can't achieve equivalent results within the individual drivers. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Remove bitrotted genirq comment from wm831x IRQ codeMark Brown2011-03-23
| | | | | Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* regulator: twl: add clk32kg to twl-regulatorBalaji T K2011-03-23
| | | | | | | | | | | | In OMAP4 Blaze and Panda, 32KHz clock to WLAN is supplied from Phoenix TWL6030. The 32KHz clock state (ON/OFF) is configured in CLK32KG_CFG_[GRP, TRANS, STATE] register. This follows the same register programming model as other regulators in TWL6030. So add CLK32KG as pseudo regulator. Signed-off-by: Balaji T K <balajitk@ti.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Add new ab8500 GPADC driverArun Murthy2011-03-23
| | | | | | | | | AB8500 GPADC driver used to convert Acc and battery/ac/usb voltage Signed-off-by: Arun Murthy <arun.murthy@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Mattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: ab8500: world-writable debugfs register-* filesVasiliy Kulikov2011-03-23
| | | | | | | | Don't allow everybody to interact with hardware registers. Signed-off-by: Vasiliy Kulikov <segoon@openwall.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: ab3500: world-writable debugfs register-* filesVasiliy Kulikov2011-03-23
| | | | | | | | Don't allow everybody to interact with hardware registers. Signed-off-by: Vasiliy Kulikov <segoon@openwall.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: ab3100: world-writable debugfs *_priv filesVasiliy Kulikov2011-03-23
| | | | | | | | Don't allow everybody to change device hardware registers. Signed-off-by: Vasiliy Kulikov <segoon@openwall.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: AB8500 system control driverMattias Nilsson2011-03-23
| | | | | | | | | | | | | | | This adds a pretty straight-forward system control driver for the AB8500. This driver will be used from the core platform, e.g the clock tree implementation in the machine code, and is by nature singleton. There are a few simple functions to read, write, set and clear registers so that the machine code can control its own foundation. Cc: Mattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Add fast path for WM831x touchscreen interruptsMark Brown2011-03-23
| | | | | | | | | | | | | The WM831x interrupt controller provides reporting of the touchscreen related interrupts in the primary interrupt status register as a performance optimisation - use this to avoid reading the secondary status registers for those interrupts. For code simplicity and to avoid iterating over all interrupts we open code for the two affected interrupt sources. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Convert WM831x SPI to use dev_pm_opsMark Brown2011-03-23
| | | | | | | | | | There is a move to deprecate bus-specific PM operations and move to using dev_pm_ops instead in order to reduce the amount of boilerplate code in buses and facilitiate updates to the PM core. Do this move for the WM831x SPI driver. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Invert tps6586x GPIO and subdevices initializationVincent Palatin2011-03-23
| | | | | | | | When using a fixed voltage regulator triggered by a TPS6586x GPIO, this allows to declare and initialize it conveniently from the "subdev" list. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Add BTN_TOUCH event to ucb1x00-tsJochen Friedrich2011-03-23
| | | | | | | | | | Add BTN_TOUCH event reporting to ucb1x00_ts touchscreen driver. This will make this touchscreen driver behave consistently wrt. BTN_TOUCH. Signed-off-by: Jochen Friedrich <jochen@scram.de> Acked-by: Dmitry Torokhov <dtor@mail.ru> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Remove obsolete cleanup for wl1273 clientdataWolfram Sang2011-03-23
| | | | | | | | A few new i2c-drivers came into the kernel which clear the clientdata-pointer on exit or error. This is obsolete meanwhile, the core will do it. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Support configuration of WM831x /IRQ output in CMOS modeMark Brown2011-03-23
| | | | | | | | | | Provide platform data allowing the system to set the /IRQ pin into CMOS mode rather than the default open drain. The default value of this platform data reflects the default hardware configuration so there should be no change to existing users. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Convert pcf50633 to dev_pm_opsMark Brown2011-03-23
| | | | | | | | | | There is a move to deprecate bus-specific PM operations and move to using dev_pm_ops instead in order to reduce the amount of boilerplate code in buses and facilitiate updates to the PM core. Do this move for the pcf50633 driver. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Staticise non-exported symbols in MAX8998 driverMark Brown2011-03-23
| | | | | | | | No need to have them in the global namespace and sparse complains. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Convert adp5520 to dev_pm_opsMark Brown2011-03-23
| | | | | | | | | | There is a move to deprecate bus-specific PM operations and move to using dev_pm_ops instead in order to reduce the amount of boilerplate code in buses and facilitiate updates to the PM core. Do this move for the adp5520 driver. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* mfd: Leave acknowledgement of WM831x touchscreen IRQs to the driverMark Brown2011-03-23
| | | | | | | | | The WM831x touchscreen interrupts need acknowledgement even when using direct signals to the CPU (which don't go through the core) so leave the acknowledgement up to the touchscreen driver for simplicity. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* Merge branch 'next' of ↵Linus Torvalds2011-03-22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (66 commits) avr32: at32ap700x: fix typo in DMA master configuration dmaengine/dmatest: Pass timeout via module params dma: let IMX_DMA depend on IMX_HAVE_DMA_V1 instead of an explicit list of SoCs fsldma: make halt behave nicely on all supported controllers fsldma: reduce locking during descriptor cleanup fsldma: support async_tx dependencies and automatic unmapping fsldma: fix controller lockups fsldma: minor codingstyle and consistency fixes fsldma: improve link descriptor debugging fsldma: use channel name in printk output fsldma: move related helper functions near each other dmatest: fix automatic buffer unmap type drivers, pch_dma: Fix warning when CONFIG_PM=n. dmaengine/dw_dmac fix: use readl & writel instead of __raw_readl & __raw_writel avr32: at32ap700x: Specify DMA Flow Controller, Src and Dst msize dw_dmac: Setting Default Burst length for transfers as 16. dw_dmac: Allow src/dst msize & flow controller to be configured at runtime dw_dmac: Changing type of src_master and dest_master to u8. dw_dmac: Pass Channel Priority from platform_data dw_dmac: Pass Channel Allocation Order from platform_data ...
| * dmaengine/dmatest: Pass timeout via module paramsViresh Kumar2011-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | When we try to test all channels present on our controller together, some channels of lower priority may be very slow as compared to others. If number of transfers is unlimited, some channels may timeout and will not finish within 3 seconds. Thus, while doing such regress testing we may need to have higher value of timeouts. This patch adds support for passing timeout value via module parameters. Default value is 3 msec, a negative value means max timeout possible. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dma: let IMX_DMA depend on IMX_HAVE_DMA_V1 instead of an explicit list of SoCsUwe Kleine-König2011-03-22
| | | | | | | | | | | | | | | | As a side effect this makes IMX_DMA selectable on i.MX21 again, because the symbol ARCH_MX21 doesn't exist (MACH_MX21 would have been more correct). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * fsldma: make halt behave nicely on all supported controllersIra Snyder2011-03-11
| | | | | | | | | | | | | | | | | | | | The original dma_halt() function set the CA (channel abort) bit on both the 83xx and 85xx controllers. This is incorrect on the 83xx, where this bit means TEM (transfer error mask) instead. The 83xx doesn't support channel abort, so we only do this operation on 85xx. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * fsldma: reduce locking during descriptor cleanupIra Snyder2011-03-11
| | | | | | | | | | | | | | | | | | | | | | This merges the fsl_chan_ld_cleanup() function into the dma_do_tasklet() function to reduce locking overhead. In the best case, we will be able to keep the DMA controller busy while we are freeing used descriptors. In all cases, the spinlock is grabbed two times fewer than before on each transaction. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * fsldma: support async_tx dependencies and automatic unmappingIra Snyder2011-03-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Previous to this patch, the dma_run_dependencies() function has been called while holding desc_lock. This function can call tx_submit() for other descriptors, which may try to re-grab the lock. Avoid this by moving the descriptors to be cleaned up to a temporary list, and dropping the lock before cleanup. At the same time, add support for automatic unmapping of src and dst buffers, as offered by the DMAEngine API. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * fsldma: fix controller lockupsIra Snyder2011-03-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling poisoning in the dmapool API quickly showed that the DMA controller was fetching descriptors that should not have been in use. This has caused intermittent controller lockups during testing. I have been unable to figure out the exact set of conditions which cause this to happen. However, I believe it is related to the driver using the hardware registers to track whether the controller is busy or not. The code can incorrectly decide that the hardware is idle due to lag between register writes and the hardware actually becoming busy. To fix this, the driver has been reworked to explicitly track the state of the hardware, rather than try to guess what it is doing based on the register values. This has passed dmatest with 10 threads per channel, 100000 iterations per thread several times without error. Previously, this would fail within a few seconds. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * fsldma: minor codingstyle and consistency fixesIra Snyder2011-03-11
| | | | | | | | | | | | | | | | | | This fixes some minor violations of the coding style. It also changes the style of the device_prep_dma_*() function definitions so they are identical. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * fsldma: improve link descriptor debuggingIra Snyder2011-03-11
| | | | | | | | | | | | | | | | This adds better tracking to link descriptor allocations, callbacks, and frees. This makes it much easier to track errors with link descriptors. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * fsldma: use channel name in printk outputIra Snyder2011-03-11
| | | | | | | | | | | | | | | | | | This makes debugging the driver much easier when multiple channels are running concurrently. In addition, you can see how much descriptor memory each channel has allocated via the dmapool API in sysfs. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * fsldma: move related helper functions near each otherIra Snyder2011-03-11
| | | | | | | | | | | | | | | | This is a purely cosmetic cleanup. It is nice to have related functions right next to each other in the code. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dmatest: fix automatic buffer unmap typeIra Snyder2011-03-11
| | | | | | | | | | | | | | | | | | The dmatest code relies on the DMAEngine API to automatically call dma_unmap_single() on src buffers. The flags it passes are incorrect, fix them. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * drivers, pch_dma: Fix warning when CONFIG_PM=n.Rakib Mullick2011-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_PM=n, we get the following warning: drivers/dma/pch_dma.c:741: warning: ‘pch_dma_suspend’ defined but not used drivers/dma/pch_dma.c:755: warning: ‘pch_dma_resume’ defined but not used To fix it, wrap pch_dma_{suspend,resume} and pch_dma_{save,restore}_regs functions with CONFIG_PM. Signed-off-by: Rakib Mullick <rakib.mullick@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dmaengine/dw_dmac fix: use readl & writel instead of __raw_readl & __raw_writelViresh Kumar2011-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On ARMv7 cores, device memory mapped as Normal Non-cacheable, may not guarantee ordered access causing failures in device drivers that do not use the mandatory memory barriers. readl & writel versions contain necessary memory barriers for this. commit 79f64dbf68c8a9779a7e9a25e0a9f0217a25b57a: "ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLE" can be referred for more information on this. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dw_dmac: Setting Default Burst length for transfers as 16.Viresh Kumar2011-03-06
| | | | | | | | | | | | | | | | This patch sets default Burst length for all transfer to 16. This will enhance performance when user doesn't have any chan->private data. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dw_dmac: Allow src/dst msize & flow controller to be configured at runtimeViresh KUMAR2011-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | Msize or Burst Size is peripheral dependent in case of prep_slave_sg and cyclic_prep transfers, and in case of memcpy transfers it is platform dependent. So msize configuration must come from platform data. Also some peripherals (ex: JPEG), need to be flow controller for dma transfers, so this information in case of slave_sg & cyclic_prep transfers must come from platform data. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dw_dmac: Pass Channel Priority from platform_dataViresh Kumar2011-03-06
| | | | | | | | | | | | | | | | | | | | In Synopsys designware, channel priority is programmable. This patch adds support for passing channel priority through platform data. By default Ascending channel priority will be followed, i.e. channel 0 will get highest priority and channel 7 will get lowest. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dw_dmac: Pass Channel Allocation Order from platform_dataViresh Kumar2011-03-06
| | | | | | | | | | | | | | | | | | | | In SPEAr Platform channels 4-7 have more Fifo depth. So we must get better channel first. This patch introduces concept of channel allocation order in dw_dmac. If user doesn't pass anything or 0, than normal (ascending) channel allocation will follow, else channels will be allocated in descending order. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dw_dmac: Mark all tx_descriptors with DMA_CRTL_ACK after xfer finishViresh Kumar2011-03-06
| | | | | | | | | | | | | | | | | | | | dwc_desc_get checks all descriptors for DMA_CTRL_ACK before allocating them for transfers. And descriptors are not marked with DMA_CRTL_ACK after transfer finishes. Thus descriptor once used is not usable again. This patch marks descriptors with DMA_CRTL_ACK after dma xfer finishes Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dw_dmac: Change value of DWC_MAX_COUNT to 4095.Viresh Kumar2011-03-06
| | | | | | | | | | | | | | | | Every descriptor can transfer a maximum count of 4095 (12 bits, in control reg), So we must have DWC_MAX_COUNT as 4095 instead of 2048. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dw_dmac: Adding support for 64 bit access width for memcpy xfersViresh Kumar2011-03-06
| | | | | | | | | | Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * dw_dmac: Calling dwc_scan_descriptors from dwc_tx_status() after taking lockViresh Kumar2011-03-06
| | | | | | | | | | | | | | | | | | | | Lock must be taken before calling dwc_scan_descriptors, as this may access/modify shared data and queues. dwc_tx_status wasn't taking lock before calling this routine. This patch add code that takes lock before calling dwc_scan_descriptors. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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