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| * | | | mtd: gpmi: Use devm_kzalloc()Fabio Estevam2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using devm_kzalloc() can make the code simpler. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: atmel_nand: fix bug driver will in a dead lock if no nand detectedJosh Wu2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the atmel driver probe function, the code shows like following: atmel_nand_probe(...) { ... err_nand_ioremap: platform_driver_unregister(&atmel_nand_nfc_driver); return res; } If no nand flash detected, the driver probe function will goto err_nand_ioremap label. Then platform_driver_unregister() will be called. It will get the lock of atmel_nand device since it is parent of nfc_device. The problem is the lock is already hold by atmel_nand_probe itself. So system will be in a dead lock. This patch just simply removed to platform_driver_unregister() call. When atmel_nand driver is quit the platform_driver_unregister() will be called in atmel_nand_remove(). [Brian: the NAND platform probe really has no business registering/unregistering another driver; this fixes the deadlock, but we should follow up the likely racy behavior here with a better architecture] Signed-off-by: Josh Wu <josh.wu@atmel.com> Cc: <stable@vger.kernel.org> # 3.12 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: use a local variable to simplify the nand_scan_tailHuang Shijie2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are too many "chip->ecc" in the nand_scan_tail() which makes the eyes sore. This patch uses a local variable "ecc" to replace the "chip->ecc" to make the code more graceful. Do the code change with "s/chip->ecc\./ecc->/g" in the nand_scan_tail, and also change some lines by hand. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: remove deprecated IRQF_DISABLEDMichael Opdenacker2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch proposes to remove the use of the IRQF_DISABLED flag It's a NOOP since 2.6.35 and it will be removed one day. Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: omap: fix error return code in omap_nand_probe()Wei Yongjun2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix to return a negative error code from the error handling case instead of 0, to more closely match the rest of this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand_bbt: kill NAND_BBT_SCANALLPAGESBrian Norris2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the last user of NAND_BBT_SCANALLPAGES has been removed, let's kill this peculiar BBT feature flag. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
| * | | | mtd: mxc_nand: Include linux/of.h headerSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'of_match_ptr' is defined in linux/of.h. Include it explicitly to avoid build breakage in the future. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: omap: remove selection of BCH ecc-scheme via KConfigPekon Gupta2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With OMAP NAND driver updates, selection of ecc-scheme: *DT enabled kernel* depends on ti,nand-ecc-opt and ti,elm-id DT bindings. *Non DT enabled kernel* depends on elm_dev and ecc-scheme passed along with platform-data from board file. So, selection of ecc-scheme (BCH8 or BCH4) from KConfig can be removed Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: omap: updated devm_xx for all resource allocation and free callsPekon Gupta2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "Managed Device Resource" or devm_xx calls takes care of automatic freeing of the resource in case of: - failure during driver probe - failure during resource allocation - detaching or unloading of driver module (rmmod) Reference: Documentation/driver-model/devres.txt Though OMAP NAND driver handles freeing of resource allocation in most of the cases, but using devm_xx provides more clean and effortless approach to handle all such cases. - simplifies label for exiting probe during error s/out_release_mem_region/return_error Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead ↵Pekon Gupta2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of lib/bch.c generic frame-work in mtd/nand/nand_bch.c is a wrapper above lib/bch.h which encapsulates all control information specific to BCH ecc algorithm in software. Thus this patch: (1) replace omap specific implementations with equivalent wrapper in nand_bch.c so that generic code from nand_bch.c is re-used. like; omap3_correct_data_bch() -> nand_bch_correct_data() omap3_free_bch() -> nand_bch_free() (2) replace direct calls to lib/bch.c with wrapper functions defined in nand_bch.c init_bch() -> nand_bch_init() Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: omap: clean-up ecc layout for BCH ecc schemesPekon Gupta2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current implementation omap3_init_bch_tail() is a common function to define ecc layout for different BCHx ecc schemes.This patch: (1) removes omap3_init_bch_tail() and defines ecc layout for individual ecc-schemes along with populating their nand_chip->ecc data in omap_nand_probe(). This improves the readability and scalability of code for add new ecc schemes in future. (2) removes 'struct nand_bbt_descr bb_descrip_flashbased' because default nand_bbt_descr in nand_bbt.c matches the same (.len=1 for x8 devices). (3) add the check to see if NAND device has enough OOB/Spare bytes to store ECC signature of whole page, as defined by ecc-scheme. Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in ↵Pekon Gupta2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | device_probe current implementation in omap3_init_bch() has some redundant code like: (1) omap3_init_bch() re-probes the DT-binding to detect presence of ELM h/w engine on SoC. And based on that it selects implemetation of ecc-scheme. However, this is already done as part of GPMC DT parsing. (2) As omap3_init_bch() serves as common function for configuring all types of BCHx ecc-schemes, so there are multiple levels of redudant if..then..else checks while populating nand_chip->ecc. This patch make following changes to OMAP NAND driver: (1) removes omap3_init_bch(): each ecc-scheme is individually configured in omap_nand_probe() there by removing redundant if..then..else checks. (2) adds is_elm_present(): re-probing of ELM device via DT is not required as it's done in GPMC driver probe. Thus is_elm_present() just initializes ELM driver with NAND probe data, when ecc-scheme with h/w based error-detection is used. (3) separates out configuration of different flavours of "BCH4" and "BCH8" ecc-schemes as given in below table (4) conditionally compiles callbacks implementations of ecc.hwctl(), ecc.calculate(), ecc.correct() to avoid warning of un-used functions. +---------------------------------------+---------------+---------------+ | ECC scheme |ECC calculation|Error detection| +---------------------------------------+---------------+---------------+ |OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)| | (needs CONFIG_MTD_NAND_ECC_BCH) | | | | | | | |OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) | | (needs CONFIG_MTD_NAND_OMAP_BCH && | | | | ti,elm-id) | | | +---------------------------------------+---------------+---------------+ |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)| | (needs CONFIG_MTD_NAND_ECC_BCH) | | | | | | | |OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) | | (needs CONFIG_MTD_NAND_OMAP_BCH && | | | | ti,elm-id) | | | +---------------------------------------+---------------+---------------+ - 'CONFIG_MTD_NAND_ECC_BCH' is generic KConfig required to build lib/bch.c which is required for ECC error detection done in software. (mainly used for legacy platforms which do not have on-chip ELM engine) - 'CONFIG_MTD_NAND_OMAP_BCH' is OMAP specific Kconfig to detemine presence on ELM h/w engine on SoC. Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: omap: use DT specified bus-width only for scanning NAND devicePekon Gupta2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch: - calls nand_scan_ident() using bus-width as passed by DT - removes double calls to nand_scan_ident(), in case first call fails then omap_nand_probe just returns error. Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: omap: cleanup: replace local references with generic framework namesPekon Gupta2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates following in omap_nand_probe() and omap_nand_remove() - replaces "info->nand" with "nand_chip" (struct nand_chip *nand_chip) - replaces "info->mtd" with "mtd" (struct mtd_info *mtd) - white-space and formatting cleanup Signed-off-by: Pekon Gupta <pekon@ti.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemesPekon Gupta2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP NAND driver currently supports multiple flavours of 1-bit Hamming ecc-scheme, like: - OMAP_ECC_HAMMING_CODE_DEFAULT 1-bit hamming ecc code using software library - OMAP_ECC_HAMMING_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine - OMAP_ECC_HAMMING_CODE_HW_ROMCODE 1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible to ROM code. This patch combines above multiple ecc-schemes into single implementation: - OMAP_ECC_HAM1_CODE_HW 1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible ecc-layout. Signed-off-by: Pekon Gupta <pekon@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: gpmi: imx6: fix the wrong method for checking ready/busyHuang Shijie2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the imx6, all the ready/busy pins are binding togeter. So we should always check the ready/busy pin of the chip 0. In the other word, when the CS1 is enabled, we should also check the ready/busy of chip 0; if we check the ready/busy of chip 1, we will get the wrong result. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: gpmi: scan two nand chipsHuang Shijie2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some nand chip has two DIEs in a single chip, such as Micron MT29F32G08QAA. Each die has its own chip select pin, so this chip acts as two nand chips. If we only scan one chip, we may find that we only get 2G for this chip, but in actually, this chip's size is 4G. So scan two chips by default. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: gpmi: use DMA channel 0 for all the nand chipsHuang Shijie2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only have one DMA channel : the channel 0. Use DMA channel 0 to access all the nand chips. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: gpmi: decouple the chip select from the DMA channelHuang Shijie2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Decouple the chip select from the DMA channel, we use the DMA channel 0 to accecc all the nand devices. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | driver/mtd/ifc: Read Status while programming NAND flashPrabhakar Kushwaha2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | as per controller description, "While programming a NAND flash, status read should never skipped. Because it may happen that a new command is issued to the NAND Flash, even when the device has not yet finished processing the previous request. This may result in unpredictable behaviour." IFC controller never polls for R/B signal after command send. It just return control to software. This behaviour may not occur with NAND flash access. because new commands are sent after polling R/B signal. But it may happen in scenario where GPCM-ASIC and NAND flash device are working simultaneously. Update the controller driver to take care of this requirement Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | driver/mtd/IFC: Add support of 8K page size NAND flashPrabhakar Kushwaha2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current IFC driver supports till 4K page size NAND flash. Add support of 8K Page size NAND flash - Add nand_ecclayout for 4 bit & 8 bit ecc - Defines constants - also fix ecc.strength for 8bit ecc of 8K page size NAND Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: bcm47xxnflash: Use devm_kzallocSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devm_kzalloc is device managed and simplifies the code. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: bcm47xxnflash: Use module_platform_driverSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | module_platform_driver simplifies the code by removing boiler plate. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: hack ONFI for non-power-of-2 dimensionsBrian Norris2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some bright specification writers decided to write this in the ONFI spec (from ONFI 3.0, Section 3.1): "The number of blocks and number of pages per block is not required to be a power of two. In the case where one of these values is not a power of two, the corresponding address shall be rounded to an integral number of bits such that it addresses a range up to the subsequent power of two value. The host shall not access upper addresses in a range that is shown as not supported." This breaks every assumption MTD makes about NAND block/chip-size dimensions -- they *must* be a power of two! And of course, an enterprising manufacturer has made use of this lovely freedom. Exhibit A: Micron MT29F32G08CBADAWP "- Plane size: 2 planes x 1064 blocks per plane - Device size: 32Gb: 2128 blockss [sic]" This quickly hits a BUG() in nand_base.c, since the extra dimensions overflow so we think it's a second chip (on my single-chip setup): ONFI param page 0 valid ONFI flash detected NAND device: Manufacturer ID: 0x2c, Chip ID: 0x44 (Micron MT29F32G08CBADAWP), 4256MiB, page size: 8192, OOB size: 744 ------------[ cut here ]------------ kernel BUG at drivers/mtd/nand/nand_base.c:203! Internal error: Oops - BUG: 0 [#1] SMP ARM [... trim ...] [<c02cf3e4>] (nand_select_chip+0x18/0x2c) from [<c02d25c0>] (nand_do_read_ops+0x90/0x424) [<c02d25c0>] (nand_do_read_ops+0x90/0x424) from [<c02d2dd8>] (nand_read+0x54/0x78) [<c02d2dd8>] (nand_read+0x54/0x78) from [<c02ad2c8>] (mtd_read+0x84/0xbc) [<c02ad2c8>] (mtd_read+0x84/0xbc) from [<c02d4b28>] (scan_read.clone.4+0x4c/0x64) [<c02d4b28>] (scan_read.clone.4+0x4c/0x64) from [<c02d4c88>] (search_bbt+0x148/0x290) [<c02d4c88>] (search_bbt+0x148/0x290) from [<c02d4ea4>] (nand_scan_bbt+0xd4/0x5c0) [... trim ...] ---[ end trace 0c9363860d865ff2 ]--- So to fix this, just truncate these dimensions down to the greatest power-of-2 dimension that is less than or equal to the specified dimension. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: <stable@vger.kernel.org>
| * | | | mtd: nand: pxa3xx: Allocate data buffer on detected flash sizeEzequiel Garcia2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit replaces the currently hardcoded buffer size, by a dynamic detection scheme. First a small 256 bytes buffer is allocated so the device can be detected (using READID and friends commands). After detection, this buffer is released and a new buffer is allocated to acommodate the page size plus out-of-band size. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: pxa3xx: Move DMA I/O enablingEzequiel Garcia2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of setting info->dma each time a command is prepared, we can move it after the DMA buffers are allocated. This is more clear and it's the proper place to enable this, given DMA cannot be turned on and off during runtime. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: docg4: fix status polling loopMike Dunn2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The loop that polls the status register waiting for an operation to complete foolishly bases the timeout simply on the number of loop iterations that have ocurred. When I increased the processor clock speed, timeouts started to appear for long block erasure operations. This patch measures the timeout using jiffies. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: socrates_nand: Use dev_err instead of printkSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev_err is preferred to printk. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: socrates_nand: Use devm_kzallocSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devm_kzalloc is device managed and makes code simpler. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: socrates_nand: Remove redundant dev_set_drvdataSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver core will set the driver data to NULL upon detach or probe failure. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: fsl_ifc_nand: Use module_platform_driverSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | module_platform_driver removes boiler plate code and makes it simpler. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: fsl_ifc_nand: Remove redundant dev_set_drvdataSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver core will set the driver data to NULL upon detach or probe failure. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: pxa3xx_nand: Remove redundant of_match_ptrSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: lpc32xx_slc: Remove redundant of_match_ptrSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: lpc32xx_mlc: Remove redundant of_match_ptrSachin Kamat2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: denali: remove unnecessary pci_set_drvdata()Jingoo Han2013-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: diskonchip: Fix incorrect placement of __initdataSachin Kamat2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __initdata should be placed between the variable name and equal sign for the variable to be placed in the intended section. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: fix the wrong mtd->type for nand chipHuang Shijie2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code sets the mtd->type with MTD_NANDFLASH for both SLC and MLC. So the jffs2 may supports the MLC nand, but in actually, the jffs2 should not support the MLC. This patch uses the nand_is_slc() to check the nand cell type, and set the mtd->type with the right nand type. After this patch, the jffs2 only supports the SLC nand. The side-effect of this patch: Before this patch, the ioctl(MEMGETINFO) can only return with the MTD_NANDFLASH; but after this patch, the ioctl(MEMGETINFO) will return with the MTD_NANDFLASH for SLC, and MTD_MLCNANDFLASH for MLC. So the user applictions(such as mtd-utils) should also changes a little for this. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: gpmi: rewrite the gpmi_ecc_write_oob() to support the jffs2Huang Shijie2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we use the ECC info which is get from the nand chip's datasheet, we may have some freed oob area now. This patch rewrites the gpmi_ecc_write_oob() to implement the ecc.write_oob(). We also update the comment for gpmi_hw_ecclayout. Yes! We can support the JFFS2 for the SLC nand now. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: print out the cell information for nand chipHuang Shijie2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Print out the cell information for nand chip. (Since the message is too long, this patch also splits the log with two separate pr_info()) Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: set the cell information for ONFI nandHuang Shijie2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code does not set the SLC/MLC information for onfi nand. (This makes that the kernel treats all the onfi nand as SLC nand.) This patch fills the cell information for ONFI nands. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: add the "bits per cell" info for legacy ID NANDHuang Shijie2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The legacy ID NAND are all SLC. This patch sets 1 to the @bits_per_cell for the legacy ID NAND, which means they are all SLC. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: rename the cellinfo to bits_per_cellHuang Shijie2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The @cellinfo fields contains unused information, such as write caching, internal chip numbering, etc. But we only use it to check the SLC or MLC. This patch tries to make it more clear and simple, renames the @cellinfo to @bits_per_cell. In order to avoiding the bisect issue, this patch also does the following changes: (0) add a macro NAND_CI_CELLTYPE_SHIFT to avoid the hardcode. (1) add a helper to parse out the cell type : nand_get_bits_per_cell() (2) parse out the cell type for extended-ID chips and the full-id nand chips. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: add a helper to check the SLC/MLC nand chipHuang Shijie2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a helper to check if a nand chip is SLC or MLC. This helper makes the code more readable. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: correct extemded param page error handlingBrian Norris2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the ONFI extended parameter page gives codeword_size == 0, the extended ECC information is corrupt and should not be used. Currently, we (correctly) avoid using the information, but we don't report the error to the caller, so the caller doesn't know that we didn't initialize ecc_strength_ds and ecc_step_ds. Now the caller can warn the user that it does not have sufficient information. This also removes the false and useless "ONFI extended param page detected" debug message (it was printed even on the aforementioned corruption, and for the success case, we don't really want a print). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <b32955@freescale.com>
| * | | | mtd: atmel_nand: use minimum ecc requirements of nand: ecc_{strength,step}_dsJosh Wu2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since ecc_{strength,step}_ds is introduced in nand_chip structure for minimum ecc requirements. So we can use them directly and remove our own get_onfi_ecc_param function. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: atmel_nand: add MODULE_DEVICE_TABLE for nfc driverJosh Wu2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch also add a const keyword for the of_device_id of nfc. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: atmel_nand: remove #if defined(CONFIG_OF) around OF-specific codeJosh Wu2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the of specific code are declared in <linux/of_mtd.h> regardless of CONFIG_OF. Remove the #if defined(CONFIG_OF) guard and use an IS_ENABLED(CONFIG_OF) instead. Thanks to Ezequiel Garcia's for this protype. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: nand: cleanup ONFI printed errors, warningsBrian Norris2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ONFI detection routine is too verbose in some cases and not verbose enough in others. This patch refactors it to print only when there are significant warnings/errors. Probing in 16-bit mode: It is unnecessary to print until after the READID (address 20h) command. READID *has* to work properly in whatever bus width configuration we are in, or else no identification mode works. So we can silence some useless warnings on systems which come up in 16-bit mode and do not even respond with an O-N-F-I string. Valid parameter page: Nobody needs to see this. Do we inform the user every time other hardware responds properly? Instead, add an error message if *no* uncorrupted parameter pages are found. ONFI ECC: Most drivers don't yet use the reported minimum ECC values, so it shouldn't yet be a fatal condition if the extended parameter page is incorrect. But we should at least give a warning for the corner cases that we don't expect. ONFI flash detected: Nobody needs to see this. This is the expected case, that we detect ONFI properly, or else it wasn't ONFI-compliant and is detected by some other routine. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Huang Shijie <b32955@freescale.com> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
| * | | | mtd: nand: remove obsolete 'ecclayout' fieldBrian Norris2013-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This field is never used, except to print it out. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-09 00:42:37 -0400