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* | | mtd: gpmi: change pr_err to dev_errHuang Shijie2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are pr_err and dev_err in the gpmi driver now. It makes people confused. This patch changes all the pr_err to dev_err except the one in the gpmi_reset_block(). We also remove the unnecessary print for OOM message. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: gpmi: remove the unnecessary pr_err()Huang Shijie2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | The error messages for the failure of dmaengine_prep_slave_sg are not necessary, this patch removes all these pr_err, and returns with the proper error code -EINVAL, not -1. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: diskonchip: Request memory region prior ioremap()Alexander Shiyan2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds request_mem_region() prior ioremap() for diskonchip driver. This will allow to check if memory region is occupied by any other device, for example in case if we have memory region for several optional devices and only one device can be used at once. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: gpmi: use devm_request_irqHuang Shijie2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | Use devm_request_irq to simplify the code. Also remove the unused fields of structure resources{}. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: gpmi: use devm_ioremap_resourceHuang Shijie2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use the devm_ioremap_resource to simplify the code. [Note: as a side effect, this adds a missing call to request_memory().] Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: gpmi: rename the functions from gpmi_nfc_* to gpmi_nand_*Huang Shijie2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | The gpmi_nfc_* is the legacy name. In order to avoid the confusion, The patch renames the gpmi_nfc_* functions to gpmi_nand_*. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: gpmi: remove the unused lineHuang Shijie2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | We do not use the chip->oob_poi in the mx23_write_transcription_stamp. So remove the unused line. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: gpmi: delete the gpmi_pre_bbt_scanHuang Shijie2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We do not scan the BBT after we call the gpmi_pre_bbt_scan, so it has lost the meaning of existence. This patch merges this function into gpmi_init_last, and delete it. This patch does not change any logic. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: gpmi: do not use the local array to do the DMA transferHuang Shijie2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The local array feature[] is in the stack. We can see the warning when we enable the CONFIG_DMA_API_DEBUG: ---------------------------------------------------------- WARNING: at lib/dma-debug.c:950 check_for_stack+0xac/0xf8() gpmi-nand 112000.gpmi-nand: DMA-API: device driver maps memory fromstack [addr=dc05be34] Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.17-16851-g2414a73 #1324 [<80014cbc>] (unwind_backtrace+0x0/0x138) from [<8001251c>] (show_stack+0x10/0x14) [<8001251c>] (show_stack+0x10/0x14) from [<8002699c>] (warn_slowpath_common+0x4c/0x68) [<8002699c>] (warn_slowpath_common+0x4c/0x68) from [<80026a4c>] (warn_slowpath_fmt+0x30/0x40) [<80026a4c>] (warn_slowpath_fmt+0x30/0x40) from [<8028e2f8>] (check_for_stack+0xac/0xf8) [<8028e2f8>] (check_for_stack+0xac/0xf8) from [<8028e438>] (debug_dma_map_sg+0xf4/0x188) [<8028e438>] (debug_dma_map_sg+0xf4/0x188) from [<803968d0>] (prepare_data_dma+0xb8/0x1a8) [<803968d0>] (prepare_data_dma+0xb8/0x1a8) from [<80397b20>] (gpmi_send_data+0x84/0xfc) [<80397b20>] (gpmi_send_data+0x84/0xfc) from [<8038c2b4>] (nand_onfi_set_features+0x50/0x74) [<8038c2b4>] (nand_onfi_set_features+0x50/0x74) from [<80397198>] (gpmi_extra_init+0x90/0x170) [<80397198>] (gpmi_extra_init+0x90/0x170) from [<8039520c>] (gpmi_nand_probe+0x2f8/0xb3c) [<8039520c>] (gpmi_nand_probe+0x2f8/0xb3c) from [<8031b974>] (platform_drv_probe+0x18/0x1c) ---------------------------------------------------------- The patch uses the kzalloc to allocate the buffer, and free it when we do not use it anymore. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: make ECC configuration checks more explicitBrian Norris2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada BCH configuration in this driver uses one of the two following ECC schemes: 16-bit correction per 2048 bytes 16-bit correction per 1024 bytes These are sufficient for mapping to the 4-bit per 512-bytes and 8-bit per 512-bytes (respectively) minimum correctability requirements of many common NAND. The current code only checks for the required strength (4-bit or 8-bit) without checking the ECC step size that is associated with that strength (and simply assumes it is 512). While that is often a safe assumption to make, let's make it explicit, since we have that information. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com>
* | | mtd: nand: pxa3xx: Add ECC BCH correctable errors detectionEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit extends the ECC correctable error detection to include ECC BCH errors. The number of BCH correctable errors can be any up to 16, and the actual value is exposed in the NDSR register. Therefore, we change some symbol names to refer to correctable or uncorrectable (instead of single-bit or double-bit as it was in the Hamming case) and while at it, cleanup the detection code slightly. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Add multiple chunk write supportEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds write support for large pages (4 KiB, 8 KiB). Such support is implemented by issuing a multiple command sequence, transfering a set of 2 KiB chunks per transaction. The splitted command sequence requires to send the SEQIN command independently of the PAGEPROG command and therefore it's set as an execution command. Since PAGEPROG enables ECC, each 2 KiB chunk of data is written together with ECC code at a controller-fixed location within the flash page. Currently, only devices with a 4 KiB page size has been tested. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Introduce multiple page I/O supportEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As preparation work to fully support large pages, this commit adds the initial infrastructure to support splitted (aka chunked) I/O operation. This commit adds support for read, and follow-up patches will add write support. When a read (aka READ0) command is issued, the driver loops issuing the same command until all the requested data is transfered, changing the 'extended' command field as needed. For instance, if the driver is required to read a 4 KiB page, using a chunk size of 2 KiB, the transaction is splitted in: 1. Monolithic read, first 2 KiB page chunk is read 2. Last naked read, second and last 2KiB page chunk is read If ECC is enabled it is calculated on each chunk transfered and added at a controller-fixed location after the data chunk that must be spare area. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Add a read/write buffers markersEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation to support multiple (aka chunked, aka splitted) page I/O, this commit adds 'data_buff_pos' and 'oob_buff_pos' fields to keep track of where the next read (or write) should be done. This will allow multiple calls to handle_data_pio() to continue the read (or write) operation. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Fix SEQIN column address setEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support page programming with a non-zero "column" address setting. This is important to support OOB writing, through command sequences such as: cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, ofs); write_buf(mtd, oob_buf, 6); cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Move the data buffer clean to prepare_start_command()Ezequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allow future support of multiple page reading/writing, move the data buffer clean out of prepare_set_command(). This is done to prevent the data buffer from being cleaned on every command preparation, when a multiple command sequence is implemented to read/write pages larger than the FIFO size (2 KiB). Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Split prepare_command_pool() in two stagesEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit splits the prepare_command_pool() function into two stages: prepare_start_command() / prepare_set_command(). This is a preparation patch without any functionality changes, and is meant to allow support for multiple page reading/writing operations. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Remove READ0 switch/case falltroughEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | READ0 and READOOB command preparation has a falltrough to SEQIN case, where the command address is specified. This is certainly confusing and makes the code less readable with no added value. Let's remove it. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Add helper function to set page addressEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's simplify the code by first introducing a helper function to set the page address, as done by the READ0, READOOB and SEQIN commands. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Clear cmd buffer #3 (NDCB3) on command startEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | Command buffer #3 is not properly cleared and it keeps the last set value. Fix this by clearing when a command is setup. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Add driver-specific ECC BCH supportEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds the BCH ECC support available in NFCv2 controller. Depending on the detected required strength the respective ECC layout is selected. This commit adds an empty ECC layout, since support to access large pages is first required. Once that support is added, a proper ECC layout will be added as well. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Add bad block handlingEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for flash-based bad block table using Marvell's custom in-flash bad block table layout. The support is enabled a 'flash_bbt' platform data or device tree parameter. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Use waitfunc() to wait for the device to be readyEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In pxa3xx_nand_sensing() instead of simply using info->is_ready after issuing a command, the correct way of checking is to wait for the device to be ready through the chip's waitfunc(). Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Use a completion to signal device readyEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The expected behavior of the waitfunc() NAND chip call is to wait for the device to be READY (this is a standard chip line). However, the current implementation does almost nothing, which opens the possibility of issuing a command to a non-ready device. Fix this by adding a new completion to wait for the ready event to arrive. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Add a nice comment to pxa3xx_set_datasize()Ezequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a comment clarifying the use of pxa3xx_set_datasize() which is only applicable on data read/write commands (i.e. commands with a data cycle, such as READID, READ0, STATUS, etc.) Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Replace host->page_size by mtd->writesizeEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no need to privately store the device page size as it's available in mtd structure field mtd->writesize. Also, this removes the hardcoded page size value, leaving the auto-detected value only. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Split FIFO size from to-be-read FIFO countEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a fifo_size field to represent the size of the controller's FIFO buffer, and use it to distinguish that size from the amount of data bytes to be read from the FIFO. This is important to support devices with pages larger than the controller's internal FIFO, that need to read the pages in FIFO-sized chunks. In particular, the current code is at least confusing, for it mixes all the different sizes involved: FIFO size, page size and data size. This commit starts the cleaning by removing the info->page_size field that is not currently used. The host->page_size field should also be removed and use always mtd->writesize instead. Follow up commits will clean this up. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Use chip->cmdfunc instead of the internalEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Whenever possible, it's always better to use the generic chip->cmdfunc instead of the internal pxa3xx_nand_cmdfunc(). In this particular case, this will allow to have multiple cmdfunc() implementations for different SoC variants. Reviewed-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Early variant detectionEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to customize early settings depending on the detected SoC variant, move the detection to be before the nand_chip struct filling. In a follow-up patch, this change is needed to detect the variant *before* the call to alloc_nand_resource(), which allows to set a different cmdfunc() for each variant. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: read_page() returns max_bitflipsEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | As per the ecc.read_page() prototype, we must return the maximum number of bitflips that were corrected on any one region covering an ecc step. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Prevent sub-page writesEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | The current driver doesn't support sub-page writing, so report that to the NAND core. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Make config menu show supported platformsEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | Since we have now support for the NFCv2 controller found on Armada 370/XP platforms. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: pxa3xx: Add documentation about the controllerEzequiel Garcia2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Given there's no public specification to this date, and in order to capture some important details and singularities about the controller let's document them once and for good. Cc: linux-doc@vger.kernel.org Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: pasemi_nand.c: remove superfluous name castGeert Uytterhoeven2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | device_driver.name is "const char *" Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Olof Johansson <olof@lixom.net> Cc: linux-mtd@lists.infradead.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: gpmi-lib: Make checkpatch happyFabio Estevam2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following checkpatch warnings: WARNING: line over 80 characters #268: FILE: mtd/nand/gpmi-nand/gpmi-lib.c:268: + * consecutive reboots. The latter case has not been seen on the MX23 yet, WARNING: space prohibited before semicolon #356: FILE: mtd/nand/gpmi-nand/gpmi-lib.c:356: + (target.tRHOH_in_ns >= 0) ; WARNING: space prohibited before semicolon #1006: FILE: mtd/nand/gpmi-nand/gpmi-lib.c:1006: + BF_GPMI_TIMING0_DATA_SETUP(hw.data_setup_in_cycles) ; Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: gpmi: Use devm_clk_get()Fabio Estevam2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | Using devm_clk_get() can make the code smaller and cleaner. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: gpmi: add a new DT property to use the datasheet's minimum required ECCHuang Shijie2014-01-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In default way, we use the ecc_strength/ecc_step size calculated by ourselves and use all the OOB area. This patch adds a new property : "fsl,use-minimum-ecc" If we enable it, we will firstly try to use the datasheet's minimum required ECC provided by the MTD layer (the ecc_strength_ds/ecc_step_ds fields in the nand_chip{}). So we may have free space in the OOB area by using the minimum ECC, and we may support JFFS2 with some SLC NANDs, such as Micron's SLC NAND. If we fail to use the minimum ECC, we will use the legacy method to calculate the ecc_strength and ecc_step size. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | | mtd: nand: omap2: Fix OMAP_BCH option dependencyEzequiel Garcia2014-01-03
|/ / | | | | | | | | | | | | | | | | | | | | | | This option does not need to depend in MTD_NAND, for it's enclosed under it. Also, it's wrong to make it depend in ARCH_OMAP3 only since the controller is used in a wider range of SoCs. Instead, just leave the dependency on the OMAP2 driver option. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: pxa3xx: Use info->use_dma to release DMA resourcesEzequiel Garcia2013-12-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit: commit 62e8b851783138a11da63285be0fbf69530ff73d Author: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Date: Fri Oct 4 15:30:38 2013 -0300 mtd: nand: pxa3xx: Allocate data buffer on detected flash size the way the buffer is allocated was changed: the first READ_ID is issued with a small kmalloc'ed buffer. Only once the flash page size is detected the DMA buffers are allocated, and info->use_dma is set. Currently, if the device detection fails, the driver checks the 'use_dma' module parameter and tries to release unallocated DMA resources. Fix this by checking the proper indicator of the DMA allocation, which is 'info->use_dma'. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | Partially revert "mtd: nand: pxa3xx: Introduce 'marvell,armada370-nand' ↵Ezequiel Garcia2013-12-12
|/ | | | | | | | | | | | | | | compatible string" This partially reverts c0f3b8643a6fa2461d70760ec49d21d2b031d611. The "armada370-nand" compatible support is not complete, and it was mistake to add it. Revert it and postpone the support until the infrastructure is in place. Cc: <stable@vger.kernel.org> # 3.12 Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2013-11-20
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slave-dmaengine changes from Vinod Koul: "This brings for slave dmaengine: - Change dma notification flag to DMA_COMPLETE from DMA_SUCCESS as dmaengine can only transfer and not verify validaty of dma transfers - Bunch of fixes across drivers: - cppi41 driver fixes from Daniel - 8 channel freescale dma engine support and updated bindings from Hongbo - msx-dma fixes and cleanup by Markus - DMAengine updates from Dan: - Bartlomiej and Dan finalized a rework of the dma address unmap implementation. - In the course of testing 1/ a collection of enhancements to dmatest fell out. Notably basic performance statistics, and fixed / enhanced test control through new module parameters 'run', 'wait', 'noverify', and 'verbose'. Thanks to Andriy and Linus [Walleij] for their review. - Testing the raid related corner cases of 1/ triggered bugs in the recently added 16-source operation support in the ioatdma driver. - Some minor fixes / cleanups to mv_xor and ioatdma" * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (99 commits) dma: mv_xor: Fix mis-usage of mmio 'base' and 'high_base' registers dma: mv_xor: Remove unneeded NULL address check ioat: fix ioat3_irq_reinit ioat: kill msix_single_vector support raid6test: add new corner case for ioatdma driver ioatdma: clean up sed pool kmem_cache ioatdma: fix selection of 16 vs 8 source path ioatdma: fix sed pool selection ioatdma: Fix bug in selftest after removal of DMA_MEMSET. dmatest: verbose mode dmatest: convert to dmaengine_unmap_data dmatest: add a 'wait' parameter dmatest: add basic performance metrics dmatest: add support for skipping verification and random data setup dmatest: use pseudo random numbers dmatest: support xor-only, or pq-only channels in tests dmatest: restore ability to start test at module load and init dmatest: cleanup redundant "dmatest: " prefixes dmatest: replace stored results mechanism, with uniform messages Revert "dmatest: append verify result to results" ...
| * Merge commit 'dmaengine-3.13-v2' of ↵Vinod Koul2013-11-16
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine Pull dmaengine changes from Dan 1/ Bartlomiej and Dan finalized a rework of the dma address unmap implementation. 2/ In the course of testing 1/ a collection of enhancements to dmatest fell out. Notably basic performance statistics, and fixed / enhanced test control through new module parameters 'run', 'wait', 'noverify', and 'verbose'. Thanks to Andriy and Linus for their review. 3/ Testing the raid related corner cases of 1/ triggered bugs in the recently added 16-source operation support in the ioatdma driver. 4/ Some minor fixes / cleanups to mv_xor and ioatdma. Conflicts: drivers/dma/dmatest.c Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * dmaengine: remove DMA unmap flagsBartlomiej Zolnierkiewicz2013-11-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove no longer needed DMA unmap flags: - DMA_COMPL_SKIP_SRC_UNMAP - DMA_COMPL_SKIP_DEST_UNMAP - DMA_COMPL_SRC_UNMAP_SINGLE - DMA_COMPL_DEST_UNMAP_SINGLE Cc: Vinod Koul <vinod.koul@intel.com> Cc: Tomasz Figa <t.figa@samsung.com> Cc: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jon Mason <jon.mason@intel.com> Acked-by: Mark Brown <broonie@linaro.org> [djbw: clean up straggling skip unmap flags in ntb] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2013-11-15
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull trivial tree updates from Jiri Kosina: "Usual earth-shaking, news-breaking, rocket science pile from trivial.git" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (23 commits) doc: usb: Fix typo in Documentation/usb/gadget_configs.txt doc: add missing files to timers/00-INDEX timekeeping: Fix some trivial typos in comments mm: Fix some trivial typos in comments irq: Fix some trivial typos in comments NUMA: fix typos in Kconfig help text mm: update 00-INDEX doc: Documentation/DMA-attributes.txt fix typo DRM: comment: `halve' -> `half' Docs: Kconfig: `devlopers' -> `developers' doc: typo on word accounting in kprobes.c in mutliple architectures treewide: fix "usefull" typo treewide: fix "distingush" typo mm/Kconfig: Grammar s/an/a/ kexec: Typo s/the/then/ Documentation/kvm: Update cpuid documentation for steal time and pv eoi treewide: Fix common typo in "identify" __page_to_pfn: Fix typo in comment Correct some typos for word frequency clk: fixed-factor: Fix a trivial typo ...
| * | | treewide: Fix typo in printkMasanari Iida2013-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct spelling typo within various part of the kernel Signed-off-by: Masanari Iida <standby24x7@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | | | tree-wide: use reinit_completion instead of INIT_COMPLETIONWolfram Sang2013-11-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use this new function to make code more comprehensible, since we are reinitialzing the completion, not initializing. [akpm@linux-foundation.org: linux-next resyncs] Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13) Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | Merge tag 'for-linus-20131112' of git://git.infradead.org/linux-mtdLinus Torvalds2013-11-13
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD changes from Brian Norris: - Unify some compile-time differences so that we have fewer uses of #ifdef CONFIG_OF in atmel_nand - Other general cleanups (removing unused functions, options, variables, fields; use correct interfaces) - Fix BUG() for new odd-sized NAND, which report non-power-of-2 dimensions via ONFI - Miscellaneous driver fixes (SPI NOR flash; BCM47xx NAND flash; etc.) - Improve differentiation between SLC and MLC NAND -- this clarifies an ABI issue regarding the MTD "type" (in sysfs and in the MEMGETINFO ioctl), where the MTD_MLCNANDFLASH type was present but inconsistently used - Extend GPMI NAND to support multi-chip-select NAND for some platforms - Many improvements to the OMAP2/3 NAND driver, including an expanded DT binding to bring us closer to mainline support for some OMAP systems - Fix a deadlock in the error path of the Atmel NAND driver probe - Correct the error codes from MTD mmap() to conform to POSIX and the Linux Programmer's Manual. This is an acknowledged change in the MTD ABI, but I can't imagine somebody relying on the non-standard -ENOSYS error code specifically. Am I just being unimaginative? :) - Fix a few important GPMI NAND bugs (one regression from 3.12 and one long-standing race condition) - More? Read the log! * tag 'for-linus-20131112' of git://git.infradead.org/linux-mtd: (98 commits) mtd: gpmi: fix the NULL pointer mtd: gpmi: fix kernel BUG due to racing DMA operations mtd: mtdchar: return expected errors on mmap() call mtd: gpmi: only scan two chips for imx6 mtd: gpmi: Use devm_kzalloc() mtd: atmel_nand: fix bug driver will in a dead lock if no nand detected mtd: nand: use a local variable to simplify the nand_scan_tail mtd: nand: remove deprecated IRQF_DISABLED mtd: dataflash: Say if we find a device we don't support mtd: nand: omap: fix error return code in omap_nand_probe() mtd: nand_bbt: kill NAND_BBT_SCANALLPAGES mtd: m25p80: fixup device removal failure path mtd: mxc_nand: Include linux/of.h header mtd: remove duplicated include from mtdcore.c mtd: m25p80: add support for Macronix mx25l3255e mtd: nand: omap: remove selection of BCH ecc-scheme via KConfig mtd: nand: omap: updated devm_xx for all resource allocation and free calls mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead of lib/bch.c mtd: nand: omap: clean-up ecc layout for BCH ecc schemes mtd: nand: omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probe ...
| * | | | mtd: gpmi: fix the NULL pointerHuang Shijie2013-11-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The imx23 board will check the fingerprint, so it will call the mx23_check_transcription_stamp. This function will use @chip->buffers->databuf as its buffer which is allocated in the nand_scan_tail(). Unfortunately, the mx23_check_transcription_stamp is called before the nand_scan_tail(). So we will meet a NULL pointer bug: -------------------------------------------------------------------- [ 1.150000] NAND device: Manufacturer ID: 0xec, Chip ID: 0xd7 (Samsung NAND 4GiB 3,3V 8-bit), 4096MiB, page size: 4096, OOB size: 8 [ 1.160000] Unable to handle kernel NULL pointer dereference at virtual address 000005d0 [ 1.170000] pgd = c0004000 [ 1.170000] [000005d0] *pgd=00000000 [ 1.180000] Internal error: Oops: 5 [#1] ARM [ 1.180000] Modules linked in: [ 1.180000] CPU: 0 PID: 1 Comm: swapper Not tainted 3.12.0 #89 [ 1.180000] task: c7440000 ti: c743a000 task.ti: c743a000 [ 1.180000] PC is at memcmp+0x10/0x54 [ 1.180000] LR is at gpmi_nand_probe+0x42c/0x894 [ 1.180000] pc : [<c025fcb0>] lr : [<c02f6a68>] psr: 20000053 [ 1.180000] sp : c743be2c ip : 600000d3 fp : ffffffff [ 1.180000] r10: 000005d0 r9 : c02f5f08 r8 : 00000000 [ 1.180000] r7 : c75858a8 r6 : c75858a8 r5 : c7585b18 r4 : c7585800 [ 1.180000] r3 : 000005d0 r2 : 00000004 r1 : c05c33e4 r0 : 000005d0 [ 1.180000] Flags: nzCv IRQs on FIQs off Mode SVC_32 ISA ARM Segment kernel [ 1.180000] Control: 0005317f Table: 40004000 DAC: 00000017 [ 1.180000] Process swapper (pid: 1, stack limit = 0xc743a1c0) -------------------------------------------------------------------- This patch rearrange the init procedure: Set the NAND_SKIP_BBTSCAN to skip the nand scan firstly, and after we set the proper settings, we will call the chip->scan_bbt() manually. Cc: stable@vger.kernel.org # 3.12 Signed-off-by: Huang Shijie <b32955@freescale.com> Reported-by: Fabio Estevam <festevam@gmail.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: gpmi: fix kernel BUG due to racing DMA operationsHuang Shijie2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [1] The gpmi uses the nand_command_lp to issue the commands to NAND chips. The gpmi issues a DMA operation with gpmi_cmd_ctrl when it handles a NAND_CMD_NONE control command. So when we read a page(NAND_CMD_READ0) from the NAND, we may send two DMA operations back-to-back. If we do not serialize the two DMA operations, we will meet a bug when 1.1) we enable CONFIG_DMA_API_DEBUG, CONFIG_DMADEVICES_DEBUG, and CONFIG_DEBUG_SG. 1.2) Use the following commands in an UART console and a SSH console: cmd 1: while true;do dd if=/dev/mtd0 of=/dev/null;done cmd 1: while true;do dd if=/dev/mmcblk0 of=/dev/null;done The kernel log shows below: ----------------------------------------------------------------- kernel BUG at lib/scatterlist.c:28! Unable to handle kernel NULL pointer dereference at virtual address 00000000 ......................... [<80044a0c>] (__bug+0x18/0x24) from [<80249b74>] (sg_next+0x48/0x4c) [<80249b74>] (sg_next+0x48/0x4c) from [<80255398>] (debug_dma_unmap_sg+0x170/0x1a4) [<80255398>] (debug_dma_unmap_sg+0x170/0x1a4) from [<8004af58>] (dma_unmap_sg+0x14/0x6c) [<8004af58>] (dma_unmap_sg+0x14/0x6c) from [<8027e594>] (mxs_dma_tasklet+0x18/0x1c) [<8027e594>] (mxs_dma_tasklet+0x18/0x1c) from [<8007d444>] (tasklet_action+0x114/0x164) ----------------------------------------------------------------- 1.3) Assume the two DMA operations is X (first) and Y (second). The root cause of the bug: Assume process P issues DMA X, and sleep on the completion @this->dma_done. X's tasklet callback is dma_irq_callback. It firstly wake up the process sleeping on the completion @this->dma_done, and then trid to unmap the scatterlist S. The waked process P will issue Y in another ARM core. Y initializes S->sg_magic to zero with sg_init_one(), while dma_irq_callback is unmapping S at the same time. See the diagram: ARM core 0 | ARM core 1 ------------------------------------------------------------- (P issues DMA X, then sleep) --> | | (X's tasklet wakes P) --> | | | <-- (P begin to issue DMA Y) | (X's tasklet unmap the | scatterlist S with dma_unmap_sg) --> | <-- (Y calls sg_init_one() to init | scatterlist S) | [2] This patch serialize both the X and Y in the following way: Unmap the DMA scatterlist S firstly, and wake up the process at the end of the DMA callback, in such a way, Y will be executed after X. After this patch: ARM core 0 | ARM core 1 ------------------------------------------------------------- (P issues DMA X, then sleep) --> | | (X's tasklet unmap the | scatterlist S with dma_unmap_sg) --> | | (X's tasklet wakes P) --> | | | <-- (P begin to issue DMA Y) | | <-- (Y calls sg_init_one() to init | scatterlist S) | Cc: stable@vger.kernel.org # 3.2 Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | | | mtd: gpmi: only scan two chips for imx6Huang Shijie2013-11-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We cannot scan two chips for imx23 and imx28: imx23: the Ready-Busy1 line is not connected for some board. imx28: we do not set the pinctrl for Ready-Busy1 So we only scan two chips for imx6. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-08 20:41:38 -0400