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| * | i2c: tegra: proper handling of error casesShardar Shariff Md2016-09-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To summarize the issue observed in error cases: SW Flow: For i2c message transfer, packet header and data payload is posted and then required error/packet completion interrupts are enabled later. HW flow: HW process the packet just after packet header is posted, if ARB lost/NACK error occurs (SW will not handle immediately when error happens as error interrupts are not enabled at this point). HW assumes error is acknowledged and clears current data in FIFO, But SW here posts the remaining data payload which still stays in FIFO as stale data (data without packet header). Now once the interrupts are enabled, SW handles ARB lost/NACK error by clearing the ARB lost/NACK interrupt. Now HW assumes that SW attended the error and will parse/process stale data (data without packet header) present in FIFO which causes invalid NACK errors. Fix: Enable the error interrupts before posting the packet into FIFO which make sure HW to not clear the fifo. Also disable the packet mode before acknowledging errors (ARB lost/NACK error) to not process any stale data. As error interrupts are enabled before posting the packet header use spinlock to avoid preempting. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: use atomic poll function during configurationShardar Shariff Md2016-09-08
| | | | | | | | | | | | | | | | | | | | | | | | Use readl_poll_timeout_atomic() function as *wait_for_config_load() function can be called from interrupt context. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: add separate function for config_load programingShardar Shariff Md2016-09-08
| | | | | | | | | | | | | | | | | | | | | | | | Define separate function for configuration load register handling to make it use by different functions later. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: If fifo flush fails return errorShardar Shariff Md2016-09-08
| | | | | | | | | | | | | | | | | | | | | | | | During i2c controller initialization, when fifo flush fails return error instead of returning the error during exit. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: use readl_poll_timeout after config_load reg programmedShardar Shariff Md2016-09-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | After CONFIG_LOAD register is programmed instead of explicitly waiting for timeout, use readl_poll_timeout() to check for register value to get updated or wait till timeout. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: shmobile: Use ARCH_SHMOBILE instead of SUPERHGeert Uytterhoeven2016-09-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "i2c-sh_mobile" is used on sh7343, sh7366, sh7722, sh7723, and sh7724 only. As all of the above select ARCH_SHMOBILE, restrict its driver dependencies from SUPERH to ARCH_SHMOBILE. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: core: put literals on one line in dev_*() callsAndy Shevchenko2016-08-30
| | | | | | | | | | | | | | | | | | | | | It's better to have strings in the code like they appeared in the output. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: move locking operations to their own structPeter Rosin2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | This makes it trivial to constify them, so do that. Signed-off-by: Peter Rosin <peda@axentia.se> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Add pinctrl supportJon Hunter2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Tegra124/132 the pins for I2C6 are shared with the Display Port AUX (DPAUX) channel and on Tegra210 the pins for I2C4 and I2C6 are shared with DPAUX1 and DPAUX0, respectively. The multiplexing of the pins is handled by a register in the DPAUX and so the Tegra DPAUX driver has been updated to register a pinctrl device for managing these pins. The pins for these particular I2C devices are bound to the I2C device prior to probing. However, these I2C devices are in a different power partition to the DPAUX devices that own the pins. Hence, it is desirable to place the pins in the 'idle' state and allow the DPAUX power partition to switch off, when these I2C devices is not in use. Therefore, add calls to place the I2C pins in the 'default' and 'idle' states when the I2C device is runtime resumed and suspended, respectively. Please note that the pinctrl functions that set the state of the pins check to see if the devices has pins associated and will return zero if they do not. Therefore, it is safe to call these pinctrl functions even for I2C devices that do not have any pins associated. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Add runtime power-management supportJon Hunter2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the Tegra I2C driver to use runtime PM and move the code in the tegra_i2c_clock_enable/disable() functions to the PM runtime resume and suspend callbacks, respectively. Note that given that CONFIG_PM is not mandatory for Tegra, if CONFIG_PM is not enabled and so runtime PM is not enabled, ensure that the I2C clocks are turned on during probe and kept on by calling the resume callback directly. In the function tegra_i2c_init(), the variable 'err' does not need to be initialised to zero in tegra_i2c_init() because it is initialised when pm_runtime_get_sync() is called. Furthermore, to ensure we only return 0 from tegra_i2c_init(), it is necessary to re-initialise 'err' to 0 after a successful call to pm_runtime_get_sync() because it can return a positive value on success. However, alternatively re-initialise 'err' by using the return value of the function tegra_i2c_flush_fifos() because it can only be 0 or -ETIMEDOUT. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Simplify I2C resumeJon Hunter2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2C adapter is unlocked regardless of whether the tegra_i2c_init() called during the resume is successful or not. However, if the tegra_i2c_init() is not successful, then ->is_suspended is not set to false. Simplify the resume code by only setting ->is_suspended to false if tegra_i2c_init() is successful and return the error code from tegra_i2c_init(). Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Use device name for adapter nameJon Hunter2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All Tegra I2C devices have the name "Tegra I2C adapter" which is not very useful when viewing the I2C adapter names via the sysfs. Therefore, use the device name, which is unique for each I2C device, instead. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Remove non device-tree supportJon Hunter2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra has only supported device-tree for platform/board configuration for quite some time now and so simplify the Tegra I2C driver by dropping code for non device-tree platforms/boards. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Add missing new line charactersJon Hunter2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | Add missing new line characters for the various error messages. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Fix missing blank lines after declarationsJon Hunter2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checkpatch warns about missing blank lines after declarations in the Tegra I2C driver and so fix these. Note that the initialisation of 'val' to zero in tegra_dvc_init() is unnecessary and so remove this. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Use BIT macroJon Hunter2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Checkpatch warns about spacing around the '<<' operator in the Tegra I2C driver and so fix these by converting the bit definitions that are using this operator to use the BIT macro. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: tegra: Fix lines over 80 charactersJon Hunter2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checkpatch warns about some lines over 80 characters in the Tegra I2C driver and so fix these. While we are at it, prefix the second instance of "STOP condition" in the comment with a "the". Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | Merge branch 'i2c-mux-dt-3' of https://github.com/peda-r/i2c-mux into ↵Wolfram Sang2016-08-25
| |\ \ | | | | | | | | | | | | | | | | | | | | i2c/for-4.9 Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| | * | i2c: pca954x: add device tree bindingPeter Rosin2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No longer rely on the implicit matching with the i2c device name, use an explicit compatible string instead. Keep a direct pointer to the chip description instead of an index into the chip description array. Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
| | * | i2c: pca9541: add device tree bindingPeter Rosin2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No longer rely on the implicit matching with the i2c device name, use an explicit compatible string instead. Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
| | * | i2c: mux: inform the i2c mux core about how it is usedPeter Rosin2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2c mux core can then take appropriate action depending on if it is used for an actual i2c mux, for a gate or for an arbitrator (the last is the case for these drivers). This adds support for the new clearer and more compact devicetree bindings that was added recently. Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
| | * | i2c: mux: add support for 'i2c-mux', 'i2c-arb' and 'i2c-gate' DT subnodesPeter Rosin2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backwards compatibility is preserved; the subnodes are in practice optional. However, the mux core needs to know what subnode it should examine, so add a couple of new flags for i2c_mux_alloc for this purpose. The rule is that if the mux core finds a 'reg' property in the appropriate subnode, e.g. if 'reg' exists in the 'i2c-mux' subnode, then the mux core will assume that this is an old style entry and not an i2c-mux subnode (correspondingly for arbitrators and gates with 'i2c-arb' and 'i2c-gate'). Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
| * | | i2c: designware: do not disable adapter after transferLucas De Marchi2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disabling the adapter after each transfer adds additional delays for each I2C transfer. Even if we don't wait for it to be disabled anymore, on next transfer we will need to if we have several transfers in a row. Now during the transfer init we check if IC_TAR can be changed dynamically, the status register for no activity and TX buffer being empty. In this case we don't need to disable it When a transfer fails the adapter will still be disabled - this is a conservative approach. When transfers succeed, the adapter is left enabled and it's configured so to disable interrupts. Alternating register reads on 2 slaves: perf stat -r4 chrt -f 10 ./i2c-test /dev/i2c-1 25000 0x40 0x6 0x1e 0x00 Before: 8.638705161 seconds time elapsed ( +- 5.90% ) After: 7.516821591 seconds time elapsed ( +- 0.11% ) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: designware: detect when dynamic tar update is possibleLucas De Marchi2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adapter can be synthesized with dynamic tar update enabled or disabled. When enabled it is not necessary to disable the adapter to change the slave address in some situations, which saves some time per transaction. There is no direct register to know if this feature is enabled but we can do it indirectly by writing to the 10BIT_ADDR field in IC_CON: this field is read only when dynamic tar update is enabled. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: designware: add common functions for lockingLucas De Marchi2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are used in 2 places and will be needed in more. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: designware: wait for disable/enable only if necessaryJosé Roberto de Souza2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we aren't going to continue using the controller we can just disable it instead of waiting for it to complete. The biggest improvement here is when a I2C transaction is completed and it doesn't block until the adapter is disabled. When a new transfer is needed we will disable and wait for its completion. This way the adapter will continue changing its state in parallel to the execution of the thread that requested the I2C transaction saving most of the time 25~250 usec per I2C transaction. A simple program doing a register read (1 byte write, 1 byte read) alternating on 2 different slaves repeated 25k times for each and measurements taken 4 times we get: perf stat -r4 chrt -f 10 ./i2c-test /dev/i2c-1 25000 0x40 0x6 0x1e 0x00 Before: 30.879317977 seconds time elapsed ( +- 14.83% ) After: 8.638705161 seconds time elapsed ( +- 5.90% ) Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Christian Ruppert <christian.ruppert@alitech.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: designware: Find bus speed from ACPIJarkko Nikula2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fast mode is the default speed of i2c-designware which can be overridden by platform data or by "clock-frequency" device property. Even though the ACPI 5.1 can pass device properties via _DSD method, shipping systems define the connection speed between I2C host and each slave in their I2cSerialBus resources. Which means speed is not defined per bus but per slave. As there is now support in i2c-core to find the bus speed from ACPI use that to set up the bus speed prior registering the I2C adapter. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: core: Add function for finding the bus speed from ACPI, take 2Jarkko Nikula2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACPI 5 specification doesn't have property for the I2C bus speed but I2cSerialBus resource descriptor which define each controller-slave connection define the maximum speed supported by that connection. Thus finding the maximum safe speed for the bus is to walk through all I2cSerialBus resources that are associated to I2C controller and use the speed of slowest connection. Add function i2c_acpi_find_bus_speed() to the i2c-core that adapter drivers can call prior registering itself to core. This implies two-step walk through the I2cSerialBus resources: call to i2c_acpi_find_bus_speed() does the first scan and finds the safe bus speed that adapter drivers can set up. Adapter driver registration does the second scan when i2c-core creates the I2C slaves by calling the i2c_acpi_register_devices(). In that way the bus speed is set in case slave device probe gets called during registration and does communication. Previous version commit 55d38d060e99 ("i2c: core: Add function for finding the bus speed from ACPI") got reverted due merge conflicts from commit 525e6fabeae2 ("i2c / ACPI: add support for ACPI reconfigure notifications"). This version is a bit bigger than previous version but is still sharing the lowest and complicated part of I2cSerialBus lookup routines with the existing code. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: core: Cleanup I2C ACPI namespace, take 2Jarkko Nikula2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C ACPI enumeration was originally implemented in another module under drivers/acpi/ but was later moved into i2c-core with added support for I2C ACPI operation region. Rename these acpi_i2c_ prefixed functions, structures and defines in i2c-core to i2c_acpi_ in order to have more consistent name space. This is updated version from commit a7003b65801e ("i2c: core: Cleanup I2C ACPI namespace") that got reverted due merge conflicts from commit 525e6fabeae2 ("i2c / ACPI: add support for ACPI reconfigure notifications"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: designware: Enable high speed modeWeifeng Voon2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enabled high speed mode. High speed mode can be turn on by setting the clk_freq to 3400000. High speed HCNT and LCNT are needed as there is no default value provided. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: designware: set the common config before the if elseWeifeng Voon2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DW_IC_CON_MASTER, DW_IC_CON_SLAVE_DISABLE and DW_IC_CON_RESTART_EN are common config that need to be set for i2c designware master. So, configure it first without having to repeat inside the if else. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: designware: Enable fast mode plusWeifeng Voon2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enabled fast mode plus. The fast mode plus and fast speed share the same HCNT and LCNT register. So, the fast mode plus will only run when the HCNT and LCNT value is provided. Else, it will run at fast speed as default. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: designware: get fast plus and high speed *CNT configurationWeifeng Voon2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C designware controller can run at fast mode plus and high speed. This patch adds the capability to get the HCNT, LCNT configuration via FPCN (fast plus) and HSCN (high speed) ACPI method. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: designware: Move clk_freq into struct dw_i2c_devWeifeng Voon2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2c designware controller operate speed is configured in the register IC_CON. Previously the operate speed is determined by a local variable clk_freq. This patch will move the local variable clk_freq into struct dw_i2c_dev. This change will ease the set and get of the clk_freq. Signed-off-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: octeon: Use booleon values for booleon variablesJan Glauber2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize booleon values with true instead of 1. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: octeon: Sort include files alphabeticallyJan Glauber2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sort include files alphabetically to reduce probability of merge conflicts. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: octeon,thunderx: Move register offsets to structJan Glauber2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The register offsets are different between Octeon and ThunderX so move them into the algorithm struct and get rid of the define. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: thunderx: Add SMBUS alert supportJan Glauber2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SMBUS alert interrupt support. For now only device tree is supported for specifying the alert. In case of ACPI an error is returned. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: thunderx: Add i2c driver for ThunderX SOCJan Glauber2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ThunderX SOC uses the same i2c block as the Octeon SOC. The main difference is that on ThunderX the device is a PCI device so device probing is done via PCI, interrupts are MSI-X. The clock rates can be set via device tree or ACPI. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: octeon: Split the driver into two partsJan Glauber2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move common functionality into a separate file in preparation of the re-use from the ThunderX i2c driver. Functions are slightly re-ordered but no other changes are included. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: octeon: Rename driver to prepare for splitJan Glauber2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an intermediate commit in preparation of the driver split. The module rename in this commit will be reverted in the next patch, this is just done to make the series bisectible. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: add i2c_trylock_bus wrapper, use itPeter Rosin2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This unifies usage with i2c_lock_bus and i2c_unlock_bus, and paves the way for the next patch which looks a bit saner with this preparatory work taken care of beforehand. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: uniphier{-f}: don't print error when adding adapter failsWolfram Sang2016-08-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core will do this for us now. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: don't print error when adding adapter failsWolfram Sang2016-08-22
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core will do this for us now. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Peter Korsgaard <peter@korsgaard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Neil Horman <nhorman@tuxdriver.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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| \ \
*-. \ \ Merge branches 'acpi-wdat' and 'acpi-ec'Rafael J. Wysocki2016-10-01
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * acpi-wdat: watchdog: wdat_wdt: Fix warning for using 0 as NULL watchdog: wdat_wdt: fix return value check in wdat_wdt_probe() platform/x86: intel_pmc_ipc: Do not create iTCO watchdog when WDAT table exists i2c: i801: Do not create iTCO watchdog when WDAT table exists mfd: lpc_ich: Do not create iTCO watchdog when WDAT table exists ACPI / watchdog: Add support for WDAT hardware watchdog * acpi-ec: ACPI / EC: Fix issues related to boot_ec ACPI / EC: Fix a gap that ECDT EC cannot handle EC events ACPI / EC: Fix a memory leakage issue in acpi_ec_add() ACPI / EC: Cleanup first_ec/boot_ec code ACPI / EC: Enable event freeze mode to improve event handling for suspend process ACPI / EC: Add PM operations to improve event handling for suspend process ACPI / EC: Add PM operations to improve event handling for resume process ACPI / EC: Fix an issue that SCI_EVT cannot be detected after event is enabled ACPI / EC: Add EC_FLAGS_QUERY_ENABLED to reveal a hidden logic ACPI / EC: Add PM operations for suspend/resume noirq stage
| * | | | i2c: i801: Do not create iTCO watchdog when WDAT table existsMika Westerberg2016-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACPI WDAT table is the preferred way to use hardware watchdog over the native iTCO_wdt. Windows only uses this table for its hardware watchdog implementation so we should be relatively safe to trust it has been validated by OEMs Prevent iTCO watchdog creation if we detect that there is ACPI WDAT table. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | | | | i2c: qup: skip qup_i2c_suspend if the device is already runtime suspendedSudeep Holla2016-09-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the i2c device is already runtime suspended, if qup_i2c_suspend is executed during suspend-to-idle or suspend-to-ram it will result in the following splat: WARNING: CPU: 3 PID: 1593 at drivers/clk/clk.c:476 clk_core_unprepare+0x80/0x90 Modules linked in: CPU: 3 PID: 1593 Comm: bash Tainted: G W 4.8.0-rc3 #14 Hardware name: Qualcomm Technologies, Inc. APQ 8016 SBC (DT) PC is at clk_core_unprepare+0x80/0x90 LR is at clk_unprepare+0x28/0x40 pc : [<ffff0000086eecf0>] lr : [<ffff0000086f0c58>] pstate: 60000145 Call trace: clk_core_unprepare+0x80/0x90 qup_i2c_disable_clocks+0x2c/0x68 qup_i2c_suspend+0x10/0x20 platform_pm_suspend+0x24/0x68 ... This patch fixes the issue by executing qup_i2c_pm_suspend_runtime conditionally in qup_i2c_suspend. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* | | | | i2c: mux: pca954x: retry updating the mux selection on failurePeter Rosin2016-09-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cached value of the last selected channel prevents retries on the next call, even on failure to update the selected channel. Fix that. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* | | | | i2c-eg20t: fix race between i2c init and interrupt enableYadi.hu2016-09-21
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the eg20t driver call request_irq() function before the pch_base_address, base address of i2c controller's register, is assigned an effective value. there is one possible scenario that an interrupt which isn't inside eg20t arrives immediately after request_irq() is executed when i2c controller shares an interrupt number with others. since the interrupt handler pch_i2c_handler() has already active as shared action, it will be called and read its own register to determine if this interrupt is from itself. At that moment, since base address of i2c registers is not remapped in kernel space yet,so the INT handler will access an illegal address and then a error occurs. Signed-off-by: Yadi.hu <yadi.hu@windriver.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* | | | i2c: rk3x: Restore clock settings at resume timeDoug Anderson2016-09-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Depending on a number of factors including: - Which exact Rockchip SoC we're working with - How deep we suspend - Which i2c port we're on We might lose the state of the i2c registers at suspend time. Specifically we've found that on rk3399 the i2c ports that are not in the PMU power domain lose their state with the current suspend depth configured by ARM Tursted Firmware. Note that there are very few actual i2c registers that aren't configured per transfer anyway so all we actually need to re-configure are the clock config registers. We'll just add a call to rk3x_i2c_adapt_div() at resume time and be done with it. NOTE: On rk3399 on ports whose power was lost, I put printouts in at resume time. I saw things like: before: con=0x00010300, div=0x00060006 after: con=0x00010200, div=0x00180025 Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: David Wu <david.wu@rock-chips.com> Tested-by: David Wu <david.wu@rock-chips.com> [wsa: removed duplicate const] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-19 20:54:21 -0400