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| * i2c: at91: add support for the HOLD fieldLudovic Desroches2015-12-03
| | | | | | | | | | | | | | | | | | | | | | The hold field allows to configure the data hold time which can be set with the help of the generic binding 'i2c-sda-hold-time-ns'. This feature has been introduced with SAMA5D4 SoC family. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: piix4: remove unneeded assignmentsWolfram Sang2015-12-03
| | | | | | | | | | | | | | | | | | smatch rightfully says: drivers/i2c/busses/i2c-piix4.c:504 piix4_access warn: unused return: i = inb_p() drivers/i2c/busses/i2c-piix4.c:537 piix4_access warn: unused return: i = inb_p() Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Tested-by: Christian Fetzer <fetzer.ch@gmail.com>
| * i2c: mediatek: add i2c first write then read optimizationLiguo Zhang2015-11-30
| | | | | | | | | | | | | | | | | | | | | | | | For platform with auto restart support, between every transfer, i2c controller will trigger an interrupt and SW need to handle it to start new transfer. When doing write-then-read transfer, instead of restart mechanism, using WRRD mode to have controller send both transfer in one request to reduce latency. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Reviewed-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: cadence: Remove the suspended flagShubhrajyoti Datta2015-11-30
| | | | | | | | | | | | | | | | | | The suspended flag is a flag holding the device's PM status. The runtime framework does that for us. Use pm_runtime_suspended call instead. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: cadence: Move to sensible power managementShubhrajyoti Datta2015-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the clocks are enabled at probe and disabled at remove. Which keeps the clocks enabled even if no transaction is going on. This patch enables the clocks at the start of transfer and disables after it. Also adapts to runtime pm. converts dev pm to const to silence a checkpatch warning. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: bcm2835: add I2C_AQ_NO_CLK_STRETCHNicola Corna2015-11-30
| | | | | | | | | | | | | | | | | | | | As reported in the links given below. the BCM2835 has a hardware bug in its i2c module which prevents a correct clock stretching. This patch adds the I2C_AQ_NO_CLK_STRETCH quirk flag to i2c-bcm2835. Signed-off-by: Nicola Corna <nicola@corna.info> [wsa: put the links into the code as comments] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: algo-bit: add I2C_AQ_NO_CLK_STRETCHNicola Corna2015-11-30
| | | | | | | | | | | | | | | | Add I2C_AQ_NO_CLK_STRETCH to drivers/i2c/algos/i2c-algo-bit.c when getscl is not available. Signed-off-by: Nicola Corna <nicola@corna.info> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: xiic: Replace spinlock with mutexLars-Peter Clausen2015-11-30
| | | | | | | | | | | | | | | | | | All protected sections are only called from sleep-able context, so there is no need to use a spinlock. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: taos-evm: replace simple_strtoul by kstrtou8LABBE Corentin2015-11-30
| | | | | | | | | | | | | | | | | | | | The simple_strtoul function is marked as obsolete. This patch replace it by kstrtou8. Reviewed-by: Jean Delvare <jdelvare@suse.de> Tested-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: piix4: Add adapter port name support for SB800 chipsetChristian Fetzer2015-11-30
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for port names for the SB800 chipset. Since the chipset supports a multiplexed main SMBus controller, adding the channel name to the adapter name is necessary to differentiate the ports better (for example in sensors output). Signed-off-by: Christian Fetzer <fetzer.ch@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: piix4: Add support for multiplexed main adapter in SB800Christian Fetzer2015-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SB800 chipset supports a multiplexed main SMBus controller with four ports. The multiplexed ports share the same SMBus address and register set. The port is selected by bits 2:1 of the smb_en register (0x2C). Only one port can be active at any point in time therefore a mutex is needed in order to synchronize access. Additionally, the commit avoids requesting and releasing the SMBus base address index region on every multiplexed transfer by moving the request_region call into piix4_probe. Tested on HP ProLiant MicroServer G7 N54L (where this patch adds support to access sensor data from the w83795adg). Cc: Thomas Brandon <tbrandonau@gmail.com> Cc: Eddi De Pieri <eddi@depieri.net> Signed-off-by: Christian Fetzer <fetzer.ch@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: piix4: Convert piix4_main_adapter to arrayChristian Fetzer2015-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SB800 chipset supports a multiplexed main SMBus controller with four ports. Therefore the static variable piix4_main_adapter is converted into a piix4_main_adapters array that can hold one i2c_adapter for each multiplexed port. The auxiliary adapter remains unchanged since it represents the second (not multiplexed) SMBus controller on the SB800 chipset. Signed-off-by: Christian Fetzer <fetzer.ch@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: handle difference in setting up non-first messageWolfram Sang2015-11-30
| | | | | | | | | | | | | | Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: clean up after refactoringWolfram Sang2015-11-30
| | | | | | | | | | | | | | | | Update the comments to match current behaviour. Shorten some comments. Update copyrights. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: revoke START request earlyWolfram Sang2015-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we don't clear START generation as soon as possible, it may cause another message to be generated, e.g. when receiving NACK in address phase. To keep the race window as small as possible, we clear it right at the beginning of the interrupt. We don't need any checks since we always want to stop START and STOP generation on the next occasion after we started it. This patch improves the situation but sadly does not completely fix it. It is still to be researched if we can do better given this HW design. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: check master irqs before slave irqsWolfram Sang2015-11-30
| | | | | | | | | | | | | | | | Due to the HW design, master IRQs are timing critical, so give them precedence over slave IRQ. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: don't issue stop when HW does it automaticallyWolfram Sang2015-11-30
| | | | | | | | | | | | | | | | The manual says (55.4.8.6) that HW does automatically send STOP after NACK was received. My measuerments confirm that. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: init new messages in irqWolfram Sang2015-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setting up new messages was done in process context while handling a message was in interrupt context. Because of the HW design, this IP core is sensitive to timing, so the context switches were too expensive. Move this setup to interrupt context as well. In my test setup, this fixed the occasional 'data byte sent twice' issue which a number of people have seen. It also fixes to send REP_START after a read message which was wrongly send as a STOP + START sequence before. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: refactor setup of a msgWolfram Sang2015-11-30
| | | | | | | | | | | | | | We want to reuse this function later. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: remove spinlockWolfram Sang2015-11-30
| | | | | | | | | | | | | | | | | | | | | | After making sure to reinit the HW and clear interrupts in the timeout case, we know that interrupts are always disabled in the sections protected by the spinlock. Thus, we can simply remove it which is a preparation for further refactoring. While here, rename the timeout variable to time_left which is way more readable. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: remove unused IOERROR stateWolfram Sang2015-11-30
| | | | | | | | | | Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: rework hw initWolfram Sang2015-11-30
| | | | | | | | | | | | | | | | | | | | We don't need to init HW before every transfer since we know the HW state then. HW init at probe time is enough. While here, add setting the clock register which belongs to init HW. Also, set MDBS bit since not setting it is prohibited according to the manual. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rcar: make sure clocks are on when doing clock calculationWolfram Sang2015-11-30
| | | | | | | | | | | | | | | | | | | | | | | | When calculating the bus speed, the clock should be on, of course. Most bootloaders left them on, so this went unnoticed so far. Move the ioremapping out of this clock-enabled-block and prepare for adding hw initialization there, too. Reported-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | Merge branch 'acpi-soc'Rafael J. Wysocki2016-01-11
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * acpi-soc: PM / clk: don't leave clocks enabled when driver not bound i2c: dw: Add APM X-Gene ACPI I2C device support ACPI / APD: Add APM X-Gene ACPI I2C device support ACPI / LPSS: change 'does not have' to 'has' in comment Revert "dmaengine: dw: platform: provide platform data for Intel" dmaengine: dw: return immediately from IRQ when DMA isn't in use dmaengine: dw: platform: power on device on shutdown ACPI / LPSS: override power state for LPSS DMA device ACPI / LPSS: power on when probe() and otherwise when remove() ACPI / LPSS: do delay for all LPSS devices when D3->D0 ACPI / LPSS: allow to use specific PM domain during ->probe() Revert "ACPI / LPSS: allow to use specific PM domain during ->probe()" device core: add BUS_NOTIFY_DRIVER_NOT_BOUND notification x86/platform/iosf_mbi: Remove duplicate definitions Conflicts: drivers/i2c/busses/i2c-designware-platdrv.c
| * | i2c: dw: Add APM X-Gene ACPI I2C device supportLoc Ho2016-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable APM X-Gene ACPI I2C device support by adding the corresponding ACPI ID. The platform ACPI APD corresponding change is required to provide the proper clock frequency input. Signed-off-by: Loc Ho <lho@apm.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
| * | x86/platform/iosf_mbi: Remove duplicate definitionsAndy Shevchenko2015-12-08
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | The read and write opcodes are global for all units on SoC and even across Intel SoCs. Remove duplication of corresponding constants. At the same time convert all current users. No functional change. Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Boon Leong Ong <boon.leong.ong@intel.com> Acked-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | Merge branch 'device-properties'Rafael J. Wysocki2016-01-11
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * device-properties: device property: avoid allocations of 0 length device property: the secondary fwnode needs to depend on the primary device property: add spaces to PROPERTY_ENTRY_STRING macro include/linux/property.h: fix build issues with gcc-4.4.4 i2c: designware: Convert to use unified device property API mfd: intel-lpss: Pass HSUART configuration via properties mfd: intel-lpss: Pass SDA hold time to I2C host controller driver mfd: intel-lpss: Add support for passing device properties mfd: core: propagate device properties to sub devices drivers driver core: Do not overwrite secondary fwnode with NULL if it is set driver core: platform: Add support for built-in device properties device property: Take a copy of the property set device property: Fallback to secondary fwnode if primary misses the property device property: return -EINVAL when property isn't found in ACPI device property: improve readability of macros device property: helper macros for property entry creation device property: keep single value inplace device property: refactor built-in properties support device property: rename helper functions device property: always check for fwnode type
| * | i2c: designware: Convert to use unified device property APIMika Westerberg2015-12-06
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With ACPI _DSD (introduced in ACPI v5.1) it is now possible to pass device configuration information from ACPI in addition to DT. In order to support this, convert the driver to use the unified device property accessors instead of DT specific. Change to ordering a bit so that we first try platform data and if that's not available look from device properties. ACPI *CNT methods are then used as last resort to override everything else. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | i2c: rcar: disable runtime PM correctly in slave modeWolfram Sang2015-12-19
| | | | | | | | | | | | | | | | | | | | | | | | | | When we also are I2C slave, we need to disable runtime PM because the address detection mechanism needs to be active all the time. However, we can reenable runtime PM once the slave instance was unregistered. So, use pm_runtime_get_sync/put to achieve this, since it has proper refcounting. pm_runtime_allow/forbid is like a global knob controllable from userspace which is unsuitable here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* | i2c: designware: Keep pm_runtime_enable/_disable calls in syncJarkko Nikula2015-12-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On an hardware shared I2C bus (certain Intel Baytrail SoC platforms) the runtime PM disable depth keeps increasing over repeated modprobe/rmmod cycle because pm_runtime_disable() is called without checking should it be disabled already because of bus sharing. This hasn't made any other harm than dev->power.disable_depth keeps increasing but keep it sync by calling pm_runtime_disable() only when runtime PM is not disabled. Reported-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | i2c: designware: fix IO timeout issue for AMD controllerXiangliang Yu2015-12-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because of some hardware limitation, AMD I2C controller can't trigger pending interrupt if interrupt status has been changed after clearing interrupt status bits. Then, I2C will lost interrupt and IO timeout. According to hardware design, this patch implements a workaround to disable i2c controller interrupt and re-enable i2c interrupt before exiting ISR. To reduce the performance impacts on other vendors, use unlikely function to check flag in ISR. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* | i2c: imx: init bus recovery info before adding i2c adapterGao Pan2015-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During driver probe, i2c_imx_init_recovery_info() must come before i2c_add_numbered_adapter(), because the get/set_scl() functions are assigned in i2c_register_adapter() under the conditon that bus recover_info are initialized. Otherwise, get/set_scl() function pointers never get assigned. In such case, when i2c_generic_gpio_recovery() is used for bus recovery, there will be kernel crash because bri->set_scl is NULL. The solution to this bug is moving i2c_imx_init_recovery_info() before i2c_register_adapter(). Signed-off-by: Gao Pan <b54642@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* | i2c: do not use 0x in front of %paDmitry V. Krivenok2015-11-30
| | | | | | | | | | Signed-off-by: Dmitry V. Krivenok <krivenok.dmitry@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | i2c: davinci: Increase module clock frequencyAlexander Sverdlin2015-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C controller used in Keystone SoC has an undocumented peculiarity which results in SDA-SCL margins being dependent on module clock. Driving high capacity bus near its limits can result in STOP condition sometimes being understood as REPEATED-START by slaves (or NACK instead of ACK, etc...). Driving the module with higher clocks increases the margin between SDA and SCL transitions, making the operations with higher bus rates more robust. Therefore, target the module clock to 12MHz instead of 7MHz, still staying within the specification limits. Before the change STOP timing looked like this on 400kHz: SDA ----------+ +---- \ / \ / +----+ (1) SCL --+ +------------ \ / \ / +----+ (2) While only point (1) signals STOP, point (2) could be incorrectly recognized as repeated-START (almost no margin between SDA and SCL transitions). After the change there is at least 600ns margin measured between SCL fall and SDA fall during STOP generation: SDA ------+ +---- \ / \ / +----+ SCL --+ +-------- \ / \ / +----+ ->| |<- 600ns ->| |<- tSUSTO So called tSUSTO (setup time for STOP condition) is still slightly higher than 600ns, so no problem here. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | i2c: mv64xxx: The n clockdiv factor is 0 based on sunxi SoCsHans de Goede2015-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the datasheets the n factor for dividing the tclk is 2 to the power n on Allwinner SoCs, not 2 to the power n + 1 as it is on other mv64xxx implementations. I've contacted Allwinner about this and they have confirmed that the datasheet is correct. This commit fixes the clk-divider calculations for Allwinner SoCs accordingly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* | i2c: rk3x: populate correct variable for sda_falling_timeWolfram Sang2015-11-30
|/ | | | | | Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> Cc: stable@kernel.org
* i2c: i801: add Intel Lewisburg device IDsAlexandra Yates2015-11-20
| | | | | | | | Adding Intel codename Lewisburg platform device IDs for SMBus. Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: fix wakeup irq parsingGrygorii Strashko2015-11-20
| | | | | | | | | | | | | This patch fixes obvious copy-past error in wake up irq parsing code which leads to the fact that dev_pm_set_wake_irq() will be called with wrong IRQ number when "wakeup" IRQ is not defined in DT. Fixes: 3fffd1283927 ("i2c: allow specifying separate wakeup interrupt in device tree") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: <stable@vger.kernel.org> # v4.3
* i2c: xiic: Prevent concurrent running of the IRQ handler and __xiic_start_xfer()Lars-Peter Clausen2015-11-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to commit e6c9a037bc8a ("i2c: xiic: Remove the disabling of interrupts") IRQs where disabled when the initial __xiic_start_xfer() was called. After the commit the interrupt is enabled while the function is running, this means it is possible for the interrupt to be triggered while the function is still running. When this happens the internal data structures get corrupted and undefined behavior can occur like the following crash: Internal error: Oops: 17 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 2040 Comm: i2cdetect Not tainted 4.0.0-02856-g047a308 #10956 Hardware name: Xilinx Zynq Platform task: ee0c9500 ti: e99a2000 task.ti: e99a2000 PC is at __xiic_start_xfer+0x6c4/0x7c8 LR is at __xiic_start_xfer+0x690/0x7c8 pc : [<c02bbffc>] lr : [<c02bbfc8>] psr: 800f0013 sp : e99a3da8 ip : 00000000 fp : 00000000 r10: 00000001 r9 : 600f0013 r8 : f0180000 r7 : f0180000 r6 : c064e444 r5 : 00000017 r4 : ee031010 r3 : 00000000 r2 : 00000000 r1 : 600f0013 r0 : 0000000f Flags: Nzcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 18c5387d Table: 29a5404a DAC: 00000015 Process i2cdetect (pid: 2040, stack limit = 0xe99a2210) Stack: (0xe99a3da8 to 0xe99a4000) 3da0: ee031010 00000000 00000001 ee031020 ee031224 c02bc5ec 3dc0: ee34c604 00000000 ee0c9500 e99a3dcc e99a3dd0 e99a3dd0 e99a3dd8 c069f0e8 3de0: 00000000 ee031020 c064e100 ffff90bb e99a3e48 c02b6590 ee031020 00000001 3e00: e99a3e48 ee031020 00000000 e99a3e63 00000001 c02b6ec4 00000000 00000000 3e20: 00000000 c02b7320 e99a3ef0 00000000 00000000 e99e3df0 00000000 00000000 3e40: 00000103 2814575f 0000003e c00a0000 e99a3e85 0001003e ee0c0000 e99a3e63 3e60: eefd3578 c064e61c ee0c9500 c0041e04 0000056c e9a56db8 00006e5a b6f5c000 3e80: ee0c9548 eefd0040 00000001 eefd3540 ee0c9500 eefd39a0 c064b540 ee0c9500 3ea0: 00000000 ee92b000 00000000 bef4862c ee34c600 e99ecdc0 00000720 00000003 3ec0: e99a2000 00000000 00000000 c02b8b30 00000000 00000000 00000000 e99a3f24 3ee0: b6e80000 00000000 00000000 c04257e8 00000000 e99a3f24 c02b8f08 00000703 3f00: 00000003 c02116bc ee935300 00000000 bef4862c ee34c600 e99ecdc0 c02b91f0 3f20: e99ecdc0 00000720 bef4862c eeb725f8 e99ecdc0 c00c9e2c 00000003 00000003 3f40: ee248dc0 00000000 ee248dc8 00000002 eeb7c1a8 00000000 00000000 c00bb360 3f60: 00000000 00000000 00000003 ee248dc0 bef4862c e99ecdc0 e99ecdc0 00000720 3f80: 00000003 e99a2000 00000000 c00c9f68 00000000 00000000 b6f22000 00000036 3fa0: c000dfa4 c000de20 00000000 00000000 00000003 00000720 bef4862c bef4862c 3fc0: 00000000 00000000 b6f22000 00000036 00000000 00000000 b6f60000 00000000 3fe0: 00013040 bef48614 00008cab b6ecdbe6 400f0030 00000003 2f7fd821 2f7fdc21 [<c02bbffc>] (__xiic_start_xfer) from [<c02bc5ec>] (xiic_xfer+0x94/0x168) [<c02bc5ec>] (xiic_xfer) from [<c02b6590>] (__i2c_transfer+0x4c/0x7c) [<c02b6590>] (__i2c_transfer) from [<c02b6ec4>] (i2c_transfer+0x9c/0xc4) [<c02b6ec4>] (i2c_transfer) from [<c02b7320>] (i2c_smbus_xfer+0x3a0/0x4ec) [<c02b7320>] (i2c_smbus_xfer) from [<c02b8b30>] (i2cdev_ioctl_smbus+0xb0/0x214) [<c02b8b30>] (i2cdev_ioctl_smbus) from [<c02b91f0>] (i2cdev_ioctl+0xa0/0x1d4) [<c02b91f0>] (i2cdev_ioctl) from [<c00c9e2c>] (do_vfs_ioctl+0x4b0/0x5b8) [<c00c9e2c>] (do_vfs_ioctl) from [<c00c9f68>] (SyS_ioctl+0x34/0x5c) [<c00c9f68>] (SyS_ioctl) from [<c000de20>] (ret_fast_syscall+0x0/0x34) Code: e283300c e5843210 eafffe64 e5943210 (e1d320b4) The issue can easily be reproduced by performing I2C access under high system load or IO load. To fix the issue protect the invocation to __xiic_start_xfer() form xiic_start_xfer() with the same lock that is used to protect the interrupt handler. Fixes: e6c9a037bc8a ("i2c: xiic: Remove the disabling of interrupts") Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: Revert "i2c: xiic: Do not reset controller before every transfer"Lars-Peter Clausen2015-11-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit d701667bb331 ("i2c: xiic: Do not reset controller before every transfer") removed the reinitialization of the controller before the start of each transfer. Apparently this change is not safe to make and the commit results in random I2C bus failures. An easy way to trigger the issue is to run i2cdetect. Without the patch applied: 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- UU UU -- UU 3c -- -- UU 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- With the patch applied every other or so invocation: 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10: 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20: 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30: -- -- -- -- -- -- -- -- UU UU -- UU 3c -- -- UU 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- So revert the commit for now. Fixes: d701667bb331 ("i2c: xiic: Do not reset controller before every transfer") Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Shubhrajyoti Datta <shubhraj@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* i2c: imx: fix a compiling errorHou Zhiqiang2015-11-20
| | | | | | | | | | drivers/i2c/busses/i2c-imx.c:978:2: error: implicit declaration of function ‘pinctrl_select_state’ [-Werror=implicit-function-declaration] pinctrl_select_state(i2c_imx->pinctrl, i2c_imx->pinctrl_pins_gpio); ^ Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* Merge branch 'i2c/for-4.4' of ↵Linus Torvalds2015-11-10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: - New drivers: UniPhier (with and without FIFO) - some drivers got some bigger rework: ismt, designware, img-scb (rcar had to be reverted because issues were showing up just lately) - ACPI: reworked the device scanning and added support for muxes ... and quite a lot of driver bugfixes and cleanups this time. All files touched outside of the i2c realm have proper acks. * 'i2c/for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (70 commits) i2c: rcar: Revert the latest refactoring series i2c: pnx: remove superfluous assignment MAINTAINERS: i2c: drop i2c-pnx maintainer MAINTAINERS: i2c: mark also subdirectories as maintained i2c: cadence: enable driver for ARM64 i2c: i801: Document Intel DNV and Broxton i2c: at91: manage unexpected RXRDY flag when starting a transfer i2c: pnx: Use setup_timer instead of open coding it i2c: add ACPI support for I2C mux ports acpi: add acpi_preset_companion() stub i2c: pxa: Add support for pxa910/988 & new configuration features i2c: au1550: Convert to devm_kzalloc and devm_ioremap_resource i2c-dev: Fix I2C_SLAVE ioctl comment i2c-dev: Fix typo in ioctl name reference i2c: sirf: tune the divider to make i2c bus freq more accurate i2c: imx: Use -ENXIO as error in the NACK case i2c: i801: Add support for Intel Broxton i2c: i801: Add support for Intel DNV i2c: mediatek: add i2c resume support i2c: imx: implement bus recovery ...
| * i2c: rcar: Revert the latest refactoring seriesWolfram Sang2015-10-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This whole series caused sometimes timeouts and even OOPSes on some r8a7791 Koelsch boards. We need to understand and fix those first. Revert "i2c: rcar: clean up after refactoring" Revert "i2c: rcar: revoke START request early" Revert "i2c: rcar: check master irqs before slave irqs" Revert "i2c: rcar: don't issue stop when HW does it automatically" Revert "i2c: rcar: init new messages in irq" Revert "i2c: rcar: refactor setup of a msg" Revert "i2c: rcar: remove spinlock" Revert "i2c: rcar: remove unused IOERROR state" Revert "i2c: rcar: rework hw init" Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: pnx: remove superfluous assignmentWolfram Sang2015-10-30
| | | | | | | | | | | | | | | | smatch rightfully says: drivers/i2c/busses/i2c-pnx.c:499 i2c_pnx_xfer warn: unused return: stat = ioread32() Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: cadence: enable driver for ARM64Michal Simek2015-10-26
| | | | | | | | | | | | | | This IP is available on Xilinx ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i801: Document Intel DNV and BroxtonJarkko Nikula2015-10-26
| | | | | | | | | | | | | | | | | | | | | | Add missing entries into i2c-i801 documentation and Kconfig about recently added Intel DNV and Broxton. Reported-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: at91: manage unexpected RXRDY flag when starting a transferLudovic Desroches2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases, we could start a new i2c transfer with the RXRDY flag set. It is not a clean state and it leads to print annoying error messages even if there no real issue. The cause is only having garbage data in the Receive Holding Register because of a weird behavior of the RXRDY flag. Reported-by: Peter Rosin <peda@lysator.liu.se> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Tested-by: Peter Rosin <peda@lysator.liu.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Fixes: 93563a6a71bb ("i2c: at91: fix a race condition when using the DMA controller") Cc: stable@vger.kernel.org #4.1
| * i2c: pnx: Use setup_timer instead of open coding itMuhammad Falak R Wani2015-10-25
| | | | | | | | | | | | | | | | Use timer API function setup_timer instead of init_timer to initialize the timer. Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: add ACPI support for I2C mux portsDustin Byford2015-10-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Although I2C mux devices are easily enumerated using ACPI (_HID/_CID or device property compatible string match), enumerating I2C client devices connected through an I2C mux needs a little extra work. This change implements a method for describing an I2C device hierarchy that includes mux devices by using an ACPI Device() for each mux channel along with an _ADR to set the channel number for the device. See Documentation/acpi/i2c-muxes.txt for a simple example. To make this work the ismt, i801, and designware pci/platform devs now share an ACPI companion with their I2C adapter dev similar to how it's done in OF. This is done on the assumption that power management functions will not be called directly on the I2C dev that is sharing the ACPI node. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Dustin Byford <dustin@cumulusnetworks.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: pxa: Add support for pxa910/988 & new configuration featuresVaibhav Hiremath2015-10-25
| | | | | | | | | | | | | | | | | | | | | | | | | | TWSI_ILCR & TWSI_IWCR registers are used to adjust clock rate of standard & fast mode in pxa910/988; so this patch adds these two new entries to "struct pxa_reg_layout" and "struct pxa_i2c". Signed-off-by: Jett.Zhou <jtzhou@marvell.com> Signed-off-by: Yi Zhang <yizhang@marvell.com> Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org> Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> [wsa: white space fixes] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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