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| * | i2c: qup: send NACK for last read sub transfersAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to I2c specification, “If a master-receiver sends a repeated START condition, it sends a not-acknowledge (A) just before the repeated START condition”. QUP v2 supports sending of NACK without stop with QUP_TAG_V2_DATARD_NACK so added the same. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Austin Christ <austinwc@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qup: fix buffer overflow for multiple msg of maximum xfer lenAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BAM mode requires buffer for start tag data and tx, rx SG list. Currently, this is being taken for maximum transfer length (65K). But an I2C transfer can have multiple messages and each message can be of this maximum length so the buffer overflow will happen in this case. Since increasing buffer length won’t be feasible since an I2C transfer can contain any number of messages so this patch does following changes to make i2c transfers working for multiple messages case. 1. Calculate the required buffers for 2 maximum length messages (65K * 2). 2. Split the descriptor formation and descriptor scheduling. The idea is to fit as many messages in one DMA transfers for 65K threshold value (max_xfer_sg_len). Whenever the sg_cnt is crossing this, then schedule the BAM transfer and subsequent transfer will again start from zero. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qup: change completion timeout according to transfer lengthAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the completion timeout is being taken according to maximum transfer length which is too high if SCL is operating in high frequency. This patch calculates timeout on the basis of one-byte transfer time and uses the same for completion timeout. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qup: use the complete transfer length to choose DMA modeAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently each message length in complete transfer is being checked for determining DMA mode and if any of the message length is less than FIFO length then non DMA mode is being used which will increase overhead. DMA can be used for any length and it should be determined with complete transfer length. Now, this patch selects DMA mode if the total length is greater than FIFO length. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Austin Christ <austinwc@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qup: proper error handling for i2c error in BAM modeAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the i2c error handling in BAM mode is not working properly in stress condition. 1. After an error, the FIFO are being written with FLUSH and EOT tags which should not be required since already these tags have been written in BAM descriptor itself. 2. QUP state is being moved to RESET in IRQ handler in case of error. When QUP HW encounters an error in BAM mode then it moves the QUP STATE to PAUSE state. In this case, I2C_FLUSH command needs to be executed while moving to RUN_STATE by writing to the QUP_STATE register with the I2C_FLUSH bit set to 1. 3. In Error case, sometimes, QUP generates more than one interrupt which will trigger the complete again. After an error, the flush operation will be scheduled after doing reinit_completion which should be triggered by BAM IRQ callback. If the second QUP IRQ comes during this time then it will call the complete and the transfer function will assume the all the BAM HW descriptors have been completed. 4. The release DMA is being called after each error which will free the DMA tx and rx channels. The error like NACK is very common in I2C transfer and every time this will be overhead. Now, since the error handling is proper so this release channel can be completely avoided. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Sricharan R <sricharan@codeaurora.org> Reviewed-by: Austin Christ <austinwc@codeaurora.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qup: fix the transfer length for BAM RX EOT FLUSH tagsAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of FLUSH operation, BAM copies INPUT EOT FLUSH (0x94) instead of normal EOT (0x93) tag in input data stream when an input EOT tag is received during flush operation. So only one tag will be written instead of 2 separate tags. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qup: schedule EOT and FLUSH tags at the end of transferAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The role of FLUSH and EOT tag is to flush already scheduled descriptors in BAM HW in case of error. EOT is required only when descriptors are scheduled in RX FIFO. If all the messages are WRITE, then only FLUSH tag will be used. A single BAM transfer can have multiple read and write messages. The EOT and FLUSH tags should be scheduled at the end of BAM HW descriptors. Since the READ and WRITE can be present in any order so for some of the cases, these tags are not being written correctly. Following is one of the example READ, READ, READ, READ Currently EOT and FLUSH tags are being written after each READ. If QUP gets NACK for first READ itself, then flush will be triggered. It will look for first FLUSH tag in TX FIFO and will stop there so only descriptors for first READ descriptors be flushed. All the scheduled descriptors should be cleared to generate BAM DMA completion. Now this patch is scheduling FLUSH and EOT only once after all the descriptors. So, flush will clear all the scheduled descriptors and BAM will generate the completion interrupt. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qup: remove redundant variables for BAM SG countAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rx_nents and tx_nents are redundant. rx_buf and tx_buf can be used for total number of SG entries. Since rx_buf and tx_buf give the impression that it is buffer instead of count so rename it to tx_cnt and rx_cnt for giving it more meaningful variable name. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Austin Christ <austinwc@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qup: minor code reorganization for use_dmaAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Assigns use_dma in qup_dev structure itself which will help in subsequent patches to determine the mode in IRQ handler. 2. Does minor code reorganization for loops to reduce the unnecessary comparison and assignment. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Reviewed-by: Austin Christ <austinwc@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qup: fixed releasing dma without flush operation completionAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QUP BSLP BAM generates the following error sometimes if the current I2C DMA transfer fails and the flush operation has been scheduled “bam-dma-engine 7884000.dma: Cannot free busy channel” If any I2C error comes during BAM DMA transfer, then the QUP I2C interrupt will be generated and the flush operation will be carried out to make I2C consume all scheduled DMA transfer. Currently, the same completion structure is being used for BAM transfer which has already completed without reinit. It will make flush operation wait_for_completion_timeout completed immediately and will proceed for freeing the DMA resources where the descriptors are still in process. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Acked-by: Sricharan R <sricharan@codeaurora.org> Reviewed-by: Austin Christ <austinwc@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: qup: fix copyrights and update to SPDX identifierAbhishek Sahu2018-03-24
| | | | | | | | | | | | | | | | | | | | | | | | The file has been updated from 2016 to 2018 so fixed the copyright years. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: xlp9xx: Handle NACK on DATA properlyGeorge Cherian2018-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case we receive NACK on DATA we shouldn't be resetting the controller, rather we should issue STOP command. This will terminate the current transaction and -EIO is returned. While at that handle the SMBus Quick Command properly. We shouldn't be setting the XLP9XX_I2C_CMD_READ/WRITE for such transactions. Signed-off-by: George Cherian <george.cherian@cavium.com> Reviewed-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: xlp9xx: Check for Bus state before every transferGeorge Cherian2018-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C bus enters the STOP condition after the DATA_DONE interrupt is raised. Essentially the driver should be checking the bus state before sending any transaction. In case a transaction is initiated while the bus is busy, the prior transaction's stop condition is not achieved. Add the check to make sure the bus is not busy before every transaction. Signed-off-by: George Cherian <george.cherian@cavium.com> Reviewed-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: designware: suppress unneeded SDA hold time warningsAlexander Monakov2018-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware may not support SDA hold time configuration, but if it is not set in the Device Tree either, there is no need to print a warning. Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: mv64xxx: Apply errata delay only in standard modeGregory CLEMENT2018-03-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The errata FE-8471889 description has been updated. There is still a timing violation for repeated start. But the errata now states that it was only the case for the Standard mode (100 kHz), in Fast mode (400 kHz) there is no issue. This patch limit the errata fix to the Standard mode. It has been tesed successfully on the clearfog (Aramda 388 based board). Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | i2c: xiic: Make suspend function names consistentMoritz Fischer2018-03-17
| | | | | | | | | | | | | | | | | | | | | | | | Suspend functions seem to have been copied from i2c-cadence driver. Rename the functions to match the rest of the driver. Signed-off-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | Merge branch 'i2c-mux/for-next' of https://github.com/peda-r/i2c-mux into ↵Wolfram Sang2018-03-17
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | i2c/for-4.17 "These patches verify the device id of the PCA984x mux chips using standardized (but rarely implemented) i2c device identification."
| | * | i2c: mux: pca954x: verify the device id of the pca984x chipsPeter Rosin2018-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure to not disallow the chips on adapters that are not capable of reading the device id, but also make sure to check the device id before writing to the chip. Tested-by: Adrian Fiergolski <adrian.fiergolski@cern.ch> Signed-off-by: Peter Rosin <peda@axentia.se>
| | * | i2c: add i2c_get_device_id() to get the standard i2c device idPeter Rosin2018-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Can be used during probe to double check that the probed device is what is expected. Loosely based on code from Adrian Fiergolski <adrian.fiergolski@cern.ch>. Tested-by: Adrian Fiergolski <adrian.fiergolski@cern.ch> Reviewed-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
| * | | i2c: core: report OF style module alias for devices registered via OFJavier Martinez Canillas2018-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The buses should honor the firmware interface used to register the device, but the I2C core reports a MODALIAS of the form i2c:<device> even for I2C devices registered via OF. This means that user-space will never get an OF stype uevent MODALIAS even when the drivers modules contain aliases exported from both the I2C and OF device ID tables. For example, an Atmel maXTouch Touchscreen registered by a DT node with compatible "atmel,maxtouch" has the following module alias: $ cat /sys/class/i2c-adapter/i2c-8/8-004b/modalias i2c:maxtouch So udev won't be able to auto-load a module for an OF-only device driver. Many OF-only drivers duplicate the OF device ID table entries in an I2C ID table only has a workaround for how the I2C core reports the module alias. This patch changes the I2C core to report an OF related MODALIAS uevent if the device was registered via OF. So for the previous example, after this patch, the reported MODALIAS for the Atmel maXTouch will be the following: $ cat /sys/class/i2c-adapter/i2c-8/8-004b/modalias of:NtrackpadT<NULL>Catmel,maxtouch NOTE: This patch may break out-of-tree drivers that were relying on this behavior, and only had an I2C device ID table even when the device was registered via OF. There are no remaining drivers in mainline that do this, but out-of-tree drivers have to be fixed and define a proper OF device ID table to have module auto-loading working. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Tested-by: Dmitry Mastykin <mastichi@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: scmi: Use standard device message logging functionsJean Delvare2018-03-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACPI_ERROR and ACPI_DEBUG_PRINT are not intended to be used by device drivers. Use acpi_handle message logging functions instead. As a nice side effect, it removes the following compiler warnings which were printed when ACPI debug is disabled: drivers/i2c/busses/i2c-scmi.c: In function "acpi_smbus_cmi_add_cap": drivers/i2c/busses/i2c-scmi.c:328:39: warning: suggest braces around empty body in an "else" statement [-Wempty-body] drivers/i2c/busses/i2c-scmi.c:338:12: warning: suggest braces around empty body in an "else" statement [-Wempty-body] Suggested-by: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Signed-off-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: piix4: Use request_muxed_regionGuenter Roeck2018-03-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Accesses to SB800_PIIX4_SMB_IDX can occur from multiple drivers. One example for another driver is the sp5100_tco driver. Use request_muxed_region() to ensure synchronization. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: piix4: Use usleep_range()Guenter Roeck2018-03-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The piix4 i2c driver is extremely slow. Replacing msleep() with usleep_range() increases its speed substantially. Use sleep ranges similar to those used in the i2c-801 driver to keep things simple. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: reformat comments around i2c_smbus_xfer_emulated()Wolfram Sang2018-02-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use Kernel coding style for better readability. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Peter Rosin <peda@axentia.se>
| * | | i2c-stm32f4: remove redundant initialization of pointer regColin Ian King2018-02-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pointer reg is assigned a value that is never read, it is later overwritten with a new value, hence the redundant initialization can be removed. Cleans up clang warning: drivers/i2c/busses/i2c-stm32f4.c:352:16: warning: Value stored to 'reg' during its initialization is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: exynos5: rework HSI2C_MASTER_ST_LOSE state handlingAndrzej Hajda2018-02-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HSI2C_MASTER_ST_LOSE state is not documented properly, extensive tests show that hardware is usually able to recover from this state without interrupting the transfer. Moreover documentation says that such state can be caused by slave clock stretching, and should not be treated as an error during transaction. The only place it indicates an error is just before starting transaction. In such case bus recovery procedure should be performed - master should pulse SCL line nine times and then send STOP condition, it can be repeated until SDA goes high. The procedure can be performed using manual commands HSI2C_CMD_READ_DATA and HSI2C_CMD_SEND_STOP. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: xlp9xx: Handle transactions with I2C_M_RECV_LEN properlyGeorge Cherian2018-02-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of transaction with I2C_M_RECV_LEN set, make sure the driver reads the first byte and then updates the RX fifo with the expected length. Set threshold to 1 byte so that driver gets an interrupt on receiving the first byte. After which the transfer length is updated depending on the received length. Also report SMBus block read functionality. Signed-off-by: George Cherian <george.cherian@cavium.com> Tested-by: dann frazier <dann.frazier@canonical.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: xlp9xx: return ENXIO on slave address NACKDmitry Bazhenov2018-02-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the driver violation of the common practice to return ENXIO error on a slave address NACK. Signed-off-by: Dmitry Bazhenov <dmitry.bazhenov@auriga.com> Signed-off-by: George Cherian <george.cherian@cavium.com> Tested-by: dann frazier <dann.frazier@canonical.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: of: simplify reading the "reg" propertyWolfram Sang2018-02-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | of_get_property() is a bit cumbersome to use. Replace it with the newer of_property_read_u32() for more readable code. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: of: remove duplicated check for valid addressWolfram Sang2018-02-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The very same check is done when calling i2c_new_device(). Remove it here to avoid code duplication. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: of: rename variable to meet expectationsWolfram Sang2018-02-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'result' is mostly used in the kernel as int for functions returning errno on failure. Here it is a pointer to the client struct, so let's call it this way (as the parent function does, too). Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: of: make ref counting more visibleWolfram Sang2018-02-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When debugging a ref counting problem, I overlooked this snipplet a few times. Might be taste, but I think the new location is visually easier recognizable. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * | | i2c: of: change log level of failed device creationWolfram Sang2018-02-26
| |/ / | | | | | | | | | | | | | | | | | | If we cannot create a device, this is an error, not a warning. Fix the log level. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | | Merge tag 'arch-removal' of ↵Linus Torvalds2018-04-02
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pul removal of obsolete architecture ports from Arnd Bergmann: "This removes the entire architecture code for blackfin, cris, frv, m32r, metag, mn10300, score, and tile, including the associated device drivers. I have been working with the (former) maintainers for each one to ensure that my interpretation was right and the code is definitely unused in mainline kernels. Many had fond memories of working on the respective ports to start with and getting them included in upstream, but also saw no point in keeping the port alive without any users. In the end, it seems that while the eight architectures are extremely different, they all suffered the same fate: There was one company in charge of an SoC line, a CPU microarchitecture and a software ecosystem, which was more costly than licensing newer off-the-shelf CPU cores from a third party (typically ARM, MIPS, or RISC-V). It seems that all the SoC product lines are still around, but have not used the custom CPU architectures for several years at this point. In contrast, CPU instruction sets that remain popular and have actively maintained kernel ports tend to all be used across multiple licensees. [ See the new nds32 port merged in the previous commit for the next generation of "one company in charge of an SoC line, a CPU microarchitecture and a software ecosystem" - Linus ] The removal came out of a discussion that is now documented at https://lwn.net/Articles/748074/. Unlike the original plans, I'm not marking any ports as deprecated but remove them all at once after I made sure that they are all unused. Some architectures (notably tile, mn10300, and blackfin) are still being shipped in products with old kernels, but those products will never be updated to newer kernel releases. After this series, we still have a few architectures without mainline gcc support: - unicore32 and hexagon both have very outdated gcc releases, but the maintainers promised to work on providing something newer. At least in case of hexagon, this will only be llvm, not gcc. - openrisc, risc-v and nds32 are still in the process of finishing their support or getting it added to mainline gcc in the first place. They all have patched gcc-7.3 ports that work to some degree, but complete upstream support won't happen before gcc-8.1. Csky posted their first kernel patch set last week, their situation will be similar [ Palmer Dabbelt points out that RISC-V support is in mainline gcc since gcc-7, although gcc-7.3.0 is the recommended minimum - Linus ]" This really says it all: 2498 files changed, 95 insertions(+), 467668 deletions(-) * tag 'arch-removal' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: (74 commits) MAINTAINERS: UNICORE32: Change email account staging: iio: remove iio-trig-bfin-timer driver tty: hvc: remove tile driver tty: remove bfin_jtag_comm and hvc_bfin_jtag drivers serial: remove tile uart driver serial: remove m32r_sio driver serial: remove blackfin drivers serial: remove cris/etrax uart drivers usb: Remove Blackfin references in USB support usb: isp1362: remove blackfin arch glue usb: musb: remove blackfin port usb: host: remove tilegx platform glue pwm: remove pwm-bfin driver i2c: remove bfin-twi driver spi: remove blackfin related host drivers watchdog: remove bfin_wdt driver can: remove bfin_can driver mmc: remove bfin_sdh driver input: misc: remove blackfin rotary driver input: keyboard: remove bf54x driver ...
| * | | i2c: remove bfin-twi driverArnd Bergmann2018-03-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The blackfin architecture is getting removed, so the twi driver can also be removed. Acked-by: Aaron Wu <aaron.wu@analog.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | Merge tag 'metag_remove_2' of ↵Arnd Bergmann2018-03-07
| |\ \ \ | | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jhogan/metag into asm-generic Remove metag architecture These patches remove the metag architecture and tightly dependent drivers from the kernel. With the 4.16 kernel the ancient gcc 4.2.4 based metag toolchain we have been using is hitting compiler bugs, so now seems a good time to drop it altogether. * tag 'metag_remove_2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jhogan/metag: i2c: img-scb: Drop METAG dependency media: img-ir: Drop METAG dependency watchdog: imgpdc: Drop METAG dependency MAINTAINERS/CREDITS: Drop METAG ARCHITECTURE tty: Remove metag DA TTY and console driver clocksource: Remove metag generic timer driver irqchip: Remove metag irqchip drivers Drop a bunch of metag references docs: Remove remaining references to metag docs: Remove metag docs metag: Remove arch/metag/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | i2c: img-scb: Drop METAG dependencyJames Hogan2018-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that arch/metag/ has been removed, remove the METAG dependency from the IMG SCB I2C device driver. The hardware is also present on MIPS SoCs so the driver still has value. Signed-off-by: James Hogan <jhogan@kernel.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Cc: linux-i2c@vger.kernel.org Cc: linux-metag@vger.kernel.org
* | | | i2c: i2c-stm32f7: fix no check on returned setupPierre-Yves MORDRET2018-03-24
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | Before assigning returned setup structure check if not null Fixes: 463a9215f3ca7600b5ff ("i2c: stm32f7: fix setup structure") Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* | / i2c: octeon: Prevent error message on bus errorJan Glauber2018-03-02
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | The error message: [Fri Feb 16 13:42:13 2018] i2c-thunderx 0000:01:09.4: unhandled state: 0 is mis-leading as state 0 (bus error) is not an unknown state. Return -EIO as before but avoid printing the message. Also rename STAT_ERROR to STATE_BUS_ERROR. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | i2c: designware: Consider SCL GPIO optionalAndy Shevchenko2018-02-22
| | | | | | | | | | | | | | | | | | | | | | GPIO library can return -ENOSYS for the failed request. Instead of failing ->probe() in this case override error code to 0. Fixes: ca382f5b38f3 ("i2c: designware: add i2c gpio recovery option") Reported-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | i2c: busses: i2c-sirf: Fix spelling: "formular" -> "formula".Patryk Kocielnik2018-02-22
| | | | | | | | | | | | | | | | Fix spelling. Signed-off-by: Patryk Kocielnik <patryk.kocielnik@gmail.com> [wsa: fixed "Initialization", too] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | i2c: bcm2835: Set up the rising/falling edge delaysEric Anholt2018-02-22
| | | | | | | | | | | | | | | | | | | | | | | | We were leaving them in the power on state (or the state the firmware had set up for some client, if we were taking over from them). The boot state was 30 core clocks, when we actually want to sample some time after (to make sure that the new input bit has actually arrived). Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
* | i2c: i801: Add missing documentation entries for Braswell and Kaby LakeJarkko Nikula2018-02-21
| | | | | | | | | | | | | | | | | | Commits adding PCI IDs for Intel Braswell and Kaby Lake PCH-H lacked the respective Kconfig and Documentation/i2c/busses/i2c-i801 change. Add them now. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* | i2c: designware: must wait for enableBen Gardner2018-02-21
|/ | | | | | | | | | | | | | | | | | | | | | | | | | One I2C bus on my Atom E3845 board has been broken since 4.9. It has two devices, both declared by ACPI and with built-in drivers. There are two back-to-back transactions originating from the kernel, one targeting each device. The first transaction works, the second one locks up the I2C controller. The controller never recovers. These kernel logs show up whenever an I2C transaction is attempted after this failure. i2c-designware-pci 0000:00:18.3: timeout in disabling adapter i2c-designware-pci 0000:00:18.3: timeout waiting for bus ready Waiting for the I2C controller status to indicate that it is enabled before programming it fixes the issue. I have tested this patch on 4.14 and 4.15. Fixes: commit 2702ea7dbec5 ("i2c: designware: wait for disable/enable only if necessary") Cc: linux-stable <stable@vger.kernel.org> #4.13+ Signed-off-by: Ben Gardner <gardner.ben@gmail.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* Merge branch 'i2c/for-4.16' of ↵Linus Torvalds2018-02-04
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: "I2C has the following changes for you: - new flag to mark DMA safe buffers in i2c_msg. Also, some infrastructure around it. And docs. - huge refactoring of the at24 driver led by the new maintainer Bartosz - update I2C bus recovery to send STOP after recovery - conversion from gpio to gpiod for I2C bus recovery - adding a fault-injector to the i2c-gpio driver - lots of small driver improvements, and bigger ones to i2c-sh_mobile" * 'i2c/for-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (99 commits) i2c: mv64xxx: Add myself as maintainer for this driver i2c: mv64xxx: Fix clock resource by adding an optional bus clock i2c: mv64xxx: Remove useless test before clk_disable_unprepare i2c: mxs: use true and false for boolean values i2c: meson: update doc description to fix build warnings i2c: meson: add configurable divider factors dt-bindings: i2c: update documentation for the Meson-AXG i2c: imx-lpi2c: add runtime pm support i2c: rcar: fix some trivial typos in comments i2c: davinci: fix the cpufreq transition i2c: rk3x: add proper kerneldoc header i2c: rk3x: account for const type of of_device_id.data i2c: acorn: remove outdated path from file header i2c: acorn: add MODULE_LICENSE tag i2c: rcar: implement bus recovery i2c: send STOP after successful bus recovery i2c: ensure SDA is released in recovery if SDA is controllable i2c: add 'set_sda' to bus_recovery_info i2c: add identifier in declarations for i2c_bus_recovery i2c: make kerneldoc about bus recovery more precise ...
| * i2c: mv64xxx: Fix clock resource by adding an optional bus clockGregory CLEMENT2018-01-26
| | | | | | | | | | | | | | | | | | | | | | On Armada 7K/8K we need to explicitly enable the bus clock. The bus clock is optional because not all the SoCs need them but at least for Armada 7K/8K it is actually mandatory. The binding documentation is updating accordingly. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mv64xxx: Remove useless test before clk_disable_unprepareGregory CLEMENT2018-01-26
| | | | | | | | | | | | | | | | clk_disable_unprepare() already checks that the clock pointer is valid. No need to test it before calling it. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mxs: use true and false for boolean valuesGustavo A. R. Silva2018-01-26
| | | | | | | | | | | | | | | | | | Assign true or false to boolean variables instead of an integer value. This issue was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: meson: update doc description to fix build warningsYixun Lan2018-01-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add description for 'data' parameter and drop unused 'irq' memeber. Here is the warnings: drivers/i2c/busses/i2c-meson.c:103: warning: No description found for parameter 'data' drivers/i2c/busses/i2c-meson.c:103: warning: Excess struct member 'irq' description in 'meson_i2c' Reported-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: meson: add configurable divider factorsJian Hu2018-01-24
| | | | | | | | | | | | | | | | | | | | | | This patch try to add support for I2C controller in Meson-AXG SoC, Due to the IP changes between I2C controller, we need to introduce a compatible data to make the divider factor configurable. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>