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* | drm/nouveau/device/pci: set as non-CPU-coherent on ARM64Alexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | Without this buffer inconsistencies may appear between the CPU and GPU when using a PCI GPU on an ARM64 board. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/hwmon: fix crash on non-PCI platformsAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | Registration of the hwmon device will fail on non-PCI systems since dev->pdev is NULL in that case. Use the more generic drm_device::dev member that points to the same and is always set no matter the platform. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau: silence unimportant HDMI status messageAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | On non-PCI devices, nobody should really care if the device does not provide HDMI... Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/bo: consider DMA buffers on x86 onlyAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | | | The DMA API has different semantics on different architectures. Currently on arm64, it can only provide memory from a small pool which dries up quickly if we attempt to allocate big buffers from it. Do not consider that option when running on non-x86, since regular TTM buffers are the (current) best-fit for ARM platforms. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/ltc/gf100: use more reasonable timeout valueAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | LTC operations timeout was set to 2ms, which may be too low for devices that run at very low clocks (e.g. GM20B) and trigger timeout messages. Set the timeout to the default 2s. Also remove the redundant error messages since nvkm_wait_msec() will already display a warning. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/fifo/gk104: take runlist target into accountAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | Bits 28:29 of RUNLIST_BASE specify the memory target of the runlist. Set it to 0x3 (SYS_MEM_NONCOHERENT) if the runlist object resides in system memory. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/fifo/gf100: take runlist target into accountAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | Bits 28:29 of RUNLIST_BASE specify the memory target of the runlist. Set it to 0x3 (SYS_MEM_NONCOHERENT) if the runlist object resides in system memory. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/fifo/gk104: fix chid bit maskXia Yang2016-03-13
| | | | | | | | | | | | | | | | | | | | | | Fix the channel id bit mask in FIFO schedule timeout error handling. FIFO_ENGINE_STATUS_NEXT_ID is bit 27:16 thus 0x0fff0000. FIFO_ENGINE_STATUS_ID is bit 11:0 thus 0x00000fff. Signed-off-by: Xia Yang <xiay@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/instmem/gk20a: set DMA mask earlyAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | | | DMA mask is typically set in nouveau_ttm_init(), but this function is called late during initialization and GK20A's instmem will have called DMA functions before this happens. Having a wrongly set DMA mask can result in the use of unneeded bounce buffers. Set it early to avoid this. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gm206: remove implementation, it's now identical to gm200Ben Skeggs2016-03-13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gm200: switch over to using sw_nonctx from firmwareBen Skeggs2016-03-13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gm200: switch over to using sw_method_init from firmwareBen Skeggs2016-03-13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gm200: switch over to using sw_bundle_init from firmwareBen Skeggs2016-03-13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gm200: switch over to using sw_ctx from firmwareBen Skeggs2016-03-13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/bios/extdev: also parse v4.1 tableKarol Herbst2016-03-13
| | | | | | | | | | Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr>
* | drm/nouveau/hwmon: don't require therm to be valid to get any dataKarol Herbst2016-03-13
| | | | | | | | | | Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr>
* | drm/nouveau/hwmon: add power consumptionKarol Herbst2016-03-13
| | | | | | | | | | | | | | v2: expose only if the sensor reading is valid Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr>
* | drm/nouveau/iccsense: implement for ina209, ina219 and ina3221Karol Herbst2016-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | based on Martins initial work v3: fix ina2x9 calculations v4: don't kmalloc(0), fix the lsb/pga stuff v5: add a field to tell if the power reading may be invalid add nkvm_iccsense_read_all function check for the device on the i2c bus Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr>
* | drm/nouveau/nvbios/iccsense: add parsing of the SENSE tableMartin Peres2016-03-13
| | | | | | | | | | | | | | | | | | Karol Herbst: v4: don't kmalloc(0) v5: stricter validation Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr>
* | drm/nouveau/subdev/iccsense: add new subdev for power sensorsMartin Peres2016-03-13
| | | | | | | | | | Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr>
* | drm/nouveau/secboot/gm20b: add secure boot supportAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | | | Add secure boot support for the GM20B chip found in Tegra X1. Secure boot on Tegra works slightly differently from desktop, notably in the way the WPR region is set up. In addition, the firmware bootloaders use a slightly different header format. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/secboot/gm200: add secure-boot supportAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | Add secure-boot for the dGPU set of GM20X chips, using the PMU as the high-secure falcon. This work is based on Deepak Goyal's initial port of Secure Boot to Nouveau. v2. use proper memory target function Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gm200: do not load firmware for secure falconsAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | Secure falcons' firmware is managed by secboot. Do not load it in GR for them. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gf100: add support for securely-managed falconsAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | Start securely-managed falcons using secboot functions since the process for them is different from just writing CPUCTL. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/core: add support for secure bootAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On GM200 and later GPUs, firmware for some essential falcons (notably GR ones) must be authenticated by a NVIDIA-produced signature and loaded by a high-secure falcon in order to be able to access privileged registers, in a process known as Secure Boot. Secure Boot requires building a binary blob containing the firmwares and signatures of the falcons to be loaded. This blob is then given to a high-secure falcon running a signed loader firmware that copies the blob into a write-protected region, checks that the signatures are valid, and finally loads the verified firmware into the managed falcons and switches them to privileged mode. This patch adds infrastructure code to support this process on chips that require it. v2: - The IRQ mask of the PMU falcon was left - replace it with the proper irq_mask variable. - The falcon reset procedure expecting a falcon in an initialized state, which was accidentally provided by the PMU subdev. Make sure that secboot can manage the falcon on its own. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gm200: load external firmware and bundlesAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | Load firmware and bundles in GM200's constructor. The previously called GF100 function did not care about the bundles. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gk20a: share external bundles loading functionsAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | There functions are going to be used by other chips that rely on NVIDIA-provided firmware. Export them. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gk20a: simplify external bundle loading functionsAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | Make these functions easier to use by handling memory management from within. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gf100: load firmware in outer functionAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | The firmwares required by GR may vary from chip to chip, especially with the introduction of secure boot and NVIDIA-provided firmwares. Move the firmware loading outside of gf100_gr_ctor so other chips may still call it while managing their firmwares themselves. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gk20a: move firmware bundle release to gf100Alexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | Some members of gf100_gr were freed by the gk20a driver. That's not where it should be done - free them in gf100 so other chips that use NVIDIA-provided firmware free these structures properly. This also removes the need for a GK20A-specific destructor. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/core: add gpuobj memcpy helper functionsAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | Add memcpy functions to copy a buffer to a gpuobj and vice-versa. This will be used by the secure boot code. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gm200: enable graphics deviceBen Skeggs2016-03-13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gm200: s/gm204/gm200/Ben Skeggs2016-03-13
| | | | | | | | | | | | | | | | | | | | Most of the per-chipset differences will go away when we fully switch to using the register lists provided by the firmware files, which will leave all the remaining code "belonging" to GM200. This is a preemptive rename from GM204 to GM200. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/bios/devinit: properly handle unknown generic conditionsBen Skeggs2016-03-13
| | | | | | | | | | | | | | | | Upon encountering an unknown condition code, the script interpreter is supposed to skip 'size' bytes and continue at the next devinit token. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/bios/devinit: rename INIT_DP_CONDITION to INIT_GENERIC_CONDITIONBen Skeggs2016-03-13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/ltc/gm107: fix slice intr offsetBen Skeggs2016-03-13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/devinit/gf100-: detect if BIOS invoked devinitAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | It is not advisable to perform devinit if it has already been done. VBIOS will very likely have invoked devinit if the GPU is the primary graphics device, but there is no accurate way to detect this fact yet. This patch adds such a method for gf100 and later chips, by means of the NV_PTOP_SCRATCH1_DEVINIT_COMPLETED bit. This bit is set to 1 by devinit, and reset to 0 when the GPU is powered. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/devinit/nv50: remove unneeded variableAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | We never use any nv50-specific member in this nv50_devinit_preinit(). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau: s/gm204/gm200/ in a number of placesBen Skeggs2016-03-13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau: recognise GM200 chipsetBen Skeggs2016-03-13
| | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/device/tegra: fix uninitialized IRQ numberAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | nvkm_device_tegra_new initializes the irq member of the Tegra device to -1 in order to signal that it is uninitialized. However, nvkm_device_tegra_fini tests it against 0 to check whether an IRQ has been allocated or not. This leads to free_irq being called on -1 during device initialization. Fix this by using 0 as the uninitialized value everywhere. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/device: call nvkm_device_fini if nvkm_device_init failsAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | nvkm_device_fini is never called if a failure occurs in nvkm_device_init, even when unloading the module. This can lead to a resources leak (one example is the Tegra interrupt which would never be freed in that case). Fix this by calling nvkm_device_fini in nvkm_device_init's failure path. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gf100: use the nvkm_firmware functionsAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | Use the nvkm_firmware_* functions when loading external firmware to avoid duplicate code. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/core: add firmware handling functionsAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | Add two functions nvkm_firmware_get() and nvkm_firmware_put() to load a firmware file and free its resources, respectively. Since firmware files are becoming a necessity for new GPUs, and their location has been standardized to nvidia/chip/, this will prevent duplicate and error-prone name-generation code. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/ltc/gm107: wait on relevant bit in gm107_ltc_cbc_waitAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch "ltc/gm107: use nvkm_mask to set cbc_ctrl1" sets the 3rd bit of the CTRL1 register instead of writing it entirely in gm107_ltc_cbc_clear(). As a counterpart, gm107_ltc_cbc_wait() must also be modified to wait on that single bit only, otherwise a timeout may occur if some other bit of that register is set. This happened at least on GM206 when running glmark2-drm. While we are at it, use the more compact nvkm_wait_msec() to wait for the bit to clear. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | Merge drm-fixes into drm-next.Dave Airlie2016-03-13
|\ \ | |/ |/| | | Nouveau wanted this to avoid some worse conflicts when I merge that.
| * drm/nouveau/disp/dp: ensure sink is powered up before attempting link trainingBen Skeggs2016-02-24
| | | | | | | | | | | | | | | | | | | | This can happen under some annoying circumstances, and is a quick fix until more substantial changes can be made. Fixed eDP mode changes on (at least) the Lenovo P50. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
| * drm/nouveau: platform: Fix deferred probeThierry Reding2016-02-24
| | | | | | | | | | | | | | | | | | | | | | The error cleanup paths aren't quite correct and will crash upon deferred probe. Cc: stable@vger.kernel.org # v4.3+ Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/nouveau: use post-decrement in error handlingRasmus Villemoes2016-02-18
| | | | | | | | | | | | | | | | | | | | We need to use post-decrement to get the dma_map_page undone also for i==0, and to avoid some very unpleasant behaviour if dma_map_page failed already at i==0. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Reviewed-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/nouveau/display: Enable vblank irqs after display engine is on again.Mario Kleiner2016-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the display resume path, move the calls to drm_vblank_on() after the point when the display engine is running again. Since changes were made to drm_update_vblank_count() in Linux 4.4+ to emulate hw vblank counters via vblank timestamping, the function drm_vblank_on() now needs working high precision vblank timestamping and therefore working scanout position queries at time of call. These don't work before the display engine gets restarted, causing miscalculation of vblank counter increments and thereby large forward jumps in vblank count at display resume. These jumps can cause client hangs on resume, or desktop hangs in the case of composited desktops. Fix this Linux 4.4 regression by reordering calls accordingly. Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com> Cc: <stable@vger.kernel.org> # 4.4+ Cc: Ben Skeggs <bskeggs@redhat.com> Cc: ville.syrjala@linux.intel.com Cc: daniel.vetter@ffwll.ch Cc: dri-devel@lists.freedesktop.org Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
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