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* | drm/msm: don't install plane properties on crtcRob Clark2015-08-15
| | | | | | | | | | | | | | | | | | This was a hold-over from the pre-atomic days and legacy userspace that only understood CRTCs. Fortunately we don't have any properties, so this doesn't change anything. But before we start growing some plane properties, we should fix this. Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm/dsi: Report PHY errors only when they really occurArchit Taneja2015-08-15
| | | | | | | | | | | | | | | | | | | | | | | | DSI PHY errors are falsely reported whenever a dsi error occurs. This is because DSI_DLN0_PHY_ERR isn't only used as a status register, but also used to mask PHY errors. Currently, we end up reading the mask bits too and therefore always report errors. Ignore the register mask bits and check for only the status/clear bits. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm: Set different display size limitation on each targetHai Li2015-08-15
| | | | | | | | | | | | | | | | | | | | | | | | | | The maximum output width of one pipeline depends on the LayerMixer's capability. It may be different on each target. Also, MDP5 doesn't have vertical limitation in one frame, as long as the pixel clock can be supported. This change obtains the maximum LM resolution from configuration table and treat it as the whole pipe's limitation for MDP5. The size limit on MDP4 is not changed. Signed-off-by: Hai Li <hali@codeaurora.org>
* | drm/msm/hdmi: standardize on lead chip for compatible namesRob Clark2015-08-15
| | | | | | | | | | | | | | | | For all of these devices, msm89xy was the lead chip, so standardize the compatible names to align with convention used by rest of the qcom/msm drivers. Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm: Add support for msm8x94Stephane Viau2015-08-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds the MDP and HDMI support for msm8x94. Note that HDMI PHY registers are not being accessed anymore from the driver. Signed-off-by: Stephane Viau <sviau@codeaurora.org> [rename compatible s/8x94/8994/ since preference is to not trust the marketing folks who invent chip #'s but instead name things after the lead chip.. we should rename some 80XY to 89XY to standardize on the lead chip but leave that for another patch. Also, update dt bindings doc] Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm/hdmi: remove ->reset() from HDMI PHYStephane Viau2015-08-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ->reset() currently only accesses HDMI core registers, and yet it is located in hdmi_phy*. Since no PHY registers are being accessed during ->reset(), it would be better to bring that function in hdmi core module where HDMI core registers are usually being accessed. This will also help for msm8x94 for which no PHY registers accesses are done (->phy_init == NULL) but the HDMI PHY reset from HDMI core still needs to be done. Note: SW_RESET_PLL bit is not written in hdmi_phy_8x60_reset(); this write should not affect anything if the corresponding field is not writable. Signed-off-by: Stephane Viau <sviau@codeaurora.org> [fixed warning about unused 'phy' in hpd_enable() while merging] Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm/dsi: Add support for msm8x94Hai Li2015-08-15
| | | | | | | | | | | | | | | | | | DSI controller on msm8x94 is version 1.3, which requires different power supplies and works with 20nm DSI PHY. This change is to add the basic support for this version. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm/dsi: Use pinctrl in DSI driverHai Li2015-08-15
| | | | | | | | | | | | | | | | | | Some targets use pinctrl framework to configure some pins. This change allows DSI driver to set default and sleep pinctrl status. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm/dsi: Rename *dual panel* to *dual DSI*Hai Li2015-08-15
| | | | | | | | | | | | | | | | | | The current term of *dual panel* in DSI driver code causes confusion. It is supposed to indicate the panel using two DSI links. Rename it to *dual DSI*. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm/dsi: Update source PLL selection in DSI PHYHai Li2015-08-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The source PLL to be used by each DSI PHY should be decided by DSI manager based on dual DSI information, while the register programming to select PLL is different from one type of PHY to another. This change adds the H/W difference to PHY configuration and updates the interface between DSI manager and PHY. With this change, PLL selection can be supported on different targets. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm/hdmi: add hdmi hdcp support (V3)jilai wang2015-08-15
| | | | | | | | | | | | | | | | | | | | | | | | Add HDMI HDCP support including HDCP PartI/II/III authentication. V1: Initial Change V2: Address Bjorn&Rob's comments Refactor the authentication process to use single work instead of multiple work for different authentication stages. V3: Update to align with qcom SCM api. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm: update generated headersRob Clark2015-08-15
| | | | | | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm/mdp5: release SMB (shared memory blocks) in various casesWentao Xu2015-08-14
| | | | | | | | | | | | | | | | | | | | | | | | | | Release all blocks after the pipe is disabled, even when vsync didn't happen in some error cases. Allow requesting SMB multiple times before configuring to hardware, by releasing blocks not programmed to hardware yet for shrinking case. This fixes a potential leak of shared memory pool blocks. Signed-off-by: Wentao Xu <wentaox@codeaurora.org> Tested-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm: change to uninterruptible wait in atomic commitWentao Xu2015-08-14
| | | | | | | | | | | | | | | | | | The atomic commit cannot easily undo and return an error once the state is swapped. Change to uninterruptible wait, and ignore the timeout error. Signed-off-by: Wentao Xu <wentaox@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm: mdp4: Fix drm_framebuffer dereference crashArchit Taneja2015-08-14
| | | | | | | | | | | | | | | | mdp4_get_frame_format() can dereference a drm_framebuffer when it's NULL. Call it in mdp4_plane_mode_set only when we know fb is non-NULL. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm: fix msm_gem_prime_get_sg_table()Rob Clark2015-08-14
| | | | | | | | | | | | | | We need to return a new sgt, since the caller takes ownership of it. Reported-by: Stanimir Varbanov <svarbanov@mm-sol.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
* | drm/msm: Use new drm_fb_helper functionsArchit Taneja2015-08-06
| | | | | | | | | | | | | | | | | | | | | | | | Use the newly created wrapper drm_fb_helper functions instead of calling core fbdev functions directly. They also simplify the fb_info creation. Cc: Rob Clark <robdclark@gmail.com> Cc: Stephane Viau <sviau@codeaurora.org> Cc: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/atomic: pass old crtc state to atomic_begin/flush.Maarten Lankhorst2015-07-27
|/ | | | | | | | | | | | In intel it's useful to keep track of some state changes with old crtc state vs new state, for example to disable initial planes or when a modeset's prevented during fastboot. Cc: dri-devel@lists.freedesktop.org Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> [danvet: squash in fixup for exynos provided by Maarten.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/msm: restart queued submits after hangRob Clark2015-06-11
| | | | | | | | | | Track the list of in-flight submits. If the gpu hangs, retire up to an including the offending submit, and then re-submit the remainder. This way, for concurrently running piglit tests (for example), one failing test doesn't cause unrelated tests to fail simply because it's submit was queued up after one that triggered a hang. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: fix timeout calculationRob Clark2015-06-11
| | | | | | | | | | | | | | | | | | The 'timeout' value comes from userspace (CLOCK_MONOTONIC), but converting this directly to jiffies doesn't take into account the initial jiffies count at boot, which may differ from the base time of CLOCK_MONOTONIC. TODO: add ktime_delta_jiffies() when rebasing on 4.1 and use that instead of ktime_sub/ktime_to_timespec/timespec_to_jiffies combo (as suggested by Arnd) v2: switch over from 'struct timespec' to ktime_t throughout, since 'struct timespec' will be deprecated (as suggested by Arnd) v3: minor cosmetic tweaks Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: Use pinctrl in HDMI driverStephane Viau2015-06-11
| | | | | | | | | Some targets (eg: msm8994) use the pinctrl framework to configure interface pins. This change adds support for initialization and pinctrl active/sleep state control for the HDMI driver. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: Point to the right struct deviceStephane Viau2015-06-11
| | | | | | | | | DRM device's dev (hdmi->dev->dev) points to the mdss_mdp device handle. Instead, we should get a reference to the mdss_hdmi handle. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp: Add support for more 32-bit RGB formatsStephane Viau2015-06-11
| | | | | | | That will complete the lists of Alpha + RGB formats. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/atomic: Clean up planes in the error paths of .atomic_commit()Laurent Pinchart2015-06-11
| | | | | | | | | When the .atomic_commit() handler fails, clean up planes previoulsy prepared by drm_atomic_helper_prepare_planes() with a call to drm_atomic_helper_cleanup_planes(). Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: Always generate active-high sync signals for DSIHai Li2015-06-11
| | | | | | | | | | DSI video mode engine can only take active-high sync signals. This change prevents MDP5 sending active-low sync signals to DSI in any case. Signed-off-by: Hai Li <hali@codeaurora.org> Tested-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: dsi: fix compile errors when CONFIG_GPIOLIB=nBrian Norris2015-06-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I'm not sure where, exactly, but somewhere in here we must be relying on an implicit include. drivers/gpu/drm/msm/dsi/dsi_host.c: In function ‘dsi_host_init_panel_gpios’: drivers/gpu/drm/msm/dsi/dsi_host.c:1356:2: error: implicit declaration of function ‘devm_gpiod_get’ [-Werror=implicit-function-declaration] msm_host->disp_en_gpio = devm_gpiod_get(panel_device, ^ drivers/gpu/drm/msm/dsi/dsi_host.c:1356:25: warning: assignment makes pointer from integer without a cast [enabled by default] msm_host->disp_en_gpio = devm_gpiod_get(panel_device, ^ drivers/gpu/drm/msm/dsi/dsi_host.c:1364:3: error: implicit declaration of function ‘gpiod_direction_output’ [-Werror=implicit-function-declaration] ret = gpiod_direction_output(msm_host->disp_en_gpio, 0); ^ drivers/gpu/drm/msm/dsi/dsi_host.c:1371:20: warning: assignment makes pointer from integer without a cast [enabled by default] msm_host->te_gpio = devm_gpiod_get(panel_device, "disp-te"); ^ drivers/gpu/drm/msm/dsi/dsi_host.c:1378:3: error: implicit declaration of function ‘gpiod_direction_input’ [-Werror=implicit-function-declaration] ret = gpiod_direction_input(msm_host->te_gpio); ^ drivers/gpu/drm/msm/dsi/dsi_host.c: In function ‘msm_dsi_host_power_on’: drivers/gpu/drm/msm/dsi/dsi_host.c:1918:3: error: implicit declaration of function ‘gpiod_set_value’ [-Werror=implicit-function-declaration] gpiod_set_value(msm_host->disp_en_gpio, 1); ^ Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: David Airlie <airlied@linux.ie> Cc: Rob Clark <robdclark@gmail.com> Cc: Hai Li <hali@codeaurora.org> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: use devm_gpiod_get_optional for optional reset gpioUwe Kleine-König2015-06-11
| | | | | | | | | | | | | | | | | | | | | | Since 39b2bbe3d715 (gpio: add flags argument to gpiod_get*() functions) which appeared in v3.17-rc1, the gpiod_get* functions take an additional parameter that allows to specify direction and initial value for output. Also there is a variant to find optional gpios that returns NULL if there is no gpio instead of -ENOENT. Make use of both features to simplify the driver. This makes error checking more strict because errors like -ENOSYS ("no gpio support compiled in") or -EPROBE_DEFER ("gpio not ready yet") are handled correctly now. Furthermore this is one caller less that stops us making the flags argument to gpiod_get*() mandatory. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Separate PHY to another platform deviceHai Li2015-06-11
| | | | | | | | | | | | There are different types of PHY from one chipset to another, while the DSI host controller is relatively consistent across platforms. Also, the PLL inside PHY is providing the source of DSI byte and pixel clocks, which are used by DSI host controller. Separated devices for clock provider and clock consumer make DSI driver better fit into common clock framework. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Enable PLL driver in MSM DSIHai Li2015-06-11
| | | | | | | | This change activates PLL driver for DSI to work with common clock framework. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Add DSI PLL clock driver supportHai Li2015-06-11
| | | | | | | | | | | | | | DSI byte clock and pixel clocks are sourced from DSI PLL. This change adds the DSI PLL source clock driver under common clock framework. This change handles DSI 28nm PLL only. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Wentao Xu <wentaox@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: use IS_ERR() to check regulator_get() returnFabian Frederick2015-06-11
| | | | | | | regulator_get() never returns NULL. There's no need for IS_ERR_OR_NULL() Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: use IS_ERR() to check msm_ioremap() returnFabian Frederick2015-06-11
| | | | | | | msm_ioremap() never returns NULL. There's no need for IS_ERR_OR_NULL() Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: Wait for PP_DONE irq for command mode CRTC atomic commitHai Li2015-06-11
| | | | | | | | | | | CRTCs in DSI command mode data path should wait for pingpong done, instead of vblank, to finish atomic commit. This change is to enable PP_DONE irq on command mode CRTCs and wait for this irq happens before atomic commit completion. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: Use customized function to wait for atomic commit doneHai Li2015-06-11
| | | | | | | | | | | | | | MDP FLUSH registers could indicate if the previous flush updates has taken effect at vsync boundary. Making use of this H/W feature can catch the vsync that happened between CRTC atomic_flush and *_wait_for_vblanks, to avoid unnecessary wait. This change allows kms CRTCs to use their own *_wait_for_commit_done functions to wait for FLUSH register cleared at vsync, before commit completion. Signed-off-by: Hai Li <hali@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: drop redundant debug outputNicholas Mc Guire2015-06-11
| | | | | | | | | wait_for_completion_timeout returns 0 in case of timeout and never return < 0 so there is no additional information in printing the value of time_left here as it will always be 0, thus it can be dropped. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: wait_for_completion_timeout return is never negativeNicholas Mc Guire2015-06-11
| | | | | | | | | wait_for_completion_timeout returns >= 0 but never negative - so the error check should be against equality to 0 not <= 0. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: match wait_for_completion_timeout return typeNicholas Mc Guire2015-06-11
| | | | | | | | | return type of wait_for_completion_timeout is unsigned long not int, this patch assigns the return value of wait_for_completion_timeout to an appropriately typed and named variable. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: dsi: Provide option to force continuous HS clockArchit Taneja2015-06-11
| | | | | | | | | | | | | Some DSI peripherals rely on the HS clock on DSI clock lane as their clock source. If the clock lane transitions between HS and LP states, it can disrupt the functioning of such peripherals. The mipi dsi mode flag MIPI_DSI_CLOCK_NON_CONTINUOUS already exists for such peripheral drivers. Use it to configure the bit CLKLN_HS_FORCE_REQUEST in DSI_LANE_CTRL. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: Call drm_prime_gem_destroy to clean up imported GEM objectjilai wang2015-06-11
| | | | | | | | If the GEM object is imported, drm_prime_gem_destroy needs to be called to clean up dma buffer related information. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/edp: fix build warning - missing prototypeRob Clark2015-06-11
| | | | | | | | | | Fix build warning when building edp/edp_aux.o due to missing prototype for edp_aux_transfer. This function is only used in edp_aux.c so just make it static. Reported-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: drop redundant output in debug messageNicholas Mc Guire2015-06-11
| | | | | | | | wait_for_completion_timeout returns 0 in case of timeout so printing the return value here will always yield 0 and is therefor redundant - dropped. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: fix HZ dependency of timeoutNicholas Mc Guire2015-06-11
| | | | | | | | | | | | | The timeout is passed as a constant which makes it HZ dependent because jiffies are expected so it should be converted to jiffies. The actual value is not clear from the code - my best guess is that this should be 300 milliseconds given that other timeouts are in milliseconds based on looking at other drm drivers (e.g. exynos_drm_dsi.c:356 300ms, tegra/dpaux.c:188 250ms) - this needs to be confirmed by someone who knows the details of the driver. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: fixup wait_for_completion_timeout handlingNicholas Mc Guire2015-06-11
| | | | | | | | | | | | | | | | | | | | | | wait_for_completion_timeout return >= 0 but never negative so the check logic looks inconsistent. Further the return value of wait_for_completion_timeout was being passed up the call chain but the x call sites as drm_dp_i2c_do_msg()/drm_dp_dpcd_access() check for < 0 thus timeout was being treated as success case. <snip> drivers/gpu/drm/drm_dp_helper.c:drm_dp_i2c_do_msg() mutex_lock(&aux->hw_mutex); ret = aux->transfer(aux, msg); mutex_unlock(&aux->hw_mutex); if (ret < 0) { <snip> logic in edp_aux_transfer() seems incorrect as it could return 0 (timeout) but checks of <= 0 to indicate error so the return probably should be -ETIMEDOUT in case wait_for_completion_timeout returns 0 (timeout occurred). Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp5: fix for crash in disable pathRob Clark2015-06-11
| | | | | | | | | | | | | | | | | | | | | | | | | | Seems like disable can race with complete_flip() in process of disabling a crtc, leading to: [ 49.065364] Call trace: [ 49.071441] [<ffffffc00041d5a0>] mdp5_ctl_blend+0x20/0x1c0 [ 49.073788] [<ffffffc00041ebcc>] mdp5_crtc_disable+0x3c/0xa8 [ 49.079348] [<ffffffc0003e7854>] disable_outputs.isra.4+0x11c/0x220 [ 49.085164] [<ffffffc0003e7afc>] drm_atomic_helper_commit_modeset_disables+0x14/0x38 [ 49.091155] [<ffffffc000425c80>] complete_commit+0x40/0xb8 [ 49.099136] [<ffffffc0004260ac>] msm_atomic_commit+0x364/0x398 [ 49.104430] [<ffffffc00040a614>] drm_atomic_commit+0x3c/0x70 [ 49.110249] [<ffffffc0003e67b8>] drm_atomic_helper_set_config+0x1b0/0x3e0 [ 49.116065] [<ffffffc0003f99bc>] drm_mode_set_config_internal+0x64/0xf8 [ 49.122746] [<ffffffc0003fa624>] drm_framebuffer_remove+0xe4/0x128 [ 49.129171] [<ffffffc0003feaf8>] drm_mode_rmfb+0xc0/0x100 [ 49.135420] [<ffffffc0003efba8>] drm_ioctl+0x258/0x4d0 [ 49.140889] [<ffffffc0001b0388>] do_vfs_ioctl+0x338/0x5d0 [ 49.145921] [<ffffffc0001b06a8>] SyS_ioctl+0x88/0xa0 It makes no sense to free the ctl without disabling all stages, so lets just move them together to avoid the crash. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: workaround for missing irq on a306/8x16Rob Clark2015-06-11
| | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: adreno a306 supportRob Clark2015-06-11
| | | | | | | | | As found in apq8016 (used in DragonBoard 410c) and msm8916. Note that numerically a306 is actually 307 (since a305c already claimed 306). Nice and confusing. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: clarify downstream bus scalingRob Clark2015-06-11
| | | | | | | | | | A few spots in the driver have support for downstream android CONFIG_MSM_BUS_SCALING. This is mainly to simplify backporting the driver for various devices which do not have sufficient upstream kernel support. But the intentionally dead code seems to cause some confusion. Rename the #define to make this more clear. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp4: Support NV12MT format in mdp4Rob Clark2015-06-11
| | | | | | | | | | | | Using fb modifier flag, support NV12MT format in MDP4. v2: - rework the modifier's description [Daniel Vetter's comment] - drop .set_mode_config() callback [Rob Clark's comment] v3: - change VENDOR's name and restrict usage to NV12 [pointed by Daniel] Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: update generated headersRob Clark2015-06-11
| | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: add missing DRIVER_ATOMIC flagRob Clark2015-06-11
| | | | | | Somehow this got lost when msm atomic support was first merged. Signed-off-by: Rob Clark <robdclark@gmail.com>