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path: root/drivers/gpu/drm/i915/intel_sprite.c
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* drm/i915: Enable querying offset of UV plane with intel_plane_obj_offsetTvrtko Ursulin2015-09-23
| | | | | | | | v2: Rebase. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Support planar formats in tile height calculationsTvrtko Ursulin2015-09-23
| | | | | | | | | | This will be needed for NV12 support. v2: Rebase. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: cleanup pipe_update trace functions with new crtc debug info v3Jesse Barnes2015-09-18
| | | | | | | | | | | | | | Use the new debug info in the intel_crtc struct in these functions rather than passing them as args. v2: move min/max assignment back above first trace call (Ville) use scanline from crtc->debug rather than fetching a new one (Ville) v3: fix up trace_i915_pipe_update_end, needs end scanline (Ville) Requested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
* drm/i915: add more debug info for when atomic updates fail v3Jesse Barnes2015-09-17
| | | | | | | | | | | | I used these additional fields to track down the issue I saw on HSW. v2: move debug fields into a substruct (Ville) v3: clean up debug code more (Ville) References: https://bugs.freedesktop.org/show_bug.cgi?id=91579 Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
* drm/i915: Fix fb object's frontbuffer-bitsSagar Arun Kamble2015-09-14
| | | | | | | | | | | | | Shared frontbuffer bits are causing warnings when same FB is displayed in another plane without clearing the bits from previous plane. v2: Removing coversion of fb bits to 64 bit as it is not needed for now. (Daniel) Change-Id: Ic2df80747f314b82afd22f8326297c57d1e652c6 Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com> [danvet: Drop INTEL_FRONTBUFFER_SPRITE_MASK since unused.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Remove legacy plane updates for cursor and sprite planes.Maarten Lankhorst2015-09-10
| | | | | | | | Unfortunately fbc still depends on legacy primary state, so it can't be killed off completely yet. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Also record time difference if vblank evasion fails, v2.Maarten Lankhorst2015-09-02
| | | | | | | | | | | This makes the error message slightly more useful. Changes since v1: - Use ktime_get() while irqs are still disabled. (vsyrjala) Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Remove start frame argument to pipe_update_begin/end.Maarten Lankhorst2015-09-02
| | | | | | | | There's already a per crtc member that can be used for it. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: always disable irqs in intel_pipe_update_startMaarten Lankhorst2015-07-15
| | | | | | | | | | | This can only fail because of a bug in the code. Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> [danvet: Squash in follow-up to also remove start_vbl_count from intel_crtc->atomic and put it into the intel_crtc directly - it's not precomputed state.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Use the memory latency based WM computation on VLV tooVille Syrjälä2015-06-29
| | | | | | | | | | | | | | In order to get decnet memory self refresh residency on VLV, flip it over to the new CHV way of doing things. VLV doesn't do PM5 or DDR DVFS so it's a bit simpler. I'm not sure the currently memory latency used for CHV is really appropriate for VLV. Some further testing will probably be needed to figure that out. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Store frontbuffer_bits in the planeVille Syrjälä2015-06-25
| | | | | | | | | | Avoid some 'switch (plane->type)' by storing the fronbuffer_bits in intel_plane. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> [danvet: use singular frontbuffer_bits in intel_plane since a plan can only ever have one bit. Discussed with Ville on irc.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Make setting color key atomic.Maarten Lankhorst2015-06-22
| | | | | | | | | | | By making color key atomic there are no more transitional helpers. The plane check function will reject the color key when a scaler is active. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: atomic plane updates in a nutshellMaarten Lankhorst2015-06-22
| | | | | | | | | | | | | | | | | Now that all planes are added during a modeset we can use the calculated changes before disabling a plane, and then either commit or force disable a plane before disabling the crtc. The code is shared with atomic_begin/flush, except watermark updating and vblank evasion are not used. This is needed for proper atomic suspend/resume support. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90868 Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: remove force argument from disable_planeMaarten Lankhorst2015-06-22
| | | | | | | | | | | | The idea was good, but planes can have a fb even though they're disabled. This makes the force argument useless and always true, because only the commit function updates state. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: clean up atomic plane check functions, v2.Maarten Lankhorst2015-06-22
| | | | | | | | | | | | | | | | By passing crtc_state to the check_plane functions a lot of duplicated code can be removed. There are still some transitional helper calls, they will be removed later. Changes since v1: - Revert state->visible changes. - Use plane->state->crtc instead of plane->crtc. - Use drm_atomic_get_existing_crtc_state. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: clean up plane commit functionsMaarten Lankhorst2015-06-22
| | | | | | | | | No point in hiding behind big ifs. This will be true most of the time. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Split plane updates of crtc->atomic into a helper, v2.Maarten Lankhorst2015-06-22
| | | | | | | | | | | | | This makes it easier to verify that no changes are done when calling this from crtc instead. Changes since v1: - Make intel_wm_need_update static and always check it. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Split skl_update_scaler, v4.Maarten Lankhorst2015-06-22
| | | | | | | | | | | | | | | | | | | | | | | commit 2c310b9d2859863826c3688c88218d607d5dd19a Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Date: Mon May 18 12:28:52 2015 +0200 drm/i915: Split skl_update_scaler, v4. It's easier to read separate functions for crtc and plane scaler state. Changes since v1: - Update documentation. Changes since v2: - Get rid of parameters to skl_update_scaler only used for traces. This avoids needing to document the other parameters. Changes since v3: - Rename scaler_idx to scaler_user. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Actually respect DSPSURF alignment restrictionsVille Syrjälä2015-06-15
| | | | | | | | | | | | | | | | | Currently intel_gen4_compute_page_offset() simply picks the closest page boundary below the linear offset. That however may not be suitably aligned to satisfy any hardware specific restrictions. So let's make sure the page boundary we choose is properly aligned. Also to play it a bit safer lets split the remaining linear offset into x and y values instead of just x. This should make no difference for most platforms since we convert the x and y offsets back into a linear offset before feeding them to the hardware. HSW+ are different however and use x and y offsets even with linear buffers, so they might have trouble if either the x or y get too big. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Make sure our labels start at column 0Damien Lespiau2015-06-15
| | | | | | | I noticed one of those and it turned out we have a few lingering around. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Kill intel_flush_primary_plane()Ville Syrjälä2015-05-28
| | | | | | | | | | | | | | | | | | | | | | The primary plane frobbing was removed from the sprite code in commit ecce87ea3ab55ad0dc64460e6422c357d158a55e Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Date: Tue Apr 21 17:12:50 2015 +0300 drm/i915: Remove implicitly disabling primary plane for now but the intel_flush_primary_plane() calls were left behind. Replace them with straight forward POSTING_READ() of the sprite surface address register. The other user of intel_flush_primary_plane() is g4x_disable_trickle_feed() where we can just inline the steps directly. This allows intel_flush_primary_plane() to be killed off. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915/skl: don't fail colorkey + scaler requestChandra Konduru2015-05-22
| | | | | | | | | | | | | | | | | | There is a mplayer video failure reported with xv. This is because there is a request to do both plane scaling and colorkey. Because skl hw doesn't support plane scaling and colorkey at the same time, request is failed which is expected behavior. To make xv operate, this patch allows colorkey continue to work without using scaler. Then behavior would be similar to platforms without plane scaler support. Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90449 [danvet: change can_scale to bool as requested by Ville.] Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Make the sprite formats constDamien Lespiau2015-05-20
| | | | | Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: call intel_tile_height with correct parameterChandra Konduru2015-05-20
| | | | | | | | | | In skylake update plane functions, intel_tile_height() is called with bits_per_pixel instead of pixel_format. Correcting it. Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> [danvet: Fixup alignment.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Move intel_(pre_disable/post_enable)_primary to intel_display.c, ↵Maarten Lankhorst2015-05-08
| | | | | | | | | | and use it there. They're the same code, so why not? Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Add a way to disable planes without updating stateMaarten Lankhorst2015-05-08
| | | | | | | | | This is used by the next commit to disable all planes on a crtc without caring what type it is. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: Remove implicitly disabling primary plane for nowMaarten Lankhorst2015-05-08
| | | | | | | | | | Some of the flags that were used are still useful when transitioning to atomic, so keep those around for now. This removes some of the complications of crtc->primary_enabled, making it easier to remove. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: skylake sprite plane scaling using shared scalersChandra Konduru2015-05-08
| | | | | | | | | | | | | | | | | | | | | | | | | This patch enables skylake sprite plane display scaling using shared scalers atomic desgin. v2: -use single copy of scaler limits (Matt) v3: -detaching scalers moved to crtc commit path (Matt) v4: -changes to align with updated scaler structures (Matt, me) -keep sprite src rect in 16.16 format (Matt, Daniel) v5: -rebased on top of 90/270 rotation changes (me) -Refactored skl_update_plane to reduce its size (Daniel) It is a step towards having a single function covering all planes. Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Testcase: igt/kms_plane_scaling Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: skylake primary plane scaling using shared scalersChandra Konduru2015-05-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables skylake primary plane scaling using shared scalers atomic desgin. v2: -use single copy of scaler limits (Matt) v3: -move detach_scalers to crtc commit path (Matt) -use values in plane_state->src as regular integers (me) v4: -changes to align with updated scaler structures (Matt, me) -keep plane src rect in 16.16 format (Matt, Daniel) v5: -Rebased on top of 90/270 rotation changes (me) -Fixed an issue introduced by 90/270 changes where plane programming is using drm_plane->state rect instead of intel_plane->state rect. This change also required for scaling to work properly. (me) -With 90/270, updated limits to cover both portrait and landscape usages (me) -Refactored skylake_update_primary_plane to reduce its size (Daniel) Added helper functions for refactoring are comprehended enough to be used for skylake_update_plane (for sprite) too. One stop towards having single function for all planes. v6: -Added fixme note when checking plane_state->src width in update_plane (Daniel) -Release lock when failing to colorkey request with active scaler (Daniel) Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Reviewed-by: matthew.d.roper@intel.com Reviewed-by: sonika.jindal@intel.com (v5) Testcase: igt/kms_plane_scaling Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* Merge branch 'topic/bxt-stage1' into drm-intel-next-queuedDaniel Vetter2015-04-14
|\ | | | | | | | | | | | | Separate topic branch for bxt didn't work out since we needed to refactor the gmbus code a bit to make it look decent. So backmerge. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
| * Merge tag 'v4.0-rc7' into drm-nextDave Airlie2015-04-08
| |\ | | | | | | | | | | | | | | | | | | | | | | | | Linux 4.0-rc7 Requested by Alex for fixes -next needs. Conflicts: drivers/gpu/drm/i915/intel_sprite.c
| | * drm/i915: Reject the colorkey ioctls for primary and cursor planesVille Syrjälä2015-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The legcy colorkey ioctls are only implemented for sprite planes, so reject the ioctl for primary/cursor planes. If we want to support colorkeying with these planes (assuming we have hw support of course) we should just move ahead with the colorkey property conversion. Testcase: kms_legacy_colorkey Cc: Tommi Rantala <tt.rantala@gmail.com> Cc: stable@vger.kernel.org Reference: http://mid.gmane.org/CA+ydwtr+bCo7LJ44JFmUkVRx144UDFgOS+aJTfK6KHtvBDVuAw@mail.gmail.com Reported-and-tested-by: Tommi Rantala <tt.rantala@gmail.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
* | | drm/i915: Keep sprite plane src rect in 16.16 formatChandra Konduru2015-04-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch keeps intel_plane_state->src rect back into 16.16 format. v2: -sprite src rect to match primary format (Matt, Daniel) v3: -moved a hunk from #14 to keep src rect in check & commit in tandom (Matt) Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | | drm/i915: Initialize skylake scalersChandra Konduru2015-04-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initializing scalers with supported values during crtc init. v2: -initialize single copy of min/max values (Matt) v3: -moved gen check to callsite (Matt) v4: -squashed planes begin with no scaler to here (me) v5: -updated init function with updated scaler state structure (Matt) Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | | drm/i915: Initialize plane colorkey to NONEChandra Konduru2015-04-13
| | | | | | | | | | | | | | | | | | | | | | | | This patch initializes plane colorkey to NONE. Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | | drm/i915/skl: Support for 90/270 rotationSonika Jindal2015-04-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: Moving creation of property in a function, checking for 90/270 rotation simultaneously (Chris) Letting primary plane to be positioned v3: Adding if/else for 90/270 and rest params programming, adding check for pixel_format, some cleanup (review comments) v4: Adding right pixel_formats, using src_* params instead of crtc_* for offset and size programming (Ville) v5: Rebased on -nightly and Tvrtko's series for gtt remapping. v6: Rebased on -nightly (Tvrtko's series merged) v7: Moving pixel_format check to intel_atomic_plane_check (Matt) Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | | drm/i915: Switch to full atomic helpers for plane updates/disable, take twoMatt Roper2015-04-10
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch from our plane update/disable entrypoints to use the full atomic helpers (which generate a top-level atomic transaction) rather than the transitional helpers (which only create/manipulate orphaned plane states independent of a top-level transaction). Various upcoming work (SKL scalers, atomic watermarks, etc.) requires a full atomic transaction to behave properly/cleanly. Last time we tried this, we had to back out the change because we still call the drm_plane vfuncs directly from within our legacy modesetting code. This potentially results in nested atomic transactions, locking collisions, and other failures. To avoid that problem again, we sidestep the issue by calling the transitional helpers directly (rather than through a vfunc) when we're nested inside of other legacy modesetting code. However this does allow legacy SetPlane() ioctl's to process an entire drm_atomic_state transaction, which is important for upcoming patches. Cc: Chandra Konduru <chandra.konduru@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: Rip out GET_SPRITE_COLORKEY ioctlDaniel Vetter2015-03-27
| | | | | | | | | | | | | | | | | | It's completely unused and Tommi noticed that the #define is borked since forever. I've done a git search in userspace and only found broken definitions and no users anywhere. Cc: Tommi Rantala <tt.rantala@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
* | drm/i915/skl: Take 90/270 rotation into account in watermark calculationsTvrtko Ursulin2015-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: Pass in rotation info to sprite plane updates as well. v3: Use helper to determine 90/270 rotation. (Michel Thierry) v4: Rebased for fb modifiers and atomic changes. For: VIZ-4546 Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Michel Thierry <michel.thierry@intel.com> (v3) Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915/skl: Query display address through a wrapperTvrtko Ursulin2015-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Need to do this in order to support 90/270 rotated display. v2: Pass in drm_plane instead of plane index to intel_obj_display_address. v3: * Renamed intel_obj_display_address to intel_plane_obj_offset. (Chris Wilson) * Simplified rotation check to bitwise AND. (Chris Wilson) v4: * Extracted 90/270 rotation check into a helper function. (Michel Thierry) v5: * Rebased for ggtt view changes. For: VIZ-4545 Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Michel Thierry <michel.thierry@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: Fix SKL sprite disable double buffer register updateVille Syrjälä2015-03-20
| | | | | | | | | | | | | | | | Write the PLANE_SURF register instead of PLANE_CTL to arm the double buffer regisrter update. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: Eliminate plane control register RMW from sprite codeVille Syrjälä2015-03-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the RMW access with explicit initialization of the entire plane control register, as was done for primary planes in: commit f45651bae2ee73ae551699d481f76aa6ad92138f Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Fri Aug 8 21:51:10 2014 +0300 drm/i915: Eliminate rmw from .update_primary_plane() The automagic primary plane disable is still doing RMWs, but that will require more work to untangle, so leave it alone for now. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: Eliminate the RMW sprite colorkey managementVille Syrjälä2015-03-20
| | | | | | | | | | | | | | | | | | | | | | | | | | Store the colorkey in intel_plane and kill off all the RMW stuff handling it. This is just an intermediate step and eventually the colorkey needs to be converted into some properties. v2: Actually update the hardware state in the set_colorkey ioctl (Daniel) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: Move vblank wait determination to 'check' phaseMatt Roper2015-03-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Determining whether we'll need to wait for vblanks is something we should determine during the atomic 'check' phase, not the 'commit' phase. Note that we only set these bits in the branch of 'check' where intel_crtc->active is true so that we don't try to wait on a disabled CRTC. The whole 'wait for vblank after update' flag should go away in the future, once we start handling watermarks in a proper atomic manner. This regression has been introduced in commit 2fdd7def16dd7580f297827930126c16b152ec11 Author: Matt Roper <matthew.d.roper@intel.com> Date: Wed Mar 4 10:49:04 2015 -0800 drm/i915: Don't clobber plane state on internal disables Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Root-cause-analysis-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89550 Testcase: igt/pm_rpm/legacy-planes Testcase: igt/pm_rpm/legacy-planes-dpms Testcase: igt/pm_rpm/universal-planes Testcase: igt/pm_rpm/universal-planes-dpms Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: Kill intel_plane->objVille Syrjälä2015-03-20
| | | | | | | | | | | | | | | | | | intel_plane->obj is not used anymore so kill it. Also don't pass both the fb and obj to the sprite .update_plane() hook, as just passing the fb is enough. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: Use plane->state->fb instead of plane->fb in intel_plane_restore()Ville Syrjälä2015-03-17
| | | | | | | | | | | | | | | | | | | | plane->fb is not as reliable as plane->state->fb so let's convert intel_plane_restore() over the the new way of thinking as well. Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915/skl: Update watermarks for Y tilingTvrtko Ursulin2015-02-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Display watermarks need different programming for different tiling modes. Set the relevant flag so this happens during the plane commit and add relevant data into a structure made available to the watermark computation code. v2: Pass in tiling info to sprite plane updates as well. v3: Rebased for plane handling changes. v4: Handle fb == NULL when plane is disabled. v5: Refactored for addfb2 interface. v6: Refactored for fb modifier changes. v7: Updated for atomic commit by only updating watermarks when tiling changes. v8: BSpec watermark calculation updates. v9: Restrict scope of y_tile_minimum variable. (Damien Lespiau) v10: Get fb from plane state otherwise we are working on old state. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Acked-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> (v9) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915/skl: Allow scanning out Y and Yf fbsDamien Lespiau2015-02-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Skylake is able to scannout those tiling formats. We need to allow them in the ADDFB ioctl and tell the harware about it. v2: Rebased for addfb2 interface. (Tvrtko Ursulin) v3: Rebased for fb modifier changes. (Tvrtko Ursulin) v4: Don't allow Y tiled fbs just yet. (Tvrtko Ursulin) v5: Check for stride alignment and max pitch. (Tvrtko Ursulin) v6: Simplify maximum pitch check. (Ville Syrjälä) v7: Drop the gen9 check since requirements are no different. (Ville Syrjälä) v8: Gen2 has different X tiling stride. (Ville Syrjälä) Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> (v7) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: Remove DRIVER_MODESET checks from modeset codeDaniel Vetter2015-02-27
| | | | | | | | | | | | | | | | Mostly just checks in i915-private modeset ioctls. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: Switch to drm_crtc variants of vblank functionsDaniel Vetter2015-02-23
| | | | | | | | | | | | | | | | | | | | Where possible right now. Just a small step towards nirvana ... v2: git add. Uggh. Noticed by Imre. Cc: Imre Deak <imre.deak@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-02 15:49:12 -0400