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path: root/drivers/gpu/drm/amd/amdgpu
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| | * | drm/amdgpu: handle runtime pm in drm pre/post closeAlex Deucher2016-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Close was not handled correctly. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: handle runtime pm correctly in amdgpu_driver_open_kmsAlex Deucher2016-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Need to fix the error paths. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFFAlex Deucher2016-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Missed this case previously. No need to do anything if the device is already off. runtime pm will handle it. Acked-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: set runtime pm state to active on resumeAlex Deucher2016-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The sbios always powers up the dGPU on resume. Acked-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu/gfx6: drop some dead codeAlex Deucher2016-09-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The mqd is only used on CI and newer. Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add gart recovery by gtt list V2Chunming Zhou2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V2: a. gart recovery should be ahead of ring test. b. rename to amdgpu_ttm_recover_gart Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: link all gtt when binding them V2Chunming Zhou2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V2: spin lock instead of mutex for gtt list Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add si pciids v2Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu/si: Add updated smc firmware for SI kickersAlex Deucher2016-08-31
| | | | | | | | | | | | | | | | Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: Add SI Family informationKen Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: enable SI DPMMaruthi Srinivas Bayyavarapu2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: use DRM print instead of printkHuang Rui2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add SI DPM support (v4)Maruthi Bayyavarapu2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: corrected register offset shift v3: rebase fixes v4: fix firmware paths add SI smc firmware versions for sysfs dump remove unused function forward define fix the tahiti specific value of DEEP_SLEEP_CLK_SEL field fix to miss adding thermal controller use vram_type instead of checking mem_gddr5 flag fix incorrect index of CG_FFCT_0 register fix incorrect reading method at si_get_current_pcie_speed Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add SI SMC supportMaruthi Srinivas Bayyavarapu2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add si dpm support in amdgpu_atombiosMaruthi Srinivas Bayyavarapu2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: renamed _atom_ to _atombios_ for consistency added ulClockParams to _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 and _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5 to avoid build break Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add si specific logic into the device initialize function v3Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v3: guard doorbell_fini as well Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add si ip blocks setup v3Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add all the components for si into Makefile/kconfig v3Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: introduce pcie port read/write entryHuang Rui2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pcie port read/write entry, because it will be also used on si dpm part. Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add si implementation v10Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v5: rebase fixes v6: add mgcg arrays v7: rebase fixes v8: rebase fixes v9: add get_disabled_bios(), make get_xclk static v10: fix oland and hainan asic specific handle at si_program_aspm Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add DMA implementation for si v8Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v4: rebase fixes v5: use the generic nop fill v6: rebase fixes v7: rebase fixes copy count fixes from Jonathan general cleanup add fill buffer implementation v8: adapt write_pte and copy_pte to latest changes Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add graphic pipeline implementation for si v8Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v5: rebase fixes v6: rebase fixes v7: rebase fixes fix tile reg offset as noticed by Jonathan Drop some debugging remnants v8: add gfx v6 firmware versions for sysfs dump Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: atombios change for dce6 to work v3Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v3: white space fixes Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add display controller implementation for si v10Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v4: rebase fixups v5: more fixes based on dce8 code v6: squash in dmif offset fix v7: rebase fixups v8: rebase fixups, drop some debugging remnants v9: fix BE build v10: include Marek's tiling fixes, add support for page_flip_target, set MASTER_UDPATE_MODE=0, fix cursor Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add interupt handler implementation for si v3Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v3: rebase fixups Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add graphic memory controller implementation for si v7Ken Wang2016-08-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v4: rebase fixups v5: rebase fixups v5: rebase fixups v6: rebase fixups for gart size changes v7: add gmc v6 firmware versions for sysfs dump Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu:add switch buffer to end of CS (v2)Monk Liu2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sync switch buffer scheme with windows kmd for gfx v8, step1: append a switch_buffer to the end of CS v2:rebase on latest staging Signed-off-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amd/amdgpu: debugfs SMC addresses are byte addressesTom St Denis2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: throttle buffer migrations at CS using a fixed MBps limit (v2)Marek Olšák2016-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The old mechanism used a per-submission limit that didn't take previous submissions within the same time frame into account. It also filled VRAM slowly when VRAM usage dropped due to a big eviction or buffer deallocation. This new method establishes a configurable MBps limit that is obeyed when VRAM usage is very high. When VRAM usage is not very high, it gives the driver the freedom to fill it quickly. The result is more consistent performance. It can't keep the BO move rate low if lots of evictions are happening due to VRAM fragmentation, or if a big buffer is being migrated. The amdgpu.moverate parameter can be used to set a non-default limit. Measurements can be done to find out which amdgpu.moverate setting gives the best results. Mainly APUs and cards with small VRAM will benefit from this. For F1 2015, anything with 2 GB VRAM or less will benefit. Some benchmark results - F1 2015 (Tonga 2GB): Limit MinFPS AvgFPS Old code: 14 32.6 128 MB/s: 28 41 64 MB/s: 15.5 43 32 MB/s: 28.7 43.4 8 MB/s: 27.8 44.4 8 MB/s: 21.9 42.8 (different run) Random drops in Min FPS can still occur (due to fragmented VRAM?), but the average FPS is much better. 8 MB/s is probably a good limit for this game & the current VRAM management. The random FPS drops are still to be tackled. v2: use a spinlock Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amd/amdgpu: Tidy up cz_dpm.cTom St Denis2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Various minor formatting changes. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amd/amdgpu: Clean up memory leak in cz_dpm_init().Tom St Denis2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If init fails free up any allocated memory. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amd/amdgpu: Fix memleak in cz_parse_power_table()Tom St Denis2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If one of the entries fails to be allocated then free all of the previous entries before freeing the array which holds their pointers. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: refine uvd gate logic for CI.Rex Zhu2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | uvd dpm will be controlled by uvd. dpm just disable uvd dpm in case of suspend when play video. due to the new logic of uvd_begin_use/end_use, if disable uvd dpm in late init, will have no chance to enable uvd dpm after resume until play video again. Change-Id: I70e3d7efe63edad37f26e6c5ea089da1135c0ab5 Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amd/powerplay: simplify struct amd_pp_init.Rex Zhu2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | delete the members not needed when amd_powerplay_init. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add support for getting sub_device id andRex Zhu2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sub_vendor_id in cgs interface. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add vce bypass mode for tonga.Rex Zhu2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix issue that encode test failed on the second time when vce dpm enabled on tonga. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amd/powerplay: add bypass mode for vce 2.0.Rex Zhu2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix issue after vce encode, the eclk stay high. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: refine function name for consistencyRex Zhu2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu/vce3: add support for third vce ringAlex Deucher2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not of much use at the moment (we don't really use the second ring either), but may be useful later. Reviewed-by: JimQu <Jim.Qu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: track the number of vce ringsAlex Deucher2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than using a hardcoded value. This allows different versions to expose more or less rings. No functional change. Reviewed-by: JimQu <Jim.Qu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: rename suspend_kms and resume_kmsAlex Deucher2016-08-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The old names were dragged over from radeon. The new ones better match the naming conventions used in the driver. No functional change. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | | drm/amdgpu: squash lines for simple wrapper functionsMasahiro Yamada2016-09-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded variables and assignments. Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/1473863952-7658-2-git-send-email-yamada.masahiro@socionext.com
| * | | Merge branch 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2016-08-24
| |\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next First drm-next pull for radeon and amdgpu for 4.9. Highlights: - powerplay support for iceland asics - improved GPU reset (both full asic and per block) - UVD and VCE powergating for CZ and ST - VCE clockgating for CZ and ST - Support for pre-initialized (e.g., zeroed) vram buffers - ttm cleanups - virtual display support - core and radeon/amdgpu support for page_flip_target - lots of bug fixes and clean ups * 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (171 commits) drm/amdgpu: use memcpy_toio for VCE firmware upload drm/amdgpu: use memcpy_to/fromio for UVD fw upload drm/amd/powerplay: delete useless code in iceland_hwmgr.c. drm/radeon: switch UVD code to use UVD_NO_OP for padding drm/amdgpu: switch UVD code to use UVD_NO_OP for padding drm/radeon: add support for UVD_NO_OP register drm/amdgpu: add support for UVD_NO_OP register drm/amdgpu: fix VCE ib alignment value drm/amdgpu: fix IB alignment for UVD drm/amd/amdgpu: Print ring name in amdgpu_ib_schedule() drm/radeon: remove dead code, si_mc_load_microcode (v2) drm/radeon/cik: remove dead code (v2) drm/amd/powerplay: avoid NULL dereference, cz_hwmgr.c drm/amd/powerplay: avoid NULL pointer dereference drm/amdgpu/gmc8: remove dead code (v2) drm/amdgpu/gmc7: remove dead code (v2) drm/amdgpu: Fix indentation in dce_v8_0_audio_write_sad_regs() drm/amdgpu: Use correct mask in dce_v8_0_afmt_setmode() and fix comment typos. drm/amdgpu: cleanup amdgpu_vm_bo_update params drm/amdgpu: stop adding dummy entry in amdgpu_ttm_placement_init ...
| | * | drm/amdgpu: use memcpy_toio for VCE firmware uploadChristian König2016-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Try to be clean here, even when it's a noop on x86. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: use memcpy_to/fromio for UVD fw uploadChristian König2016-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also use the firmware size from the header instead of calculating it. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: switch UVD code to use UVD_NO_OP for paddingAlex Deucher2016-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace packet2's with packet0 writes to UVD_NO_OP. The value written to UVD_NO_OP does not matter. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: add support for UVD_NO_OP registerAlex Deucher2016-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writes to this register are the preferred way to do NOPs. Bump the driver version as well. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: fix VCE ib alignment valueAlex Deucher2016-08-24
| | | | | | | | | | | | | | | | | | | | | | | | The VCE rings only require single dword alignment. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| | * | drm/amdgpu: fix IB alignment for UVDAlex Deucher2016-08-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the hw team, it should be 16, not 8. Cc: Peter Fang <peter.fang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| | * | drm/amd/amdgpu: Print ring name in amdgpu_ib_schedule()Tom St Denis2016-08-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the ring isn't ready lets print out which ring name to help debugging. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-28 12:17:05 -0400