| Commit message (Collapse) | Author | Age | |
|---|---|---|---|
| * | clk: sunxi-ng: div: Allow to set a maximum | Maxime Ripard | 2016-09-10 |
| | | | | | | | | | | | | | | | Some dividers might have a maximum value that is lower than the width of the register. Add a field to _ccu_div to handle those case properly. If the field is set to 0, the code will assume that the maximum value is the maximum one that can be used with the field register width. Otherwise, we'll use whatever value has been set. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> | ||
| * | clk: sunxi-ng: Add M-P factor clock support | Maxime Ripard | 2016-07-08 |
| Introduce support for the clocks that combine a linear divider and a power-of-two based one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-9-maxime.ripard@free-electrons.com | |||
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