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path: root/arch/powerpc/perf/power9-pmu.c
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* powerpc/perf: Support to export SIERs bit in Power9Madhavan Srinivasan2017-04-19
| | | | | | | | Patch to export SIER bits to userspace via perf_mem_data_src and perf_sample_data struct. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/perf: Avoid FAB_*_MATCH checks for power9Madhavan Srinivasan2017-02-17
| | | | | | | | | | | | | | | | | | | | Since power9 does not support FAB_*_MATCH bits in MMCR1, avoid these checks for power9. For this, patch factor out code in isa207_get_constraint() to retain these checks only for power8. Patch also updates the comment in power9-pmu raw event encode layout to remove FAB_*_MATCH. Finally for power9, patch adds additional check for threshold events when adding the thresh mask and value in isa207_get_constraint(). fixes: 7ffd948fae4c ('powerpc/perf: factor out power8 pmu functions') fixes: 18201b204286 ('powerpc/perf: power9 raw event format encoding') Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/perf: Add restrictions to PMC5 in power9 DD1Madhavan Srinivasan2017-02-17
| | | | | | | | | PMC5 on POWER9 DD1 may not provide right counts in all sampling scenarios, hence use PM_INST_DISP event instead in PMC2 or PMC3 in preference. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/perf: Use PM_INST_DISP for generic instructions sampleMadhavan Srinivasan2017-02-17
| | | | | | | | | Since PM_INST_CMPL may not provide right counts in all sampling scenarios in power9 DD1, instead use PM_INST_DISP. Patch also update generic instruction sampling with the same. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/perf: Add alternative event table and function for power9Madhavan Srinivasan2017-02-17
| | | | | Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/perf: Use MSR to report privilege level on P9 DD1Madhavan Srinivasan2017-01-18
| | | | | | | | | | | SIER and SIAR are not updated correctly for some samples, so force the use of MSR and regs->nip instead for misc_flag updates. This is done by adding a new ppmu flag and updating the use_siar logic in perf_read_regs() to use it, and dropping the PPMU_HAS_SIER flag. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> [mpe: Rename flag to PPMU_NO_SIAR, and also drop PPMU_HAS_SIER] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/perf: power9 raw event format encodingMadhavan Srinivasan2016-12-02
| | | | | | | | Patch to update the power9 raw event encoding format information and add support for the same in power9-pmu.c. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/perf: update attribute_group data structureMadhavan Srinivasan2016-12-02
| | | | | | | | | Rename the power_pmu and attribute_group variables that support PowerISA v2.07. Add a cpu feature flag check to pick the PowerISA v2.07 format structures to support. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/perf: factor out the event format fieldMadhavan Srinivasan2016-12-02
| | | | | | | Factor out the format field structure for PowerISA v2.07. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/sparse: Make a bunch of things staticDaniel Axtens2016-09-13
| | | | | | | | Squash a bunch of sparse warnings by making things static. Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Daniel Axtens <dja@axtens.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/perf: Export Power9 generic and cache events to sysfsMadhavan Srinivasan2016-07-05
| | | | | | | | Export the generic hardware and cache perf events for Power9 to sysfs, so users can determine the PMU event monitored. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
* powerpc/perf: Power9 PMU supportMadhavan Srinivasan2016-07-05
This patch adds base enablement for the power9 PMU. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>