| Commit message (Collapse) | Author | Age |
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The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The change moves some of peripheral registrations and initializations
(all peripherals dependent on GPIOs) from .init_machine to .init_late
level, this allows to safely shift the shared GPIO controller driver
initialization level after init level of i.MX IOMUXC driver.
The change is tested on qemu kzm target.
Reported-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/soc
Pull "UniPhier ARM SoC updates for v4.9" from Masahiro Yamada:
* Remove unneeded SMP code
* tag 'uniphier-soc-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: uniphier: remove SoC-specific SMP code
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The UniPhier architecture (32bit) switched over to PSCI. Remove
the SoC-specific SMP operations.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Pull "i.MX SoC updates for 4.9" from Shawn Guo:
- Set INT_MEM_CLK_LPM bit to get proper WAIT mode support on i.MX6SX.
This is a workaround for i.MX6SX WAIT mode hardware issue.
- Enable cpuidle support with 3 low-power states (WFI, WAIT, POWER-OFF)
for i.MX6UL.
* tag 'imx-soc-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: build cpuidle-imx6sx.o for imx6ul
ARM: imx: add cpuidle support for i.mx6ul
ARM: imx: enable WAIT mode hardware workaround for imx6sx
ARM: imx: rename imx6q_set_int_mem_clk_lpm() function
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The imx6ul soc code gained support for cpuidle, but that causes
a link failure if CONFIG_SOC_IMX6SX is disabled:
arch/arm/mach-imx/mach-imx6ul.o: In function `imx6ul_init_late':
mach-imx6ul.c:(.init.text+0xc): undefined reference to `imx6sx_cpuidle_init'
This adds the file containing the imx6sx_cpuidle_init function
to the kernel for 6ul-only configurations.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 547e8f526959 ("ARM: imx: add cpuidle support for i.mx6ul")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This patch enables cpuidle driver for i.MX6UL, it
reuses i.MX6SX's cpuidle driver, 3 levels of cpuidle
supported:
1. ARM WFI;
2. SOC in WAIT mode;
3. SOC in WAIT mode + ARM power off.
As i.MX6UL has cortex-A7 CORE with an internal L2
cache, so flushing it before powering down ARM platform
is necessary, flush_cache_all() in last step of cpu_suspend
has very small overhead, just call it to avoid cache
type check for different platforms.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Need to enable INT_MEM_CLK_LPM bit in CCM_CGPR for WAIT mode,
without this bit set, if there is pending interrupt during
ARM platform entering WAIT mode without power gating, cache
data will be corrupted, this is a hardware workaround for WAIT
mode and must be enabled.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Let's rename the function imx6q_set_int_mem_clk_lpm()
to imx6_set_int_mem_clk_lpm() since it's actually
common for all i.MX6 SoCs.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Pull "Allwinner core changes for 4.9" from Maxime Ripard:
Add support for big endian on the Allwinner A20, and the Nextthing GR8 SoC
* tag 'sunxi-core-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: Support the Nextthing GR8
ARM: sunxi: enable big-endian
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The GR8 is an SoC made by Nextthing Co, loosely based on the sun5i family.
It has a number of new controllers compared to the A10s and A13 (SPDIF, I2S),
but some controllers missing too (Ethernet, less I2C, less UARTs).
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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With previous fixes to stmmac, sun4i-emac and sun4i-mmc at least the
Cubieboard2 incarnation of sunxi works correctly in big-endian mode.
Allow the selection of big-endian.
Tested using a Cubieboard2 DualCard and the following
hardware-components:
- GMAC (stmmac)
- EMAC (sun4i-emac)
- SATA
- SPI
- UART
- security system
- touchscreen controller hwmon functionality
- pinctrl (custom interrupt for SPI ethernet controller)
- watchdog as reset controller
- onboard RTC
- DS1307 I2C RTC
- sound codec and with this indirectly the DMA engine
Signed-off-by: Michael Weiser <michael.weiser@gmx.de>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Pull "This is the pxa changes for v4.9 cycle" from Robert Jarzmik:
This cycle is covering :
- the removal of the legacy DMA API
This is the major contributor to the negative diffstat, as dmaengine
have taken over in this area.
- IDE subsystem defconfig fixes
- preparation for pxa25x to be device-tree compliant
- various irq related fixes
* tag 'pxa-for-4.9' of https://github.com/rjarzmik/linux:
ARM: pxa: pxa_cplds: fix interrupt handling
ARM: pxa: remove irq init from dt machines
ARM: pxa: Use kmalloc_array() in pxa_pm_init()
ARM: pxa: magician: Remove duplicated I2C pins declaration
ARM: pxa: fix GPIO double shifts
arm: trizeps4_defconfig: disable IDE subsystem
arm: pxa255-idp_defconfig: disable IDE subsystem
arm: lpda270_defconfig: disable IDE subsystem
arm: colibri_pxa270_defconfig: disable IDE subsystem
ARM: pxa: add pxa25x device-tree support
ARM: pxa: prepare pxa25x interrupts for device-tree platforms
ARM: pxa: remove platform dma code
ARM: pxa: remove devicetree boards from pxa_defconfig
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Since its initial commit, the driver is buggy for multiple interrupts
handling. The translation from the former lubbock.c file was not
complete, and might stall all interrupt handling when multiple
interrupts occur.
This is especially true when inside the interrupt handler and if a new
interrupt comes and is not handled, leaving the output line still held,
and not creating a transition as the GPIO block behind would expect to
trigger another cplds_irq_handler() call.
For the record, the hardware is working as follows.
The interrupt mechanism relies on :
- one status register
- one mask register
Let's suppose the input irq lines are called :
- i_sa1111
- i_lan91x
- i_mmc_cd
Let's suppose the status register for each irq line is called :
- status_sa1111
- status_lan91x
- status_mmc_cd
Let's suppose the interrupt mask for each irq line is called :
- irqen_sa1111
- irqen_lan91x
- irqen_mmc_cd
Let's suppose the output irq line, connected to GPIO0 is called :
- o_gpio0
The behavior is as follows :
- o_gpio0 = not((status_sa1111 & irqen_sa1111) |
(status_lan91x & irqen_lan91x) |
(status_mmc_cd & irqen_mmc_cd))
=> this is a N-to-1 NOR gate and multiple AND gates
- irqen_* is exactly as programmed by a write to the FPGA
- status_* behavior is governed by a bi-stable D flip-flop
=> on next FPGA clock :
- if i_xxx is high, status_xxx becomes 1
- if i_xxx is low, status_xxx remains as it is
- if software sets status_xxx to 0, the D flip-flop is reset
=> status_xxx becomes 0
=> on next FPGA clock cycle, if i_xxx is high, status_xxx becomes
1 again
Fixes: fc9e38c0f4d3 ("ARM: pxa: lubbock: use new pxa_cplds driver")
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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The init_irq and handle_irq can be declared through standard irqchip
declaration and are not necessary in machine descriptions.
This is another step towards the generic kernel for the pxa
architecture.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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* A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kmalloc_array".
This issue was detected by using the Coccinelle software.
* Replace the specification of a data type by a pointer dereference
to make the corresponding size determination a bit safer according to
the Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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Magician has GPIO117_I2C_SCL and GPIO118_I2C_SDA pins declared twice.
Signed-off-by: Petr Cvek <petr.cvek@tul.cz>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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The commit 9bf448c66d4b ("ARM: pxa: use generic gpio operation instead of
gpio register") from Oct 17, 2011, leads to the following static checker
warning:
arch/arm/mach-pxa/spitz_pm.c:172 spitz_charger_wakeup()
warn: double left shift '!gpio_get_value(SPITZ_GPIO_KEY_INT)
<< (1 << ((SPITZ_GPIO_KEY_INT) & 31))'
As Dan reported, the value is shifted three times :
- once by gpio_get_value(), which returns either 0 or BIT(gpio)
- once by the shift operation '<<'
- a last time by GPIO_bit(gpio) which is BIT(gpio)
Therefore the calculation lead to a chained or operator of :
- (1 << gpio) << (1 << gpio) = (2^gpio)^gpio = 2 ^ (gpio * gpio)
It is be sheer luck the former statement works, only because each gpio
used is strictly smaller than 6, and therefore 2^(gpio^2) never
overflows a 32 bits value, and because it is used as a boolean value to
check a gpio activation.
As the xxx_charger_wakeup() functions are used as a true/false detection
mechanism, take that opportunity to change their prototypes from integer
return value to boolean one.
Fixes: 9bf448c66d4b ("ARM: pxa: use generic gpio operation instead of
gpio register")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Joe Perches <joe@perches.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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This patch disables deprecated IDE subsystem in trizeps4_defconfig
(ide-cs host driver is selected in this config but pata_pcmcia
libata PATA host driver is also selected so ide-cs is redundant
and can be disabled together with the whole IDE subsystem).
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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This patch disables deprecated IDE subsystem in pxa255-idp_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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This patch disables deprecated IDE subsystem in lpd270_defconfig
(no IDE host drivers are selected in this config so there is no
valid reason to enable IDE subsystem itself).
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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This patch disables deprecated IDE subsystem in colibri_pxa270_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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Add a device-tree machine entry (DT_MACHINE_START) for pxa25x based
platforms.
Take the opportunity to sort the file machine descriptions by
alphabetical order.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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Add the device-tree interrupts initialization function required to have
a generic pxa25x device-tree machine.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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As the last pxa related driver was converted to dmaengine, it's time to
kill the legacy dma code, which is not used anymore.
This finishes the pxa dmaengine transition.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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If both legacy and device-tree machines are mixed in the same defconfig,
the legacy boards don't boot up anymore with gpio request deferral
errors.
This is seen when attempting to run akita, borzoi, spitz, terrier, or
tosa in qemu with pxa_defconfig.
The real reason behind is that gpio handling for pxa in its current
state cannot be built for _both_ a devicetree machine (ie. pxa-dt.c) and
a non devicetree machine (ie. corgi, tosa, ...).
This is turn is because for devicetree a pinctrl is enforced for the
machine, and a pinctrl driver is required. If it's not available,
pxa_gpio_request() fails on pinctrl_request_gpio() and returns
-EPROBE_DEFER. It was introduced by commit f806dac5938b
("ARM: pxa: activate pinctrl for device-tree machines").
Now the true chicken and egg problem is than machine files,
ie. arch/arm/mach-pxa/xxx.c are using gpio before the drivers are
probed, in the init_machine() function, and that's why pinctrl/gpio for
legacy machine files is a bit difficult.
As for now, to keep the compilation coverage and testing of legacy
machines, this patch removes the 2 devicetree machines from
pxa_defconfig.
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Guenter Roeck <linux@roeck-us.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Updates for v4.9" from Simon Horman:
Clean-up:
* Only use smp_init when SMP is selected
Enablement:
* Add debug-ll support for r8a7992
* tag 'renesas-soc-for-v4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: only use smp_init when SMP is selected
ARM: shmobile: r8a7790: only use smp_init when SMP is selected
ARM: debug-ll: Add support for r8a7992
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We use the helper function which populates the smp_init pointer only in
case of SMP.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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We use the helper function which populates the smp_init pointer only in
case of SMP.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Enable low-level debugging support for R-Car V2H (r8a7792).
V2H uses SCIF0 for the debug console, like most other R-Car Gen2 SoCs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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next/soc
Pull "Broadcom soc changes for 4.9" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC changes for 4.9, please pull
the following:
- Rafal adds preliminary support for the new BCM53573 Wi-Fi SoC based on a
single core Cortex A7 and re-using a bunch of iProc peripherals
- Florian adds support for earlyprintk on Broadcom STB/CM ARM-based chips by
reading the chip family_id value from a known location and deriving the UART
based address
* tag 'arm-soc/for-4.9/soc' of http://github.com/Broadcom/stblinux:
ARM: BCM53573: Initial support for Broadcom BCM53573 SoCs
ARM: brcmstb: Add earlyprintk support using run-time checks
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BCM53573 series is a new family with embedded wireless. By marketing
people it's sometimes called Northstar but it uses different CPU and has
different architecture so we need a new symbol for it.
Fortunately it shares some peripherals with other iProc based SoCs so we
will be able to reuse some drivers/bindings.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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The SUN_TOP_CTRL_FAMILY_ID register is at a fixed absolute address for
all of our supported chips, so utilize its value to determine what the
UARTA base address should be based on the value we read.
Since the code is called both during decompressor when the MMU is off,
and after the MMU has been turned on in the kernel, and we want to do
the lookup only once, we use the same technique as tegra.S and have a
shared storage location between the decompressor and the kernel.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/soc
Pull "Qualcomm ARM Based SoC Updates for v4.9" from Andy Gross:
* Remove unnecessary QCOM board file
* tag 'qcom-soc-for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: qcom: Cleanup/Remove unnecessary board file
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This patch removes the unnecessary board file. The generic machine
definition is sufficient for the Qualcomm platforms.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Merge "Samsung mach/soc update for v4.9" from Krzysztof Kozlowski:
1. Fix for DMA on S3C24xx. This was probably broken for long time, nobody runs
this code... till now.
2. After fixes from Matthew Leach and Ben Dooks, most of our mach code
and drivers is now endian-safe. Mark the platform as supporting big endian.
3. Cleanups.
* tag 'samsung-soc-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: EXYNOS: Remove unused DMC and CMU offsets and their mappings
ARM: s3c64xx: Delete unnecessary assignment for the field "owner"
ARM: EXYNOS: Enable ARCH_SUPPORTS_BIG_ENDIAN explicitly
ARM: S3C24XX: Add missing DMA device for Mini2440 board
ARM: S3C24XX: Add dma_mask assignments for DMA devices
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Currently there is no user of DMC and CMU SFR offsets so we can safely
remove mapping of their SFR address space and cleanup related offset
macros from mach-exynos.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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The field "owner" is set by the core. Thus delete an unneeded
initialization.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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Now the initial fixes have the big-endian code working on EXYNOS, make sure
we explicitly mark our arch as being big endian capable.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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Addition of s3c2440_device_dma was missed during conversion
from the Samsung legacy to the regular DMA API.
Add it so any devices using DMA, e.g I2S controller can
work properly.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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The dma_mask assignments seem to be missed during refactoring
of arch/arm/mach-s3c24xx. Add them to avoid DMA allocation
failures. Without this patch sound is broken on s3c24xx
with errors reported like:
s3c24xx-dma s3c2410-dma.0: coherent DMA mask is unset
ALSA pcmC0D0p,0:: cannot preallocate for size 524288
s3c24xx-iis s3c24xx-iis: Failed to get DMA channel capabilities,
falling back to period counting: -6
s3c24xx-dma s3c2410-dma.0: coherent DMA mask is unset
...
ALSA pcmC0D0c,0:: cannot preallocate for size 524288
s3c24xx-iis s3c24xx-iis: Failed to get DMA channel capabilities,
falling back to period counting: -6
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Merge "DaVinci soc support updates for v4.9" from Sekhar Nori:
DA850 SoC support update for making it possible
to use TI AEMIF driver in drivers/memory on DA850.
* tag 'davinci-for-v4.9/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da850: Add ti-aemif lookup for clock matching
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