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| | * | | | | | | | | | | ARM: dts: sunxi: Improve A33 NAND transfers by using DMAMiquel Raynal2019-04-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current state, A33 NAND controllers use PIO during transfers. Throughput can be increased thanks to the use of DMA (mostly during reads, because of the ECC pipelining feature). Besides the usual addition of DMA DT properties, because the A33 NAND DMA handling is different than for older SoCs, we must also update the compatible which has recently been introduced for this purpose. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: tbs-a711: Enable UART2 (for NEO-6M GPS module)Ondrej Jirman2019-04-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TBS A711 tablet contains u-blox NEO-6M module connected to UART2. Enable UART2 to gain access to the module from userspace. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sunxi: Remove useless pinctrl nodesMaxime Ripard2019-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have for the H3 boards some kind of cargo cult apparently, where we would have a pinctrl node even for GPIOs without any particular settings. This is pretty much useless, so let's remove them. Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sunxi: Remove pinctrl groups setting biasMaxime Ripard2019-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far we've enabled pull-up and pull-down resistors on GPIOs using a pinctrl node. Now that the GPIO binding allows for a flag to declare this, let's switch to it. This brings us closer to removing all the GPIO pinctrl nodes, which will in turn allow us to switch the pinctrl strict mode on. Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sunxi: Remove useless address and size cellsMaxime Ripard2019-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND chips in our DTs have address and size cells, even though they don't have any child nodes. Remove them. Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sunxi: Conform to DT spec for NAND controllerMaxime Ripard2019-04-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND controller node name should be nand-controller and not nand as we used previously according to the devicetree specification. Let's fix our DTs. Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: a83t: Add missing CPU clock referencesOndrej Jirman2019-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A83T DTSI has cpu clocks defined only on the first CPU in each cluster. We can bring down any CPU in the cluster, so we need to define clock for each CPU, so that the system knows what clock to use if the first CPU is down. Also move the clocks property below the compatible on cpus where it is already defined. Property "clock-names" is not needed. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: a83t: Add UART2 PB pinsOndrej Jirman2019-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pin definitions for UART2 PB pins. These are used on TBS-A711 tablet. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: tbs-a711: Add node for BMA250 accelerometerOndrej Jirman2019-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A711 tablet has BMA250 accelerometer connected to I2C1 bus. Enable both the I2C1 bus and add the accelerometer device to it. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUsOndrej Jirman2019-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable to use CPUs as cooling device in the future, by adding "#cooling-cells" to each CPU node. This property should be present for all the CPUs of a cluster. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: a83t: Add nodes for UART2-UART4Ondrej Jirman2019-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A83T has 5 UART interfaces, but only the first two have their nodes defined in sun8i-a83t.dtsi. Add nodes for the missing interfaces. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: tbs-a711: Enable bluetoothOndrej Jirman2019-04-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TBS A711 tablet has a bcm20702a1 bluetooth chip (part of AP6210 WiFi/BT module) connected to UART1. Add node for the blutooth chip. The driver needs brcm/BCM20702A1.hcd firmware file to run. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun7i: fix typos in uart pin muxMans Rullgard2019-03-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recently added uart mux options had a few typos. Fix them. Fixes: 43d0fe112585 ("ARM: dts: sun7i: add pinctrl for missing uart mux options") Reported-by: Werner Böllmann <Werner.Boellmann@fh-dortmund.de> Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun9i: Remove deprecated pinctrl propertiesMaxime Ripard2019-03-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We switched to the generic pinctrl binding some time ago, yet the GMAC pinctrl node apparently slipped through. Fix this. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sunxi: Add default dr_modeMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USB OTG binding we have mandates to have a dr_mode property, yet not all boards are setting it. Since the generic otg binding states that the default mode should be the OTG mode, let's use that one in our DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: A23/A33: Fix pinctrl node namesMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND pinctrl nodes names don't follow the pattern we've used and enforced for some time. Make sure they do. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sunxi: Remove pinctrl size-cells propertyMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The children nodes of the pinctrl node hadn't have any reg property for quite some time, so we don't need the size-cells property. Remove it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: r40: Remove useless AHCI propertiesMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SATA controller never have any children nodes, so we don't need the address and size cells properties. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: r40: Fix AHCI reset-names propertyMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AHCI node was introduced with a typo in the reset-names property that got written resets-name instead. This was working because the reset is optional for that driver, and the controller was put out of reset by the bootloader. Fixes: 41c64d3318aa ("ARM: dts: sun8i: r40: add sata node") Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: sunxi: dts: Split USB PHY cells into an arrayMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though it doesn't make any difference at the binary level, the reg property is an array of cells, and should be represented as such. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: tbs-a711: Fix typo in regulatorsMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The regulator properties suffix is -supply, yet a _supply slipped in. This was working because the regulator framework will provide a dummy regulator when none is provided in the device tree, and the regulator itself was always enabled. Fixes: 90c5d7cdae64 ("ARM: dts: sun8i: a711: Add regulator support") Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sunxi: Fix the TCON output clockMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though we shouldn't really have any external user of the clock provided by the TCON, if clock-output-names is set, then #clock-cells must be there as well. Fix this. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: sunxi: Fix the USB PHY VBUS detect GPIO propertiesMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the USB PHY Device Tree mandates that the name of the VBUS detect pin should be usb0_vbus_det-gpios, a significant number of device tree use usb0_vbus_det-gpio instead. This was functional because the GPIO framework falls back to the gpio suffix that is legacy, but we should fix this. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: sunxi: Fix the USB PHY ID detect GPIO propertiesMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While the USB PHY Device Tree mandates that the name of the ID detect pin should be usb0_id_det-gpios, a significant number of device tree use usb0_id_det-gpio instead. This was functional because the GPIO framework falls back to the gpio suffix that is legacy, but we should fix this. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sunxi: Switch to new GPIOs properties for i2c-gpioMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2c-gpio driver uses named gpios now and the array of GPIOs is deprecated. Switch to the new binding. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sunxi: Fix GIC compatibleMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As can be shown by the YAML schema now, the combination of GIC compatibles we were using has never been an option. Switch to the gic-400 variant, which is the more correct option. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun5i: lichee-pi one: Remove stale pinctrl-names entryMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some nodes still have pinctrl-names entry, yet they don't have any pinctrl group anymore. Drop them. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun9i: optimus: Fix fixed-regulatorsMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 1848f3f44444 ("ARM: dts: sun9i: Remove GPIO pinctrl nodes to avoid warnings") was wrong on the optimus, and instead of droping the pinctrl-names property, it dropped the regulator-name one. Obviously, that wasn't what was intended. Reinstate regulator-name and drop pinctrl-names. Fixes: 1848f3f44444 ("ARM: dts: sun9i: Remove GPIO pinctrl nodes to avoid warnings") Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: a23/a33: Add R_I2C ControllerMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A23 and A33 both have an I2C controller in the ARISC domain, that share the same pins with the RSB bus. Even if it's an unusual configuration, that device can be used to drive the PMIC, so let's use it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: a33: Add default address and size cells to the DSI nodeMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DSI bindings require that an address cell size of 1, and a size cell of 0. Instead of duplicating it in each and every board DTS file, let's put it in the DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun9i: Add missing unit addressMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The soc node in the A80 DTSI has a ranges property, but no matching unit address, which results in a DTC warning. Add the unit address to remove that warning. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun9i: Fix Display Engine DTC warningsMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: r40: Fix Display Engine DTC warningsMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: a83t: Fix Display Engine DTC warningsMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: v3s: Fix Display Engine DTC warningsMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: a23/a33: Fix Display Engine DTC warningsMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun6i: Fix Display Engine DTC warningsMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun5i: Fix Display Engine DTC warningsMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our display engine endpoints trigger some DTC warnings due to the fact that we're having a single endpoint that doesn't need any reg property, and since we don't have a reg property, we don't need the address-cells and size-cells properties anymore. Fix those Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun5i: Fix display pipeline endpoint warnings in DTCMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since most of the display IPs have a single endpoint, having a reg property, a unit-address and #address-cells and #size-cells will emit a warning. Let's remove those. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun8i: a83t: Add cross links for the mixersMaxime Ripard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike what the binding for multiple pipeline documents, the A83t doesn't have the cross links between the TCON and the mixers. Let's add them. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun7i: olimex-lime2: Add regulators for GPIO banksPriit Laes2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure that A20 Olimex Lime2 pin bank regulators are properly represented. While pin banks A, B and F are connected to 3.3V static regulator, pin banks E and G tied with LDO3 and LDO4 regulators with 2.8V reference. Signed-off-by: Priit Laes <priit.laes@paf.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun7i: add /omit-if-no-ref/ tags to pin group nodesMans Rullgard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since only one alternative at a time is used, and some functions may not be used at all, this cuts down the size of the board dtb files a bit. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun7i: add pinctrl for EMAC in PH bankMans Rullgard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds pinctrl settings the EMAC using pins in the PH block. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun7i: add pinctrl for CAN in PA bankMans Rullgard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds pinctrl settings for the CAN controller using pins PA16 and PA17. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | | | | | | ARM: dts: sun7i: add pinctrl for missing uart mux optionsMans Rullgard2019-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds pinctrl settings for various missing uart options. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * | | | | | | | | | | | Merge tag 'tegra-for-5.2-arm-dt' of ↵Olof Johansson2019-04-28
| |\ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v5.2-rc1 This contains a set of changes to move PLL power supplies to the XUSB pad controller, which is necessary to ensure the proper sequencing during boot. Other patches in this set clean up usage of SPDX license identifiers in device tree files as well as add support for the ACTMON hardware on Tegra30. * tag 'tegra-for-5.2-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Add ACTMON support on Tegra30 ARM: tegra: venice2: Move PLL power supplies to XUSB pad controller ARM: tegra: nyan: Move PLL power supplies to XUSB pad controller ARM: tegra: jetson-tk1: Move PLL power supplies to XUSB pad controller ARM: tegra: apalis: Move PLL power supplies to XUSB pad controller ARM: tegra: Remove gratuitous parentheses in SPDX license identifier ARM: tegra: Convert to SPDX license tags for Tegra124 Apalis Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | | | | | | ARM: tegra: Add ACTMON support on Tegra30Dmitry Osipenko2019-04-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for ACTMON on Tegra30. This is used to monitor activity from different components. Based on the collected statistics, the rate at which the external memory needs to be clocked can be derived. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | | | ARM: tegra: venice2: Move PLL power supplies to XUSB pad controllerThierry Reding2019-04-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The XUSB pad controller is responsible for supplying power to the PLLs used to drive the various USB, PCI and SATA pads. Move the PLL power supplies from the PCIe and XUSB controllers to the XUSB pad controller to make sure they are available when needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | | | ARM: tegra: nyan: Move PLL power supplies to XUSB pad controllerThierry Reding2019-04-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The XUSB pad controller is responsible for supplying power to the PLLs used to drive the various USB, PCI and SATA pads. Move the PLL power supplies from the XUSB controller to the XUSB pad controller to make sure they are available when needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | | | | | | | | | | ARM: tegra: jetson-tk1: Move PLL power supplies to XUSB pad controllerThierry Reding2019-04-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The XUSB pad controller is responsible for supplying power to the PLLs used to drive the various USB, PCI and SATA pads. Move the PLL power supplies from the PCIe and XUSB controllers to the XUSB pad controller to make sure they are available when needed. Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-09 21:23:27 -0400