aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts
Commit message (Collapse)AuthorAge
...
| | * | | | | | | | | ARM: sun8i: a33: add all operating pointsQuentin Schulz2017-03-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds almost all operating points allowed for the A33 as defined by fex files available at: https://github.com/linux-sunxi/sunxi-boards/tree/master/sys_config/a33 There are more possible frequencies in this patch than there are in the fex files because the fex files only give an interval of possible frequencies for a given voltage. All supported frequencies are defined in the original driver code in Allwinner vendor tree. There are two missing frequencies though: 1104MHz and 1200MHz which require the CPU to have 1.32V supplied, which is higher than the default voltage. Without all A33 boards defining the CPU regulator, we cannot have these two frequencies as it would cause the CPU to try to run a higher frequency without "overvolting" which is very likely to crash the CPU. Therefore, these two frequencies must be enabled on a per-board basis. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun5i: chip: enable ACIN power supply subnodeQuentin Schulz2017-03-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NextThing Co. CHIP has an AXP209 PMIC and can be power-supplied by ACIN via the CHG-IN pin. This enables the ACIN power supply subnode in the DT. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: dts: sun8i: sina33: enable ACIN power supply subnodeQuentin Schulz2017-03-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Sinlinx SinA33 has an AXP223 PMIC and an ACIN connector, thus, we enable the ACIN power supply in its Device Tree. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: dtsi: axp22x: add AC power supply subnodeQuentin Schulz2017-03-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The X-Powers AXP22X PMIC exposes the status of AC power supply. This adds the AC power supply subnode for the AXP22X PMIC. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: dtsi: axp209: add AC power supply subnodeQuentin Schulz2017-03-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The X-Powers AXP20X PMIC exposes the status of AC power supply, the current current and voltage supplied to the board by the AC power supply. This adds the AC power supply subnode for AXP20X PMIC. Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: dts: sunxi: Remove no longer used pinctrl/sun4i-a10.h headerChen-Yu Tsai2017-03-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All dts files for the sunxi platform have been switched to the generic pinconf bindings. As a result, the sunxi specific pinctrl macros are no longer used. Remove the #include entry with the following command: sed --follow-symlinks -i -e '/pinctrl\/sun4i-a10.h/D' \ arch/arm/boot/dts/sun?i*.* arch/arm/boot/dts/sun9i-a80.dtsi was then edited to remove the extra empty line. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: dts: sun8i-a23-q8-tablet: Drop pinmux setting for codec PA gpioChen-Yu Tsai2017-03-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The old sunxi specific pinctrl bindings are deprecated, in favor of the new generic pinconf bindings. Also, we are moving towards handling GPIO pinmux settings that don't require extra bias or drive strength settings to use the GPIO bindings only. This patch removes the last instance of the sunxi specific pinctrl bindings that use the pinctrl header by dropping the pinmux setting for the audio codec's PA (external amplifier) control GPIO. The pin is pulled down externally. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun8i: a33: Add the Mali OPPsMaxime Ripard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Mali GPU in the A33 has various operating frequencies used in the Allwinner BSP. Add them to our DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: dts: sunxi: Add regulators for Sinovoip BPI-M2Emmanuel Vadot2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the needed node for DFVS on Sinovoip BPI-M2. This add the axp221 under the p2wi node, the regulators and the cpu-supply property for cpu0. Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: dts: sun8i-h3: Add mmc2 node to the X2Marcus Cooper2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Beelink X2 has an on-board eMMC so add a node enabling the mmc2 controller. Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun7i: Enable audio codec on A20-OLinuXino-MicroJonathan Liu2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A20-OLinuXino-Micro has 3.5 mm sockets for headphone output and microphone input. Signed-off-by: Jonathan Liu <net147@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: dts: sun8i: Add dts file for NanoPi NEO AirJelle van der Waa2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add support for the NanoPi NEO Air H3 board from friendlyarm.com . This board contains WiFi, Bluetooth, 8GB eMMC storage and 512 MB DDR3 ram. Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun5i: gr8: Use common sun5i DTSIMaxime Ripard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the GR8 DTSI is duplicated with the common sun5i DTSI, and some of the extra nodes defined there actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it, and include the sun5i DTSI. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun5i: r8: Merge common controllers into the common DTSIMaxime Ripard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some controllers found in the R8 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun5i: a10s: Merge common controllers into the common DTSIMaxime Ripard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some controllers found in the A10s DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun5i: a13: Merge common controllers into the common DTSIMaxime Ripard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some controllers found in the A13 DTSI actually apply to all of the sun5i family. Move those into the common DTSI so that all SoCs can benefit from it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun5i: Rename UART3 flow control pinsMaxime Ripard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UART3 pin group for the CTS and RTS signals doesn't follow our usual pattern. Rename it so that it matches. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun5i: Add UART2 pin groupMaxime Ripard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's one UART2 pin group that can be used across all sun5i SoCs. However, the A10s already has one pin group for that controller. Change the index of the one in the A10s DTSI, and add the common one to sun5i.dtsi Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun5i: a10s: switch simple framebuffer indicesMaxime Ripard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Of the three simple framebuffer setups we have in the A10s, two of them can be shared with the other SoCs from the sun5i family (LCD panel and composite output). However, the only one we cannot share is the HDMI, which is the first listed in the A10s DTSI. In order to make it more logical and so that we can share the framebuffer nodes in the common DTSI, reorder those nodes. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | | | ARM: sun5i: A10s: Switch the EMAC pins indicesMaxime Ripard2017-03-06
| | |/ / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the pins group for the EMAC can be used by all the SoCs of the sun5i family, and as such can be moved to the common DTSI. Unfortunately, this group is the second one we declare in our DT for now. Make it the first one so that it's more logical and consistent with the rest of our DTs before moving it. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | | | | | | | | Merge tag 'socfpga_dts_for_v4.12' of ↵Olof Johansson2017-04-19
| |\ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt SoCFPGA DTS updates for v4.12 - Clean-up: - Add clock/memory nodes - Add labels for CPU nodes - Remove unused unit names and reg - Remove unused skeleton.dtsi - Add support for PMU - Add QSPI for sodia board - Add Reset controller for Arria10 * tag 'socfpga_dts_for_v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: socfpga: Add Devkit A10-SR Reset Controller ARM: dts: socfpga: sodia: enable qspi ARM: dts: socfpga: Add support for PMU ARM: dts: socfpga: Add labels for CPU nodes ARM: dts: socfpga: Do not include skeleton.dtsi ARM: dts: socfpga: Remove unit name for LEDs in EBV SOCrates ARM: dts: socfpga: Remove unneeded reg from stmpe_touchscreen ARM: dts: socfpga: Remove unneeded unit names ARM: dts: socfpga: Add unit name to memory nodes ARM: dts: socfpga: Add unit name to clock nodes Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | | | ARM: dts: socfpga: Add Devkit A10-SR Reset ControllerThor Thayer2017-03-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the Altera Arria10 System Resource Reset Controller to the MFD Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- v2 change commit header to ARM: dts: socfpga.
| | * | | | | | | | | ARM: dts: socfpga: sodia: enable qspiNobuhiro Iwamatsu2017-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the qspi controller on sodia board and add the flash chip (n25q512a). Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | | | | | | ARM: dts: socfpga: Add support for PMUFlorian Vaussard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dual Cortex-A9 MPCore inside socfpga has a standard PMU unit for each core mapped in the DAP memory space. Add support for it! Tested with perf on a Cyclone 5 SoC DK. Reported-by: Alberto Dassatti <alberto.dassatti@heig-vd.ch> Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Tested-by: Alberto Dassatti <alberto.dassatti@heig-vd.ch> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | | | | | | ARM: dts: socfpga: Add labels for CPU nodesFlorian Vaussard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes it easier to reference the CPU nodes afterwards. Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | | | | | | ARM: dts: socfpga: Do not include skeleton.dtsiFlorian Vaussard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The skeleton.dtsi file is now deprecated as noted in commit 9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"). The SoCFPGA device trees already contain the nodes that are defined in skeleton.dtsi (#address-cells, #size-cells, chosen, aliases, memory). Including skeleton.dtsi is useless and will produce the following warning when compiled with W=1: Node /memory has a reg or ranges property, but no unit name Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | | | | | | ARM: dts: socfpga: Remove unit name for LEDs in EBV SOCratesFlorian Vaussard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO LEDs in the Cyclone5 EBV SOCrates board have a unit name but no reg property. Indeed, GPIO LEDs do not need such a property. They do not need a unit name neither. This will trigger the following warnings when compiled with W=1: Node /gpio-leds/led@0 has a unit name, but no reg property Node /gpio-leds/led@1 has a unit name, but no reg property Node /gpio-leds/led@2 has a unit name, but no reg property The solution is to remove the unit name. In order to have unique node names, a rename is necessary. This should be harmless as all the LEDs have a 'label' property, hence their name do not derive from the node name and will stay the same after this patch. Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | | | | | | ARM: dts: socfpga: Remove unneeded reg from stmpe_touchscreenFlorian Vaussard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The stmpe_touchscreen node in Cyclone5 MCV EVK has a reg property, but this is not used by the driver. Moreover the binding documentation do not define this property. Having a reg property without a unit name will trigger the following warning when compiled with W=1: Node /soc/i2c@ffc04000/stmpe811@41/stmpe_touchscreen has a reg or ranges property, but no unit name Remove the superfluous reg property. Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | | | | | | ARM: dts: socfpga: Remove unneeded unit namesFlorian Vaussard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Node eccmgr has a unit name, but do not have a reg property as only the child nodes do have this property. Likewise the usbphy node do not have a reg property. This will trigger the following warnings when compiled with W=1: Node /soc/eccmgr@ffd08140 has a unit name, but no reg property Node /soc/usbphy@0 has a unit name, but no reg property Remove the superfluous unit names. Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | | | | | | ARM: dts: socfpga: Add unit name to memory nodesFlorian Vaussard2017-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Memory nodes in Arria5, Cyclone5 and Arria10 do not have a unit name. This will trigger several warnings like this one (when compiled with W=1): Node /memory has a reg or ranges property, but no unit name Add the corresponding unit name to each node. Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| | * | | | | | | | | ARM: dts: socfpga: Add unit name to clock nodesFlorian Vaussard2017-03-06
| | |/ / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most clock nodes in Arria5, Cyclone5 and Arria10 have a reg property but does not have a unit name. This will trigger several warnings like this one (when compiled with W=1): Node /soc/clkmgr@ffd04000/clocks/periph_pll has a reg or ranges property, but no unit name Add the corresponding unit name to each node. Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| * | | | | | | | | Merge tag 'davinci-for-v4.12/dt-2' of ↵Olof Johansson2017-04-19
| |\ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt A clean-up device-tree patch to ensure pinmux entry reuse. * tag 'davinci-for-v4.12/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: dts: da850: move spi0_cs3_pin pinconf node Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | | | ARM: dts: da850: move spi0_cs3_pin pinconf nodeDavid Lechner2017-03-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This moves the spi0_cs3_pin pinconf node from the LEGO EV3 file to the common DA850 include file. This node is applicable to any board, and therefore belongs in the common file. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * | | | | | | | | | Merge tag 'stm32-dt-for-v4.12-1' of ↵Olof Johansson2017-04-19
| |\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt STM32 DT updates for v4.12, round 1 Highlights: ---------- - ADD RTC support on STM32F746 MCU - Enable RTC on STM32F746 Eval board - Enable clocks on STM32F746 MCU - Enable DMA, pwm1 and pwm3 on STM32F429I Eval - Add support of STM32H743 MCU and his Eval board - Enable USB HS and FS on STM32F469 Disco board * tag 'stm32-dt-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: dt-bindings: Document the STM32 USB OTG DWC2 core binding ARM: dts: stm32: Enable USB HS in FS mode (embedded phy) on stm32f429-disco ARM: dts: stm32: Enable USB FS on stm32f469-disco ARM: dts: stm32: Add USB FS support for STM32F429 MCU ARM: dts: stm32: Add STM32H743 MCU and STM32H743i-EVAL board ARM: dts: stm32: Enable pwm1 and pwm3 on stm32f429i-eval ARM: dts: stm32: Enable dma by default on stm32f4 adc ARM: dts: stm32: enable RTC on stm32746g-eval ARM: dts: stm32: Add RTC support for STM32F746 MCU ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f746 dt-bindings: mfd: Add STM32F7 RCC numeric constants into DT include file ARM: dts: stm32: Enable clocks for STM32F746 MCU Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | | | | ARM: dts: stm32: Enable USB HS in FS mode (embedded phy) on stm32f429-discoBruno Herrera2017-04-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables USB HS working in FS mode on stm32f429-disco with 5V VBUS enable. Signed-off-by: Bruno Herrera <bruherrera@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| | * | | | | | | | | | ARM: dts: stm32: Enable USB FS on stm32f469-discoBruno Herrera2017-04-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables USB FS on stm32f469-disco with 5V VBUS enable. Signed-off-by: Bruno Herrera <bruherrera@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| | * | | | | | | | | | ARM: dts: stm32: Add USB FS support for STM32F429 MCUBruno Herrera2017-04-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the USB pins and nodes for USB FS core. Signed-off-by: Bruno Herrera <bruherrera@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| | * | | | | | | | | | ARM: dts: stm32: Add STM32H743 MCU and STM32H743i-EVAL boardAlexandre TORGUE2017-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for STM32H743 MCU and his eval board. The STMicrolectornics's STM32H743 MCU is based on Cortex-M7 core running up to @400MHz with 2MB internal flash and 1MB internal RAM. For more details see: Documentation/arm/stm32/stm32h743-overview.txt Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| | * | | | | | | | | | ARM: dts: stm32: Enable pwm1 and pwm3 on stm32f429i-evalFabrice Gasnier2017-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define and enable pwm1 and pwm3, timers1 & 3 trigger outputs on on stm32f429i-eval board. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| | * | | | | | | | | | ARM: dts: stm32: Enable dma by default on stm32f4 adcFabrice Gasnier2017-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Configure STM32F4 ADC to use dma by default. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| | * | | | | | | | | | ARM: dts: stm32: enable RTC on stm32746g-evalAmelie Delaunay2017-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables RTC on stm32746g-eval with default LSE clock source. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| | * | | | | | | | | | ARM: dts: stm32: Add RTC support for STM32F746 MCUAmelie Delaunay2017-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds STM32 RTC bindings for STM32F746. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| | * | | | | | | | | | ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f746Amelie Delaunay2017-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to the RTC must be 1 MHz. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| | * | | | | | | | | | dt-bindings: mfd: Add STM32F7 RCC numeric constants into DT include fileGabriel Fernandez2017-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch lists STM32F7's RCC numeric constants. It will be used by clock and reset drivers, and DT bindings. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| | * | | | | | | | | | ARM: dts: stm32: Enable clocks for STM32F746 MCUGabriel Fernandez2017-03-23
| | | |/ / / / / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables clocks for STM32F746 MCU. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
| * | | | | | | | | | Merge branch 'sti-dt-for-v4.12-round1' of ↵Olof Johansson2017-04-19
| |\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/dt * 'sti-dt-for-v4.12-round1' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: ARM: dts: STiH407-family: update rproc node names to avoid conflict ARM: dts: STiH407-family: fix spi nodes Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | | | | ARM: dts: STiH407-family: update rproc node names to avoid conflictLoic Pallardy2017-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The two st231-rproc nodes have the same name; Due to that it was impossible to distinguish them in remoteproc sysfs and debugfs interface. This patch provides them a name related to their functionality. Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
| | * | | | | | | | | | ARM: dts: STiH407-family: fix spi nodesPatrice Chotard2017-03-06
| | |/ / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SPI nodes are missing #address-cells and #size-cells. This is causing warning at device tree compilation when some SPI device sub-nodes are defined. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
| * | | | | | | | | | Merge tag 'arm-soc/for-4.11/devicetree-fixes' of ↵Arnd Bergmann2017-03-31
| |\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://github.com/Broadcom/stblinux into fixes There was a little conflict between the v4.11 bugfixes and the new changes for 4.12, this merges the fixes into the 4.12 branch to avoid having to resolve it again. * Broadcom fixes in mainline ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags ARM: dts: BCM5301X: Fix memory start address ARM: dts: BCM5301X: Fix UARTs on bcm953012k Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * \ \ \ \ \ \ \ \ \ \ Merge tag 'omap-for-v4.12/dt-v2-signed' of ↵Arnd Bergmann2017-03-31
| |\ \ \ \ \ \ \ \ \ \ \ | | | |_|_|_|_|_|/ / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Pull "Devicetree changes for omaps for v4.12 merge window" from Tony Lindgren: - Add hecc node for am35x - Add onenand support for omap3-igep - Add bluetooth binding for n900/n9/n950 - Configure clocks and SATA for dm81xx - Update operating points tables for am33xx, am43xx and dra7 - Update SPI flash documentation for w25q64 - Configure SPI NOR for am335x-icev2 - Mux uart0 for am437x-gp-evm - Add thermal zones for omap3, omap4, omap5, dra7 - Configure LEDs for am335x-baltos - A series of droid 4 changes to configure various devices such as keypad, regulators, gpio-keys, rtc, power button, compass, accelerometer, touchscreen, backlight, poweroff, tmp105, HDMI, LCD panel and LEDs, EHCI, and micro-SD * tag 'omap-for-v4.12/dt-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (35 commits) ARM: dts: am335x-baltos: add LED support ARM: dts: omap4-droid4: Fix MMC1 card for detect GPIO and regulator ARM: dts: OMAP4460: Thermal: Add slope and offset values ARM: dts: OMAP443x: Thermal: Add slope and offset values ARM: dts: OMAP5: Thermal: Add slope and offset values ARM: dts: DRA7: Thermal: Add slope and offset values ARM: dts: omap3: Add cpu_thermal zone ARM: dts: am437x-gp-evm: Add pinmux for uart0 ARM: dts: am335x-icev2: Add SPI based NOR Documentation: devicetree: mtd: add w25q64 to list of supported SPI flashes ARM: dts: dra7: Add updated operating-points-v2 table for cpu ARM: dts: am4372: Update operating-points-v2 table for cpu ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu ARM: dts: am33xx: Add updated operating-points-v2 table for cpu ARM: dts: dm8168-evm: add SATA node ARM: dts: dm8168-evm: add the external reference clock for SATA ARM: dts: N9/N950: add bluetooth ARM: dts: N900: Add bluetooth ARM: dts: omap4-droid4: Configure EHCI so modems can be accessed ARM: dts: motorola-cpcap-mapphone: add LEDs ...