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| * dv1394: remove BKL contentionStefan Richter2006-12-07
| | | | | | | | | | | | Purges the one remaining call to lock_kernel() from the 1394 subsystem. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * video1394: remove BKL contentionDaniel Drake2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | video1394 does not need to take the BKL. The data structures shared between file_operations and interrupts are already protected through context-specific spinlocks. The only other danger is video1394_release() being called during another operation, however this cannot happen because release is only ever invoked when the last thread has closed the fd. Signed-off-by: Daniel Drake <ddrake@brontes3d.com> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * video1394: small optimizations to frame retrieval codepathDaniel Drake2006-12-07
| | | | | | | | | | | | | | | | | | Add some GCC branch prediction optimizations to unlikely error/safety conditions in the ioctl handling code commonly called during an application's capture loop. Signed-off-by: Daniel Drake <ddrake@brontes3d.com> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * ieee1394: handle sysfs errorsStefan Richter2006-12-07
| | | | | | | | | | | | Handle driver core errors with as much care as appropriate. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * ieee1394: coding style in hosts.cStefan Richter2006-12-07
| | | | | | | | | | | | Some 80-columns pedantry, and touch up of a // comment. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * ieee1394: lock smaller region by host_num_alloc mutexStefan Richter2006-12-07
| | | | | | | | | | | | We need the mutex only around the iteration over existing hosts. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * ieee1394: usecs_to_jiffies takes unsigned int argumentStefan Richter2006-12-07
| | | | | | | | Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * ieee1394: ohci1394: suspend/resume cosmeticsStefan Richter2006-12-07
| | | | | | | | | | | | | | Reorder the definitions of ohci1394_pci_suspend and _resume. Remove redundant comments. Beautify return statements. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * ohci1394: steps to implement suspend/resumeBernhard Kaindl2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I did a quick shot on what I described and the appended patch does the first thing needed for working suspend/resume in ohci1394 which is HW de- and re-initialisation. It works with suspend2disk on my Ricoh R5C552 IEEE 1394 Controller with the 2.6.17 kernel to the extent that if I call dvgrab --interactive after suspend2disk without unloading ohci1394, it does not lock up dvgrab with 100% CPU but properly connects to the camera, given that I first unplug and plug the camera after coming back from suspend. I guess that could be fixed by forcing a bus reset in the resume function. I cannot test suspend to RAM here at the moment and should follow the guidelines in Documentation/power/pci.txt also, so this is rather a quick report than a finished patch and there are some rough edges: However, with this patch, I have to unload at least some in-kernel users of ohci1394 like dv1394 or video1394 before suspending. Not doing that caused an Oops and a bad tasklet error, probably from not handling ISO tasklets during suspend/resume properly. Maybe these can be temporarily cleared or unregistered and re-registered for suspend/resume with help from the other layers or from the highlevel 1394 core, but I do not really know what these do. But this patch provides a useful base to start from and is already of much help for people which do not need dv1394 and video1394 or can unload them at least during suspend. I cannot test function with sbp2 at the moment, but raw1394 seems to work fine. Signed-off-by: Bernhard Kaindl <bk@fsfe.org> Update 1: merge with previous two ohci1394 suspend/resume patches Update 2: version for application on top of Linux 2.6.19-rc4 Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * ieee1394: raw1394: add comments on lock usageStefan Richter2006-12-07
| | | | | | | | | | | | | | Add a who-is-who about some locks and list heads in raw1394's struct definitions. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * ieee1394: sbp2: slightly reorder sbp2scsi_abortStefan Richter2006-12-07
| | | | | | | | | | | | | | | | | | Put the target's fetch agent into reset state before the underlying ORB DMA is unmapped and the ->done handler is called. It is highly unlikely but the target could access that ORB right before sbp2 sends the reset request. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
| * ieee1394: remove unused struct member from highlevel APIStefan Richter2006-12-07
| | | | | | | | | | | | | | | | | | struct hpsb_highlevel's struct module *owner is neither used by the IEEE 1394 core nor set by any of the in-tree drivers or the two out-of-tree highlevel drivers I know about (dfg1394, mem1394) --- nor is this member documented. An unscheduled removal seems acceptable. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
* | Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2006-12-07
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (76 commits) [ARM] 4002/1: S3C24XX: leave parent IRQs unmasked [ARM] 4001/1: S3C24XX: shorten reboot time [ARM] 3983/2: remove unused argument to __bug() [ARM] 4000/1: Osiris: add third serial port in [ARM] 3999/1: RX3715: suspend to RAM support [ARM] 3998/1: VR1000: LED platform devices [ARM] 3995/1: iop13xx: add iop13xx support [ARM] 3968/1: iop13xx: add iop13xx_defconfig [ARM] Update mach-types [ARM] Allow gcc to optimise arm_add_memory a little more [ARM] 3991/1: i.MX/MX1 high resolution time source [ARM] 3990/1: i.MX/MX1 more precise PLL decode [ARM] 3986/1: H1940: suspend to RAM support [ARM] 3985/1: ixp4xx clocksource cleanup [ARM] 3984/1: ixp4xx/nslu2: Fix disk LED numbering (take 2) [ARM] 3994/1: ixp23xx: fix handling of pci master aborts [ARM] 3981/1: sched_clock for PXA2xx [ARM] 3980/1: extend the ARM Versatile sched_clock implementation from 32 to 63 bit [ARM] 3979/1: extend the SA11x0 sched_clock implementation from 32 to 63 bit period [ARM] 3978/1: macro to provide a 63-bit value from a 32-bit hardware counter ...
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| *---------. \ [ARM] Merge individual ARM sub-treesRussell King2006-12-07
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge: Atmel AT91RM9200 and AT91SAM9260 changes General ARM developments Disconfiguous memory cleanups 64-bit/32-bit division and sched_clock extension patches EP93xx support changes IOP support changes Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] 3995/1: iop13xx: add iop13xx supportDan Williams2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The iop348 processor integrates an Xscale (XSC3 512KB L2 Cache) core with a Serial Attached SCSI (SAS) controller, multi-ported DDR2 memory controller, 3 Application Direct Memory Access (DMA) controllers, a 133Mhz PCI-X interface, a x8 PCI-Express interface, and other peripherals to form a system-on-a-chip RAID subsystem engine. The iop342 processor replaces the SAS controller with a second Xscale core for dual core embedded applications. The iop341 processor is the single core version of iop342. This patch supports the two Intel customer reference platforms iq81340mc for external storage and iq81340sc for direct attach (HBA) development. The developer's manual is available here: ftp://download.intel.com/design/iio/docs/31503701.pdf Changelog: * removed virtual addresses from resource definitions * cleaned up some unnecessary #include's Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] 3968/1: iop13xx: add iop13xx_defconfigDan Williams2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * | [ARM] Update mach-typesRussell King2006-12-07
| | |_|_|_|_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | [ARM] 3993/1: ep93xx: add cirrus logic edb9302a supportLennert Buytenhek2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Cirrus Logic EDB9302A Evaluation Board. Confirmed to work by Chase Douglas. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | [ARM] 3964/1: ep93xx: add ads sphere supportLennert Buytenhek2006-12-01
| | |_|_|_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial board support for the ADS Sphere board. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 3981/1: sched_clock for PXA2xxNicolas Pitre2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here's a 63-bit implementation of shed_clock() for PXA2xx. The actual period depends on the value of CLOCK_TICK_RATE and whether or not reduced scaling factors were provided for it. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 3980/1: extend the ARM Versatile sched_clock implementation from 32 to ↵Nicolas Pitre2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 63 bit period This provides a 63 bit clock counter guaranteed to be monotonic over a period of 35583 days instead of a clock wrap every 179 seconds, as long as sched_clock() is called at least once every 89 seconds. This should not be a problem in practice, although a kernel timer could be scheduled every 80 seconds for example simply to call sched_clock() making sure top bits are always synchronized if need be. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 3979/1: extend the SA11x0 sched_clock implementation from 32 to 63 bit ↵Nicolas Pitre2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | period This provides a 63 bit clock counter guaranteed to be monotonic over a period of 370 days instead of a clock wrap every 19.4 minutes, as long as sched_clock() is called at least once every 9.7 minutes which shouldn't be a problem in practice. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 3978/1: macro to provide a 63-bit value from a 32-bit hardware counterNicolas Pitre2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is done in a completely lockless fashion. Bits 0 to 31 of the count are provided by the hardware while bits 32 to 62 are stored in memory. The top bit in memory is used to synchronize with the hardware count half-period. When the top bit of both counters (hardware and in memory) differ then the memory is updated with a new value, incrementing it when the hardware counter wraps around. Because a word store in memory is atomic then the incremented value will always be in synch with the top bit indicating to any potential concurrent reader if the value in memory is up to date or not wrt the needed increment. And any race in updating the value in memory is harmless as the same value would be stored more than once. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 3611/4: optimize do_div() when divisor is constantNicolas Pitre2006-12-07
| | |_|_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ARM all divisions have to be performed "manually". For 64-bit divisions that may take more than a hundred cycles in many cases. With 32-bit divisions gcc already use the recyprocal of constant divisors to perform a multiplication, but not with 64-bit divisions. Since the kernel is increasingly relying upon 64-bit divisions it is worth optimizing at least those cases where the divisor is a constant. This is what this patch does using plain C code that gets optimized away at compile time. For example, despite the amount of added C code, do_div(x, 10000) now produces the following assembly code (where x is assigned to r0-r1): adr r4, .L0 ldmia r4, {r4-r5} umull r2, r3, r4, r0 mov r2, #0 umlal r3, r2, r5, r0 umlal r3, r2, r4, r1 mov r3, #0 umlal r2, r3, r5, r1 mov r0, r2, lsr #11 orr r0, r0, r3, lsl #21 mov r1, r3, lsr #11 ... .L0: .word 948328779 .word 879609302 which is the fastest that can be done for any value of x in that case, many times faster than the __do_div64 code (except for the small x value space for which the result ends up being zero or a single bit). The fact that this code is generated inline produces a tiny increase in .text size, but not significant compared to the needed code around each __do_div64 call site this code is replacing. The algorithm used has been validated on a 16-bit scale for all possible values, and then recodified for 64-bit values. Furthermore I've been running it with the final BUG_ON() uncommented for over two months now with no problem. Note that this new code is compiled with gcc versions 4.0 or later. Earlier gcc versions proved themselves too problematic and only the original code is used with them. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] Allow gcc to optimise arm_add_memory a little moreRussell King2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some reason, gcc was calculating meminfo.bank[meminfo.nr_banks] repeatedly. Use a pointer to it instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] Clean up discontigmem supportRussell King2006-11-30
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most architectures have fairly simple discontiguous memory - a simple set of successive regions each containing some memory. These can be described simply as a log2 of their maximum size, along with the base address of the first region and the number of regions. The base address is already described by PHYS_PFN_OFFSET, and the number of regions via the MAX_NUMNODES and the number of online nodes. If we then supply the log2 of their maximum size, all the other discontigmem macros can move into generic code. There is one exception: lh7a40x seems to have a more complicated setup; this is left alone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 4002/1: S3C24XX: leave parent IRQs unmaskedBen Dooks2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not bother masking/unmasking the parent IRQ for the mulitplexed EINT irqs, as masking the leaf seems to be fine. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 4001/1: S3C24XX: shorten reboot timeBen Dooks2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cut down the time between requesting a reboot and actually getting the reboot to happen by a quarter. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3983/2: remove unused argument to __bug()Nicolas Pitre2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It appears that include/asm-arm/bug.h requires include/linux/stddef.h for the definition of NULL. It seems that stddef.h was always included indirectly in most cases, and that issue was properly fixed a while ago. Then commit 5047f09b56d0bc3c21aec9cb16de60283da645c6 incorrectly reverted change from commit ff10952a547dad934d9ed9afc5cf579ed1ccb53a (bad dwmw2) and the problem recently resurfaced. Because the third argument to __bug() is never used anyway, RMK suggested getting rid of it entirely instead of readding #include <linux/stddef.h> which this patch does. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 4000/1: Osiris: add third serial port inBen Dooks2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the mapping for the third S3C2440 serial port into the default serial devices for the Osiris. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3999/1: RX3715: suspend to RAM supportBen Dooks2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RX3715 is similar to the H1940 in the way that suspend to RAM works, so we can use most of the extant support for the H1940 with only a few modifictions Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3998/1: VR1000: LED platform devicesBen Dooks2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for the GPIO attached LEDs on the VR1000 Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3991/1: i.MX/MX1 high resolution time sourcePavel Pisa2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enhanced resolution for time measurement functions. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3990/1: i.MX/MX1 more precise PLL decodePavel Pisa2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The future high resolution support inclusion utilizes imx_decode_pll() in timer base frequency computation. This use requires more precise computation without discarding 10 bits by shifting left. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3986/1: H1940: suspend to RAM supportBen Dooks2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to suspend and resume, using the H1940's bootloader Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3985/1: ixp4xx clocksource cleanupKevin Hilman2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than using a device_initcall() for the clocksource initialization, just call the init from the sys_timer init function. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3984/1: ixp4xx/nslu2: Fix disk LED numbering (take 2)Rod Whitby2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes an error in the numbering of the disk LEDs on the Linksys NSLU2. The error crept in because the physical location of the LEDs has the Disk 2 LED *above* the Disk 1 LED. Thanks to Gordon Farquharson for reporting this. Signed-off-by: Rod Whitby <rod@whitby.id.au> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3994/1: ixp23xx: fix handling of pci master abortsLennert Buytenhek2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI master abort handling issue that affected ixp2000 also affects ixp23xx. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3982/2: Explicitly select 32-bit ARM ISA (-marm)George G. Davis2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not assume that the ARM GCC toolchain defaults to building for the 32-bit ARM ISA (-marm) case. Instead, explicitly select -marm in CFLAGS since the toolchain default can be for the 16-bit Thumb ISA (-mthumb) in some odd/rare cases. Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3881/4: xscale: clean up cp0/cp1 handlingLennert Buytenhek2006-12-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XScale cores either have a DSP coprocessor (which contains a single 40 bit accumulator register), or an iWMMXt coprocessor (which contains eight 64 bit registers.) Because of the small amount of state in the DSP coprocessor, access to the DSP coprocessor (CP0) is always enabled, and DSP context switching is done unconditionally on every task switch. Access to the iWMMXt coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is first issued, and iWMMXt context switching is done lazily. CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will have iWMMXt support', but boards are supposed to select this config symbol by hand, and at least one pxa27x board doesn't get this right, so on that board, proc-xscale.S will incorrectly assume that we have a DSP coprocessor, enable CP0 on boot, and we will then only save the first iWMMXt register (wR0) on context switches, which is Bad. This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on might have iWMMXt support, and we will enable iWMMXt context switching if it does.' This means that with this patch, running a CONFIG_IWMMXT=n kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt state over context switches, and running a CONFIG_IWMMXT=y kernel on a non-iWMMXt capable CPU will still do DSP context save/restore. These changes should make iWMMXt work on PXA3xx, and as a side effect, enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined), as well as setting and using HWCAP_IWMMXT properly. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3967/1: xsc3: make branch predication configurable on xsc3Dan Williams2006-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove BTB_ENABLE from proc-xsc3.S On some early revisions of xsc3 enabling the branch target buffer can cause crashes, see erratum #42. Cc: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3971/1: xsc3: get rid of L_PTE_COHERENTLennert Buytenhek2006-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge L_PTE_COHERENT with L_PTE_SHARED and free up a L_PTE_* bit. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3958/1: add platform device (pxa2xx-udc)to ixp4xxMilan Svoboda2006-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create include/asm-arm/arch-ixp4xx/udc.h and add platfrom device ixp4xx_udc_device into arch/arm/mach-ixp4xx/common.c. This allows us to use pxa2xx-udc on the ixp4xx platfrom. Both pxa2xx and ixp4xx use the same device controller. Signed-off-by:Milan Svoboda <msvoboda@ra.rockwell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3965/1: ixp2000: fix handling of pci master abortsLennert Buytenhek2006-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The master abort check in ixp2000_pci_read_config() recently started failing due to the compiler optimising out the read access following the clearing of pci_master_aborts. Mark pci_master_aborts volatile to force the compiler to reload it on every use. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] Fix Versatile PB initialisation to use .init_machineRussell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no point having the Versatile PB initialisation using an arch_initcall() and then checking whether it's running on a Versatile PB board - this is what the .init_machine function pointer in the machine description is for. Use it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 3911/2: Simplify alloc_thread_info on ARMPaul Gortmaker2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove ARM local cache of 4 struct thread_info. Can cause oops under certain circumstances. Russell indicated the original optimization was required on older kernels to avoid thread starvation on memory fragmentation, but may no longer be required. I've updated the patch to 19rc4 and ensured no <config.h> dain-bramage slipped in this time (sorry about that). Original description follows: I was given some test results which pointed to an Oops in alloc_thread_info (happened 2x), and after looking at the code, I see that ARM has its own local cache of 4 struct thread_info. There wasn't any clear (to me) synchronization between the alloc_thread_info and the free_thread_info. I looked over the other arch, and they all simply allocate them on an as needed basis, so I simplified the ARM to do the same, based on the other arch (e.g. PPC) and the folks doing the testing have indicated that this fixed the oops. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] Remove "translated" io macrosRussell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "translated" io macros were never really used. Remove them. Preserve the L7200 inb() and friends by defining the __io() macro, so that the generic versions can be used instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] Remove warnings for __io_pci and __arch_(get|put)*Russell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the last definitions of this macros have been removed, we can remove the warnings in asm/io.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] L7200: Remove deprecated __io_pci and __arch_(get|put)*Russell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions have been deprecated for quite some time, and in fact are no longer used. They just add to clutter. Remove them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] Fix __must_check warnings in drivers/bus/amba.cRussell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix driver model __must_check warnings in drivers/bus/amba.c by rearranging how we add attributes to devices. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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