| Commit message (Collapse) | Author | Age |
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Enable sdhci and restart functionality for devices based on msm8916 platform.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/arm64
Merge "ARM64 defconfig changes for Exynos based boards for v4.6" from Krzysztof Kozlowski:
1. We want thermal for Exynos7 TMU unit to monitor the temperature.
2. Enable the drivers for PMIC used on Exynos7-based Espresso board.
* tag 'samsung-defconfig-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: defconfig: Enable Samsung MFD and related configs
arm64: defconfig: Enable exynos thermal config
ARM: multi_v7_defconfig: Remove MAX77802 RTC Kconfig symbol
ARM: exynos_defconfig: Remove MAX77802 RTC Kconfig symbol
rtc: max77686: Cleanup and reduce dmesg output
rtc: Remove Maxim 77802 driver
rtc: max77686: Properly handle regmap_irq_get_virq() error code
rtc: max77686: Fix unsupported year message
rtc: max77686: Add max77802 support
rtc: max77686: Add an indirection level to access RTC registers
rtc: max77686: Use a driver data struct instead hard-coded values
rtc: max77686: Use usleep_range() instead of msleep()
rtc: max77686: Use ARRAY_SIZE() instead of current array length
rtc: max77686: Fix max77686_rtc_read_alarm() return value
ARM: exynos_defconfig: Enable s5p-secss driver
ARM: exynos_defconfig: Enable NEON, accelerated crypto and cpufreq stats
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Exynos7 based espresso board uses S2MPS15, a multifunction device.
This patch enables S2MPS1X regulator, pmic-clk and rtc drivers utilized by
the same.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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This patch enables Exynos thermal and related configs for the
TMU found on Exynos7 SoC. This also enables thermal emulation
mode to test trip points.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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The driver has been removed so the Kconfig symbol is not valid anymore.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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The driver has been removed so the Kconfig symbol is not valid anymore.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/defconfig
Keep RTC functionality on defconfigs for Chromebook Peach intact after
combining the max77802 RTC driver into max77686.
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Cleanup of entire driver of its dmesg output:
1. Remove printing of the function name, because printing device name is
sufficient. This also makes the dev_err()-like functions more compact
and readable (not need of line break).
2. Lower from info to debug printing of each RTC interrupt (no need to
make noise on each alarm).
3. Remove dev_info() at beginning of probe because a message is already
always printed by either probe failure or from registering the RTC
device as /dev/rtcX.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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The max77686 RTC driver now supports the max77802 RTC as
well so there's no need to have a separate driver anymore.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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The regmap_irq_get_virq() can return 0 or -EINVAL in error conditions
but driver checked only for value of 0.
This could lead to a cast of -EINVAL to an unsigned int used as a
interrupt number for devm_request_threaded_irq(). Although this is not
yet fatal (devm_request_threaded_irq() will just fail with -EINVAL) but
might be a misleading when diagnosing errors.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Fixes: 6f1c1e71d933 ("mfd: max77686: Convert to use regmap_irq")
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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The max77686 RTC only supports a range of 99 years so instead of using
year 1900 as the base, the year 2000 is used. This means that 1900 to
1999 are unsupported years.
The driver was printing a warning for those values but was returning a
error so for consistency, print an error message instead and don't say
that a year 2000 is assumed, since the year is not set.
Also, it is better to use dev_* log functions instead of pr_* to print
information about the device in the kernel log in a standardized way.
This also allows to remove the local pr_fmt() defined macro.
Suggested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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The MAX77686 and MAX77802 RTC IP blocks are very similar with only
these differences:
0) The RTC registers layout and addresses are different.
1) The MAX77686 use 1 bit of the sec/min/hour/etc registers as the
alarm enable while MAX77802 has a separate register for that.
2) The MAX77686 RTCYEAR register valid values range is 0..99 while
for MAX77802 is 0..199.
3) The MAX77686 has a separate I2C address for the RTC registers
while the MAX77802 uses the same I2C address as the PMIC regs.
5) The minimum delay before a RTC update (16 msecs vs 200 usecs).
There are separate drivers for MAX77686 and MAX77802 RTC IP blocks
but the differences are not that big so the driver can be extended
to support both instead of duplicating a lot of code in 2 drivers.
Suggested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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The max77686 driver is generic enough that can be used for other
Maxim RTC IP blocks but these might not have the same registers
layout so instead of accessing the registers directly, add a map
to translate offsets to the real registers addresses for each IP.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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The driver has some hard-coded values such as the minimum delay needed
before a RTC update or the mask used for the sec/min/hour/etc registers.
Use a data structure that contains these values and pass as driver data
using the platform device ID table for each device.
This allows to make the driver's ops callbacks more generic so other RTC
that are similar but don't have the same values can also be supported.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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Documentation/timers/timers-howto.txt suggest to use usleep_range()
instead of msleep() for small msec (1ms - 20ms) since msleep() will
often sleep for 20ms for any value in that range.
This is fine in this case since 16ms is the _minimum_ delay required
by max77686 for an RTC update but by using usleep_range() instead of
msleep(), the driver can support other RTC IP blocks with a shorter
minimum delay (i.e: in the range of usecs instead of msecs).
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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It is better to use the ARRAY_SIZE() macro instead of the array length
to avoid bugs if the array is later changed and the length not updated.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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The function is always returning zero even in case of failures since
the ret value was not propagated to the callers. Fix the error path.
Reported-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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The Exynos SoC provides a Security SubSystem block for accelerating some
cryptographic operations. Enable the driver for it - s5p-secss to
utilize the hardware acceleration.
Currently the s5p-secss driver supports AES in CBC and ECB modes.
However on Odroid XU4 (Exynos5422) and Trats2 (Exynos4412) boards this
change introduces one booting error (because of unaligned buffers):
alg: skcipher: encryption failed on chunk test 1 for ecb-aes-s5p: ret=22
The cbc-aes-s5p properly registers itself and passes self-tests.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
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Enable the kernel NEON mode and asm/NEON accelerated crypto algorithms
which should bring performance benefits on Exynos SoCs. Enable these as
modules because they are optional, not essential anyhow for platform
booting nor related directly to Exynos Soc. All accelerated algorithms
pass booting self-tests on Odroid XU4 (Exynos5422) and Trats2 (Exynos4412).
Additionally enable cpufreq statistics as they are useful for debugging.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
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into next/arm64
ARM64: Hip05: configure updates for 4.6
- Enable DesignWare APB GPIO controller
* tag 'hip05-config-for-4.6' of git://github.com/hisilicon/linux-hisi:
arm64: defconfig: Enable DesignWare APB GPIO controller
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The Synopsys DesignWare APB GPIO controller is used by several vender's socs,
like apm/marvell/altera/hisilicon, enable it by default.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/arm64
Merge "Allwinner configuration changes for ARM64, 4.6 edition" from Maxime Ripard:
Not a lot of changes for this kernel release, just a new Kconfig option and
some changes to the arm64 defconfig to add Allwinner drivers
* tag 'sunxi-config64-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm64: add defconfig options for Allwinner SoCs
arm64: Introduce Allwinner SoC config option
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With the Allwinner platform now supported, enable it in the defconfig
and add some options to give some decent out-of-the-box experience on
those SoCs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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To prepare for supporting the Allwinner A64 SoC, introduce a config
option to allow compiling Allwinner (aka. sunxi) specific drivers
for ARM64.
This patch just defines the ARCH_SUNXI symbol to allow Allwinner
specific drivers to be selected during kernel configuration.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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next/arm64
Merge "mvebu arm64 for 4.6 (part 2)" from Gregory CLEMENT:
Add initial support for Armada 7K/8K
Update Marvell documentation
* tag 'mvebu-arm64-4.6-2' of git://git.infradead.org/linux-mvebu:
arm64: update ARCH_MVEBU for Marvell Armada 7K/8K support
Documentation: arm: add Marvell Armada 7K and 8K families
Documentation: arm: add link to Armada 38x Functional Spec
Documentation: arm: improve Armada 37xx description
Documentation: arm: update Marvell product listing
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This commit updates the ARCH_MVEBU Kconfig option introduced for
Armada 3700 to also be used for the Armada 7K and 8K platforms, by:
- Selecting the appropriate clock and irqchip drivers
- Updating the help text to mention Armada 7K and 8K
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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As we are adding support for the Armada 7K and 8K families, this
commit adds them to the Marvell documentation listing all supported
SoCs, together with references to their Product Brief, Homepage and
Device Tree files.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The Armada 38x Functional Spec is now available (after registration
unfortunately), so add a link to it.
While at it, fix a typo in the reference to the Armada 38x product
page.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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In preparation to the introduction of other SoCs in the ARMv8 Armada
EBU family, this commit tweaks the existing description of Armada 37xx
by making the core, homepage and other informations be visible "under"
the Armada 37xx item. Indeed, the new SoCs will not share the same
core or homepage.
In addition, a link to the Product Brief is added.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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I'm still getting confused regarding which core specifically
is used in which SoC, so I've added some more detail to the
Marvell README file. I got most of this from random sources
on the internet, so it's possible that some of the information
is wrong, but most of it should be pretty obvious.
There are a few remaining points I could not find out:
* The CPU core in Orion 88F6183
* The difference (if any) between PJ4B-MP and PJ4C
* The naming of Feroceon/Jolteon/Flareon/Sheeva/Mohawk/PJ1/PJ4
is still confusing, as they tend to overlap.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[Thomas:
- move Armada SP out from the EBU family into its own "Storage"
family. This chip is indeed not part of the EBU family.
- fixed the URL for the Armada SP information, since the link of the
original patch no longer existed
- explicitly indicate that there is no support in upstream for the
Armada SP
- indent the "Core: " description for the Armada XP to be clearly
under the Armada XP category, so that it is clear it applies to
Armada XP only, and not other cores of the EBU family.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/arm64
Merge "Renesas ARM64 Based SoC SoC Updates for v4.6" from Simon Horman:
* Enable RENESAS_IRQC, and PM and PM_GENERIC_DOMAINS for SoCs with PM Domains
* tag 'renesas-arm64-soc-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: renesas: Enable PM and PM_GENERIC_DOMAINS for SoCs with PM Domains
arm64: renesas: Enable RENESAS_IRQC
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All supported Renesas ARM64 SoCs have clock and power domains. To ensure
proper operation of on-SoC modules, module clocks must be ungated, and
power domains must be powered up when needed.
Currently the user can choose to build a kernel with power management
enabled or disabled:
- If CONFIG_PM=y, power domains and/or module clocks are handled
dynamically by Runtime PM and the generic power domain.
- If CONFIG_PM=n, power domains are assumed to be powered up by reset
state or by the boot loader, and module clocks are handled by the
legacy clock domain on driver (un)bind.
The latter is implemented using a platform bus notifier, which
applies not only to all on-SoC devices, but to all platform devices
present in the system.
To remove the dependency on implicit assumptions, and to get rid of the
peculiarities of the legacy clock domain, enable CONFIG_PM and
CONFIG_PM_GENERIC_DOMAINS unconditionally.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Select RENESAS_IRQC for Arm64 SoCs from Renesas to enable
build of drivers/irqchip/irq-renesas-irqc.c.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/arm64
Merge "Renesas ARM64 Based SoC Defconfig Updates for v4.6" from Simon Horman:
* Enable Renesas R-Car Gen3 USB 2.0 phy driver
which is used on the r8a7795/salvator-x
* tag 'renesas-arm64-defconfig-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: defconfig: Add Renesas R-Car Gen3 USB 2.0 phy driver support
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Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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into next/arm64
Merge "Broadcom soc-arm64 changes for 4.6" from Florian Fainelli:
This pull request contains Broadcom ARM64-based SoC/platform changes:
- Anup, Ray and Dhanajay enable COMMON_CLK_IPROC, PINCTRL and GPIOLIB for iProc
SoCs to get the corresponding iProc-based drivers to be available and work
- Zi adds support for Broadcom's Vulcan processor by adding a reference
board Device Tree file along with a config ARCH_VULCAN symbol
- Jayachandran C. adds the Broadcom implementor ID and part ID for the Vulcan
processors
* tag 'arm-soc/for-4.6/soc-arm64' of http://github.com/Broadcom/stblinux:
arm64: cputype info for Broadcom Vulcan
arm64: Broadcom Vulcan support
arm64: Select COMMON_CLK_IPROC, PINCTRL and GPIOLIB for iProc SoCs
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Add Broadcom Vulcan implementor ID and part ID in cputype.h. This is
to document the values.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Add a configuration option and a device tree for Broadcom's Vulcan
ARM64 processor. vulcan.dtsi has the on-chip blocks like the PCIe
controller, GICv3 with ITS, PMU, system timer and the pl011 UART.
vulcan-eval.dts has definitions for a basic evaluation board.
Vulcan's processor cores support the ARMv8.1 instruction set and
will use "brcm,vulcan" as the compatible property. The firmware
has PSCI 0.2 support for cpu wakeup.
Signed-off-by: Zi Shen Lim <zlim@broadcom.com>
[ updated and split dts - jchandra@broadcom.com ]
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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We select COMMON_CLK_IPROC, PINCTRL, and GPIOLIB in arm64 Kconfig
for ARCH_BCM_IPROC so that we can use COMMON_CLK, PINCTRL and GPIOLIB
with iProc SoC drivers.
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yrdreddy@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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http://github.com/Broadcom/stblinux into next/arm64
Merge "Broadcom defconfig-arm64 changes for 4.6" from Florian Fainelli:
This pull request contains ARM64 defconfig changes for Broadcom SoCs:
- Jayachandran C enables the newly introduced Broadcom Vulcan SoC to the ARM64
defconfig
* tag 'arm-soc/for-4.6/defconfig-arm64' of http://github.com/Broadcom/stblinux:
arm64: defconfig: Add Broadcom Vulcan to defconfig
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Enable Broadcom Vulcan support in arm64 default configuration. This will
build the device tree needed to boot on a Broadcom Vulcan board.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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http://github.com/Broadcom/stblinux into next/arm64
Merge "Broadcom maintainers-arm64 changes for 4.6" from Florian Fainelli:
This pull request contains MAINTAINERS file updates for Broadcom ARM64-based SoCs:
- Jayachandran C. adds an entry for the newly added Broadcom Vulcan Device Trees
* tag 'arm-soc/for-4.6/maintainers-arm64' of http://github.com/Broadcom/stblinux:
MAINTAINERS: Add entry for Broadcom Vulcan SoC
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Add maintainer information for Broadcom's Vulcan arm64 SoC.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Select the Alpine MSI controller driver when using an Alpine platform.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Tsahee Zidenberg <tsahee@annapurnalabs.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable the Alpine SoC family in the arm64 defconfig.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch introduces ARCH_ALPINE to add the support of the Alpine SoC
family for the arm64 architecture.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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next/arm64
mvebu arm64 for 4.6 (part 1)
Non dt part of the Armada 3700 support:
- Kconfig update
- defconfig update
- documentation update (including MAINTAINERS:)
* tag 'mvebu-arm64-4.6-1' of git://git.infradead.org/linux-mvebu:
arm64: defconfig: enable Armada 3700 related config
Documentation: arm: update supported Marvell EBU processors
MAINTAINERS: Extend dts entry for ARM64 mvebu files
arm64: add mvebu architecture entry
irqchip/armada-370-xp: Do not enable it by default when ARCH_MVEBU is selected
ARM: mvebu: Use the ARMADA_370_XP_IRQ option
irqchip/armada-370-xp: Allow allocation of multiple MSIs
irqchip/armada-370-xp: Use shorter names for irq_chip
irqchip/armada-370-xp: Use PCI_MSI_DOORBELL_START where appropriate
irqchip/armada-370-xp: Use the generic MSI infrastructure
irqchip/armada-370-xp: Add Kconfig option for the driver
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch enables the configuration for the Armada 3700 family and for
the related driver it uses.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Now that we support Armada 37xx, let's add this family of SoC to the
Marvell documentation, and a reference to a link with more details about
those processors. As for Armda 39x, no datasheet is publicly
available at this time.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Extend the mvebu entry to ARM64 device tree sources.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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