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* mtd: spi-nor: Add support for s25fl116kSascha Hauer2016-02-12
| | | | | | | | The Spansion s25fl116k is a 16MBit NOR Flash supporting dual and quad read operations. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: pxa3xx_nand: add support for partial chunksThomas Petazzoni2016-02-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit is needed to properly support the 8-bits ECC configuration with 4KB pages. When pages larger than 2 KB are used on platforms using the PXA3xx NAND controller, the reading/programming operations need to be split in chunks of 2 KBs or less because the controller FIFO is limited to about 2 KB (i.e a bit more than 2 KB to accommodate OOB data). Due to this requirement, the data layout on NAND is a bit strange, with ECC interleaved with data, at the end of each chunk. When a 4-bits ECC configuration is used with 4 KB pages, the physical data layout on the NAND looks like this: | 2048 data | 32 spare | 30 ECC | 2048 data | 32 spare | 30 ECC | So the data chunks have an equal size, 2080 bytes for each chunk, which the driver supports properly. When a 8-bits ECC configuration is used with 4KB pages, the physical data layout on the NAND looks like this: | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 64 spare | 30 ECC | So, the spare area is stored in its own chunk, which has a different size than the other chunks. Since OOB is not used by UBIFS, the initial implementation of the driver has chosen to not support reading this additional "spare" chunk of data. Unfortunately, Marvell has chosen to store the BBT signature in the OOB area. Therefore, if the driver doesn't read this spare area, Linux has no way of finding the BBT. It thinks there is no BBT, and rewrites one, which U-Boot does not recognize, causing compatibility problems between the bootloader and the kernel in terms of NAND usage. To fix this, this commit implements the support for reading a partial last chunk. This support is currently only useful for the case of 8 bits ECC with 4 KB pages, but it will be useful in the future to enable other configurations such as 12 bits and 16 bits ECC with 4 KB pages, or 8 bits ECC with 8 KB pages, etc. All those configurations have a "last" chunk that doesn't have the same size as the other chunks. In order to implement reading of the last chunk, this commit: - Adds a number of new fields to the pxa3xx_nand_info to describe how many full chunks and how many chunks we have, the size of full chunks and partial chunks, both in terms of data area and spare area. - Fills in the step_chunk_size and step_spare_size variables to describe how much data and spare should be read/written for the current read/program step. - Reworks the state machine to accommodate doing the additional read or program step when a last partial chunk is used. This commit has been tested on a Marvell Armada 398 DB board, with a 4KB page NAND, tested in both 4 bits ECC and 8 bits ECC configurations. Robert Jarzmik has tested on some PXA platforms. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: map: fix .set_vpp() documentationLinus Walleij2016-02-12
| | | | | | | | | | | | | As of commit 876fe76d793d03077eb61ba3afab4a383f46c554 "mtd: maps: physmap: Add reference counter to set_vpp()" the comment in the header file is incorrect and misleading. Fix it up. Cc: Russell King <linux@arm.linux.org.uk> Cc: Paul Parsons <lost.distance@yahoo.com> Fixes: 876fe76d793d ("mtd: maps: physmap: Add reference counter to set_vpp()") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: bcm63xxpart: Move NOR flash layout to a separate functionSimon Arlott2016-02-12
| | | | | | | | Move the NOR flash layout to a separate function to allow the NAND flash layout to be supported. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: bcm63xxpart: Null terminate and validate conversion of flash stringsSimon Arlott2016-02-12
| | | | | | | | | | | | | | Strings read from flash could be missing null termination characters, or not contain valid integers. Null terminate the strings and check for errors when converting them to integers. Also validate that the addresses are at least BCM963XX_EXTENDED_SIZE because this will be subtracted from them. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: bcm63xxpart: Extract read of image tag to separate functionSimon Arlott2016-02-12
| | | | | | | Extract image tag reading and CRC check to a separate function. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: bcm63xxpart: Remove dependency on mach-bcm63xxSimon Arlott2016-02-12
| | | | | | | | | | | | | | | Read nvram directly from flash instead of using the in-memory copy that mach-bcm63xx has, to remove the dependency on mach-bcm63xx and allow the parser to work on bmips too. Rename remaining BCM63XX defines to BCM963XX as these are properties of the flash layout on the board. BCM963XX_DEFAULT_PSI_SIZE changes from SZ_64K to 64 because it will be multiplied by SZ_1K later on. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: atmel_nand: Support 32-bit ECC strengthRomain Izard2016-02-12
| | | | | | | | | | | | | | | | As the SAMA5D2 controller supports the 32-bit ECC strength, accept it as a valid setting when required by the device tree or the NAND parameter page. Then configure the controller to use this new setting. For the binding: Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: atmel_nand: Support PMECC on SAMA5D2Romain Izard2016-02-12
| | | | | | | | | | | | | | | | | | Starting with the SAMA5D2, there is a new revision of the Atmel PMECC controller that can correct 32 bits in each sector. This controller is not 100% compatible with the previous revision that corrected a maximum of 24 bits by sector, as some register addresses overlap. Using information from the device tree, we can configure the driver to work with both versions. For the binding: Acked-by: Rob Herring <robh@kernel.org> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* doc: dt: atmel_nand: Reword the documentationRomain Izard2016-02-12
| | | | | | | | | | | | | Do not mention which chips supporting the PMECC controller, as it a duplicate of the information in the chips' device trees. Use common terms when describing the sub-node for the NAND Flash controller. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: atmel_nand: Support variable RB_EDGE interruptsRomain Izard2016-02-12
| | | | | | | | | | | | | | | | The NFC controller used to accelerate the NAND transfers on SAMA5 chips can use either RB_EDGE0 or RB_EDGE3 as its ready/busy interrupt bit. Use the controller's compatible string to select the correct bit. For the binding: Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Wenyou Yang <Wenyou.yang@atmel.com> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* driver/memory: Removal of deprecated NO_IRQRaghav Dogra2016-02-01
| | | | | | | | Replacing the NO_IRQ macro with 0. If there is no interrupt, returned value will be 0 regardless of what NO_IRQ is defined. Signed-off-by: Raghav Dogra <raghav@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: pxa3xx_nand: add register access debugRobert Jarzmik2016-02-01
| | | | | | | | | Add verbose debug for register accesses. This enables easier debugging by following where and how hardware is stimulated, and how it answers. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: cs553x: Fix dependencies for !HAS_IOMEM archsRichard Weinberger2016-02-01
| | | | | | | | | Not every arch has io memory nor can this driver ever work on UML/i386. So, unbreak the build by fixing the dependencies. Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: Fix dependencies for !HAS_IOMEM archsRichard Weinberger2016-01-26
| | | | | | | | | Not every arch has io memory. So, unbreak the build by fixing the dependencies. Signed-off-by: Richard Weinberger <richard@nod.at> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: vf610: remove useless mtd->ecclayout assignmentBoris BREZILLON2016-01-26
| | | | | | | | | The NAND core layer is already taking care of ecclayout propagation. Remove this useless assignment. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: lpc32xx_mlc: fix ecc.sizeBoris BREZILLON2016-01-26
| | | | | | | | According to the ECC layout description the actual ecc.size is 512 bytes and not mtd->writesize. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* staging: mt29f_spinand: kill unused ecclayout fieldBoris BREZILLON2016-01-26
| | | | | | | | The spinand_info struct embeds a pointer to an ecclayout definition, but this field is never used in the mt29f driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: kill unused ->ecclayout field in platform_nand_chip structBoris BREZILLON2016-01-26
| | | | | | | This field is not set in any board file and can thus be dropped. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: jz4740: kill the ->ecc_layout fieldBoris BREZILLON2016-01-26
| | | | | | | | | ->ecc_layout is not used by any board file. Kill this field to avoid any confusion. New boards are encouraged to use the default ECC layout defined in NAND core. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nand: s3c2410: kill the ->ecc_layout fieldBoris BREZILLON2016-01-26
| | | | | | | | | | | | The s3c2410 is allowing board data to overload the default ECC layout defined inside the driver, but this feature is not used by board specific definitions. Kill this field so that we can easily move to a model where ecclayout are dynamically allocated by the NAND controller driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: nftl: kill unused oobinfo fieldBoris BREZILLON2016-01-26
| | | | | Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* mtd: inftl: kill unused oobinfo fieldBoris BREZILLON2016-01-26
| | | | | Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge v4.5-rc1 with MTD -next developmentBrian Norris2016-01-24
|\ | | | | | | | | | | To start from a good base. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: atmel_nand: Use of_device_get_match_dataRomain Izard2016-01-23
| | | | | | | | | | | | | | | | | | Remove the need for forward declaration and the risk for a null pointer when accessing the private part of the compatible match table, by using the newly introduced of_device_get_match_data function. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: atmel_nand: Simplify error messagesRomain Izard2016-01-23
| | | | | | | | | | | | | | | | | | | | | | The error messages when the ECC controller is misconfigured through the device tree are very precise. As a result they can (and will) get obsolete when new revisions of the controller appear. Simplify them before adding the support for the new revision. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: gpmi: may use minimum required ecc for 744 oobsize NANDHan Xu2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default NAND driver will choose the highest ecc strength that oob could contain, in this case, for some 8K+744 NAND flash, the ecc strength will be up to 52bit, which beyonds the i.MX6QDL BCH capability (40bit). This patch allows the NAND driver try to use minimum required ecc strength if it failed to use the highest ecc, even without explicitly claiming "fsl,use-minimum-ecc" in dts. Signed-off-by: Han Xu <b45815@freescale.com> Acked-by: Huang Shijie <shijie.huang@arm.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: gpmi: add gpmi dsm supend/resume supportHuang Shijie2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX6SX supports deep sleep mode(DSM) that may turn off GPMI/BCH power during suspend, add gpmi nand suspend/resume function to release DMA channel in suspend function and re-init GPMI/BCH controller during resume function. Although it is not necessary to restore GPMI/BCH registers value for i.MX6QDL, the code doesn't distinguish different platforms to keep the code simple. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Han Xu <han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: bcm47xxpart: don't fail because of bit-flipsRafał Miłecki2016-01-23
| | | | | | | | | | | | | | | | Bit-flip errors may occur on NAND flashes and are harmless. Handle them gracefully as read content is still reliable and can be parsed. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: bcm47xxpart: limit scanned flash area on BCM47XX (MIPS) onlyRafał Miłecki2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | We allowed using bcm47xxpart on BCM5301X arch with commit: 9e3afa5f5c7 ("mtd: bcm47xxpart: allow enabling on ARCH_BCM_5301X") BCM5301X devices may contain some partitions in higher memory, e.g. Netgear R8000 has board_data at 0x2600000. To detect them we should use size limit on MIPS only. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: onenand: unexport onenand_default_bbt()Thomas Petazzoni2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | The onenand_default_bbt() function is only used by the OneNAND core and not by drivers, so there is no real need to export it. Additionally, the corresponding nand_default_bbt() for regular NANDs is not exported either, so for consistency reasons, this commit removes the EXPORT_SYMBOL on onenand_default_bbt(). Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: onenand: make onenand_scan_bbt() staticThomas Petazzoni2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Like was done in commit 17799359e7b3fa6ef4f2bf926cd6821cf7903ecf ("mtd: nand_bbt: make nand_scan_bbt() static") for the NAND code, this commit makes the onenand_scan_bbt() function static in the OneNAND code, since it is only used in onenand_bbt.c itself. Consequently, the EXPORT_SYMBOL() and declaration in bbm.h are also removed. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: remove EXPORT_SYMBOL of nand_scan_bbt()Thomas Petazzoni2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 17799359e7b3fa6ef4f2bf926cd6821cf7903ecf ("mtd: nand_bbt: make nand_scan_bbt() static"), the nand_scan_bbt() function is marked as static but is still exported using EXPORT_SYMBOL(), which doesn't make much sense. This commit gets rid of the useless EXPORT_SYMBOL. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: sunxi: use mtd_div_by_ws() helperBrian Norris2016-01-23
| | | | | | | | | | | | Suggested-by: Richard Weinberger <richard@nod.at> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: atmel_nand: Do not warn on bitflipsRomain Izard2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using multi-bit ECC, it is normal for the NAND Flash driver to correct bit errors during the life of the product. Those errors will only be cleared once a threshold has been reached, and corrections can occur regularly before this. Use only dev_dbg and not dev_info to report the bitflips, to keep the system log clean when everything works correctly. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Acked-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: sunxi: add randomizer supportBoris BREZILLON2016-01-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the randomizer engine available in Allwinner's NFC IP. Randomization is useful to support modern NAND chips which are sensitive to repeated patterns. On such NANDs you might experience an unexpectedly high number of bitflips when you repeat the same pattern all over a given NAND block. Randomizing input data mitigate this problem by avoiding such repeated patterns. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: add NAND_NEED_SCRAMBLING flag to the H27UCG8T2ATR-BC definitionBoris BREZILLON2016-01-22
| | | | | | | | | | | | | | | | The H27UCG8T2ATR-BC requires an external data scrambler. Reflect this constraint in the nand_flash_ids definition. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: add NAND_NEED_SCRAMBLING option flagBoris BREZILLON2016-01-22
| | | | | | | | | | | | | | | | | | Some MLC NANDs are sensitive to repeated patterns and require data to be scrambled in order to limit the number of bitflips. Add a new flag to let the NAND controller know about this constraint. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nand: mpc5121: use 'of_machine_is_compatible' to simplify codeChristophe Jaillet2016-01-22
| | | | | | | | | | | | | | | | | | | | The current code is the same as 'of_machine_is_compatible'. So use it in order to remove a few lines of code and to be more consistent with other parts of the kernel. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: nuc900_nand: read correct SMISR registerArnd Bergmann2016-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nuc900_nand driver has always passed an incorrect register address in its nuc900_check_rb() function, which cannot possibly work, and in some configurations gives us a build warning: drivers/mtd/nand/nuc900_nand.c: In function 'nuc900_check_rb': drivers/mtd/nand/nuc900_nand.c:27:23: warning: passing argument 1 of '__raw_readl' makes pointer from integer without a cast [-Wint-conversion] #define REG_SMISR 0xac drivers/mtd/nand/nuc900_nand.c:118:20: note: in expansion of macro 'REG_SMISR' val = __raw_readl(REG_SMISR); This makes sure we actually read from the register rather than from (void *)0x000000ac in user space. I suspect nobody noticed this before because the nuc900_nand_devready() function never gets called, or nobody uses this driver on an upstream kernel. Possibly even both. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * mtd: mtk-nor: Drop bogus __init from mtk_nor_init()Geert Uytterhoeven2016-01-15
| | | | | | | | | | | | | | | | | | | | | | | | | | WARNING: drivers/mtd/spi-nor/mtk-quadspi.o(.text+0x77e): Section mismatch in reference from the function mtk_nor_drv_probe() to the function .init.text:mtk_nor_init() The function mtk_nor_drv_probe() references the function __init mtk_nor_init(). This is often because mtk_nor_drv_probe lacks a __init annotation or the annotation of mtk_nor_init is wrong. Drop the bogus __init from mtk_nor_init() to kill this warning. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | Linux 4.5-rc1Linus Torvalds2016-01-24
| |
* | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2016-01-24
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: "This is the main pull request for MIPS for 4.5 plus some 4.4 fixes. The executive summary: - ATH79 platform improvments, use DT bindings for the ATH79 USB PHY. - Avoid useless rebuilds for zboot. - jz4780: Add NEMC, BCH and NAND device tree nodes - Initial support for the MicroChip's DT platform. As all the device drivers are missing this is still of limited use. - Some Loongson3 cleanups. - The unavoidable whitespace polishing. - Reduce clock skew when synchronizing the CPU cycle counters on CPU startup. - Add MIPS R6 fixes. - Lots of cleanups across arch/mips as fallout from KVM. - Lots of minor fixes and changes for IEEE 754-2008 support to the FPU emulator / fp-assist software. - Minor Ralink, BCM47xx and bcm963xx platform support improvments. - Support SMP on BCM63168" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (84 commits) MIPS: zboot: Add support for serial debug using the PROM MIPS: zboot: Avoid useless rebuilds MIPS: BMIPS: Enable ARCH_WANT_OPTIONAL_GPIOLIB MIPS: bcm63xx: nvram: Remove unused bcm63xx_nvram_get_psi_size() function MIPS: bcm963xx: Update bcm_tag field image_sequence MIPS: bcm963xx: Move extended flash address to bcm_tag header file MIPS: bcm963xx: Move Broadcom BCM963xx image tag data structure MIPS: bcm63xx: nvram: Use nvram structure definition from header file MIPS: bcm963xx: Add Broadcom BCM963xx board nvram data structure MAINTAINERS: Add KVM for MIPS entry MIPS: KVM: Add missing newline to kvm_err() MIPS: Move KVM specific opcodes into asm/inst.h MIPS: KVM: Use cacheops.h definitions MIPS: Break down cacheops.h definitions MIPS: Use EXCCODE_ constants with set_except_vector() MIPS: Update trap codes MIPS: Move Cause.ExcCode trap codes to mipsregs.h MIPS: KVM: Make kvm_mips_{init,exit}() static MIPS: KVM: Refactor added offsetof()s MIPS: KVM: Convert EXPORT_SYMBOL to _GPL ...
| * \ Merge branch '4.4-fixes' into mips-for-linux-nextRalf Baechle2016-01-23
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| | * | MIPS: Fix macro typoJaedon Shin2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the CONFIG_MIPS_CMDLINE_EXTEND to CONFIG_MIPS_CMDLINE_DTB_EXTEND to resolve the EXTEND_WITH_PROM macro. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Fixes: 2024972ef533 ("MIPS: Make the kernel arguments from dtb available") Reviewed-by: Alexander Sverdlin <alexander.svedlin@gmail.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11909/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | MIPS: smp-cps: Ensure secondary cores start with EVA disabledMatt Redfearn2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel currently assumes that a core will start up in legacy mode using the exception base provided through the CM GCR registers. If a core has been configured in hardware to start in EVA mode, these assumptions will fail. This patch ensures that secondary cores are initialized to meet these assumptions. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11907/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | MIPS: io.h: Define `ioremap_cache'Maciej W. Rozycki2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12040/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| | * | Revert "MIPS: Fix PAGE_MASK definition"Dan Williams2016-01-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 22b14523994588279ae9c5ccfe64073c1e5b3c00. It was originally sent in an earlier revision of the pfn_t patchset. Besides being broken, the warning is also fixed by PFN_FLAGS_MASK casting the PAGE_MASK to an unsigned long. Reported-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Cc: linux-kernel@vger.kernel.org Cc: Linux-MIPS <linux-mips@linux-mips.org> Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12182/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: zboot: Add support for serial debug using the PROMAlban Bedel2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As most platforms implement the PROM serial interface prom_putchar() add a simple bridge to allow re-using this code for zboot. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: Alex Smith <alex.smith@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11811/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: zboot: Avoid useless rebuildsAlban Bedel2016-01-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add dummy.o to the targets list, and fill targets automatically from $(vmlinuzobjs) to avoid having to maintain two lists. When building with XZ compression copy ashldi3.c to the build directory to use a different object file for the kernel and zboot. Without this the same object file need to be build with different flags which cause a rebuild at every run. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: linux-mips@linux-mips.org Cc: Alex Smith <alex.smith@imgtec.com> Cc: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11810/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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