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* drm: atmel-hlcdc: move output mode selection in CRTC implementationBoris Brezillon2016-04-14
| | | | | | | | | | | | | | | | | In order to support multiple outputs we need to move the output mode selection to the CRTC object, so that the output validity check can be done against the drm_atomic_state. If the connectors selected by a specific mode setting are requiring incompatible bus format the atomic operation is aborted (->atomic_check() returns -EINVAL). In order to implement that, we need to define our own CRTC state and overload default ->reset(), ->atomic_duplicate_state() and ->atomic_destroy_state() functions. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* drm: atmel-hlcdc: support extended timing ranges on sama5d4 and sama5d2Boris Brezillon2016-04-14
| | | | | | | | | | The display timings on old SoCs older than the sama5d4 are quite limited and prevent the use of many displays. Add support for extended timing ranges on sama5d2 and sama5d4. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* drm: atmel-hlcdc: remove leftovers from atomic mode setting migrationBoris Brezillon2016-04-14
| | | | | | | | | | The ->dpms field is no longer used and can be removed. The same goes for the dummy ->mode_fixup() implementation which always returns true. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* drm: atmel-hlcdc: fix connector and encoder typesBoris Brezillon2016-04-14
| | | | | | | | | | The hlcdc IP keep the pixel stream in raw RGB mode, and does not provide any specific connector. Since DRM_MODE_CONNECTOR_RAW_RGB does not exist, use DRM_MODE_CONNECTOR_Unknown. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* drm: atmel-hlcdc: support asynchronous atomic commit operationsBoris Brezillon2016-04-14
| | | | | | | | drm_atomic_helper_commit() does not support asynchronous commits. Replace it by a specific commit function supporting these kind of requests. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* drm: atmel-hlcdc: add a ->cleanup_fb() operationBoris Brezillon2016-04-14
| | | | | | | | | | Add a ->cleanup_fb() operation to avoid memory leaks when the atomic operation is interrupted after the ->prepare_fb() call. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Fixes 2389fc1 ("drm: atmel-hlcdc: Atomic mode-setting conversion") Reviewed-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* Merge branch 'gma500-next' of git://github.com/patjak/drm-gma500 into drm-nextDave Airlie2016-04-13
|\ | | | | | | | | | | | | | | | | | | A few fixes and cleanups for 4.7 that's been collecting dust in my inbox for a while. * 'gma500-next' of git://github.com/patjak/drm-gma500: drm/gma500/mdfld_dsi: remove bogus if check drm/gma500: Fix possible out of bounds read drm/gma500: fix double freeing
| * drm/gma500/mdfld_dsi: remove bogus if checkAlan2016-04-08
| | | | | | | | | | | | | | Both cases produce the same result. Kill the junk code. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
| * drm/gma500: Fix possible out of bounds readItai Handler2016-04-08
| | | | | | | | | | | | | | | | | | | | | | | | Fix possible out of bounds read, by adding missing comma. The code may read pass the end of the dsi_errors array when the most significant bit (bit #31) in the intr_stat register is set. This bug has been detected using CppCheck (static analysis tool). Cc: stable@vger.kernel.org Signed-off-by: Itai Handler <itai_handler@hotmail.com> Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
| * drm/gma500: fix double freeingSudip Mukherjee2016-04-08
|/ | | | | | | | | | | | | | | | We are allocating backing using psbfb_alloc() and so backing->stolen is always true. So we were freeing backing two times. Moreover if we follow the execution path then we should be freeing backing after we have released the helper. So remove the one which frees backing before the helper is released. While at it the error labels are also renamed to give a meaningful name. [Patrik: Fixed conflict with removal of struct_mutex] Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org> Reviewed-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* Merge branch 'drm-next-analogix-dp-v2' of github.com:yakir-Yang/linux into ↵Dave Airlie2016-04-05
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm-next This pull request want to land the analogix_dp driver into drm/bridge directory, which reused the Exynos DP code, and add Rockchip DP support. And those patches have been: * 'drm-next-analogix-dp-v2' of github.com:yakir-Yang/linux: drm: bridge: analogix/dp: Fix the possible dead lock in bridge disable time drm: bridge: analogix/dp: add panel prepare/unprepare in suspend/resume time drm: bridge: analogix/dp: add edid modes parse in get_modes method drm: bridge: analogix/dp: move hpd detect to connector detect function drm: bridge: analogix/dp: try force hpd after plug in lookup failed drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 drm: bridge: analogix/dp: add some rk3288 special registers setting dt-bindings: add document for rockchip variant of analogix_dp drm: rockchip: dp: add rockchip platform dp driver ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver dt-bindings: add document for analogix display port driver drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count drm: bridge: analogix/dp: fix some obvious code style drm: bridge: analogix/dp: rename register constants drm/exynos: dp: rename implementation specific driver part drm: bridge: analogix/dp: split exynos dp driver to bridge directory
| * drm: bridge: analogix/dp: Fix the possible dead lock in bridge disable timeYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It may caused a dead lock if we flush the hpd work in bridge disable time. The normal flow would like: IN --> DRM IOCTL 1. Acquire crtc_ww_class_mutex (DRM IOCTL) IN --> analogix_dp_bridge 2. Acquire hpd work lock (Flush hpd work) 3. HPD work already in idle, no need to run the work function. OUT <-- analogix_dp_bridge OUT <-- DRM IOCTL The dead lock flow would like: IN --> DRM IOCTL 1. Acquire crtc_ww_class_mutex (DRM IOCTL) IN --> analogix_dp_bridge 2. Acquire hpd work lock (Flush hpd work) IN --> analogix_dp_hotplug IN --> drm_helper_hpd_irq_event 3. Acquire mode_config lock (This lock already have been acquired in previous step 1) ** Dead Lock Now ** It's wrong to flush the hpd work in bridge->disable time, I guess the original code just want to ensure the delay work must be finish before encoder disabled. The flush work in bridge disable time is try to ensure the HPD event won't be missed before display card disabled, actually we can take a fast respond way(interrupt thread) to update DRM HPD event to fix the delay update and possible dead lock. Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: add panel prepare/unprepare in suspend/resume timeYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | Turn off the panel power in suspend time would help to reduce power waste. Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: add edid modes parse in get_modes methodYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Display Port monitor could support kinds of mode which indicate in monitor edid, not just one single display resolution which defined in panel or devivetree property display timing. Note: Gustavo Padovan try to remove the controller and phy power on function in bind time at bellow commit: drm/exynos: do not start enabling DP at bind() phase But for now driver need to read edid message in .get_modes() function, so controller must be inited in bind time, so we need to add controller init back. Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: move hpd detect to connector detect functionYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change just make a little clean to make code more like drm core expect, move hdp detect code from bridge->enable(), and place them into connector->detect(). Note: Gustavo Padovan try to remove the controller and phy power on function in bind time at bellow commit: drm/exynos: do not start enabling DP at bind() phase But for now the connector status don't hardcode to connected, need to operate dp phy in .detect function, so we need to revert parts if Gustavo Padovan's changes, add phy poweron function in bind time. Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: try force hpd after plug in lookup failedYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some edp screen do not have hpd signal, so we can't just return failed when hpd plug in detect failed. This is an hardware property, so we need add a devicetree property "analogix,need-force-hpd" to indicate this sutiation. Acked-by: Rob Herring <robh@kernel.org> Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288Yakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | There are some IP limit on rk3288 that only support 4 physical lanes of 2.7/1.6 Gbps/lane, so seprate them out by device_type flag. Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: add some rk3288 special registers settingYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | RK3288 need some special registers setting, we can separate them out by the dev_type of plat_data. Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * dt-bindings: add document for rockchip variant of analogix_dpYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | Rockchip DP driver is a helper driver of analogix_dp coder driver, so most of the DT property should be descriped in analogix_dp document. Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: rockchip: dp: add rockchip platform dp driverYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | Rockchip have three clocks for dp controller, we leave pclk_edp to analogix_dp driver control, and keep the sclk_edp_24m and sclk_edp in platform driver. Acked-by: Mark Yao <mark.yao@rock-chips.com> Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yakir Yang <ykk@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp ↵Yakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | driver After exynos_dp have been split the common IP code into analogix_dp driver, the analogix_dp driver have deprecated some Samsung platform properties which could be dynamically parsed from EDID/MODE/DPCD message, so this is an update for Exynos DTS file for dp-controller. Beside the backward compatibility is fully preserved, so there are no bisectability break that make this change in a separate patch. Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * dt-bindings: add document for analogix display port driverYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | Analogix dp driver is split from exynos dp driver, so we just make an copy of exynos_dp.txt, and then simplify exynos_dp.txt Beside update some exynos dtsi file with the latest change according to the devicetree binding documents. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_rangeYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both hsync/vsync polarity and interlace mode can be parsed from drm display mode, and dynamic_range and ycbcr_coeff can be judge by the video code. But presumably Exynos still relies on the DT properties, so take good use of mode_fixup() in to achieve the compatibility hacks. Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: remove duplicate configuration of link rate and ↵Yakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | link count link_rate and lane_count already configured in analogix_dp_set_link_train(), so we don't need to config those repeatly after training finished, just remove them out. Beside Display Port 1.2 already support 5.4Gbps link rate, the maximum sets would change from {1.62Gbps, 2.7Gbps} to {1.62Gbps, 2.7Gbps, 5.4Gbps}. Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: fix some obvious code styleYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix some obvious alignment problems, like alignment and line over 80 characters problems, make this easy to be maintained later. Acked-by: Jingoo Han <jingoohan1@gmail.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: rename register constantsHeiko Stuebner2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | In the original split we kept the register constants intact to keep the diff small. Still the constants are Analogix-specific, so rename them now. Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm/exynos: dp: rename implementation specific driver partHeiko Stuebner2016-04-04
| | | | | | | | | | | | | | | | | | | | | | The core functionality now resides in the generic bridge part so the exynos-specific implementation details can get a more suitable nameing. Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
| * drm: bridge: analogix/dp: split exynos dp driver to bridge directoryYakir Yang2016-04-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the dp core driver from exynos directory to bridge directory, and rename the core driver to analogix_dp_*, rename the platform code to exynos_dp. Beside the new analogix_dp driver would export six hooks. "analogix_dp_bind()" and "analogix_dp_unbind()" "analogix_dp_suspned()" and "analogix_dp_resume()" "analogix_dp_detect()" and "analogix_dp_get_modes()" The bind/unbind symbols is used for analogix platform driver to connect with analogix_dp core driver. And the detect/get_modes is used for analogix platform driver to init the connector. They reason why connector need register in helper driver is rockchip drm haven't implement the atomic API, but Exynos drm have implement it, so there would need two different connector helper functions, that's why we leave the connector register in helper driver. Acked-by: Inki Dae <inki.dae@samsung.com> Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Douglas Anderson <dianders@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Yakir Yang <ykk@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | Merge tag 'drm-intel-next-2016-03-30' of ↵Dave Airlie2016-04-05
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm-intel into drm-next - VBT code refactor for a clean split between parsing&using of firmware information (Jani) - untangle the pll computation code, and splitting up the monster i9xx_crtc_compute_clocks (Ander) - dsi support for bxt (Jani, Shashank Sharma and others) - color manager (i.e. de-gamma, color conversion matrix & gamma support) from Lionel Landwerlin - Vulkan hsw support in the command parser (Jordan Justen) - large-scale renaming of intel_engine_cs variables/parameters to avoid the epic ring vs. engine confusion introduced in gen8 (Tvrtko Ursulin) - few atomic patches from Maarten&Matt, big one is two-stage wm programming on ilk-bdw - refactor driver load and add infrastructure to inject load failures for testing, from Imre - various small things all over * tag 'drm-intel-next-2016-03-30' of git://anongit.freedesktop.org/drm-intel: (179 commits) drm/i915: Update DRIVER_DATE to 20160330 drm/i915: Call intel_dp_mst_resume() before resuming displays drm/i915: Fix races on fbdev drm/i915: remove unused dev_priv->render_reclock_avail drm/i915: move sdvo mappings to vbt data drm/i915: move edp low vswing config to vbt data drm/i915: use a substruct in vbt data for edp drm/i915: replace for_each_engine() drm/i915: introduce for_each_engine_id() drm/i915/bxt: Fix DSI HW state readout drm/i915: Remove vblank wait from hsw_enable_ips, v2. drm/i915: Tidy aliasing_gtt_bind_vma() drm/i915: Split PNV version of crtc_compute_clock() drm/i915: Split g4x_crtc_compute_clock() drm/i915: Split i8xx_crtc_compute_clock() drm/i915: Split CHV and VLV specific crtc_compute_clock() hooks drm/i915: Merge ironlake_compute_clocks() and ironlake_crtc_compute_clock() drm/i915: Move fp divisor calculation into ironlake_compute_dpll() drm/i915: Pass crtc_state->dpll directly to ->find_dpll() drm/i915: Simplify ironlake_crtc_compute_clock() CPU eDP case ...
| * | drm/i915: Update DRIVER_DATE to 20160330Daniel Vetter2016-03-30
| | | | | | | | | | | | Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | drm/i915: Call intel_dp_mst_resume() before resuming displaysLyude2016-03-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we need MST devices ready before we try to resume displays, calling this after intel_display_resume() can result in some issues with various laptop docks where the monitor won't turn back on after suspending the system. This order was originally changed in commit e7d6f7d70829 ("drm/i915: resume MST after reading back hw state") In order to fix some unclaimed register errors, however the actual cause of those has since been fixed. CC: stable@vger.kernel.org Signed-off-by: Lyude <cpaul@redhat.com> [danvet: Resolve conflicts with locking changes.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * | drm/i915: Fix races on fbdevLukas Wunner2016-03-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ->lastclose callback invokes intel_fbdev_restore_mode() and has been witnessed to run before intel_fbdev_initial_config_async() has finished. We might likewise receive hotplug events before we've had a chance to fully set up the fbdev. Fix by waiting for the asynchronous thread to finish. v2: An async_synchronize_full() was also added to intel_fbdev_set_suspend() in v1 which turned out to be entirely gratuitous. It caused a deadlock on suspend (discovered by CI, thanks to Damien Lespiau and Tomi Sarvela for CI support) and was unnecessary since a device is never suspended until its ->probe callback (and all asynchronous tasks it scheduled) have finished. See dpm_prepare(), which calls wait_for_device_probe(), which calls async_synchronize_full(). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93580 Reported-by: Gustav Fägerlind <gustav.fagerlind@gmail.com> Reported-by: "Li, Weinan Z" <weinan.z.li@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@vger.kernel.org Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20160309115147.67B2B6E0D3@gabe.freedesktop.org
| * | drm/i915: remove unused dev_priv->render_reclock_availJani Nikula2016-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Set from VBT, but never used. Good riddance. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458834623-8734-5-git-send-email-jani.nikula@intel.com
| * | drm/i915: move sdvo mappings to vbt dataJani Nikula2016-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move all data initialized from VBT under dev_priv->vbt. No functional changes. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458834623-8734-4-git-send-email-jani.nikula@intel.com
| * | drm/i915: move edp low vswing config to vbt dataJani Nikula2016-03-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move all data initialized from VBT under dev_priv->vbt. No functional changes. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458834623-8734-3-git-send-email-jani.nikula@intel.com
| * | drm/i915: use a substruct in vbt data for edpJani Nikula2016-03-29
| | | | | | | | | | | | | | | | | | | | | | | | Housekeeping, similar to psr, backlight, and dsi. No functional changes. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458834623-8734-2-git-send-email-jani.nikula@intel.com
| * | drm/i915: replace for_each_engine()Dave Gordon2016-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having provided for_each_engine_id() for cases where the third (id) argument is useful, we can now replace all the remaining instances with a simpler version that takes only two parameters. In many cases, this also allows the elimination of the local variable used in the iterator (usually 'i'). v2: s/dev_priv/(dev_priv__)/ in body of for_each_engine_masked() [Chris Wilson] Signed-off-by: Dave Gordon <david.s.gordon@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458757194-17783-2-git-send-email-david.s.gordon@intel.com
| * | drm/i915: introduce for_each_engine_id()Dave Gordon2016-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Equivalent to the existing for_each_engine() macro, this will replace the latter wherever the third argument *is* actually wanted (in most places, it is not used). The third argument is renamed to emphasise that it is an engine id (type enum intel_engine_id). All the callers of the macro that actually need the third argument are updated to use this version, and the argument (generally 'i') is also updated to be 'id'. Other callers (where the third argument is unused) are untouched for now; they will be updated in the next patch. Signed-off-by: Dave Gordon <david.s.gordon@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
| * | drm/i915/bxt: Fix DSI HW state readoutImre Deak2016-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the machine hangs during booting while accessing the BXT_MIPI_PORT_CTRL register during pipe HW state readout. After some experimentation I found that the hang is caused by the DSI PLL being disabled, or it being enabled but with an incorrect divider configuration. Enabling the PLL got rid of the boot problem, so fix this by checking the PLL enabled state/configuration before attempting to read out the HW state. The DSI_PLL_ENABLE register is in the always-on power well, while the BXT_DSI_PLL_CTL is in power well 0. This isn't exactly matched by the transcoder power domain, but what we really need is just a runtime PM reference, which is provided by any power domain. Ville also found this dependency specified in BSpec, so I added a reference to that too. v2: - Make sure we hold a power reference while accessing the PLL registers. v3: (Jani) - Simplify check in bxt_get_dsi_transcoder_state() - Add comment explaining why we check for valid dividers in bxt_dsi_pll_is_enabled() CC: Shashank Sharma <shashank.sharma@intel.com> CC: Uma Shankar <uma.shankar@intel.com> CC: Jani Nikula <jani.nikula@intel.com> Fixes: c6c794a2fc5e ("drm/i915/bxt: Initialize MIPI DSI for BXT") Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458816100-31269-1-git-send-email-imre.deak@intel.com
| * | drm/i915: Remove vblank wait from hsw_enable_ips, v2.Maarten Lankhorst2016-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | intel_post_plane_update did an extra vblank wait that's no longer needed when enabling ips. Changes since v1: - Add comment explaining why vblank wait is performed. (Paulo) Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/56F29B28.5070804@linux.intel.com
| * | drm/i915: Tidy aliasing_gtt_bind_vma()Chris Wilson2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 0a878716265e9af9f697264dc2e858fcc060d833 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu Oct 15 14:23:01 2015 +0200 drm/i915: restore ggtt double-bind avoidance we wrote the ggtt_bind_vma() observing a number of cleanups we could do over the template of aliasing_gtt_bind_vma(). Now let's apply the cleanups we made there back to the original. The essence is to avoid redundant variables and assignements, and by doing so make the code easier to read. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1448015238-24639-1-git-send-email-chris@chris-wilson.co.uk
| * | drm/i915: Split PNV version of crtc_compute_clock()Ander Conselvan de Oliveira2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split a pnv_crtc_compute_clock(), so the differences between platforms become more obvious. With this, there are no more users of intel_limit() or the ->find_dpll() hook, so get rid of them. Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458576016-30348-16-git-send-email-ander.conselvan.de.oliveira@intel.com
| * | drm/i915: Split g4x_crtc_compute_clock()Ander Conselvan de Oliveira2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Split a G4X specific version from i9xx_crtc_compute_clock(). With this the differences between platforms become more obvious. Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458576016-30348-15-git-send-email-ander.conselvan.de.oliveira@intel.com
| * | drm/i915: Split i8xx_crtc_compute_clock()Ander Conselvan de Oliveira2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split a GEN2 specific version from i9xx_crtc_compute_clock(). With this there is no need for i9xx_get_refclk() anymore, and the differences between platforms become more obvious. v2: Use i8xx as prefix instead of gen2. (Ville and Daniel) Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458653723-17951-1-git-send-email-ander.conselvan.de.oliveira@intel.com
| * | drm/i915: Split CHV and VLV specific crtc_compute_clock() hooksAnder Conselvan de Oliveira2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order for VLV and CHV to use i9xx_crtc_compute_clocks(), a number of if ladders is necessary: one for setting the find_dpll() hook, one for choosing the limits struct, one for choosing the right compute dpll function and one for initializing the crtc_compute_clock() hook. By extracting a platform specific implementation for each platform, the number of if-ladders is reduced to one. While at it also clean up bxt_find_best_dpll() which depends on some of the CHV code. Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458576016-30348-13-git-send-email-ander.conselvan.de.oliveira@intel.com
| * | drm/i915: Merge ironlake_compute_clocks() and ironlake_crtc_compute_clock()Ander Conselvan de Oliveira2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge ironlake_compute_clocks() into ironlake_crtc_compute_clock() so the clock computation logic is all in one place. The resulting function is still quite simple. Follow up patches will make the similar code for GMCH platforms look similar. Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458576016-30348-12-git-send-email-ander.conselvan.de.oliveira@intel.com
| * | drm/i915: Move fp divisor calculation into ironlake_compute_dpll()Ander Conselvan de Oliveira2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Follow what is done in i8xx_compute_dpll() and i9xx_compute_dpll() and move the lower level details of setting crtc_state->dpll_hw_state into the _compute_dpll() function. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458576016-30348-11-git-send-email-ander.conselvan.de.oliveira@intel.com
| * | drm/i915: Pass crtc_state->dpll directly to ->find_dpll()Ander Conselvan de Oliveira2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When calculating clocks, just pass a pointer to crtc_state->dpll directly to the find_dpll() hook. Back when this was introduced in commit f47709a9502f3 ("drm/i915: create pipe_config->dpll for clock state") there was no staged crtc config or atomic crtc state, so it was possible to overwrite the current configuration on error. That hasn't been the case for a while now, so finally make it "disappear". Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458576016-30348-10-git-send-email-ander.conselvan.de.oliveira@intel.com
| * | drm/i915: Simplify ironlake_crtc_compute_clock() CPU eDP caseAnder Conselvan de Oliveira2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | None of the code in ironlake_crtc_compute_clock() is relevant for CPU eDP. The CPU eDP PLL is turned on and off in ironlake_edp_pll_{on,off} from the DP code and that doesn't depend on the crtc_state->dpll values, so just return early in that case. v2: Rebase without patch that drops lvds downclock code. (Ville) Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458576016-30348-9-git-send-email-ander.conselvan.de.oliveira@intel.com
| * | drm/i915: Remove PCH type checks from ironlake_crtc_compute_clock()Ander Conselvan de Oliveira2016-03-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The checks were added in commit 5dc5298bb3e5 ("drm/i915: add proper CPU/PCH checks to crtc_mode_set functions") in a time when there was doubts on what PCHs would be supported by HSW. There are similar checks for PCH type in intel_detect_pch() and the function pointers are initialized based on platform/pch information, so the removed WARN can't ever be reached. v2: Rebase without patch that drops lvds downclock code. (Ville) Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458576016-30348-8-git-send-email-ander.conselvan.de.oliveira@intel.com
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-15 22:59:30 -0400