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* drm/msm: update generated headersRob Clark2016-03-03
| | | | | | Pull in additional regs needed for a430, etc. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: fix definition of msm_dsi_pll_28nm_8960_init()Luis Henriques2016-03-03
| | | | | | | | | | | | This fixes the following build failure: drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.o: In function `msm_dsi_pll_28nm_8960_init': dsi_pll_28nm.c:(.text+0x1198): multiple definition of `msm_dsi_pll_28nm_8960_init' drivers/gpu/drm/msm/dsi/pll/dsi_pll.o:dsi_pll.c:(.text+0x0): first defined here Signed-off-by: Luis Henriques <luis.henriques@canonical.com> Acked-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Parse DSI lanes via DTArchit Taneja2016-03-03
| | | | | | | | | | | | | | | | | | | | | | The DSI driver is currently unaware of how the DSI physical data lanes are mapped to the logical lanes provided by the DSI controller. Create a DT binding "qcom,data-lane-map" that provides this information on a given platform. The MSM DSI controller is restricted in terms of what all mappings it can support. The lane polarity is fixed for all the lanes, the clock lanes are fixed, and the data lanes can be swapped among each other only for a few combinations. Apply these restrictions when we parse the DT data. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
* drm/msm/dsi: Drop VDD regulator for MSM8916Archit Taneja2016-03-02
| | | | | | | | | | VDD regulator input was specified for MSM8916. It turns our that this regulator is used for the display panels used on MSM8916 platforms, but not the DSI controller itself. Drop this regulator from the list. Reported-by: Vinay Simha <vinaysimha@inforcecomputing.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/dsi: Remove incorrect warning on host attachArchit Taneja2016-03-02
| | | | | | | | | | | | With the implementation of of_graph parsing, it isn't any longer necessary for msm_host->device node to be same as dsi->dev.of_node. This only holds true when the connected device is also a child of the dsi_host. In the case of external bridge chips belonging to a different control bus, these are guaranteed to be different. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: Free fb helper resources in msm_unloadArchit Taneja2016-03-02
| | | | | | | | We have a msm_fbev_free function to uninit fb_helper stuff, but we aren't using it. Call it in msm_unload. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp: Detach iommu in mdp4_destroySricharan R2016-03-02
| | | | | | | | | | | attach_dev gets called in mdp4_kms_init, but there is no corresponding detach_dev called in the error path or in the kms driver unload path. Detach and destroy mmu in mdp4_destroy. Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: make iommu port names const'ierRob Clark2016-03-02
| | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/mdp: Use atomic helper to set crtc propertyArchit Taneja2016-03-02
| | | | | | | | | | Assign drm_atomic_helper_crtc_set_property helper to MDP4 and MDP5 crtcs' set_property ops. This replaces the custom funcs that returned an error even for standard crtc properties. Signed-off-by: Archit Taneja <architt@codeaurora.org> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Rob Clark <robdclark@gmail.com>
* dt-bindings: msm/hdmi: Add HDMI PHY bindingsArchit Taneja2016-03-02
| | | | | | | | | | | | | | Add HDMI PHY bindings. Update the example to use HDMI PHY. Added a missing power-domains property in the HDMI core bindings. Also, simplified HDMI TX's DT node name in the example. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh@kernel.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: Rob Herring <robh@kernel.org>
* drm/msm/hdmi: HDMI 8996 PHY/PLL supportArchit Taneja2016-02-29
| | | | | | | | | | | Add support for the HDMI PHY/PLL found in MSM8996/APQ8096. Unlike the previous PHYs supported in the driver, this doesn't need the powerup/powerdown ops. The PLL prepare/unprepare clock ops enable/disable the phy itself. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: Update generated headers for HDMI 8996 PHYArchit Taneja2016-02-29
| | | | | | | | | | Adds HDMI 8996 PHY offsets. The offsets are divided into 3 parts: - Core HDMI PHY registers - HDMI PLL registers (part of QSERDES block) - HDMI TX lane registers (part of QSERDES block) Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: Update generated headers to split PHY/PLL offsetsArchit Taneja2016-02-29
| | | | | | | | - Create separate domains for 8960 PHY and PLL - Create separate domains for 8x60 PHY Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: Convert PHY files according to new designArchit Taneja2016-02-29
| | | | | | | | | | | | | | | Remove the old PHY ops managed by hdmi_platform_config and use them as ops provided by the HDMI PHY driver. Remove the old HDMI 8960 PLL code that used the top level HDMI TX mmio base. NOTE: With this commit, HDMI functionality will break until the HDMI PHY/PLL register offsets in hdmi.xml.h aren't updated to be used as separate domains. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: Make HDMI core get its PHYArchit Taneja2016-02-29
| | | | | | | | | | | | Make HDMI core get its PHY by parsing the "phys" phandle. The core will use this PHY reference to enable/disable PHY. The driver defers probe until PHY isn't available. The DT bindings used here is the same as the one used for PHYs using the common PHY framework bindings. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: Manage HDMI PLL through PHY driverArchit Taneja2016-02-29
| | | | | | | | | | | | | | | | | | | Add a helper to initialize PLL in the PHY driver. HDMI PLLs are going to have their own mmio base different from that of PHY. For the clock code in hdmi_phy_8960.c, some changes were needed for it to work with the updated register offsets. Create a copy of the updated clock code in hdmi_pll_8960.c, instead of rewriting it in hdmi_phy_8960.c itself. This removes the need to place CONFIG_COMMON_CLOCK checks all around, makes the code more legible, and also removes some old checkpatch warnings with the original code. The older hdmi pll clock ops in hdmi_phy_8960.c will be removed later. The driver will use these until the HDMI PHY/PLL register offsets aren't considered as separate domains (i.e. their offsets start from 0). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: Create a separate HDMI PHY driverArchit Taneja2016-02-29
| | | | | | | | | | | | | | | | | | | | | | | | | Create a PHY device that represents the TX PHY and PLL parts of the HDMI block. This makes management of PHY specific resources (regulators and clocks) much easier, and makes the PHY and PLL usable independently. It also simplifies the core HDMI driver, which currently assigns phy ops among many other things. The PHY driver implementation done here is very similar to the PHY driver we already have for DSI. Keep the old hdmi_phy_funcs ops for now. The driver will use these until the HDMI PHY/PLL register offsets aren't considered as separate domains (i.e. their offsets start from 0). The driver doesn't use the common PHY framework for now. This is because it's hard to map our ops with the ops provided by the framework. The bindings used for this is the generic phy bindings. So, this can be adapted to the PHY framework in the future, if possible. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: Fix connector detect when there is no HPD gpioArchit Taneja2016-02-29
| | | | | | | | | | | | Some platforms may not have a HPD gpio line to detect Hot Plug signal from the connector. They need to rely only on reading REG_HDMI_HPD_INT_STATUS for HPD. Modify hdmi_connector_detect logic such that it checks for HPD only using the status register if there is no HPD gpio. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/hdmi: Clean up connector gpio usageArchit Taneja2016-02-29
| | | | | | | | | | | | | | | | | Make gpio allocation and usage iterative by parsing the gpios on a given platform from a list. This gives us flexibility over what all gpios exist for a platform, whether they are input or output, and what value they should be set to. In particular, this will make HDMI on 8x96 platforms easier to integrate with the driver, as it doesn't have a HPD gpio input to them. Also, it cleans things up a bit. We still use the legacy gpio api here, as we might need to backport this driver to downstream kernels. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* Merge branch 'drm-rockchip-next-2016-02-18' of ↵Dave Airlie2016-02-18
|\ | | | | | | | | | | | | | | | | | | https://github.com/markyzq/kernel-drm-rockchip into drm-next add Innosilicon HDMI support. * 'drm-rockchip-next-2016-02-18' of https://github.com/markyzq/kernel-drm-rockchip: dt-bindings: add document for Innosilicon HDMI on Rockchip platform drm/rockchip: hdmi: add Innosilicon HDMI support
| * dt-bindings: add document for Innosilicon HDMI on Rockchip platformYakir Yang2016-02-18
| | | | | | | | | | Signed-off-by: Yakir Yang <ykk@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org>
| * drm/rockchip: hdmi: add Innosilicon HDMI supportYakir Yang2016-02-18
| | | | | | | | | | | | | | | | | | The Innosilicon HDMI is a low power HDMI 1.4 transmitter IP, and it have been integrated on some rockchip CPUs (like RK3036, RK312x). Signed-off-by: Yakir Yang <ykk@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de>
* | Merge tag 'drm-vc4-next-2016-02-17' of github.com:anholt/linux into drm-nextDave Airlie2016-02-18
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This pull request brings in overlay plane support for vc4. * tag 'drm-vc4-next-2016-02-17' of github.com:anholt/linux: drm/vc4: Add support for YUV planes. drm/vc4: Add support a few more RGB display plane formats. drm/vc4: Add support for scaling of display planes. drm/vc4: Fix which value is being used for source image size. drm/vc4: Add more display planes to each CRTC. drm/vc4: Make the CRTCs cooperate on allocating display lists. drm/vc4: Add a proper short-circut path for legacy cursor updates. drm/vc4: Move the plane clipping/scaling setup to a separate function. drm/vc4: Add missing __iomem annotation to hw_dlist. drm/vc4: Improve comments on vc4_plane_state members.
| * | drm/vc4: Add support for YUV planes.Eric Anholt2016-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This supports 420 and 422 subsampling with 2 or 3 planes, tested with modetest. It doesn't set up chroma subsampling position (which it appears KMS doesn't deal with yet). The LBM memory is overallocated in many cases, but apparently the docs aren't quite correct and I'll probably need to look at the hardware source to really figure it out. Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/vc4: Add support a few more RGB display plane formats.Eric Anholt2016-02-16
| | | | | | | | | | | | | | | | | | These were all touch-tested with modetest. Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/vc4: Add support for scaling of display planes.Eric Anholt2016-02-16
| | | | | | | | | | | | | | | | | | | | | | | | This implements a simple policy for choosing scaling modes (trapezoidal for decimation, PPF for magnification), and a single PPF filter (Mitchell/Netravali's recommendation). Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/vc4: Fix which value is being used for source image size.Eric Anholt2016-02-16
| | | | | | | | | | | | | | | | | | | | | This doesn't matter yet since we only allow 1:1 scaling, but the comment clearly says we should be using the source size. Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/vc4: Add more display planes to each CRTC.Eric Anholt2016-02-16
| | | | | | | | | | | | | | | | | | | | | | | | Previously we only did the primary and cursor plane, but overlay planes are useful and just require this setup to add, since all planes go into the HVS display list in the same way. Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/vc4: Make the CRTCs cooperate on allocating display lists.Eric Anholt2016-02-16
| | | | | | | | | | | | | | | | | | | | | | | | So far, we've only ever lit up one CRTC, so this has been fine. To extend to more displays or more planes, we need to make sure we don't run our display lists into each other. Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/vc4: Add a proper short-circut path for legacy cursor updates.Eric Anholt2016-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, on every modeset we would allocate new display list memory, recompute changed planes, write all of them to the new memory, and pointed scanout at the new list (which will latch approximately at the next line of scanout). We let drm_atomic_helper_wait_for_vblanks() decide whether we needed to wait for a vblank after a modeset before cleaning up the old state and letting the next modeset proceed, and on legacy cursor updates we wouldn't wait. If you moved the cursor fast enough, we could potentially wrap around the display list memory area and overwrite the existing display list while it was still being scanned out, resulting in the HVS scanning out garbage or just halting. Instead of making cursor updates wait for scanout to move to the new display list area (which introduces significant cursor lag in X), we just rewrite our current display list. Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/vc4: Move the plane clipping/scaling setup to a separate function.Eric Anholt2016-02-16
| | | | | | | | | | | | | | | | | | As we add actual scaling, this is going to get way more complicated. Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/vc4: Add missing __iomem annotation to hw_dlist.Eric Anholt2016-02-16
| | | | | | | | | | | | | | | | | | | | | This is the pointer to the HVS device's memory where we stored the contents of *dlist. Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/vc4: Improve comments on vc4_plane_state members.Eric Anholt2016-02-16
| |/ | | | | | | Signed-off-by: Eric Anholt <eric@anholt.net>
* | Merge branch 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2016-02-18
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next First radeon and amdgpu pull request for 4.6. Highlights: - ACP support for APUs with i2s audio - CS ioctl optimizations - GPU scheduler optimizations - GPUVM optimizations - Initial GPU reset support (not enabled yet) - New powerplay sysfs interface for manually selecting clocks - Powerplay fixes - Virtualization fixes - Removal of hw semaphore support - Lots of other misc fixes and cleanups * 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux: (118 commits) drm/amdgpu: Don't call interval_tree_remove in amdgpu_mn_destroy drm/amdgpu: Fix race condition in amdgpu_mn_unregister drm/amdgpu: cleanup gem init/finit drm/amdgpu: rework GEM info printing drm/amdgpu: print the GPU offset as well in gem_info drm/amdgpu: optionally print the pin count in gem_info as well drm/amdgpu: print the BO size only once in amdgpu_gem_info drm/amdgpu: print pid as integer drm/amdgpu: remove page flip work queue v3 drm/amdgpu: stop blocking for page filp fences drm/amdgpu: stop calling amdgpu_gpu_reset from the flip code drm/amdgpu: remove fence reset detection leftovers drm/amdgpu: Fix race condition in MMU notifier release drm/radeon: Fix WARN_ON if DRM_DP_AUX_CHARDEV is enabled drm/amdgpu/vi: move uvd tiling config setup into uvd code drm/amdgpu/vi: move sdma tiling config setup into sdma code drm/amdgpu/cik: move uvd tiling config setup into uvd code drm/amdgpu/cik: move sdma tiling config setup into sdma code drm/amdgpu/gfx7: rework gpu_init() drm/amdgpu/gfx: clean up harvest configuration (v2) ...
| * | drm/amdgpu: Don't call interval_tree_remove in amdgpu_mn_destroyFelix Kuehling2016-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | rbtree_postorder_for_each_entry_safe can skip over some entries if the tree is rebalanced in interval_tree_remove. interval_tree_remove is also redundant when the tree is just about to be freed. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * | drm/amdgpu: Fix race condition in amdgpu_mn_unregisterFelix Kuehling2016-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | Exchange locking order of adev->mn_lock and mm_sem, so that rmn->mm->mmap_sem can be taken safely, protected by adev->mn_lock, when amdgpu_mn_destroy runs concurrently. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * | drm/amdgpu: cleanup gem init/finitChristian König2016-02-16
| | | | | | | | | | | | | | | | | | | | | | | | Remove the double housekeeping and use something sane to forcefuly delete BOs on unload. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: rework GEM info printingChristian König2016-02-16
| | | | | | | | | | | | | | | | | | | | | Print BOs grouped per client. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: print the GPU offset as well in gem_infoChristian König2016-02-16
| | | | | | | | | | | | | | | | | | | | | To easily find which memory is used. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: optionally print the pin count in gem_info as wellChristian König2016-02-16
| | | | | | | | | | | | | | | | | | | | | Usefull when debugging page flipping. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: print the BO size only once in amdgpu_gem_infoChristian König2016-02-16
| | | | | | | | | | | | | | | | | | | | | Splitting it into KB/MB is just confusing. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: print pid as integerChristian König2016-02-16
| | | | | | | | | | | | | | | | | | | | | Not sure why somebody thought that this is a long. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: remove page flip work queue v3Christian König2016-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just use the system queue now that we don't block any more. v2: handle DAL as well. v3: agd: split DAL changes out Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Mykola Lysenko <mykola.lysenko@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> (v1)
| * | drm/amdgpu: stop blocking for page filp fencesChristian König2016-02-16
| | | | | | | | | | | | | | | | | | | | | Just register an callback and reschedule the work item if necessary. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: stop calling amdgpu_gpu_reset from the flip codeChristian König2016-02-16
| | | | | | | | | | | | | | | | | | | | | We don't return -EDEADLK any more. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: remove fence reset detection leftoversChristian König2016-02-16
| | | | | | | | | | | | | | | | | | | | | wait_event() never returns before the fence was signaled. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Fix race condition in MMU notifier releaseFelix Kuehling2016-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The release notifier can get called a second time from mmu_notifier_unregister depending on a race between __mmu_notifier_release and amdgpu_mn_destroy. Use mmu_notifier_unregister_no_release to avoid this. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * | drm/radeon: Fix WARN_ON if DRM_DP_AUX_CHARDEV is enabledLukas Wunner2016-02-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rafael Antognolli's new DRM_DP_AUX_CHARDEV feature causes a WARN_ON if drm_dp_aux->dev == drm_connector->kdev and drm_dp_aux_unregister() is called after drm_connector_unregister(). radeon is the only driver affected by this besides i915. (amdgpu calls drm_dp_aux_unregister() before drm_connector_unregister().) Cc: Rafael Antognolli <rafael.antognolli@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu/vi: move uvd tiling config setup into uvd codeAlex Deucher2016-02-12
| | | | | | | | | | | | | | | | | | | | | Split uvd and gfx programming. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu/vi: move sdma tiling config setup into sdma codeAlex Deucher2016-02-12
| | | | | | | | | | | | | | | | | | | | | Split sdma and gfx programming. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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