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* Merge tag 'edac_for_4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds2015-11-02
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull EDAC updates from Borislav Petkov: "A bunch of fixes all over the place and some hw enablement this time. - Convert EDAC to debugfs wrappers and make drivers use those (Borislav Petkov) - L3 and SoC support for xgene_edac (Loc Ho) - AMD F15h, models 0x60-6f support to amd64_edac (Aravind Gopalakrishnan) - Fixes and cleanups all over the place" * tag 'edac_for_4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (22 commits) EDAC: Fix PAGES_TO_MiB macro misuse EDAC, altera: SoCFPGA EDAC should not look for ECC_CORR_EN EDAC: Use edac_debugfs_remove_recursive() EDAC, ppc4xx_edac: Fix module autoload for OF platform driver Documentation/EDAC: Add reference documents section for amd64_edac EDAC, amd64_edac: Update copyright and remove changelog EDAC, amd64_edac: Extend scrub rate support to F15hM60h EDAC: Don't allow empty DIMM labels EDAC: Fix sysfs dimm_label store operation EDAC: Fix sysfs dimm_label show operation arm64, EDAC: Add L3/SoC DT subnodes to the APM X-Gene SoC EDAC node EDAC, xgene: Add SoC support EDAC, xgene: Fix possible sprintf() overflow issue EDAC, xgene: Add L3 support EDAC, Documentation: Update X-Gene EDAC binding for L3/SoC subnodes EDAC, sb_edac: Fix TAD presence check for sbridge_mci_bind_devs() EDAC, ghes_edac: Remove redundant memory_type array EDAC, xgene: Convert to debugfs wrappers EDAC, i5100: Convert to debugfs wrappers EDAC, altera: Convert to debugfs wrappers ...
| * EDAC: Fix PAGES_TO_MiB macro misuseTan Xiaojun2015-10-22
| | | | | | | | | | | | | | | | | | | | | | The PAGES_TO_MiB macro is used for unit conversion but the trace_mc_event() tracepoint expects a page address. Fix that. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1445341538-24271-1-git-send-email-tanxiaojun@huawei.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, altera: SoCFPGA EDAC should not look for ECC_CORR_ENDinh Nguyen2015-10-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bootloader may or may not enable the ECC_CORR_EN bit. By not enabling ECC_CORR_EN, when error happens, it is the user's responsibility to perform a full SDRAM scrub. Remove the check for ECC_CORR_EN. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: linux-edac <linux-edac@vger.kernel.org> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Thor Thayer <tthayer@opensource.altera.com> Link: http://lkml.kernel.org/r/1444864456-21778-1-git-send-email-dinguyen@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC: Use edac_debugfs_remove_recursive()Tan Xiaojun2015-10-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | debugfs_remove() is used to remove a file or a directory from the debugfs filesystem, but mci->debugfs might not empty. This can be triggered by the following sequence: 1) Enable CONFIG_EDAC_DEBUG 2) insmod an EDAC module (like i3000_edac or similar) 3) rmmod this module 4) we can see files remaining under <debugfs_mountpoint>/edac/ like "fake_inject", for example. Removing edac_core then, causes a NULL pointer dereference. Reported-by: Yun Wu (Abel) <wuyun.wu@huawei.com> Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Cc: Doug Thompson <dougthompson@xmission.com> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1444787364-104353-1-git-send-email-tanxiaojun@huawei.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, ppc4xx_edac: Fix module autoload for OF platform driverLuis de Bethencourt2015-10-03
| | | | | | | | | | | | | | | | | | | | | | | | This platform driver has an OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/20150917114619.GA13145@goodgumbo.baconseed.org Signed-off-by: Borislav Petkov <bp@suse.de>
| * Documentation/EDAC: Add reference documents section for amd64_edacAravind Gopalakrishnan2015-09-29
| | | | | | | | | | | | | | | | | | | | | | | | This section used to be in amd64_edac.h. Move it here as it is a more natural place to put all documentation-related info. Add links to the BKDGs while at it. Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Cc: linux-doc@vger.kernel.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1443440671-2400-1-git-send-email-Aravind.Gopalakrishnan@amd.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, amd64_edac: Update copyright and remove changelogAravind Gopalakrishnan2015-09-29
| | | | | | | | | | | | | | | | | | | | Git provides us all the changelogs anyway. So trim the comments section here. Update the copyrights info while at it. Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1443440593-2316-3-git-send-email-Aravind.Gopalakrishnan@amd.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, amd64_edac: Extend scrub rate support to F15hM60hAravind Gopalakrishnan2015-09-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The scrub rate control register has moved to function 2 in PCI config space and is at a different offset on family 0x15, models 0x60 and later. The minimum recommended scrub rate has also changed. (Refer to D18F2x1c9_dct[1:0][DramScrub] in Fam15hM60h BKDG). Adjust set_scrub_rate() and get_scrub_rate() functions to accommodate this. Tested on F15hM60h, Fam15h, models 00h-0fh and Fam10h systems. Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1443440593-2316-2-git-send-email-Aravind.Gopalakrishnan@amd.com [ Cleanup conditionals. ] Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC: Don't allow empty DIMM labelsToshi Kani2015-09-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updating dimm_label to an empty string does not make much sense. Change the sysfs dimm_label store operation to fail a request when an input string is empty. Suggested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Toshi Kani <toshi.kani@hpe.com> Cc: elliott@hpe.com Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Tony Luck <tony.luck@intel.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1443124767.25474.172.camel@hpe.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC: Fix sysfs dimm_label store operationToshi Kani2015-09-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sysfs "dimm_label" and "chX_dimm_label" nodes have the following issues in their store operation: 1) A newline-terminated input string causes redundant newlines: # echo "test" > /sys/bus/mc0/devices/dimm0/dimm_label # cat /sys/bus/mc0/devices/dimm0/dimm_label test # od -bc /sys/bus/mc0/devices/dimm0/dimm_label 0000000 164 145 163 164 012 012 t e s t \n \n 0000006 2) The original label string (31 characters) cannot be stored due to an improper size check: # echo "CPU_SrcID#0_Ha#0_Chan#0_DIMM#0" > /sys/bus/mc0/devices/dimm0/dimm_label # cat /sys/bus/mc0/devices/dimm0/dimm_label # od -bc /sys/bus/mc0/devices/dimm0/dimm_label 0000000 012 012 \n \n 0000002 3) An input string longer than the buffer size results a wrong label info as it allows a retry with the remaining string: # echo "CPU_SrcID#0_Ha#0_Chan#0_DIMM#0_TEST" > /sys/bus/mc0/devices/dimm0/dimm_label # cat /sys/bus/mc0/devices/dimm0/dimm_label _TEST Fix these issues by making the following changes: 1) Replace a newline character at the end by setting a null. It also assures that the string is null-terminated in the label buffer. 2) Check the label buffer size with 'sizeof(dimm->label)'. 3) Fail a request if its string exceeds the label buffer size. Signed-off-by: Toshi Kani <toshi.kani@hpe.com> Acked-by: Tony Luck <tony.luck@intel.com> Cc: linux-edac <linux-edac@vger.kernel.org> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Robert Elliott <elliott@hpe.com> Link: http://lkml.kernel.org/r/1443121564.25474.160.camel@hpe.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC: Fix sysfs dimm_label show operationToshi Kani2015-09-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After 7d375bffa524 ("sb_edac: Fix support for systems with two home agents per socket") sysfs "dimm_label" and "chX_dimm_label" show their label string without a newline "\n" at the end. [root@orange ~]# cat /sys/bus/mc0/devices/dimm0/dimm_label CPU_SrcID#0_Ha#0_Chan#0_DIMM#0[root@orange ~]# [root@orange ~]# cat /sys/devices/system/edac/mc/mc0/csrow0/ch0_dimm_label CPU_SrcID#0_Ha#0_Chan#0_DIMM#0[root@orange ~]# The label strings now have 31 characters, which are the same as EDAC_MC_LABEL_LEN. Since the snprintf()s in channel_dimm_label_show() and dimmdev_label_show() limit the whole length by EDAC_MC_LABEL_LEN, the newline in the format "%s\n" is ignored. [root@orange ~]# od -bc /sys/bus/mc0/devices/dimm0/dimm_label 0000000 103 120 125 137 123 162 143 111 104 043 060 137 110 141 043 060 C P U _ S r c I D # 0 _ H a # 0 0000020 137 103 150 141 156 043 060 137 104 111 115 115 043 060 000 _ C h a n # 0 _ D I M M # 0 \0 0000037 Fix it by using 'sizeof(dimm->label) + 1' as the whole length in the snprintf()s in channel_dimm_label_show() and dimmdev_label_show(). Reported-by: Robert Elliott <elliott@hpe.com> Signed-off-by: Toshi Kani <toshi.kani@hpe.com> Acked-by: Tony Luck <tony.luck@intel.com> Cc: linux-edac <linux-edac@vger.kernel.org> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Link: http://lkml.kernel.org/r/1442933883-21587-2-git-send-email-toshi.kani@hpe.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * arm64, EDAC: Add L3/SoC DT subnodes to the APM X-Gene SoC EDAC nodeLoc Ho2015-09-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add L3/SoC DT subnodes to the APM X-Gene SoC EDAC node. Signed-off-by: Loc Ho <lho@apm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: devicetree@vger.kernel.org Cc: Duc Dang <dhdang@apm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Iyappan Subramanian <isubramanian@apm.com> Cc: jcm@redhat.com Cc: Keyur Chudgar <kchudgar@apm.com> Cc: Kumar Gala <galak@codeaurora.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: mchehab@osg.samsung.com Cc: patches@apm.com Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rameshwar Prasad Sahu <rsahu@apm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Tanmay Inamdar <tinamdar@apm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Y Vo <yvo@apm.com> Link: http://lkml.kernel.org/r/1443055261-8613-5-git-send-email-lho@apm.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, xgene: Add SoC supportLoc Ho2015-09-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the SoC component. Signed-off-by: Loc Ho <lho@apm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: devicetree@vger.kernel.org Cc: ijc+devicetree@hellion.org.uk Cc: jcm@redhat.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: mark.rutland@arm.com Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: patches@apm.com Cc: robh+dt@kernel.org Link: http://lkml.kernel.org/r/1443055261-8613-4-git-send-email-lho@apm.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, xgene: Fix possible sprintf() overflow issueLoc Ho2015-09-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace sprintf() with snprintf() to avoid possible string array overflow. Signed-off-by: Loc Ho <lho@apm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: devicetree@vger.kernel.org Cc: ijc+devicetree@hellion.org.uk Cc: jcm@redhat.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: mark.rutland@arm.com Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: patches@apm.com Cc: robh+dt@kernel.org Link: http://lkml.kernel.org/r/1443116287-11752-1-git-send-email-lho@apm.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, xgene: Add L3 supportLoc Ho2015-09-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add EDAC support for the L3 component. Signed-off-by: Loc Ho <lho@apm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: devicetree@vger.kernel.org Cc: ijc+devicetree@hellion.org.uk Cc: jcm@redhat.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: mark.rutland@arm.com Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: patches@apm.com Cc: robh+dt@kernel.org Link: http://lkml.kernel.org/r/1443055261-8613-3-git-send-email-lho@apm.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, Documentation: Update X-Gene EDAC binding for L3/SoC subnodesLoc Ho2015-09-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update documentation for the APM X-Gene SoC EDAC DTS binding for L3/SoC subnodes. Signed-off-by: Loc Ho <lho@apm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: devicetree@vger.kernel.org Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: jcm@redhat.com Cc: Kumar Gala <galak@codeaurora.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: mchehab@osg.samsung.com Cc: patches@apm.com Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Link: http://lkml.kernel.org/r/1443055261-8613-2-git-send-email-lho@apm.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, sb_edac: Fix TAD presence check for sbridge_mci_bind_devs()Seth Jennings2015-09-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 7d375bffa524 ("sb_edac: Fix support for systems with two home agents per socket") NUM_CHANNELS was changed to 8 and the channel space was renumerated to handle EN, EP, and EX configurations. The *_mci_bind_devs() functions - except for sbridge_mci_bind_devs() - got a new device presence check in the form of saw_chan_mask. However, sbridge_mci_bind_devs() still uses the NUM_CHANNELS for loop. With the increase in NUM_CHANNELS, this loop fails at index 4 since SB only has 4 TADs. This results in the following error on SB machines: EDAC sbridge: Some needed devices are missing EDAC sbridge: Couldn't find mci handler EDAC sbridge: Couldn't find mci handle This patch adapts the saw_chan_mask logic for sbridge_mci_bind_devs() as well. After this patch: EDAC MC0: Giving out device to module sbridge_edac.c controller Sandy Bridge Socket#0: DEV 0000:3f:0e.0 (POLLED) EDAC MC1: Giving out device to module sbridge_edac.c controller Sandy Bridge Socket#1: DEV 0000:7f:0e.0 (POLLED) Signed-off-by: Seth Jennings <sjenning@redhat.com> Acked-by: Aristeu Rozanski <aris@redhat.com> Acked-by: Tony Luck <tony.luck@intel.com> Tested-by: Borislav Petkov <bp@suse.de> Cc: <stable@vger.kernel.org> # v4.2 Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1438798561-10180-1-git-send-email-sjenning@redhat.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, ghes_edac: Remove redundant memory_type arrayAravind Gopalakrishnan2015-09-23
| | | | | | | | | | | | | | | | | | | | | | We already have edac_mem_types[] that enumerates the different kinds of memory. So, use that and remove the redundant memory_type[] array here. Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1442436811-23382-2-git-send-email-Aravind.Gopalakrishnan@amd.com Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, xgene: Convert to debugfs wrappersBorislav Petkov2015-09-23
| | | | | | | | | | | | | | | | Drop CONFIG_EDAC_DEBUG ifdeffery too, while at it. Tested-by: Loc Ho <lho@apm.com> Cc: linux-edac@vger.kernel.org Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, i5100: Convert to debugfs wrappersBorislav Petkov2015-09-22
| | | | | | | | | | | | | | | | This driver creates its debugfs hierarchy under the toplevel debugfs dir - see i5100_init() - so make it use edac_debugfs_create_dir_at( , NULL) because we're not breaking userspace. Oh well. Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC, altera: Convert to debugfs wrappersBorislav Petkov2015-09-22
| | | | | | | | | | | | | | | | Use the EDAC-specific wrappers. Drop CONFIG_EDAC_DEBUG ifdeffery. Cc: Thor Thayer <tthayer@opensource.altera.com> Cc: <linux-edac@vger.kernel.org> Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC: Add debugfs wrappersBorislav Petkov2015-09-22
| | | | | | | | | | | | Later patches will convert EDAC users to those. Signed-off-by: Borislav Petkov <bp@suse.de>
| * EDAC: Carve out debugfs functionalityBorislav Petkov2015-09-22
| | | | | | | | | | | | | | | | | | | | | | ... into a separate compilation unit and drop a couple of CONFIG_EDAC_DEBUG ifdefferies. Rename edac_create_debug_nodes() to edac_create_debugfs_nodes(), while at it. No functionality change. Cc: <linux-edac@vger.kernel.org> Signed-off-by: Borislav Petkov <bp@suse.de>
* | Merge tag 'mmc-v4.4' of git://git.linaro.org/people/ulf.hansson/mmcLinus Torvalds2015-11-02
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MMC updates from Ulf Hansson: "MMC core: - Add new API to set VCCQ voltage - mmc_regulator_set_vqmmc() - Add new ioctl to allow userspace to send multi commands - Wait for card busy signalling before starting SDIO requests - Remove MMC_CLKGATE - Enable tuning for DDR50 mode - Some code clean-up/improvements to mmc pwrseq - Use highest priority for eMMC restart handler - Add DT bindings for eMMC hardware reset support - Extend the mmc_send_tuning() API - Improve ios show for debugfs - A couple of code optimizations MMC host: - Some generic OF improvements - Various code clean-ups - sirf: Add support for DDR50 - sunxi: Add support for card busy detection - mediatek: Use MMC_CAP_RUNTIME_RESUME - mediatek: Add support for eMMC HW-reset - mediatek: Add support for HS400 - dw_mmc: Convert to use the new mmc_regulator_set_vqmmc() API - dw_mmc: Add external DMA interface support - dw_mmc: Some various improvements - dw_mmc-rockchip: MMC tuning with the clock phase framework - sdhci: Properly clear IRQs during resume - sdhci: Enable tuning for DDR50 mode - sdhci-of-esdhc: Use IRQ mode for card detection - sdhci-of-esdhc: Support both BE and LE host controller - sdhci-pci: Build o2micro support in the same module - sdhci-pci: Support for new Intel host controllers - sdhci-acpi: Support for new Intel host controllers" * tag 'mmc-v4.4' of git://git.linaro.org/people/ulf.hansson/mmc: (73 commits) mmc: dw_mmc: fix the wrong setting for UHS-DDR50 mode mmc: dw_mmc: fix the CardThreshold boundary at CardThrCtl register mmc: dw_mmc: NULL dereference in error message mmc: pwrseq: Use highest priority for eMMC restart handler mmc: mediatek: add HS400 support mmc: mmc: extend the mmc_send_tuning() mmc: mediatek: add implement of ops->hw_reset() mmc: mediatek: fix got GPD checksum error interrupt when data transfer mmc: mediatek: change the argument "ddr" to "timing" mmc: mediatek: make cmd_ints_mask to const mmc: dt-bindings: update Mediatek MMC bindings mmc: core: Add DT bindings for eMMC hardware reset support mmc: omap_hsmmc: Enable omap_hsmmc for Keystone 2 mmc: sdhci-acpi: Add more ACPI HIDs for Intel controllers mmc: sdhci-pci: Add more PCI IDs for Intel controllers arm: lpc18xx_defconfig: remove CONFIG_MMC_DW_IDMAC arm: hisi_defconfig: remove CONFIG_MMC_DW_IDMAC arm: exynos_defconfig: remove CONFIG_MMC_DW_IDMAC arc: axs10x_defconfig: remove CONFIG_MMC_DW_IDMAC mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMAC ...
| * | mmc: dw_mmc: fix the wrong setting for UHS-DDR50 modeJaehoon Chung2015-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When card is running with DDR mode, dwmmc needs to set DDR_REG bit at UHS_REG register. Before this patch, dwmmc controller doesn't consider this. If this patch is not applied, CRC or other error shoulds be occurred. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: dw_mmc: fix the CardThreshold boundary at CardThrCtl registerJaehoon Chung2015-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to DesignWare DoC file, CardThreshold bit should be bit[27:16]. So it's correct to use (0xFFF << 16), not (0x1FFF << 16). Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: dw_mmc: NULL dereference in error messageDan Carpenter2015-10-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | The "host->dms->ch" pointer is NULL here so we can't use it to print the error message. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: pwrseq: Use highest priority for eMMC restart handlerJavier Martinez Canillas2015-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pwrseq_emmc driver does a eMMC card reset before a system reboot to allow broken or limited ROM boot-loaders (that don't have an eMMC reset logic) to be able to read the second stage from the eMMC. But this has to be called before a system reboot handler and while most of them use the priority 128, there are other restart handlers (such as the syscon-reboot one) that use a higher priority. So, use the highest priority to make sure that the eMMC hw is reset before a system reboot. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Tested-by: Markus Reichl <m.reichl@fivetechno.de> Tested-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: mediatek: add HS400 supportChaotian Jing2015-10-27
| | | | | | | | | | | | | | | | | | | | | add HS400 mode and tune support Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: mmc: extend the mmc_send_tuning()Chaotian Jing2015-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmc_execute_tuning() has already prepared the opcode, there is no need to prepare it again at mmc_send_tuning(), and, there is a BUG of mmc_send_tuning() to determine the opcode by bus width, assume eMMC was running at HS200, 4bit mode, then the mmc_send_tuning() will overwrite the opcode from CMD21 to CMD19, then got error. in addition, extend an argument of "cmd_error" to allow getting if there was cmd error when tune response. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> [Ulf: Rebased patch] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: mediatek: add implement of ops->hw_reset()Chaotian Jing2015-10-27
| | | | | | | | | | | | | | | | | | | | | add implement of ops->hw_reset() for eMMC Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: mediatek: fix got GPD checksum error interrupt when data transferChaotian Jing2015-10-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | Even if we only use one gpd, we need alloc 2 gpd and make the gpd->next pointer to the second gpd, or may get gpd checksum error, this was checked by hardware Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: mediatek: change the argument "ddr" to "timing"Chaotian Jing2015-10-27
| | | | | | | | | | | | | | | | | | | | | | | | use the ios->timing directly is better It can reflect current timing and do settings by timing Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: mediatek: make cmd_ints_mask to constChaotian Jing2015-10-27
| | | | | | | | | | | | | | | | | | | | | | | | cmd_ints_mask and data_ints_mask are constant value, so make it to const Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: dt-bindings: update Mediatek MMC bindingsChaotian Jing2015-10-27
| | | | | | | | | | | | | | | | | | | | | Add 400Mhz clock source for HS400 mode Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: core: Add DT bindings for eMMC hardware reset supportChaotian Jing2015-10-27
| | | | | | | | | | | | | | | | | | | | | | | | Sometime only need set MMC_CAP_HW_RESET for one of MMC hosts, So set it in device tree is better. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: omap_hsmmc: Enable omap_hsmmc for Keystone 2Lokesh Vutla2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | Enable omap_hsmmc for Keystone 2 architecture which reuses the HSMMC IP found on OMAP platforms. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: sdhci-acpi: Add more ACPI HIDs for Intel controllersAdrian Hunter2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | Add ACPI HIDs for Intel host controllers including one supporting HS400. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: sdhci-pci: Add more PCI IDs for Intel controllersAdrian Hunter2015-10-26
| | | | | | | | | | | | | | | | | | | | | Add PCI IDs for Intel host controllers Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | arm: lpc18xx_defconfig: remove CONFIG_MMC_DW_IDMACShawn Lin2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | arm: hisi_defconfig: remove CONFIG_MMC_DW_IDMACShawn Lin2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | arm: exynos_defconfig: remove CONFIG_MMC_DW_IDMACShawn Lin2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | arc: axs10x_defconfig: remove CONFIG_MMC_DW_IDMACShawn Lin2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMACShawn Lin2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Govindraj Raja <govindraj.raja@imgtec.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | Documentation: synopsys-dw-mshc: add bindings for idmac and edmacShawn Lin2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | synopsys-dw-mshc supports three types of transfer mode. We add bindings and description for how to use them at runtime. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: dw_mmc: use macro for HCON register operationsShawn Lin2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add some macros for HCON register operations to make code more readable. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: dw_mmc: Add external dma interface supportShawn Lin2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DesignWare MMC Controller can supports two types of DMA mode: external dma and internal dma. We get a RK312x platform integrated dw_mmc and ARM pl330 dma controller. This patch add edmac ops to support these platforms. I've tested it on RK31xx platform with edmac mode and RK3288 platform with idmac mode. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: sdhci-of-esdhc: avoid writing power control registeryangbo lu2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | The eSDHC doesn't have a standard power control register, so when writing this register in stack we should do nothing to avoid incorrect operation. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | DT: mmc: sh_mmcif: document R8A7794 supportSergei Shtylyov2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | Renesas R8A7794 SoC also has the MMCIF controller. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | DT: mmc: sh_mmcif: fix "compatible" property textSergei Shtylyov2015-10-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "compatible" property text contradicts even the example given in the MMCIF binding document itself; moreover, the Renesas MMCIF driver only matches on the generic "compatible" string and doesn't look for the SoC specific strings at all. Thus describe "renesas,sh-mmcif" as a fallback value. Fixes: b4c27763d749 ("mmc: sh_mmcif: Document DT bindings") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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