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* watchdog: lantiq: access boot cause register through regmapHauke Mehrtens2017-09-04
| | | | | | | | | | | | | | | | | | | | | | | | This patch avoids accessing the function ltq_reset_cause() and directly accesses the register given over the syscon interface. The syscon interface will be implemented for the xway SoCs for the falcon SoCs the ltq_reset_cause() function never worked, because a wrong offset was used. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Guenter Roeck <linux@reck-us.net> Cc: martin.blumenstingl@googlemail.com Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17123/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mtd: lantiq-flash: drop check of boot selectHauke Mehrtens2017-09-04
| | | | | | | | | | | | | | | | | | | | | | | | Do not check which flash type the SoC was booted from before using this driver. Assume that the device tree is correct and use this driver when it was added to device tree. This also removes a build dependency to the SoC code. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Brian Norris <computersforpeace@gmail.com> Cc: martin.blumenstingl@googlemail.com Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17117/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: lantiq: Use of_platform_default_populate instead of __dt_register_busesMartin Blumenstingl2017-09-04
| | | | | | | | | | | | | | | | | | | | | This allows populating syscon devices which are using "simple-mfd" instead of "simple-bus". Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17116/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Let the core set struct irq_common_data affinityPaul Burton2017-09-04
| | | | | | | | | | | | | | | | | | | | gic_set_affinity() manually copies the provided cpumask to the struct irq_common_data affinity field, returning IRQ_SET_MASK_OK_NOCOPY in order to prevent the core code from doing that. We can instead simply let the core code do it for us, by returning IRQ_SET_MASK_OK instead of IRQ_SET_MASK_OK_NOCOPY & doing the copy ourselves. [ralf@linux-mips.org: Resolve merge conflict.] Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17056/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Use cpumask_first_and() in gic_set_affinity()Paul Burton2017-09-04
| | | | | | | | | | | | | | | | | | Currently in gic_set_affinity() we calculate a temporary cpumask holding the intersection of the provided cpumask & the CPUs that are online, then we call cpumask_first twice on it to find the first such CPU. Since we don't need the temporary cpumask for anything else & we only care about the first CPU that's both online & in the provided cpumask, we can instead use cpumask_first_and to find that CPU & drop the temporary mask. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17110/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Clean up mti, reserved-cpu-vectors handlingPaul Burton2017-09-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When parsing mti,reserved-cpu-vectors we generate a mask of all bits that have been declared reserved, the loop through starting from bit 2 to find one that isn't reserved (ie. is zero). This patch accomplishes the same task more simply by: - Inititialising the reserved mask to 0x3 (ie. the 2 software interrupts). This means we don't need to skip them later as the loop previously has. - Replacing the loop checking for zero bits with find_first_zero_bit, which fits our needs now that the 2 software interrupts are marked reserved. This requires that the type of reserved is changed to unsigned long so that it's suitable for use with bitmap functions. - Replacing the magic number 8 with the hamming weight of the ST0_IM field - ie. the number of bits that a MIPS CPU has for interrupt inputs. This is still a compile-time constant 8, but makes it clearer why it's 8. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17054/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Use pcpu_masks to avoid reading GIC_SH_MASK*Paul Burton2017-09-04
| | | | | | | | | | | | | | | | | | | | | | | This patch avoids the need to read the GIC_SH_MASK* registers when decoding shared interrupts by setting & clearing the interrupt's bit in the appropriate CPU's pcpu_masks entry when masking or unmasking the interrupt. This effectively means that whilst an interrupt is masked we clear its bit in all pcpu_masks, which causes gic_handle_shared_int() to ignore it on all CPUs without needing to check GIC_SH_MASK*. In essence, we add a little overhead to masking or unmasking interrupts but in return reduce the overhead of the far more common task of decoding interrupts. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17109/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Make pcpu_masks a per-cpu variablePaul Burton2017-09-04
| | | | | | | | | | | | | | Define the pcpu_masks variable using the kernel's standard per-cpu variable support, rather than an open-coded array of structs containing bitmaps. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17052/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Inline gic_basic_init()Paul Burton2017-09-04
| | | | | | | | | | | | | | | gic_basic_init() is now a fairly short function that is only called in one place. Inline it into gic_of_init() to help readability. [ralf@linux-mips.org: Resolved conflict.] Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17051/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Inline __gic_init()Paul Burton2017-09-04
| | | | | | | | | | | | | | | | | | | | The __gic_init() function is only called from gic_of_init() now that the non-DT path has been removed. In order to simplify the code & aid readability, fold __gic_init() into gic_of_init(). This provides us with the ability to return an error code, which __gic_init() was previously unable to do. As such the irq_domain_add_*() error paths are modified to print & return an error rather than panic(). [ralf@linux-mips.org: Resoled reject.] Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17050/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove linux/irqchip/mips-gic.hPaul Burton2017-09-04
| | | | | | | | | | | | The linux/irqchip/mips-gic.h header is no longer used. Remove it. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17049/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Remove unnecessary inclusions of linux/irqchip/mips-gic.hPaul Burton2017-09-04
| | | | | | | | | | | | | | linux/irqchip/mips-gic.h is included in a few files that don't actually use it at all. Remove these unnecessary inclusions in preparation for removing the header. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17048/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VDSO: Avoid use of linux/irqchip/mips-gic.hPaul Burton2017-09-04
| | | | | | | | | | | | | | | | | Our VDSO code makes use of macros from linux/irqchip/mips-gic.h to provide offsets to register values, but these are trivial offsets to the two 32 bit halves of a 64 bit value. Replace use of the macros with zero (ie. omit adding an offset) and the size of the low 32 bit of the value. This removes our need for linux/irqchip/mips-gic.h & prepares us for it to be removed. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17047/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Move gic_get_c0_*_int() to asm/mips-gic.hPaul Burton2017-09-04
| | | | | | | | | | | | | | | The linux/irqchip/mips-gic.h header is now almost empty. Move the declarations of gic_get_c0_compare_int(), gic_get_c0_perfcount_int() & gic_get_c0_fdc_int() to asm/mips-gic.h in order to close in on being able to delete the former header. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17046/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove gic_presentPaul Burton2017-09-04
| | | | | | | | | | | | | Nothing uses the global gic_present variable anymore; mips_gic_present() should be used instead. Remove the dead code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17045/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use mips_gic_present() in place of gic_presentPaul Burton2017-09-04
| | | | | | | | | | | | | | | | | In preparation for removing the gic_present global variable, switch to using the mips_gic_present() function instead. For the most part this is a straightforward substitution. In cases which previously wrapped the GIC case in an #ifdef CONFIG_MIPS_GIC that #ifdef has been removed, since mips_gic_present() will return a compile-time constant false allowing the affected code to be optimised out anyway. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17044/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove gic_init()Paul Burton2017-09-04
| | | | | | | | | | | | | All in-tree platforms now probe the GIC driver using device tree, and as such nothing calls gic_init() any longer. Remove the dead code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17043/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove __gic_irq_dispatch() forward declarationPaul Burton2017-09-04
| | | | | | | | | | | | | We provide a forward declaration of the __gic_irq_dispatch() function for no apparent reason. Remove it. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17042/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove gic_get_usm_range()Paul Burton2017-09-04
| | | | | | | | | | | | | | The MIPS VDSO code is no longer reliant upon the irqchip driver to provide the address of the GIC's user-visible section via gic_get_usm_range(). Remove the now-dead code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17041/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VDSO: Drop gic_get_usm_range() usagePaul Burton2017-09-04
| | | | | | | | | | | | | | | | | | We don't really need gic_get_usm_range() to abstract discovery of the address of the GIC user-visible section now that we have access to its base address globally. Switch to calculating it ourselves, which will allow us to stop requiring the irqchip driver to care about a counter exposed to userland for use via the VDSO. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17040/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Move various definitions to the driverPaul Burton2017-09-04
| | | | | | | | | | | | | | | | Move the definitions of macros used to convert between hardware IRQ numbers & shared or local interrupt numbers into the irqchip driver, which is all that should ever need to care about them. Remove GIC_CPU_TO_VEC_OFFSET() in the process since it's never used. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17039/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove GIC_CPU_INT* macrosPaul Burton2017-09-04
| | | | | | | | | | | | The GIC_CPU_INT* macros are never used. Remove the dead code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17038/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: GIC: Move GIC_LOCAL_INT_* to asm/mips-gic.hPaul Burton2017-09-04
| | | | | | | | | | | | | | | Move the definition of VP-local interrupts provided by the MIPS Global Interrupt Controller to the new asm/mips-gic.h header to be alongside the new accessor functions. Whilst at it, convert to an enum which lends itself more easily to expansion & documentation. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17037/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Convert remaining local reg access to new accessorsPaul Burton2017-09-04
| | | | | | | | | | | | | | | Convert the remaining accesses to registers in the GIC VP-local & VP-other register blocks to use the new accessor functions provided by asm/mips-gic.h, resulting in code which is often shorter & easier to read. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17036/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Convert local int mask access to new accessorsPaul Burton2017-09-04
| | | | | | | | | | | | | | Use the new accessor functions provided by asm/mips-gic.h to access masks controlling local interrupts, resulting in code which is often shorter & easier to read. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17035/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Convert remaining shared reg access to new accessorsPaul Burton2017-09-04
| | | | | | | | | | | | | | Convert the remaining accesses to registers in the GIC shared register block to use the new accessor functions provided by asm/mips-gic.h, resulting in code which is often shorter & easier to read. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17034/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove gic_map_to_vpe()Paul Burton2017-09-04
| | | | | | | | | | | | | | Remove the gic_map_to_vpe() function in favour of using the new write_gic_map_vp() accessor function which isn't any more complex to use & allows us to drop a level of abstraction. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17033/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove gic_map_to_pin()Paul Burton2017-09-04
| | | | | | | | | | | | | | Remove the gic_map_to_pin() function in favour of using the new write_gic_map_pin() accessor function which isn't any more complex to use & allows us to drop a level of abstraction. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17032/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove gic_set_dual_edge()Paul Burton2017-09-04
| | | | | | | | | | | | | | | | Remove the gic_set_dual_edge() function in favour of using the new change_gic_dual() accessor function which provides equivalent functionality. This also allows us to remove the gic_update_bits() function which gic_set_dual_edge() was the last user of, along with the GIC_INTR_OFS() & GIC_INTR_BIT() macros. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17031/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove gic_set_trigger()Paul Burton2017-09-04
| | | | | | | | | | | | | | Remove the gic_set_trigger() function in favour of using the new change_gic_trig() accessor function which provides equivalent functionality. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17030/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove gic_set_polarity()Paul Burton2017-09-04
| | | | | | | | | | | | | | Remove the gic_set_polarity() function in favour of using the new change_gic_pol() accessor function which provides equivalent functionality. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17029/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Drop gic_(re)set_mask() functionsPaul Burton2017-09-04
| | | | | | | | | | | | | | The gic_set_mask() & gic_reset_mask() functions are now no more convenient to call than the write_gic_smask() or write_gic_rmask() accessor functions. Remove the layer of abstraction. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17028/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Simplify gic_local_irq_domain_map()Paul Burton2017-09-04
| | | | | | | | | | | | | | | | | | | | Simplify gic_local_irq_domain_map() by: - Moving the check for invalid IRQs outside of the loop. - Moving the decision about whether to use gic_cpu_pin or timer_cpu_pin outside of the loop. - Using the new write_gic_vo_map() accessor function to avoid the need to handle each map register separately. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17027/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Simplify shared interrupt pending/mask readsPaul Burton2017-09-04
| | | | | | | | | | | | | | Simplify the reads of the bitmaps indicating pending & masked interrupts in gic_handle_shared_int() using the __ioread32_copy() & __ioread64_copy() helper functions. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17026/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add __ioread64_copyPaul Burton2017-09-04
| | | | | | | | | | | | | | | | | We currently have __ioread32_copy, __iowrite32_copy & __iowrite64_copy helpers in lib/iomap_copy.c. This patch adds __ioread64_copy to round out the set, allowing copies from I/O memory using 32 or 64 bit reads. [ralf@linux-mips.org: Changed to move all the code of this patch to be applied to arch/mips temporarily.] Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17025/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove gic_read_local_vp_id()Paul Burton2017-09-04
| | | | | | | | | | | | | Nothing needs gic_read_local_vp_id() any longer, so remove the dead code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17024/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: CPS: Read GIC_VL_IDENT directly, not via irqchip driverPaul Burton2017-09-04
| | | | | | | | | | | | | | | | Rather than calling the gic_read_local_vp_id() function from the GIC irqchip driver, call read_gic_vl_ident() to read the GIC_VL_IDENT register directly. This will allow us to remove gic_read_local_vp_id() from the irqchip driver in a further patch, since that driver doesn't actually care about the register's value. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17023/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: Remove counter access functionsPaul Burton2017-09-04
| | | | | | | | | | | | | The MIPS GIC clocksource driver is no longer using the accessor functions provided by the irqchip driver, so remove them. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17022/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Use new GIC accessor functionsPaul Burton2017-09-01
| | | | | | | | | Use the accessor functions provided by asm/mips-gic.h rather than calling functions provided by the GIC irqchip driver, in preparation for those non-IRQ-related functions being removed from the irqchip driver. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* clocksource: mips-gic-timer: Use new GIC accessor functionsPaul Burton2017-08-30
| | | | | | | | | | | | | | | | | Switch from calling functions exported by the GIC interrupt controller to using new accessors provided by asm/mips-gic.h. This will allow the counter-handling functionality to be removed from the interrupt controller driver, where it doesn't really belong, and also allow for inlining of the accesses to the GIC. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17021/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: GIC: Introduce asm/mips-gic.h with accessor functionsPaul Burton2017-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a new header providing accessor functions for the MIPS Global Interrupt Controller (GIC) mirroring those provided for the other 2 components of the MIPS Coherent Processing System (CPS) - the Coherence Manager (CM) & Cluster Power Controller (CPC). This header makes use of the new standardised CPS accessor macros where possible, but does require some custom accessors for cases where we have either a bit or a register per interrupt. A major advantage of this over the existing include/linux/irqchip/mips-gic.h definitions is that code performing accesses can become much simpler, for example this: gic_update_bits(GIC_REG(SHARED, GIC_SH_SET_TRIGGER) + GIC_INTR_OFS(intr), 1ul << GIC_INTR_BIT(intr), (unsigned long)trig << GIC_INTR_BIT(intr)); ...can become simply: change_gic_trig(intr, trig); The accessors handle 32 vs 64 bit in the same way as for CM & CPC code, which means that GIC code will also not need to worry about the access size in most cases. They are also accessible outside of drivers/irqchip/irq-mips-gic.c which will allow for simplification in the use of the non-interrupt portions of the GIC (eg. counters) which currently require the interrupt controller driver to expose helper functions for access. This patch doesn't change any existing code over to use the new accessors yet, since a wholesale change would be invasive & difficult to review. Instead follow-on patches will convert code piecemeal to use this new header. The one change to existing code is to rename gic_base to mips_gic_base & make it global, in order to fit in with the naming expected by the standardised CPS accessor macros. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17020/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* irqchip: mips-gic: SYNC after enabling GIC regionJames Hogan2017-08-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | A SYNC is required between enabling the GIC region and actually trying to use it, even if the first access is a read, otherwise its possible depending on the timing (and in my case depending on the precise alignment of certain kernel code) to hit CM bus errors on that first access. Add the SYNC straight after setting the GIC base. [paul.burton@imgtec.com: Changes later in this series increase our likelihood of hitting this by reducing the amount of code that runs between enabling the GIC & accessing it.] Fixes: a7057270c280 ("irqchip: mips-gic: Add device-tree support") Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17019/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Don't use dma_cache_sync to implement fd_cacheflushChristoph Hellwig2017-08-29
| | | | | | | | | | | | | | | | | | | | | | | | | The floppy drivers doesn't otherwise use the DMA API, so indirecting through it just for cache flushing in MIPS-specific code just call dma_cache_wback_inv directly. Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: iommu@lists.linux-foundation.org Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Michal Simek <monstr@monstr.eu> Cc: David Howells <dhowells@redhat.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Chris Zankel <chris@zankel.net> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: x86@kernel.org Cc: linux-mips@linux-mips.org Cc: linux-ia64@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-xtensa@linux-xtensa.org Cc: linux-sh@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17183/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: generic: Bump default NR_CPUS to 16Paul Burton2017-08-29
| | | | | | | | | | In generic_defconfig set CONFIG_NR_CPUS to 16 rather than 2, which is a rather too low limit for many modern day MIPS systems. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16949/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: generic: Don't explicitly disable CONFIG_USB_SUPPORTPaul Burton2017-08-29
| | | | | | | | | | | Leave CONFIG_USB_SUPPORT at its default, allowing board config fragments to make use of USB drivers without needing to override it & trigger warnings from merge_config.sh. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16948/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Make CONFIG_MIPS_MT_SMP default yPaul Burton2017-08-29
| | | | | | | | | | | | | | | | | | | | | | On systems that support MT ASE multithreading (ie. VPEs) we are very likely to want to include that support as default. Rather than setting it in various defconfigs, simply make CONFIG_MIPS_MT_SMP default y such that systems which select CONFIG_SYS_SUPPORTS_MULTITHREADING get it by default. As well as allowing us to remove the selection of CONFIG_MIPS_MT_SMP from various defconfigs, this also allows the generated generic defconfigs which derive from generic_defconfig to automatically gain support for MT ASE SMP when building for a suitable (pre-MIPSr6) ISA. For malta_kvm_guest_defconfig CONFIG_MIPS_MT_SMP is explicitly disabled since enabling SMP implicitly disables CONFIG_KVM_GUEST, which depends on CONFIG_BROKEN_ON_SMP. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16947/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Prevent direct use of generic_defconfigPaul Burton2017-08-29
| | | | | | | | | | | | | | | Using generic_defconfig directly is unlikely to be what a user actually wants to do - it doesn't specify any particular ISA revision & it doesn't enable any board or driver support, resulting in a largely useless kernel. Prevent users from using it directly, printing a helpful message to point them in the right direction if they attempt to. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16946/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: NI 169445: Only include in 32r2el kernelsPaul Burton2017-08-29
| | | | | | | | | | | | | | | | | | | The NI 169445 board uses a little endian MIPS32r2 CPU, and therefore including board support in kernels that are unable to run on such a CPU is pointless. Specify requirements in the board config fragment that cause the NI 169445 board support to only be included in generic kernels that target little endian MIPS32r2 CPUs. For example, NI 169445 support will be included when configuring using 32r2el_defconfig but not when using 64r6_defconfig. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Nathan Sullivan <nathan.sullivan@ni.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16945/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SEAD-3: Only include in 32 bit kernels by defaultPaul Burton2017-08-29
| | | | | | | | | | | | | | | The MIPS SEAD-3 development board has only ever been used with 32 bit CPUs, so including support for it in 64 bit kernels is wasteful since those kernels will never run on a SEAD-3. Specify a requirement in the SEAD-3 board config fragment that ensures the board support is only included in 32 bit kernels, by checking that CONFIG_32BIT=y. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16944/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: generic: Allow filtering enabled boards by requirementsPaul Burton2017-08-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Up until now when configuring a generic kernel all board config fragments have been merged by default unless boards are explicitly selected by the user specifying BOARDS=. In many cases this is sub-optimal, since some boards don't make sense to include in some kernels. For example the MIPS SEAD-3 development board has only ever been used with 32 bit CPUs, so including support for the SEAD-3 in a 64 bit kernel is wasteful. This patch introduces support for specifying requirements in board config fragments, using comments formatted like so: # require CONFIG_BLA=y For example the SEAD-3 board could specify that it should only be merged for 32 bit kernels using a requirement line like the following: # require CONFIG_32BIT=y A new generic-board-config.sh script is introduced to handle selecting the board config fragments to merge & calling merge_config.sh to merge them. In order to allow requirements to check Kconfig symbols that are implicitly selected, rather than explicitly specified by generic_defconfig or one of the ISA config fragments, an intermediate .config file is saved & used as a reference when checking requirements. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16943/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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