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* Merge branch 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2017-10-19
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Last set of features for 4.15. Highlights: - Add a bo flag to allow buffers to opt out of implicit sync - Add ctx priority setting interface - Lots more powerplay cleanups - Start to plumb through vram lost infrastructure for gpu reset - ttm support for huge pages - misc cleanups and bug fixes * 'drm-next-4.15' of git://people.freedesktop.org/~agd5f/linux: (73 commits) drm/amd/powerplay: Place the constant on the right side of the test drm/amd/powerplay: Remove useless variable drm/amd/powerplay: Don't cast kzalloc() return value drm/amdgpu: allow GTT overcommit during bind drm/amdgpu: linear validate first then bind to GART drm/amd/pp: Fix overflow when setup decf/pix/disp dpm table. drm/amd/pp: thermal control not enabled on vega10. drm/amdgpu: busywait KIQ register accessing (v4) drm/amdgpu: report more amdgpu_fence_info drm/amdgpu:don't check soft_reset for sriov drm/amdgpu:fix duplicated setting job's vram_lost drm/amdgpu:reduce wb to 512 slot drm/amdgpu: fix regresstion on SR-IOV gpu reset failed drm/amd/powerplay: Tidy up cz_dpm_powerup_vce() drm/amd/powerplay: Tidy up cz_dpm_powerdown_vce() drm/amd/powerplay: Tidy up cz_dpm_update_vce_dpm() drm/amd/powerplay: Tidy up cz_dpm_update_uvd_dpm() drm/amd/powerplay: Tidy up cz_dpm_powerup_uvd() drm/amd/powerplay: Tidy up cz_dpm_powerdown_uvd() drm/amd/powerplay: Tidy up cz_start_dpm() ...
| * drm/amd/powerplay: Place the constant on the right side of the testGeorgiana Chelu2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | Move the constant on the right side of the comparison in order to make the code easier to read. Issue found by checkpatch script: * WARNING: Comparisons should place the constant on the right side of the test Signed-off-by: Georgiana Chelu <georgiana.chelu93@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: Remove useless variableGeorgiana Chelu2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The result variable is initialized at the beginning of the function, but its value does not change during the function execution. Thus, remove the variable and return the SUCCESS value, which is 0. Issue found by coccinelle script: * Unneeded variable: "result". Return "0" Path to the cocci script: scripts/coccinelle/misc/returnvar.cocci Signed-off-by: Georgiana Chelu <georgiana.chelu93@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: Don't cast kzalloc() return valueGeorgiana Chelu2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kzalloc function returns a void pointer and the assignment operator converts it to the type of pointer it is assigned to. Therefore, there is no need to cast. Issue found by alloc_cast.cocci: * WARNING: casting value returned by memory allocation function to <struct type> is useless. Path to the cocci script: scripts/coccinelle/api/alloc/alloc_cast.cocci Signed-off-by: Georgiana Chelu <georgiana.chelu93@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: allow GTT overcommit during bindChristian König2017-10-19
| | | | | | | | | | | | | | | | | | While binding BOs to GART we need to allow a bit overcommit in the GTT domain. Otherwise we can never use the full GART space when GART size=GTT size. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: linear validate first then bind to GARTChristian König2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | For VM emulation for old UVD/VCE we need to validate the BO with linear VRAM flag set first and then eventually bind it to GART. Validating with linear VRAM flag set can move the BO to GART making UVD/VCE read/write from an unbound GART BO. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> CC: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/pp: Fix overflow when setup decf/pix/disp dpm table.Rex Zhu2017-10-19
| | | | | | | | | | | | | | | | | | Clear the count in the single table setup function to avoid missing any tables. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/pp: thermal control not enabled on vega10.Rex Zhu2017-10-19
| | | | | | | | | | | | | | | | | | | | regression issue. caused by "f12f9f5e5d455edebc01" forget to set start_thermal_controller function point. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: busywait KIQ register accessing (v4)pding2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register accessing is performed when IRQ is disabled. Never sleep in this function. Known issue: dead sleep in many use cases of index/data registers. v2: - wrap polling fence functions. - don't trigger IRQ for polling in case of wrongly fence signal. v3: - handle wrap round gracefully. - add comments for polling function v4: - don't return negative timeout confused with error code Signed-off-by: pding <Pixel.Ding@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: report more amdgpu_fence_infopding2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only for GFX ring. This can help checking MCBP feature. The fence at the end of the frame will indicate the completion status. If the frame completed normally, the fence is written to the address given in the EVENT_WRITE_EOP packet. If preemption occurred in the previous IB the address is adjusted by 2 DWs. If work submitted in the frame was reset before completion, the fence address is adjusted by four DWs. In the case that preemption occurred, and before preemption completed a reset was initiated, the address will be adjusted with six DWs Signed-off-by: pding <Pixel.Ding@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:don't check soft_reset for sriovMonk Liu2017-10-19
| | | | | | | | | | | | Signed-off-by: Monk Liu <Monk.Liu@amd.com> Ack-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:fix duplicated setting job's vram_lostMonk Liu2017-10-19
| | | | | | | | | | | | Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu:reduce wb to 512 slotMonk Liu2017-10-19
| | | | | | | | | | | | | | | | | | | | with current WB usage we only use 57 slots, so 512 is extreamly sufficient, and reduce to 512 can make WB fit into one page. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fix regresstion on SR-IOV gpu reset failedRex Zhu2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | fw ucode is corrupted after vf flr by PSP so ucode_init() is a must in psp_hw_init othewise KIQ/KCQ enabling will fail Revert "drm/amdgpu: refine code delete duplicated error handling" This reverts commit e57b87ff828f95efe992468e6d18c2c059b27aa9. Revert "drm/amdgpu: move amdgpu_ucode_init_bo to amdgpu_device.c" This reverts commit 815b8f8595148d06a64d2ce4282e8e80dfcb02f1. Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: Tidy up cz_dpm_powerup_vce()Tom St Denis2017-10-19
| | | | | | | | | | | | | | | | Use PP_CAP macro. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: Tidy up cz_dpm_powerdown_vce()Tom St Denis2017-10-19
| | | | | | | | | | | | | | | | Use PP_CAP macro. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: Tidy up cz_dpm_update_vce_dpm()Tom St Denis2017-10-19
| | | | | | | | | | | | | | | | Use PP_CAP and tidy up indentation. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: Tidy up cz_dpm_update_uvd_dpm()Tom St Denis2017-10-19
| | | | | | | | | | | | | | | | Use PP_CAP and tidy up indentation. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: Tidy up cz_dpm_powerup_uvd()Tom St Denis2017-10-19
| | | | | | | | | | | | | | | | Use PP_CAP and simplify enable/disable logic. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: Tidy up cz_dpm_powerdown_uvd()Tom St Denis2017-10-19
| | | | | | | | | | | | | | | | Use PP_CAP and tidy up indentation. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/powerplay: Tidy up cz_start_dpm()Tom St Denis2017-10-19
| | | | | | | | | | | | | | | | Remove unused variables. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: use ARRAY_SIZEJérémy Lefaure2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the ARRAY_SIZE macro improves the readability of the code. Found with Coccinelle with the following semantic patch: @r depends on (org || report)@ type T; T[] E; position p; @@ ( (sizeof(E)@p /sizeof(*E)) | (sizeof(E)@p /sizeof(E[...])) | (sizeof(E)@p /sizeof(T)) ) Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: reserve root PD while releasing itChristian König2017-10-19
| | | | | | | | | | | | | | | | | | | | Otherwise somebody could try to evict it at the same time and try to use half torn down structures. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/ttm: fix the fix for huge compound pagesChristian König2017-10-19
| | | | | | | | | | | | | | | | | | We don't use compound pages at the moment. Take this into account when freeing them. Signed-off-by: Christian König <christian.koenig@amd.comd> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: bump version for vram lost counter query (v2)Alex Deucher2017-10-19
| | | | | | | | | | | | | | | | v2: vram -> VRAM in comment Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: minor CS optimizationChristian König2017-10-19
| | | | | | | | | | | | | | | | We only need to loop over all IBs for old UVD/VCE command stream patching. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/sched: fix job tear down order v2Christian König2017-10-19
| | | | | | | | | | | | | | | | | | | | | | Move the trace before we signal the scheduler fence and drop the scheduler fence reference directly before we free the job. v2: keep extra s_fence reference Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Liu, Monk <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Add amdgpu_find_mm_node()Harish Kasiviswanathan2017-10-19
| | | | | | | | | | | | | | | | | | Replace some commonly repeated code with a function. v2: Use amdgpu_find_mm_node() in amdgpu_ttm_io_mem_pfn() Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Refactor amdgpu_move_blitHarish Kasiviswanathan2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add more generic function amdgpu_copy_ttm_mem_to_mem() that supports arbitrary copy size, offsets and two BOs (source & dest.). This is useful for KFD Cross Memory Attach feature where data needs to be copied from BOs from different processes v2: Add struct amdgpu_copy_mem and changed amdgpu_copy_ttm_mem_to_mem() function parameters to use the struct v3: Minor function name change Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Fix extra call to amdgpu_ctx_put.Andrey Grodzovsky2017-10-19
| | | | | | | | | | | | | | | | | | | | | | In amdgpu_cs_parser_init() in case of error handling amdgpu_ctx_put() is called without setting p->ctx to NULL after that, later amdgpu_cs_parser_fini() also calls amdgpu_ctx_put() again and mess up the reference count. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/ttm: Fix unused variables with huge page supportTom St Denis2017-10-19
| | | | | | | | | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: add VRAM lost queryChristian König2017-10-19
| | | | | | | | | | | | | | | | Allows userspace to figure out if VRAM was lost. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: set -ECANCELED when dropping jobsChristian König2017-10-19
| | | | | | | | | | | | | | | | And return from the wait functions the fence error code. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: move the VRAM lost counter per contextChristian König2017-10-19
| | | | | | | | | | | | | | | | | | Instead of per device track the VRAM lost per context and return ECANCELED instead of ENODEV. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: keep copy of VRAM lost counter in jobChristian König2017-10-19
| | | | | | | | | | | | | | | | Instead of reading the current counter from fpriv. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: partial revert VRAM lost handling v2Christian König2017-10-19
| | | | | | | | | | | | | | | | | | Keep blocking the CS, but revert everything else. Mapping BOs and info IOCTL are harmless and can still happen even when VRAM content ist lost. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/ttm: add transparent huge page support for wc or uc allocations v2Christian König2017-10-19
| | | | | | | | | | | | | | | | | | | | Add a new huge page pool and try to allocate from it when it makes sense. v2: avoid compound pages for now Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/ttm: move more logic into ttm_page_pool_get_pagesChristian König2017-10-19
| | | | | | | | | | | | | | | | Make it easier to add huge page pool. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/ttm: add transparent huge page support for cached allocations v2Christian König2017-10-19
| | | | | | | | | | | | | | | | | | | | | | Try to allocate huge pages when it makes sense. v2: avoid compound pages for now Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/ttm: don't use compound pages for nowChristian König2017-10-19
| | | | | | | | | | | | | | | | | | We need to figure out first how to correctly map them into the CPU page tables. bug: https://bugs.freedesktop.org/show_bug.cgi?id=103138 Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: correct reference clock value on vega10Ken Wang2017-10-19
| | | | | | | | | | | | | | | | | | Old value from bringup was wrong. Cc: stable@vger.kernel.org Signed-off-by: Ken Wang <Ken.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: SR-IOV data exchange between PF&VFHorace Chen2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SR-IOV need to exchange some data between PF&VF through shared VRAM PF will copy some necessary firmware and information to the shared VRAM. It also requires some information from VF. PF will send a key through mailbox2 to help guest calculate checksum so that it can verify whether the data is correct. So check the data on the specified offset of the shared VRAM, if the checksum is right, read values from it and write some VF information next to the data from PF. Signed-off-by: Horace Chen <horace.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Move old fence waiting before reservation lock is aquired v2Andrey Grodzovsky2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | Helps avoiding deadlock during GPU reset. Added mutex to amdgpu_ctx to preserve order of fences on a ring. v2: Put waiting logic in a function in a seperate function in amdgpu_ctx.c Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Refactor amdgpu_cs_ib_vm_chunk and amdgpu_cs_ib_fill.Andrey Grodzovsky2017-10-19
| | | | | | | | | | | | | | | | | | | | This enables old fence waiting before reservation lock is aquired which in turn is part of a bigger solution to deadlock happening when gpu reset with VRAM recovery accures during intensive rendering. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: make function uvd_v6_0_enc_get_destroy_msg staticColin Ian King2017-10-19
| | | | | | | | | | | | | | | | | | | | | | | | | | The function uvd_v6_0_enc_get_destroy_msg is local to the source and does not need to be in global scope, so make it static. Cleans up sparse warning: symbol 'uvd_v6_0_enc_get_destroy_msg' was not declared. Should it be static? Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/pp: remove polaris10_smc/smumgr split.Rex Zhu2017-10-19
| | | | | | | | | | | | | | | | | | | | move functions in polaris_smc.c to polaris10_smumgr.c and make all functions in polaris10_smumgr.c static. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/pp: remove tonga_smc/smumgr split.Rex Zhu2017-10-19
| | | | | | | | | | | | | | | | | | move functions in tonga_smc.c to tonga_smumgr.c and make all functions in tonga_smumgr.c static. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/pp: remove iceland_smc/smumgr split.Rex Zhu2017-10-19
| | | | | | | | | | | | | | | | | | move functions in iceland_smc.c to iceland_smumgr.c and make all functions in iceland_smumgr.c static. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/pp: remove fiji_smc/smumgr split.Rex Zhu2017-10-19
| | | | | | | | | | | | | | | | | | make all functions in fiji_smumgr.c static and exported by pp_smumgr_func table. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/pp: rename ci_smc.c to ci_smumgr.cRex Zhu2017-10-19
| | | | | | | | | | | | | | | | for consistency. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-26 20:00:14 -0400