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* kvm/x86: Hyper-V HV_X64_MSR_VP_INDEX export for QEMU.Andrey Smetanin2015-10-01
| | | | | | | | | | | | | | | | Insert Hyper-V HV_X64_MSR_VP_INDEX into msr's emulated list, so QEMU can set Hyper-V features cpuid HV_X64_MSR_VP_INDEX_AVAILABLE bit correctly. KVM emulation part is in place already. Necessary to support loading of winhv.sys in guest, which in turn is required to support Windows VMBus. Signed-off-by: Andrey Smetanin <asmetanin@virtuozzo.com> Reviewed-by: Roman Kagan <rkagan@virtuozzo.com> Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Gleb Natapov <gleb@kernel.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* kvm/x86: Hyper-V HV_X64_MSR_RESET msrAndrey Smetanin2015-10-01
| | | | | | | | | | | | | | | HV_X64_MSR_RESET msr is used by Hyper-V based Windows guest to reset guest VM by hypervisor. Necessary to support loading of winhv.sys in guest, which in turn is required to support Windows VMBus. Signed-off-by: Andrey Smetanin <asmetanin@virtuozzo.com> Reviewed-by: Roman Kagan <rkagan@virtuozzo.com> Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Gleb Natapov <gleb@kernel.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* kvm: add capability for any-length ioeventfdsJason Wang2015-10-01
| | | | | | | Cc: Gleb Natapov <gleb@kernel.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* kvm: add tracepoint for fast mmioJason Wang2015-10-01
| | | | | | | Cc: Gleb Natapov <gleb@kernel.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* kvm: use kmalloc() instead of kzalloc() during iodev register/unregisterJason Wang2015-10-01
| | | | | | | | | | | All fields of kvm_io_range were initialized or copied explicitly afterwards. So switch to use kmalloc(). Cc: Gleb Natapov <gleb@kernel.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* KVM: x86: Add support for local interrupt requests from userspaceSteve Rutherford2015-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to enable userspace PIC support, the userspace PIC needs to be able to inject local interrupts even when the APICs are in the kernel. KVM_INTERRUPT now supports sending local interrupts to an APIC when APICs are in the kernel. The ready_for_interrupt_request flag is now only set when the CPU/APIC will immediately accept and inject an interrupt (i.e. APIC has not masked the PIC). When the PIC wishes to initiate an INTA cycle with, say, CPU0, it kicks CPU0 out of the guest, and renedezvous with CPU0 once it arrives in userspace. When the CPU/APIC unmasks the PIC, a KVM_EXIT_IRQ_WINDOW_OPEN is triggered, so that userspace has a chance to inject a PIC interrupt if it had been pending. Overall, this design can lead to a small number of spurious userspace renedezvous. In particular, whenever the PIC transistions from low to high while it is masked and whenever the PIC becomes unmasked while it is low. Note: this does not buffer more than one local interrupt in the kernel, so the VMM needs to enter the guest in order to complete interrupt injection before injecting an additional interrupt. Compiles for x86. Can pass the KVM Unit Tests. Signed-off-by: Steve Rutherford <srutherford@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* KVM: x86: Add EOI exit bitmap inferenceSteve Rutherford2015-10-01
| | | | | | | | | | | | | | | | | | | | | | | In order to support a userspace IOAPIC interacting with an in kernel APIC, the EOI exit bitmaps need to be configurable. If the IOAPIC is in userspace (i.e. the irqchip has been split), the EOI exit bitmaps will be set whenever the GSI Routes are configured. In particular, for the low MSI routes are reservable for userspace IOAPICs. For these MSI routes, the EOI Exit bit corresponding to the destination vector of the route will be set for the destination VCPU. The intention is for the userspace IOAPICs to use the reservable MSI routes to inject interrupts into the guest. This is a slight abuse of the notion of an MSI Route, given that MSIs classically bypass the IOAPIC. It might be worthwhile to add an additional route type to improve clarity. Compile tested for Intel x86. Signed-off-by: Steve Rutherford <srutherford@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* KVM: x86: Add KVM exit for IOAPIC EOIsSteve Rutherford2015-10-01
| | | | | | | | | | | | | | | | | | | | Adds KVM_EXIT_IOAPIC_EOI which allows the kernel to EOI level-triggered IOAPIC interrupts. Uses a per VCPU exit bitmap to decide whether or not the IOAPIC needs to be informed (which is identical to the EOI_EXIT_BITMAP field used by modern x86 processors, but can also be used to elide kvm IOAPIC EOI exits on older processors). [Note: A prototype using ResampleFDs found that decoupling the EOI from the VCPU's thread made it possible for the VCPU to not see a recent EOI after reentering the guest. This does not match real hardware.] Compile tested for Intel x86. Signed-off-by: Steve Rutherford <srutherford@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* KVM: x86: Split the APIC from the rest of IRQCHIP.Steve Rutherford2015-10-01
| | | | | | | | | | | | | | | | First patch in a series which enables the relocation of the PIC/IOAPIC to userspace. Adds capability KVM_CAP_SPLIT_IRQCHIP; KVM_CAP_SPLIT_IRQCHIP enables the construction of LAPICs without the rest of the irqchip. Compile tested for x86. Signed-off-by: Steve Rutherford <srutherford@google.com> Suggested-by: Andrew Honig <ahonig@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* KVM: x86: unify handling of interrupt windowPaolo Bonzini2015-10-01
| | | | | | | | | | | | | | The interrupt window is currently checked twice, once in vmx.c/svm.c and once in dm_request_for_irq_injection. The only difference is the extra check for kvm_arch_interrupt_allowed in dm_request_for_irq_injection, and the different return value (EINTR/KVM_EXIT_INTR for vmx.c/svm.c vs. 0/KVM_EXIT_IRQ_WINDOW_OPEN for dm_request_for_irq_injection). However, dm_request_for_irq_injection is basically dead code! Revive it by removing the checks in vmx.c and svm.c's vmexit handlers, and fixing the returned values for the dm_request_for_irq_injection case. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* KVM: x86: introduce lapic_in_kernelPaolo Bonzini2015-10-01
| | | | | | | | Avoid pointer chasing and memory barriers, and simplify the code when split irqchip (LAPIC in kernel, IOAPIC/PIC in userspace) is introduced. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* KVM: x86: replace vm_has_apicv hook with cpu_uses_apicvPaolo Bonzini2015-10-01
| | | | | | This will avoid an unnecessary trip to ->kvm and from there to the VPIC. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* KVM: x86: store IOAPIC-handled vectors in each VCPUPaolo Bonzini2015-10-01
| | | | | | | | | | | | | | | We can reuse the algorithm that computes the EOI exit bitmap to figure out which vectors are handled by the IOAPIC. The only difference between the two is for edge-triggered interrupts other than IRQ8 that have no notifiers active; however, the IOAPIC does not have to do anything special for these interrupts anyway. This again limits the interactions between the IOAPIC and the LAPIC, making it easier to move the former to userspace. Inspired by a patch from Steve Rutherford. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* KVM: x86: set TMR when the interrupt is acceptedPaolo Bonzini2015-10-01
| | | | | | | Do not compute TMR in advance. Instead, set the TMR just before the interrupt is accepted into the IRR. This limits the coupling between IOAPIC and LAPIC. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tools lib traceevent: update KVM pluginPaolo Bonzini2015-10-01
| | | | | | | The format of the role word has changed through the years and the plugin was never updated; some VMX exit reasons were missing too. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Merge branch 'x86/for-kvm' of ↵Paolo Bonzini2015-10-01
|\ | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into HEAD This merges a cleanup of asm/apic.h, which is needed by the KVM patches to support VT-d posted interrupts. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * x86/x2apic: Make stub functions available even if !CONFIG_X86_LOCAL_APICPaolo Bonzini2015-09-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some CONFIG_X86_X2APIC functions, especially x2apic_enabled(), are not declared if !CONFIG_X86_LOCAL_APIC. However, the same stubs that work for !CONFIG_X86_X2APIC are okay even if there is no local APIC support at all. Avoid the introduction of #ifdefs by moving the x2apic declarations completely outside the CONFIG_X86_LOCAL_APIC block. (Unfortunately, diff generation messes up the actual change that this patch makes). There is no semantic change because CONFIG_X86_X2APIC depends on CONFIG_X86_LOCAL_APIC. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Cc: Feng Wu <feng.wu@intel.com> Link: http://lkml.kernel.org/r/1443435991-35750-1-git-send-email-pbonzini@redhat.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | Use WARN_ON_ONCE for missing X86_FEATURE_NRIPSDirk Müller2015-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cpu feature flags are not ever going to change, so warning everytime can cause a lot of kernel log spam (in our case more than 10GB/hour). The warning seems to only occur when nested virtualization is enabled, so it's probably triggered by a KVM bug. This is a sensible and safe change anyway, and the KVM bug fix might not be suitable for stable releases anyway. Cc: stable@vger.kernel.org Signed-off-by: Dirk Mueller <dmueller@suse.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | Update KVM homepage UrlDirk Müller2015-10-01
| | | | | | | | | | | | | | | | The old one appears to be a generic catch all page, which is unhelpful. Signed-off-by: Dirk Mueller <dmueller@suse.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | Revert "KVM: SVM: use NPT page attributes"Paolo Bonzini2015-10-01
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 3c2e7f7de3240216042b61073803b61b9b3cfb22. Initializing the mapping from MTRR to PAT values was reported to fail nondeterministically, and it also caused extremely slow boot (due to caching getting disabled---bug 103321) with assigned devices. Reported-by: Markus Trippelsdorf <markus@trippelsdorf.de> Reported-by: Sebastian Schuette <dracon@ewetel.net> Cc: stable@vger.kernel.org # 4.2+ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | Revert "KVM: svm: handle KVM_X86_QUIRK_CD_NW_CLEARED in svm_get_mt_mask"Paolo Bonzini2015-10-01
| | | | | | | | | | | | | | | | This reverts commit 5492830370171b6a4ede8a3bfba687a8d0f25fa5. It builds on the commit that is being reverted next. Cc: stable@vger.kernel.org # 4.2+ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | Revert "KVM: SVM: Sync g_pat with guest-written PAT value"Paolo Bonzini2015-10-01
| | | | | | | | | | | | | | | | This reverts commit e098223b789b4a618dacd79e5e0dad4a9d5018d1, which has a dependency on other commits being reverted. Cc: stable@vger.kernel.org # 4.2+ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | Revert "KVM: x86: apply guest MTRR virtualization on host reserved pages"Paolo Bonzini2015-10-01
| | | | | | | | | | | | | | | | | | This reverts commit fd717f11015f673487ffc826e59b2bad69d20fe5. It was reported to cause Machine Check Exceptions (bug 104091). Reported-by: harn-solo@gmx.de Cc: stable@vger.kernel.org # 4.2+ Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | Revert "KVM: x86: zero kvmclock_offset when vcpu0 initializes kvmclock ↵Radim Krčmář2015-09-28
|/ | | | | | | | | | | | | | | | | system MSR" Shifting pvclock_vcpu_time_info.system_time on write to KVM system time MSR is a change of ABI. Probably only 2.6.16 based SLES 10 breaks due to its custom enhancements to kvmclock, but KVM never declared the MSR only for one-shot initialization. (Doc says that only one write is needed.) This reverts commit b7e60c5aedd2b63f16ef06fde4f81ca032211bc5. And adds a note to the definition of PVCLOCK_COUNTS_FROM_ZERO. Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Acked-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Linux 4.3-rc3Linus Torvalds2015-09-27
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* Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds2015-09-27
|\ | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Thomas Gleixner: "Two bugfixes from Andy addressing at least some of the subtle NMI related wreckage which has been reported by Sasha Levin" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/nmi/64: Fix a paravirt stack-clobbering bug in the NMI code x86/paravirt: Replace the paravirt nop with a bona fide empty function
| * x86/nmi/64: Fix a paravirt stack-clobbering bug in the NMI codeAndy Lutomirski2015-09-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NMI entry code that switches to the normal kernel stack needs to be very careful not to clobber any extra stack slots on the NMI stack. The code is fine under the assumption that SWAPGS is just a normal instruction, but that assumption isn't really true. Use SWAPGS_UNSAFE_STACK instead. This is part of a fix for some random crashes that Sasha saw. Fixes: 9b6e6a8334d5 ("x86/nmi/64: Switch stacks on userspace NMI entry") Reported-and-tested-by: Sasha Levin <sasha.levin@oracle.com> Signed-off-by: Andy Lutomirski <luto@kernel.org> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/974bc40edffdb5c2950a5c4977f821a446b76178.1442791737.git.luto@kernel.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * x86/paravirt: Replace the paravirt nop with a bona fide empty functionAndy Lutomirski2015-09-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PARAVIRT_ADJUST_EXCEPTION_FRAME generates this code (using nmi as an example, trimmed for readability): ff 15 00 00 00 00 callq *0x0(%rip) # 2796 <nmi+0x6> 2792: R_X86_64_PC32 pv_irq_ops+0x2c That's a call through a function pointer to regular C function that does nothing on native boots, but that function isn't protected against kprobes, isn't marked notrace, and is certainly not guaranteed to preserve any registers if the compiler is feeling perverse. This is bad news for a CLBR_NONE operation. Of course, if everything works correctly, once paravirt ops are patched, it gets nopped out, but what if we hit this code before paravirt ops are patched in? This can potentially cause breakage that is very difficult to debug. A more subtle failure is possible here, too: if _paravirt_nop uses the stack at all (even just to push RBP), it will overwrite the "NMI executing" variable if it's called in the NMI prologue. The Xen case, perhaps surprisingly, is fine, because it's already written in asm. Fix all of the cases that default to paravirt_nop (including adjust_exception_frame) with a big hammer: replace paravirt_nop with an asm function that is just a ret instruction. The Xen case may have other problems, so document them. This is part of a fix for some random crashes that Sasha saw. Reported-and-tested-by: Sasha Levin <sasha.levin@oracle.com> Signed-off-by: Andy Lutomirski <luto@kernel.org> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/8f5d2ba295f9d73751c33d97fda03e0495d9ade0.1442791737.git.luto@kernel.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | Merge branch 'irq-urgent-for-linus' of ↵Linus Torvalds2015-09-27
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fix from Thomass Gleixner: "A bugfix for the atmel aic5 irq chip driver which caches the wrong data and thereby breaking resume" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/atmel-aic5: Use per chip mask caches in mask/unmask()
| * | irqchip/atmel-aic5: Use per chip mask caches in mask/unmask()Ludovic Desroches2015-09-22
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When masking/unmasking interrupts, mask_cache is updated and used later for suspend/resume. Unfortunately, it always was the mask_cache associated with the first irq chip which was updated. So when performing resume, only irqs 0-31 could be enabled. Fixes: b1479ebb7720 ("irqchip: atmel-aic: Add atmel AIC/AIC5 drivers") Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Cc: <sasha.levin@oracle.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <nicolas.ferre@atmel.com> Cc: <alexandre.belloni@free-electrons.com> Cc: <boris.brezillon@free-electrons.com> Cc: <Wenyou.Yang@atmel.com> Cc: <jason@lakedaemon.net> Cc: <marc.zyngier@arm.com> Cc: stable@vger.kernel.org #3.18 Link: http://lkml.kernel.org/r/1442843173-2390-1-git-send-email-ludovic.desroches@atmel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds2015-09-27
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "Just two fixes: wire up the new system calls added during the last merge window, and fix another user access site" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: alignment: fix alignment handling for uaccess changes ARM: wire up new syscalls
| * | ARM: alignment: fix alignment handling for uaccess changesRussell King2015-09-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Jonathan Liu reports that the recent addition of CPU_SW_DOMAIN_PAN causes wpa_supplicant to die due to the following kernel oops: Unhandled fault: page domain fault (0x81b) at 0x001017a2 pgd = ee1b8000 [001017a2] *pgd=6ebee831, *pte=6c35475f, *ppte=6c354c7f Internal error: : 81b [#1] SMP ARM Modules linked in: rt2800usb rt2x00usb rt2800librt2x00lib crc_ccitt mac80211 CPU: 1 PID: 202 Comm: wpa_supplicant Not tainted 4.3.0-rc2 #1 Hardware name: Allwinner sun7i (A20) Family task: ec872f80 ti: ee364000 task.ti: ee364000 PC is at do_alignment_ldmstm+0x1d4/0x238 LR is at 0x0 pc : [<c001d1d8>] lr : [<00000000>] psr: 600c0113 sp : ee365e18 ip : 00000000 fp : 00000002 r10: 001017a2 r9 : 00000002 r8 : 001017aa r7 : ee365fb0 r6 : e8820018 r5 : 001017a2 r4 : 00000003 r3 : d49e30e0 r2 : 00000000 r1 : ee365fbc r0 : 00000000 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none[ 34.393106] Control: 10c5387d Table: 6e1b806a DAC: 00000051 Process wpa_supplicant (pid: 202, stack limit = 0xee364210) Stack: (0xee365e18 to 0xee366000) ... [<c001d1d8>] (do_alignment_ldmstm) from [<c001d510>] (do_alignment+0x1f0/0x904) [<c001d510>] (do_alignment) from [<c00092a0>] (do_DataAbort+0x38/0xb4) [<c00092a0>] (do_DataAbort) from [<c0013d7c>] (__dabt_usr+0x3c/0x40) Exception stack(0xee365fb0 to 0xee365ff8) 5fa0: 00000000 56c728c0 001017a2 d49e30e0 5fc0: 775448d2 597d4e74 00200800 7a9e1625 00802001 00000021 b6deec84 00000100 5fe0: 08020200 be9f4f20 0c0b0d0a b6d9b3e0 600c0010 ffffffff Code: e1a0a005 e1a0000c 1affffe8 e5913000 (e4ea3001) ---[ end trace 0acd3882fcfdf9dd ]--- This is caused by the alignment handler not being fixed up for the uaccess changes, and userspace issuing an unaligned LDM instruction. So, fix the problem by adding the necessary fixups. Reported-by: Jonathan Liu <net147@gmail.com> Tested-by: Jonathan Liu <net147@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: wire up new syscallsRussell King2015-09-22
| |/ | | | | | | | | | | Wire up the new userfaultfd and membarrier syscalls for ARM. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge tag 'armsoc-fixes' of ↵Linus Torvalds2015-09-27
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Our first real batch of fixes this release cycle. Nothing really concerning, and diffstat is a bit inflated due to some DT contents moving around on STi platforms. There's a collection of them here: - A fixup for a build breakage that hits on arm64 allmodconfig in QCOM SCM firmware drivers - MMC fixes for OMAP that had quite a bit of breakage this merge window. - Misc build/warning fixes on PXA and OMAP - A couple of minor fixes for Beagleboard X15 which is now starting to see a few more users in the wild" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits) ARM: sti: dt: adapt DT to fix probe/bind issues in DRM driver ARM: dts: fix omap2+ address translation for pbias firmware: qcom: scm: Add function stubs for ARM64 ARM: dts: am57xx-beagle-x15: use palmas-usb for USB2 ARM: omap2plus_defconfig: enable GPIO_PCA953X ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets ARM: OMAP2+: AM43XX: Enable autoidle for clks in am43xx_init_late ARM: dts: am57xx-beagle-x15: Update Phy supplies ARM: pxa: balloon3: Fix build error ARM: dts: Fixup model name for HP t410 dts ARM: dts: DRA7: fix a typo in ethernet ARM: omap2plus_defconfig: make PCF857x built-in ARM: dts: Use ti,pbias compatible string for pbias ARM: OMAP5: Cleanup options for SoC only build ARM: DRA7: Select missing options for SoC only build ARM: OMAP2+: board-generic: Remove stale of_irq macros ARM: OMAP4+: PM: erratum is used by OMAP5 and DRA7 as well ARM: dts: omap3-igep: Move eth IRQ pinmux to IGEPv2 common dtsi ARM: dts: am57xx-beagle-x15: Add wakeup irq for mcp79410 ARM: dts: am335x-phycore-som: Fix mpu voltage ...
| * \ Merge tag 'pxa-fixes-v4.3' of https://github.com/rjarzmik/linux into fixesOlof Johansson2015-09-27
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM: pxa: fixes for v4.3 These fixes are mainly regression fixes triggered by irq changes, common clock framework introduction and sound side-effect of other platforms. * tag 'pxa-fixes-v4.3' of https://github.com/rjarzmik/linux: ARM: pxa: balloon3: Fix build error ARM: pxa: ssp: Fix build error by removing originally incorrect DT binding ARM: pxa: fix DFI bus lockups on startup Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | ARM: pxa: balloon3: Fix build errorAxel Lin2015-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | irq_data_get_chip() function does not exist, call irq_desc_get_chip() instead. Fixes: 9ec97561aa6d ("ARM/pxa: Prepare balloon3_irq_handler for irq argument removal") Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
| | * | ARM: pxa: ssp: Fix build error by removing originally incorrect DT bindingJarkko Nikula2015-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 03fbf488cece ("spi: pxa2xx: Differentiate Intel LPSS types") caused build error here because it removed the type LPSS_SSP and I didn't notice the type was used here too. I believe commit a6e56c28a178 ("ARM: pxa: ssp: add DT bindings") added it accidentally by copying all enum pxa_ssp_type types from include/linux/pxa2xx_ssp.h even LPSS_SSP was for Intel LPSS SPI devices. Fix the build error by removing this incorrect binding. Fixes: 03fbf488cece ("spi: pxa2xx: Differentiate Intel LPSS types") Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reported-by: Axel Lin <axel.lin@ingics.com> Cc: <stable@vger.kernel.org> # 4.2 Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
| | * | ARM: pxa: fix DFI bus lockups on startupRobert Jarzmik2015-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After the conversion of pxa architecture to common clock framework, the NAND clock can be disabled on startup if no nand driver claims it. In this case, it happens that if the bootloader used the NAND and set the DFI arbitration bit, the next access to a static memory controller area, such as an ethernet card, the system bus will stall, and the core will be stalled forever. Fix this by clearing the DFI arbritration bit in pxa3xx startup. The bit will be enabled the pxa3xx-nand driver on need anyway. The only left requirement is that upon pxa3xx-nand removal, the bit should be cleared before the clock is disabled. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
| * | | Merge tag 'omap-for-v4.3/fixes-rc2' of ↵Olof Johansson2015-09-27
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fixes for omaps for v4.3-rc cycle: - Two more patches to fix most of the MMC regressions with the PBIAS regulator changes. At least two MMC driver related issues still seems to remain for omap3 legacy booting and omap4 duovero. Note that the dts changes depend on a recent regulator fix, and are based on the regulator commit now in mainline kernel - Enable autoidle for am43xx clocks to prevent clocks from staying always on - Fix i2c5 pinctrl offsets for omap5-uevm - Enable PCA953X as that's needed for HDMI to work on omap5 - Update phy supplies for beagle x15 beta board - Use palmas-usb for on beagle x15 to start using the related driver that recently got merged * tag 'omap-for-v4.3/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: fix omap2+ address translation for pbias ARM: dts: am57xx-beagle-x15: use palmas-usb for USB2 ARM: omap2plus_defconfig: enable GPIO_PCA953X ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets ARM: OMAP2+: AM43XX: Enable autoidle for clks in am43xx_init_late ARM: dts: am57xx-beagle-x15: Update Phy supplies regulator: pbias: program pbias register offset in pbias driver ARM: omap2plus_defconfig: Enable MUSB DMA support ARM: DRA752: Add ID detect for ES2.0 ARM: OMAP3: vc: fix 'or' always true warning ARM: OMAP2+: Fix booting if no timer parent clock is available ARM: OMAP2+: omap-device: fix race deferred probe of omap_hsmmc vs omap_device_late_init Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | ARM: dts: fix omap2+ address translation for pbiasKishon Vijay Abraham I2015-09-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "ARM: dts: <omap2/omap4/omap5/dra7>: add minimal l4 bus layout with control module support" moved pbias_regulator dt node from being a child node of ocp to be the child node of 'syscon'. Since 'syscon' doesn't have the 'ranges' property, address translation fails while trying to convert the address to resource. Fix it here by populating 'ranges' property in syscon dt node. Fixes: 72b10ac00eb1 ("ARM: dts: omap24xx: add minimal l4 bus layout with control module support") Fixes: 7415b0b4c645 ("ARM: dts: omap4: add minimal l4 bus layout with control module support") Fixes: ed8509edddeb ("ARM: dts: omap5: add minimal l4 bus layout with control module support") Fixes: d919501feffa ("ARM: dts: dra7: add minimal l4 bus layout with control module support") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [tony@atomide.com: fixed omap3 pbias to work] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | Merge commit 'b8c93646fd5c' into omap-for-v4.3/fixesTony Lindgren2015-09-24
| | |\ \ \
| | * | | | ARM: dts: am57xx-beagle-x15: use palmas-usb for USB2Roger Quadros2015-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VBUS line of USB2 is connected to VBUS detect logic on the PMIC. Use the palmas-usb driver to report VBUS events to the USB driver. As the palmas-usb driver supports GPIO based ID reporting provide the GPIO for ID pin as well. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | ARM: omap2plus_defconfig: enable GPIO_PCA953XGrazvydas Ignotas2015-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables tca6424a GPIO expander driver that in turn enables TPD12S015 HDMI ESD protection and level shifter on OMAP5 uevm. In other words, it makes HDMI work on OMAP5 uevm. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsetsGrazvydas Ignotas2015-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2c5 pinctrl offsets are wrong. If the bootloader doesn't set the pins up, communication with tca6424a doesn't work (controller timeouts) and it is not possible to enable HDMI. Fixes: 9be495c42609 ("ARM: dts: omap5-evm: Add I2c pinctrl data") Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | ARM: OMAP2+: AM43XX: Enable autoidle for clks in am43xx_init_lateDave Gerlach2015-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add omap2_clk_enable_autoidle_all to am43xx_init_late otherwise the call to omap2_clk_disable_autoidle_all in am43xx_init_early may cause some clocks to always stay active and prevent low power mode transitions. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | ARM: dts: am57xx-beagle-x15: Update Phy suppliesNishanth Menon2015-09-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Originally, all the SoC PHY rails were supplied by LDO3. However, as a result of characterization, it was determined that this posed a risk in extreme load conditions. Hence the PHY rails are split between two different LDOs. Update the related node as a result LDO3/VDDA_1V8_PHYA supplies vdda_usb1, vdda_usb2, vdda_sata, vdda_usb3 LDO4/VDDA_1V8_PHYB supplies vdda_pcie1, vdda_pcie0, vdda_hdmi, vdda_pcie NOTE: We break compatibility with pre-production boards with this change since, the PMIC LDO4 is disabled at OTP level. The new configuration is the plan of record and all pre-production boards are supposed to be replaced with the latest boards matching the mentioned configuration. Some very few 10 something boards have been created and stopped production till the latest modifications were done (PMIC USB interrupt, LDO4 etc) - and all of those boards are now getting scrapped.. If there are any (as per tracking information, there should not be any), TI should be contacted to have them replaced. Signed-off-by: Nishanth Menon <nm@ti.com> [tony@atomide.com: updated commit about these being TI internal protos] Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | Merge branch 'fixes-rc1' into omap-for-v4.3/fixesTony Lindgren2015-09-14
| | |\ \ \ \
| | * | | | | ARM: omap2plus_defconfig: Enable MUSB DMA supportTony Lindgren2015-09-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With recent MUSB changes we can now build in support for multiple DMA implementations. So let's enable DMA by default to make life easier for distro use. Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | | ARM: DRA752: Add ID detect for ES2.0Vishal Mahaveer2015-09-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ES2.0 is a minor variant of ES1.1. ES2.0 is an incremental revision with various fixes including the following: - reset logic fixes - few assymetric aging logic fixes - MMC clock rate fixes - Ethernet speed fixes - edma fixes for mcasp NOTE: even though we use a compatible of dra742 and dra752, the usage in the Linux kernel is more or less interchangable - we use dra752 more often in the linux kernel compared to dra742 and 4.2-rc6 Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| | * | | | | ARM: OMAP3: vc: fix 'or' always true warningFrans Klaver2015-09-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the warning: arch/arm/mach-omap2/vc.c:302:47: warning: logical ‘or’ of collectively exhaustive tests is always true [-Wlogical-op] As we're toggling both CLKREQ and OFFMODE, we should also be checking OFFMODE. Signed-off-by: Frans Klaver <fransklaver@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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