4 files changed, 30 insertions, 9 deletions

diff --git a/include/linux/amba/pl08x.h b/include/linux/amba/pl08x.h
index 10fe2a211c2e..27e9ec8778eb 100644
--- a/include/linux/amba/pl08x.h
+++ b/include/linux/amba/pl08x.h
@@ -86,7 +86,7 @@ struct pl08x_channel_data {
  * @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2
  */
 struct pl08x_platform_data {
-        const struct pl08x_channel_data *slave_channels;
+        struct pl08x_channel_data *slave_channels;
         unsigned int num_slave_channels;
         struct pl08x_channel_data memcpy_channel;
         int (*get_xfer_signal)(const struct pl08x_channel_data *);
diff --git a/include/linux/dma/dw.h b/include/linux/dma/dw.h
index 71456442ebe3..f2e538aaddad 100644
--- a/include/linux/dma/dw.h
+++ b/include/linux/dma/dw.h
@@ -27,6 +27,7 @@ struct dw_dma;
  * @regs:               memory mapped I/O space
  * @clk:                hclk clock
  * @dw:                 struct dw_dma that is filed by dw_dma_probe()
+ * @pdata:              pointer to platform data
  */
 struct dw_dma_chip {
         struct device   *dev;
@@ -34,10 +35,12 @@ struct dw_dma_chip {
         void __iomem    *regs;
         struct clk      *clk;
         struct dw_dma   *dw;
+
+        const struct dw_dma_platform_data       *pdata;
 };
 
 /* Export to the platform drivers */
-int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata);
+int dw_dma_probe(struct dw_dma_chip *chip);
 int dw_dma_remove(struct dw_dma_chip *chip);
 
 /* DMA API extensions */
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 017433712833..30de0197263a 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -804,6 +804,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single(
         sg_dma_address(&sg) = buf;
         sg_dma_len(&sg) = len;
 
+        if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
+                return NULL;
+
         return chan->device->device_prep_slave_sg(chan, &sg, 1,
                                                   dir, flags, NULL);
 }
@@ -812,6 +815,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg(
         struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
         enum dma_transfer_direction dir, unsigned long flags)
 {
+        if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
+                return NULL;
+
         return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
                                                   dir, flags, NULL);
 }
@@ -823,6 +829,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_rio_sg(
         enum dma_transfer_direction dir, unsigned long flags,
         struct rio_dma_ext *rio_ext)
 {
+        if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
+                return NULL;
+
         return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
                                                   dir, flags, rio_ext);
 }
@@ -833,6 +842,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
                 size_t period_len, enum dma_transfer_direction dir,
                 unsigned long flags)
 {
+        if (!chan || !chan->device || !chan->device->device_prep_dma_cyclic)
+                return NULL;
+
         return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len,
                                                 period_len, dir, flags);
 }
@@ -841,6 +853,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
                 struct dma_chan *chan, struct dma_interleaved_template *xt,
                 unsigned long flags)
 {
+        if (!chan || !chan->device || !chan->device->device_prep_interleaved_dma)
+                return NULL;
+
         return chan->device->device_prep_interleaved_dma(chan, xt, flags);
 }
 
@@ -848,7 +863,7 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memset(
                 struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
                 unsigned long flags)
 {
-        if (!chan || !chan->device)
+        if (!chan || !chan->device || !chan->device->device_prep_dma_memset)
                 return NULL;
 
         return chan->device->device_prep_dma_memset(chan, dest, value,
@@ -861,6 +876,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_sg(
                 struct scatterlist *src_sg, unsigned int src_nents,
                 unsigned long flags)
 {
+        if (!chan || !chan->device || !chan->device->device_prep_dma_sg)
+                return NULL;
+
         return chan->device->device_prep_dma_sg(chan, dst_sg, dst_nents,
                         src_sg, src_nents, flags);
 }
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index 03b6095d3b18..d15d8ba8cc24 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -21,15 +21,15 @@
  * @dma_dev:    required DMA master device
  * @src_id:     src request line
  * @dst_id:     dst request line
- * @src_master: src master for transfers on allocated channel.
- * @dst_master: dest master for transfers on allocated channel.
+ * @m_master:   memory master for transfers on allocated channel
+ * @p_master:   peripheral master for transfers on allocated channel
  */
 struct dw_dma_slave {
         struct device           *dma_dev;
         u8                      src_id;
         u8                      dst_id;
-        u8                      src_master;
-        u8                      dst_master;
+        u8                      m_master;
+        u8                      p_master;
 };
 
 /**
@@ -43,7 +43,7 @@ struct dw_dma_slave {
  * @block_size: Maximum block size supported by the controller
  * @nr_masters: Number of AHB masters supported by the controller
  * @data_width: Maximum data width supported by hardware per AHB master
- *              (0 - 8bits, 1 - 16bits, ..., 5 - 256bits)
+ *              (in bytes, power of 2)
  */
 struct dw_dma_platform_data {
         unsigned int    nr_channels;
@@ -55,7 +55,7 @@ struct dw_dma_platform_data {
 #define CHAN_PRIORITY_ASCENDING         0       /* chan0 highest */
 #define CHAN_PRIORITY_DESCENDING        1       /* chan7 highest */
         unsigned char   chan_priority;
-        unsigned short  block_size;
+        unsigned int    block_size;
         unsigned char   nr_masters;
         unsigned char   data_width[DW_DMA_MAX_NR_MASTERS];
 };