aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/linux/dma-direction.h6
-rw-r--r--include/linux/pci-dma-compat.h8
-rw-r--r--include/linux/pci-epc.h16
-rw-r--r--include/linux/pci-epf.h1
-rw-r--r--include/linux/pci.h44
-rw-r--r--include/linux/pci_hotplug.h15
-rw-r--r--include/linux/pci_ids.h2
-rw-r--r--include/linux/switchtec.h4
-rw-r--r--include/uapi/linux/pci_regs.h4
-rw-r--r--include/uapi/linux/pcitest.h3
10 files changed, 61 insertions, 42 deletions
diff --git a/include/linux/dma-direction.h b/include/linux/dma-direction.h
index 3649a031893a..9c96e30e6a0b 100644
--- a/include/linux/dma-direction.h
+++ b/include/linux/dma-direction.h
@@ -1,14 +1,12 @@
1/* SPDX-License-Identifier: GPL-2.0 */ 1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _LINUX_DMA_DIRECTION_H 2#ifndef _LINUX_DMA_DIRECTION_H
3#define _LINUX_DMA_DIRECTION_H 3#define _LINUX_DMA_DIRECTION_H
4/* 4
5 * These definitions mirror those in pci.h, so they can be used
6 * interchangeably with their PCI_ counterparts.
7 */
8enum dma_data_direction { 5enum dma_data_direction {
9 DMA_BIDIRECTIONAL = 0, 6 DMA_BIDIRECTIONAL = 0,
10 DMA_TO_DEVICE = 1, 7 DMA_TO_DEVICE = 1,
11 DMA_FROM_DEVICE = 2, 8 DMA_FROM_DEVICE = 2,
12 DMA_NONE = 3, 9 DMA_NONE = 3,
13}; 10};
11
14#endif 12#endif
diff --git a/include/linux/pci-dma-compat.h b/include/linux/pci-dma-compat.h
index 0dd1a3f7b309..c3f1b44ade29 100644
--- a/include/linux/pci-dma-compat.h
+++ b/include/linux/pci-dma-compat.h
@@ -8,10 +8,10 @@
8#include <linux/dma-mapping.h> 8#include <linux/dma-mapping.h>
9 9
10/* This defines the direction arg to the DMA mapping routines. */ 10/* This defines the direction arg to the DMA mapping routines. */
11#define PCI_DMA_BIDIRECTIONAL 0 11#define PCI_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL
12#define PCI_DMA_TODEVICE 1 12#define PCI_DMA_TODEVICE DMA_TO_DEVICE
13#define PCI_DMA_FROMDEVICE 2 13#define PCI_DMA_FROMDEVICE DMA_FROM_DEVICE
14#define PCI_DMA_NONE 3 14#define PCI_DMA_NONE DMA_NONE
15 15
16static inline void * 16static inline void *
17pci_alloc_consistent(struct pci_dev *hwdev, size_t size, 17pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index 243eaa5a66ff..37dab8116901 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -17,6 +17,7 @@ enum pci_epc_irq_type {
17 PCI_EPC_IRQ_UNKNOWN, 17 PCI_EPC_IRQ_UNKNOWN,
18 PCI_EPC_IRQ_LEGACY, 18 PCI_EPC_IRQ_LEGACY,
19 PCI_EPC_IRQ_MSI, 19 PCI_EPC_IRQ_MSI,
20 PCI_EPC_IRQ_MSIX,
20}; 21};
21 22
22/** 23/**
@@ -30,7 +31,11 @@ enum pci_epc_irq_type {
30 * capability register 31 * capability register
31 * @get_msi: ops to get the number of MSI interrupts allocated by the RC from 32 * @get_msi: ops to get the number of MSI interrupts allocated by the RC from
32 * the MSI capability register 33 * the MSI capability register
33 * @raise_irq: ops to raise a legacy or MSI interrupt 34 * @set_msix: ops to set the requested number of MSI-X interrupts in the
35 * MSI-X capability register
36 * @get_msix: ops to get the number of MSI-X interrupts allocated by the RC
37 * from the MSI-X capability register
38 * @raise_irq: ops to raise a legacy, MSI or MSI-X interrupt
34 * @start: ops to start the PCI link 39 * @start: ops to start the PCI link
35 * @stop: ops to stop the PCI link 40 * @stop: ops to stop the PCI link
36 * @owner: the module owner containing the ops 41 * @owner: the module owner containing the ops
@@ -48,8 +53,10 @@ struct pci_epc_ops {
48 phys_addr_t addr); 53 phys_addr_t addr);
49 int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts); 54 int (*set_msi)(struct pci_epc *epc, u8 func_no, u8 interrupts);
50 int (*get_msi)(struct pci_epc *epc, u8 func_no); 55 int (*get_msi)(struct pci_epc *epc, u8 func_no);
56 int (*set_msix)(struct pci_epc *epc, u8 func_no, u16 interrupts);
57 int (*get_msix)(struct pci_epc *epc, u8 func_no);
51 int (*raise_irq)(struct pci_epc *epc, u8 func_no, 58 int (*raise_irq)(struct pci_epc *epc, u8 func_no,
52 enum pci_epc_irq_type type, u8 interrupt_num); 59 enum pci_epc_irq_type type, u16 interrupt_num);
53 int (*start)(struct pci_epc *epc); 60 int (*start)(struct pci_epc *epc);
54 void (*stop)(struct pci_epc *epc); 61 void (*stop)(struct pci_epc *epc);
55 struct module *owner; 62 struct module *owner;
@@ -95,6 +102,7 @@ struct pci_epc {
95 102
96#define EPC_FEATURE_NO_LINKUP_NOTIFIER BIT(0) 103#define EPC_FEATURE_NO_LINKUP_NOTIFIER BIT(0)
97#define EPC_FEATURE_BAR_MASK (BIT(1) | BIT(2) | BIT(3)) 104#define EPC_FEATURE_BAR_MASK (BIT(1) | BIT(2) | BIT(3))
105#define EPC_FEATURE_MSIX_AVAILABLE BIT(4)
98#define EPC_FEATURE_SET_BAR(features, bar) \ 106#define EPC_FEATURE_SET_BAR(features, bar) \
99 (features |= (EPC_FEATURE_BAR_MASK & (bar << 1))) 107 (features |= (EPC_FEATURE_BAR_MASK & (bar << 1)))
100#define EPC_FEATURE_GET_BAR(features) \ 108#define EPC_FEATURE_GET_BAR(features) \
@@ -144,8 +152,10 @@ void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no,
144 phys_addr_t phys_addr); 152 phys_addr_t phys_addr);
145int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts); 153int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts);
146int pci_epc_get_msi(struct pci_epc *epc, u8 func_no); 154int pci_epc_get_msi(struct pci_epc *epc, u8 func_no);
155int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts);
156int pci_epc_get_msix(struct pci_epc *epc, u8 func_no);
147int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, 157int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no,
148 enum pci_epc_irq_type type, u8 interrupt_num); 158 enum pci_epc_irq_type type, u16 interrupt_num);
149int pci_epc_start(struct pci_epc *epc); 159int pci_epc_start(struct pci_epc *epc);
150void pci_epc_stop(struct pci_epc *epc); 160void pci_epc_stop(struct pci_epc *epc);
151struct pci_epc *pci_epc_get(const char *epc_name); 161struct pci_epc *pci_epc_get(const char *epc_name);
diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h
index 4e7764935fa8..ec02f58758c8 100644
--- a/include/linux/pci-epf.h
+++ b/include/linux/pci-epf.h
@@ -119,6 +119,7 @@ struct pci_epf {
119 struct pci_epf_header *header; 119 struct pci_epf_header *header;
120 struct pci_epf_bar bar[6]; 120 struct pci_epf_bar bar[6];
121 u8 msi_interrupts; 121 u8 msi_interrupts;
122 u16 msix_interrupts;
122 u8 func_no; 123 u8 func_no;
123 124
124 struct pci_epc *epc; 125 struct pci_epc *epc;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 340029b2fb38..0543800ec565 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -299,6 +299,7 @@ struct pci_dev {
299 u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 299 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
300#ifdef CONFIG_PCIEAER 300#ifdef CONFIG_PCIEAER
301 u16 aer_cap; /* AER capability offset */ 301 u16 aer_cap; /* AER capability offset */
302 struct aer_stats *aer_stats; /* AER stats for this device */
302#endif 303#endif
303 u8 pcie_cap; /* PCIe capability offset */ 304 u8 pcie_cap; /* PCIe capability offset */
304 u8 msi_cap; /* MSI capability offset */ 305 u8 msi_cap; /* MSI capability offset */
@@ -350,6 +351,7 @@ struct pci_dev {
350 unsigned int ltr_path:1; /* Latency Tolerance Reporting 351 unsigned int ltr_path:1; /* Latency Tolerance Reporting
351 supported from root to here */ 352 supported from root to here */
352#endif 353#endif
354 unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */
353 355
354 pci_channel_state_t error_state; /* Current connectivity state */ 356 pci_channel_state_t error_state; /* Current connectivity state */
355 struct device dev; /* Generic device interface */ 357 struct device dev; /* Generic device interface */
@@ -368,7 +370,6 @@ struct pci_dev {
368 unsigned int transparent:1; /* Subtractive decode bridge */ 370 unsigned int transparent:1; /* Subtractive decode bridge */
369 unsigned int multifunction:1; /* Multi-function device */ 371 unsigned int multifunction:1; /* Multi-function device */
370 372
371 unsigned int is_added:1;
372 unsigned int is_busmaster:1; /* Is busmaster */ 373 unsigned int is_busmaster:1; /* Is busmaster */
373 unsigned int no_msi:1; /* May not use MSI */ 374 unsigned int no_msi:1; /* May not use MSI */
374 unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */ 375 unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */
@@ -388,6 +389,7 @@ struct pci_dev {
388 unsigned int is_virtfn:1; 389 unsigned int is_virtfn:1;
389 unsigned int reset_fn:1; 390 unsigned int reset_fn:1;
390 unsigned int is_hotplug_bridge:1; 391 unsigned int is_hotplug_bridge:1;
392 unsigned int shpc_managed:1; /* SHPC owned by shpchp */
391 unsigned int is_thunderbolt:1; /* Thunderbolt controller */ 393 unsigned int is_thunderbolt:1; /* Thunderbolt controller */
392 unsigned int __aer_firmware_first_valid:1; 394 unsigned int __aer_firmware_first_valid:1;
393 unsigned int __aer_firmware_first:1; 395 unsigned int __aer_firmware_first:1;
@@ -819,6 +821,21 @@ struct pci_driver {
819 .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \ 821 .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \
820 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0 822 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0
821 823
824/**
825 * PCI_DEVICE_DATA - macro used to describe a specific PCI device in very short form
826 * @vend: the vendor name (without PCI_VENDOR_ID_ prefix)
827 * @dev: the device name (without PCI_DEVICE_ID_<vend>_ prefix)
828 * @data: the driver data to be filled
829 *
830 * This macro is used to create a struct pci_device_id that matches a
831 * specific PCI device. The subvendor, and subdevice fields will be set
832 * to PCI_ANY_ID.
833 */
834#define PCI_DEVICE_DATA(vend, dev, data) \
835 .vendor = PCI_VENDOR_ID_##vend, .device = PCI_DEVICE_ID_##vend##_##dev, \
836 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0, \
837 .driver_data = (kernel_ulong_t)(data)
838
822enum { 839enum {
823 PCI_REASSIGN_ALL_RSRC = 0x00000001, /* Ignore firmware setup */ 840 PCI_REASSIGN_ALL_RSRC = 0x00000001, /* Ignore firmware setup */
824 PCI_REASSIGN_ALL_BUS = 0x00000002, /* Reassign all bus numbers */ 841 PCI_REASSIGN_ALL_BUS = 0x00000002, /* Reassign all bus numbers */
@@ -1089,20 +1106,17 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev,
1089 enum pci_bus_speed *speed, 1106 enum pci_bus_speed *speed,
1090 enum pcie_link_width *width); 1107 enum pcie_link_width *width);
1091void pcie_print_link_status(struct pci_dev *dev); 1108void pcie_print_link_status(struct pci_dev *dev);
1109bool pcie_has_flr(struct pci_dev *dev);
1092int pcie_flr(struct pci_dev *dev); 1110int pcie_flr(struct pci_dev *dev);
1093int __pci_reset_function_locked(struct pci_dev *dev); 1111int __pci_reset_function_locked(struct pci_dev *dev);
1094int pci_reset_function(struct pci_dev *dev); 1112int pci_reset_function(struct pci_dev *dev);
1095int pci_reset_function_locked(struct pci_dev *dev); 1113int pci_reset_function_locked(struct pci_dev *dev);
1096int pci_try_reset_function(struct pci_dev *dev); 1114int pci_try_reset_function(struct pci_dev *dev);
1097int pci_probe_reset_slot(struct pci_slot *slot); 1115int pci_probe_reset_slot(struct pci_slot *slot);
1098int pci_reset_slot(struct pci_slot *slot);
1099int pci_try_reset_slot(struct pci_slot *slot);
1100int pci_probe_reset_bus(struct pci_bus *bus); 1116int pci_probe_reset_bus(struct pci_bus *bus);
1101int pci_reset_bus(struct pci_bus *bus); 1117int pci_reset_bus(struct pci_dev *dev);
1102int pci_try_reset_bus(struct pci_bus *bus);
1103void pci_reset_secondary_bus(struct pci_dev *dev); 1118void pci_reset_secondary_bus(struct pci_dev *dev);
1104void pcibios_reset_secondary_bus(struct pci_dev *dev); 1119void pcibios_reset_secondary_bus(struct pci_dev *dev);
1105int pci_reset_bridge_secondary_bus(struct pci_dev *dev);
1106void pci_update_resource(struct pci_dev *dev, int resno); 1120void pci_update_resource(struct pci_dev *dev, int resno);
1107int __must_check pci_assign_resource(struct pci_dev *dev, int i); 1121int __must_check pci_assign_resource(struct pci_dev *dev, int i);
1108int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); 1122int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
@@ -1122,7 +1136,6 @@ int pci_enable_rom(struct pci_dev *pdev);
1122void pci_disable_rom(struct pci_dev *pdev); 1136void pci_disable_rom(struct pci_dev *pdev);
1123void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); 1137void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
1124void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); 1138void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
1125size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
1126void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size); 1139void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size);
1127 1140
1128/* Power management related routines */ 1141/* Power management related routines */
@@ -1240,6 +1253,8 @@ int pci_register_io_range(struct fwnode_handle *fwnode, phys_addr_t addr,
1240unsigned long pci_address_to_pio(phys_addr_t addr); 1253unsigned long pci_address_to_pio(phys_addr_t addr);
1241phys_addr_t pci_pio_to_address(unsigned long pio); 1254phys_addr_t pci_pio_to_address(unsigned long pio);
1242int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); 1255int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr);
1256int devm_pci_remap_iospace(struct device *dev, const struct resource *res,
1257 phys_addr_t phys_addr);
1243void pci_unmap_iospace(struct resource *res); 1258void pci_unmap_iospace(struct resource *res);
1244void __iomem *devm_pci_remap_cfgspace(struct device *dev, 1259void __iomem *devm_pci_remap_cfgspace(struct device *dev,
1245 resource_size_t offset, 1260 resource_size_t offset,
@@ -1468,13 +1483,9 @@ static inline bool pcie_aspm_support_enabled(void) { return false; }
1468#endif 1483#endif
1469 1484
1470#ifdef CONFIG_PCIEAER 1485#ifdef CONFIG_PCIEAER
1471void pci_no_aer(void);
1472bool pci_aer_available(void); 1486bool pci_aer_available(void);
1473int pci_aer_init(struct pci_dev *dev);
1474#else 1487#else
1475static inline void pci_no_aer(void) { }
1476static inline bool pci_aer_available(void) { return false; } 1488static inline bool pci_aer_available(void) { return false; }
1477static inline int pci_aer_init(struct pci_dev *d) { return -ENODEV; }
1478#endif 1489#endif
1479 1490
1480#ifdef CONFIG_PCIE_ECRC 1491#ifdef CONFIG_PCIE_ECRC
@@ -1876,20 +1887,9 @@ enum pci_fixup_pass {
1876 1887
1877#ifdef CONFIG_PCI_QUIRKS 1888#ifdef CONFIG_PCI_QUIRKS
1878void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); 1889void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1879int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags);
1880int pci_dev_specific_enable_acs(struct pci_dev *dev);
1881#else 1890#else
1882static inline void pci_fixup_device(enum pci_fixup_pass pass, 1891static inline void pci_fixup_device(enum pci_fixup_pass pass,
1883 struct pci_dev *dev) { } 1892 struct pci_dev *dev) { }
1884static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev,
1885 u16 acs_flags)
1886{
1887 return -ENOTTY;
1888}
1889static inline int pci_dev_specific_enable_acs(struct pci_dev *dev)
1890{
1891 return -ENOTTY;
1892}
1893#endif 1893#endif
1894 1894
1895void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); 1895void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
diff --git a/include/linux/pci_hotplug.h b/include/linux/pci_hotplug.h
index cf5e22103f68..a6d6650a0490 100644
--- a/include/linux/pci_hotplug.h
+++ b/include/linux/pci_hotplug.h
@@ -80,15 +80,12 @@ struct hotplug_slot_info {
80 * @ops: pointer to the &struct hotplug_slot_ops to be used for this slot 80 * @ops: pointer to the &struct hotplug_slot_ops to be used for this slot
81 * @info: pointer to the &struct hotplug_slot_info for the initial values for 81 * @info: pointer to the &struct hotplug_slot_info for the initial values for
82 * this slot. 82 * this slot.
83 * @release: called during pci_hp_deregister to free memory allocated in a
84 * hotplug_slot structure.
85 * @private: used by the hotplug pci controller driver to store whatever it 83 * @private: used by the hotplug pci controller driver to store whatever it
86 * needs. 84 * needs.
87 */ 85 */
88struct hotplug_slot { 86struct hotplug_slot {
89 struct hotplug_slot_ops *ops; 87 struct hotplug_slot_ops *ops;
90 struct hotplug_slot_info *info; 88 struct hotplug_slot_info *info;
91 void (*release) (struct hotplug_slot *slot);
92 void *private; 89 void *private;
93 90
94 /* Variables below this are for use only by the hotplug pci core. */ 91 /* Variables below this are for use only by the hotplug pci core. */
@@ -104,13 +101,23 @@ static inline const char *hotplug_slot_name(const struct hotplug_slot *slot)
104int __pci_hp_register(struct hotplug_slot *slot, struct pci_bus *pbus, int nr, 101int __pci_hp_register(struct hotplug_slot *slot, struct pci_bus *pbus, int nr,
105 const char *name, struct module *owner, 102 const char *name, struct module *owner,
106 const char *mod_name); 103 const char *mod_name);
107int pci_hp_deregister(struct hotplug_slot *slot); 104int __pci_hp_initialize(struct hotplug_slot *slot, struct pci_bus *bus, int nr,
105 const char *name, struct module *owner,
106 const char *mod_name);
107int pci_hp_add(struct hotplug_slot *slot);
108
109void pci_hp_del(struct hotplug_slot *slot);
110void pci_hp_destroy(struct hotplug_slot *slot);
111void pci_hp_deregister(struct hotplug_slot *slot);
112
108int __must_check pci_hp_change_slot_info(struct hotplug_slot *slot, 113int __must_check pci_hp_change_slot_info(struct hotplug_slot *slot,
109 struct hotplug_slot_info *info); 114 struct hotplug_slot_info *info);
110 115
111/* use a define to avoid include chaining to get THIS_MODULE & friends */ 116/* use a define to avoid include chaining to get THIS_MODULE & friends */
112#define pci_hp_register(slot, pbus, devnr, name) \ 117#define pci_hp_register(slot, pbus, devnr, name) \
113 __pci_hp_register(slot, pbus, devnr, name, THIS_MODULE, KBUILD_MODNAME) 118 __pci_hp_register(slot, pbus, devnr, name, THIS_MODULE, KBUILD_MODNAME)
119#define pci_hp_initialize(slot, bus, nr, name) \
120 __pci_hp_initialize(slot, bus, nr, name, THIS_MODULE, KBUILD_MODNAME)
114 121
115/* PCI Setting Record (Type 0) */ 122/* PCI Setting Record (Type 0) */
116struct hpp_type0 { 123struct hpp_type0 {
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 29502238e510..99d366cb0e9f 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1668,6 +1668,7 @@
1668#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 1668#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
1669 1669
1670#define PCI_VENDOR_ID_PMC_Sierra 0x11f8 1670#define PCI_VENDOR_ID_PMC_Sierra 0x11f8
1671#define PCI_VENDOR_ID_MICROSEMI 0x11f8
1671 1672
1672#define PCI_VENDOR_ID_RP 0x11fe 1673#define PCI_VENDOR_ID_RP 0x11fe
1673#define PCI_DEVICE_ID_RP32INTF 0x0001 1674#define PCI_DEVICE_ID_RP32INTF 0x0001
@@ -2541,6 +2542,7 @@
2541#define PCI_DEVICE_ID_NETRONOME_NFP3200 0x3200 2542#define PCI_DEVICE_ID_NETRONOME_NFP3200 0x3200
2542#define PCI_DEVICE_ID_NETRONOME_NFP3240 0x3240 2543#define PCI_DEVICE_ID_NETRONOME_NFP3240 0x3240
2543#define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000 2544#define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000
2545#define PCI_DEVICE_ID_NETRONOME_NFP5000 0x5000
2544#define PCI_DEVICE_ID_NETRONOME_NFP6000 0x6000 2546#define PCI_DEVICE_ID_NETRONOME_NFP6000 0x6000
2545#define PCI_DEVICE_ID_NETRONOME_NFP6000_VF 0x6003 2547#define PCI_DEVICE_ID_NETRONOME_NFP6000_VF 0x6003
2546 2548
diff --git a/include/linux/switchtec.h b/include/linux/switchtec.h
index ec93e93371fa..ab400af6f0ce 100644
--- a/include/linux/switchtec.h
+++ b/include/linux/switchtec.h
@@ -19,10 +19,6 @@
19#include <linux/pci.h> 19#include <linux/pci.h>
20#include <linux/cdev.h> 20#include <linux/cdev.h>
21 21
22#define MICROSEMI_VENDOR_ID 0x11f8
23#define MICROSEMI_NTB_CLASSCODE 0x068000
24#define MICROSEMI_MGMT_CLASSCODE 0x058000
25
26#define SWITCHTEC_MRPC_PAYLOAD_SIZE 1024 22#define SWITCHTEC_MRPC_PAYLOAD_SIZE 1024
27#define SWITCHTEC_MAX_PFF_CSR 48 23#define SWITCHTEC_MAX_PFF_CSR 48
28 24
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 4da87e2ef8a8..ee556ccc93f4 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -636,6 +636,7 @@
636#define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */ 636#define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */
637#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */ 637#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */
638#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000 /* Re-use WAKE# for OBFF */ 638#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000 /* Re-use WAKE# for OBFF */
639#define PCI_EXP_DEVCAP2_EE_PREFIX 0x00200000 /* End-End TLP Prefix */
639#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */ 640#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
640#define PCI_EXP_DEVCTL2_COMP_TIMEOUT 0x000f /* Completion Timeout Value */ 641#define PCI_EXP_DEVCTL2_COMP_TIMEOUT 0x000f /* Completion Timeout Value */
641#define PCI_EXP_DEVCTL2_COMP_TMOUT_DIS 0x0010 /* Completion Timeout Disable */ 642#define PCI_EXP_DEVCTL2_COMP_TMOUT_DIS 0x0010 /* Completion Timeout Disable */
@@ -960,8 +961,9 @@
960#define PCI_REBAR_CTRL 8 /* control register */ 961#define PCI_REBAR_CTRL 8 /* control register */
961#define PCI_REBAR_CTRL_BAR_IDX 0x00000007 /* BAR index */ 962#define PCI_REBAR_CTRL_BAR_IDX 0x00000007 /* BAR index */
962#define PCI_REBAR_CTRL_NBAR_MASK 0x000000E0 /* # of resizable BARs */ 963#define PCI_REBAR_CTRL_NBAR_MASK 0x000000E0 /* # of resizable BARs */
963#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # of BARs */ 964#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # of BARs */
964#define PCI_REBAR_CTRL_BAR_SIZE 0x00001F00 /* BAR size */ 965#define PCI_REBAR_CTRL_BAR_SIZE 0x00001F00 /* BAR size */
966#define PCI_REBAR_CTRL_BAR_SHIFT 8 /* shift for BAR size */
965 967
966/* Dynamic Power Allocation */ 968/* Dynamic Power Allocation */
967#define PCI_DPA_CAP 4 /* capability register */ 969#define PCI_DPA_CAP 4 /* capability register */
diff --git a/include/uapi/linux/pcitest.h b/include/uapi/linux/pcitest.h
index 953cf036cb26..cbf422e56696 100644
--- a/include/uapi/linux/pcitest.h
+++ b/include/uapi/linux/pcitest.h
@@ -16,5 +16,8 @@
16#define PCITEST_WRITE _IOW('P', 0x4, unsigned long) 16#define PCITEST_WRITE _IOW('P', 0x4, unsigned long)
17#define PCITEST_READ _IOW('P', 0x5, unsigned long) 17#define PCITEST_READ _IOW('P', 0x5, unsigned long)
18#define PCITEST_COPY _IOW('P', 0x6, unsigned long) 18#define PCITEST_COPY _IOW('P', 0x6, unsigned long)
19#define PCITEST_MSIX _IOW('P', 0x7, int)
20#define PCITEST_SET_IRQTYPE _IOW('P', 0x8, int)
21#define PCITEST_GET_IRQTYPE _IO('P', 0x9)
19 22
20#endif /* __UAPI_LINUX_PCITEST_H */ 23#endif /* __UAPI_LINUX_PCITEST_H */