1 files changed, 12 insertions, 0 deletions

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 919248fb4028..4d21191aaed0 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -160,6 +160,7 @@ union drm_amdgpu_bo_list {
 #define AMDGPU_CTX_OP_ALLOC_CTX 1
 #define AMDGPU_CTX_OP_FREE_CTX  2
 #define AMDGPU_CTX_OP_QUERY_STATE       3
+#define AMDGPU_CTX_OP_QUERY_STATE2      4
 
 /* GPU reset status */
 #define AMDGPU_CTX_NO_RESET             0
@@ -170,6 +171,13 @@ union drm_amdgpu_bo_list {
 /* unknown cause */
 #define AMDGPU_CTX_UNKNOWN_RESET        3
 
+/* indicate gpu reset occured after ctx created */
+#define AMDGPU_CTX_QUERY2_FLAGS_RESET    (1<<0)
+/* indicate vram lost occured after ctx created */
+#define AMDGPU_CTX_QUERY2_FLAGS_VRAMLOST (1<<1)
+/* indicate some job from this context once cause gpu hang */
+#define AMDGPU_CTX_QUERY2_FLAGS_GUILTY   (1<<2)
+
 /* Context priority level */
 #define AMDGPU_CTX_PRIORITY_UNSET       -2048
 #define AMDGPU_CTX_PRIORITY_VERY_LOW    -1023
@@ -869,6 +877,10 @@ struct drm_amdgpu_info_device {
         __u32 _pad1;
         /* always on cu bitmap */
         __u32 cu_ao_bitmap[4][4];
+        /** Starting high virtual address for UMDs. */
+        __u64 high_va_offset;
+        /** The maximum high virtual address */
+        __u64 high_va_max;
 };
 
 struct drm_amdgpu_info_hw_ip {