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-rw-r--r--include/linux/dma/dw.h5
-rw-r--r--include/linux/dmaengine.h20
-rw-r--r--include/linux/platform_data/dma-dw.h12
3 files changed, 29 insertions, 8 deletions
diff --git a/include/linux/dma/dw.h b/include/linux/dma/dw.h
index 71456442ebe3..f2e538aaddad 100644
--- a/include/linux/dma/dw.h
+++ b/include/linux/dma/dw.h
@@ -27,6 +27,7 @@ struct dw_dma;
27 * @regs: memory mapped I/O space 27 * @regs: memory mapped I/O space
28 * @clk: hclk clock 28 * @clk: hclk clock
29 * @dw: struct dw_dma that is filed by dw_dma_probe() 29 * @dw: struct dw_dma that is filed by dw_dma_probe()
30 * @pdata: pointer to platform data
30 */ 31 */
31struct dw_dma_chip { 32struct dw_dma_chip {
32 struct device *dev; 33 struct device *dev;
@@ -34,10 +35,12 @@ struct dw_dma_chip {
34 void __iomem *regs; 35 void __iomem *regs;
35 struct clk *clk; 36 struct clk *clk;
36 struct dw_dma *dw; 37 struct dw_dma *dw;
38
39 const struct dw_dma_platform_data *pdata;
37}; 40};
38 41
39/* Export to the platform drivers */ 42/* Export to the platform drivers */
40int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata); 43int dw_dma_probe(struct dw_dma_chip *chip);
41int dw_dma_remove(struct dw_dma_chip *chip); 44int dw_dma_remove(struct dw_dma_chip *chip);
42 45
43/* DMA API extensions */ 46/* DMA API extensions */
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 017433712833..30de0197263a 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -804,6 +804,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single(
804 sg_dma_address(&sg) = buf; 804 sg_dma_address(&sg) = buf;
805 sg_dma_len(&sg) = len; 805 sg_dma_len(&sg) = len;
806 806
807 if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
808 return NULL;
809
807 return chan->device->device_prep_slave_sg(chan, &sg, 1, 810 return chan->device->device_prep_slave_sg(chan, &sg, 1,
808 dir, flags, NULL); 811 dir, flags, NULL);
809} 812}
@@ -812,6 +815,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg(
812 struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, 815 struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
813 enum dma_transfer_direction dir, unsigned long flags) 816 enum dma_transfer_direction dir, unsigned long flags)
814{ 817{
818 if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
819 return NULL;
820
815 return chan->device->device_prep_slave_sg(chan, sgl, sg_len, 821 return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
816 dir, flags, NULL); 822 dir, flags, NULL);
817} 823}
@@ -823,6 +829,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_rio_sg(
823 enum dma_transfer_direction dir, unsigned long flags, 829 enum dma_transfer_direction dir, unsigned long flags,
824 struct rio_dma_ext *rio_ext) 830 struct rio_dma_ext *rio_ext)
825{ 831{
832 if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
833 return NULL;
834
826 return chan->device->device_prep_slave_sg(chan, sgl, sg_len, 835 return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
827 dir, flags, rio_ext); 836 dir, flags, rio_ext);
828} 837}
@@ -833,6 +842,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
833 size_t period_len, enum dma_transfer_direction dir, 842 size_t period_len, enum dma_transfer_direction dir,
834 unsigned long flags) 843 unsigned long flags)
835{ 844{
845 if (!chan || !chan->device || !chan->device->device_prep_dma_cyclic)
846 return NULL;
847
836 return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len, 848 return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len,
837 period_len, dir, flags); 849 period_len, dir, flags);
838} 850}
@@ -841,6 +853,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
841 struct dma_chan *chan, struct dma_interleaved_template *xt, 853 struct dma_chan *chan, struct dma_interleaved_template *xt,
842 unsigned long flags) 854 unsigned long flags)
843{ 855{
856 if (!chan || !chan->device || !chan->device->device_prep_interleaved_dma)
857 return NULL;
858
844 return chan->device->device_prep_interleaved_dma(chan, xt, flags); 859 return chan->device->device_prep_interleaved_dma(chan, xt, flags);
845} 860}
846 861
@@ -848,7 +863,7 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memset(
848 struct dma_chan *chan, dma_addr_t dest, int value, size_t len, 863 struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
849 unsigned long flags) 864 unsigned long flags)
850{ 865{
851 if (!chan || !chan->device) 866 if (!chan || !chan->device || !chan->device->device_prep_dma_memset)
852 return NULL; 867 return NULL;
853 868
854 return chan->device->device_prep_dma_memset(chan, dest, value, 869 return chan->device->device_prep_dma_memset(chan, dest, value,
@@ -861,6 +876,9 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_sg(
861 struct scatterlist *src_sg, unsigned int src_nents, 876 struct scatterlist *src_sg, unsigned int src_nents,
862 unsigned long flags) 877 unsigned long flags)
863{ 878{
879 if (!chan || !chan->device || !chan->device->device_prep_dma_sg)
880 return NULL;
881
864 return chan->device->device_prep_dma_sg(chan, dst_sg, dst_nents, 882 return chan->device->device_prep_dma_sg(chan, dst_sg, dst_nents,
865 src_sg, src_nents, flags); 883 src_sg, src_nents, flags);
866} 884}
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index 03b6095d3b18..d15d8ba8cc24 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -21,15 +21,15 @@
21 * @dma_dev: required DMA master device 21 * @dma_dev: required DMA master device
22 * @src_id: src request line 22 * @src_id: src request line
23 * @dst_id: dst request line 23 * @dst_id: dst request line
24 * @src_master: src master for transfers on allocated channel. 24 * @m_master: memory master for transfers on allocated channel
25 * @dst_master: dest master for transfers on allocated channel. 25 * @p_master: peripheral master for transfers on allocated channel
26 */ 26 */
27struct dw_dma_slave { 27struct dw_dma_slave {
28 struct device *dma_dev; 28 struct device *dma_dev;
29 u8 src_id; 29 u8 src_id;
30 u8 dst_id; 30 u8 dst_id;
31 u8 src_master; 31 u8 m_master;
32 u8 dst_master; 32 u8 p_master;
33}; 33};
34 34
35/** 35/**
@@ -43,7 +43,7 @@ struct dw_dma_slave {
43 * @block_size: Maximum block size supported by the controller 43 * @block_size: Maximum block size supported by the controller
44 * @nr_masters: Number of AHB masters supported by the controller 44 * @nr_masters: Number of AHB masters supported by the controller
45 * @data_width: Maximum data width supported by hardware per AHB master 45 * @data_width: Maximum data width supported by hardware per AHB master
46 * (0 - 8bits, 1 - 16bits, ..., 5 - 256bits) 46 * (in bytes, power of 2)
47 */ 47 */
48struct dw_dma_platform_data { 48struct dw_dma_platform_data {
49 unsigned int nr_channels; 49 unsigned int nr_channels;
@@ -55,7 +55,7 @@ struct dw_dma_platform_data {
55#define CHAN_PRIORITY_ASCENDING 0 /* chan0 highest */ 55#define CHAN_PRIORITY_ASCENDING 0 /* chan0 highest */
56#define CHAN_PRIORITY_DESCENDING 1 /* chan7 highest */ 56#define CHAN_PRIORITY_DESCENDING 1 /* chan7 highest */
57 unsigned char chan_priority; 57 unsigned char chan_priority;
58 unsigned short block_size; 58 unsigned int block_size;
59 unsigned char nr_masters; 59 unsigned char nr_masters;
60 unsigned char data_width[DW_DMA_MAX_NR_MASTERS]; 60 unsigned char data_width[DW_DMA_MAX_NR_MASTERS];
61}; 61};