1 files changed, 25 insertions, 3 deletions

diff --git a/include/linux/pci.h b/include/linux/pci.h
index 5c1c0ae38dd3..bd68ed11b394 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -183,6 +183,11 @@ enum pci_dev_flags {
         PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT = (__force pci_dev_flags_t) (1 << 9),
         /* Do not use FLR even if device advertises PCI_AF_CAP */
         PCI_DEV_FLAGS_NO_FLR_RESET = (__force pci_dev_flags_t) (1 << 10),
+        /*
+         * Resume before calling the driver's system suspend hooks, disabling
+         * the direct_complete optimization.
+         */
+        PCI_DEV_FLAGS_NEEDS_RESUME = (__force pci_dev_flags_t) (1 << 11),
 };
 
 enum pci_irq_reroute_variant {
@@ -356,6 +361,8 @@ struct pci_dev {
         unsigned int    msix_enabled:1;
         unsigned int    ari_enabled:1;  /* ARI forwarding */
         unsigned int    ats_enabled:1;  /* Address Translation Service */
+        unsigned int    pasid_enabled:1;        /* Process Address Space ID */
+        unsigned int    pri_enabled:1;          /* Page Request Interface */
         unsigned int    is_managed:1;
         unsigned int    needs_freset:1; /* Dev requires fundamental reset */
         unsigned int    state_saved:1;
@@ -366,7 +373,7 @@ struct pci_dev {
         unsigned int    is_thunderbolt:1; /* Thunderbolt controller */
         unsigned int    __aer_firmware_first_valid:1;
         unsigned int    __aer_firmware_first:1;
-        unsigned int    broken_intx_masking:1;
+        unsigned int    broken_intx_masking:1; /* INTx masking can't be used */
         unsigned int    io_window_1k:1; /* Intel P2P bridge 1K I/O windows */
         unsigned int    irq_managed:1;
         unsigned int    has_secondary_link:1;
@@ -399,6 +406,12 @@ struct pci_dev {
         u8              ats_stu;        /* ATS Smallest Translation Unit */
         atomic_t        ats_ref_cnt;    /* number of VFs with ATS enabled */
 #endif
+#ifdef CONFIG_PCI_PRI
+        u32             pri_reqs_alloc; /* Number of PRI requests allocated */
+#endif
+#ifdef CONFIG_PCI_PASID
+        u16             pasid_features;
+#endif
         phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */
         size_t romlen; /* Length of ROM if it's not from the BAR */
         char *driver_override; /* Driver name to force a match */
@@ -694,7 +707,8 @@ struct pci_error_handlers {
         pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
 
         /* PCI function reset prepare or completed */
-        void (*reset_notify)(struct pci_dev *dev, bool prepare);
+        void (*reset_prepare)(struct pci_dev *dev);
+        void (*reset_done)(struct pci_dev *dev);
 
         /* Device driver may resume normal operations */
         void (*resume)(struct pci_dev *dev);
@@ -1004,6 +1018,15 @@ int __must_check pci_reenable_device(struct pci_dev *);
 int __must_check pcim_enable_device(struct pci_dev *pdev);
 void pcim_pin_device(struct pci_dev *pdev);
 
+static inline bool pci_intx_mask_supported(struct pci_dev *pdev)
+{
+        /*
+         * INTx masking is supported if PCI_COMMAND_INTX_DISABLE is
+         * writable and no quirk has marked the feature broken.
+         */
+        return !pdev->broken_intx_masking;
+}
+
 static inline int pci_is_enabled(struct pci_dev *pdev)
 {
         return (atomic_read(&pdev->enable_cnt) > 0);
@@ -1027,7 +1050,6 @@ int __must_check pci_set_mwi(struct pci_dev *dev);
 int pci_try_set_mwi(struct pci_dev *dev);
 void pci_clear_mwi(struct pci_dev *dev);
 void pci_intx(struct pci_dev *dev, int enable);
-bool pci_intx_mask_supported(struct pci_dev *dev);
 bool pci_check_and_mask_intx(struct pci_dev *dev);
 bool pci_check_and_unmask_intx(struct pci_dev *dev);
 int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask);