diff options
Diffstat (limited to 'include/linux/mlx5/mlx5_ifc.h')
-rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 73 |
1 files changed, 59 insertions, 14 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 1391a82da98e..f4e417686f62 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h | |||
@@ -502,7 +502,7 @@ struct mlx5_ifc_ads_bits { | |||
502 | u8 dei_cfi[0x1]; | 502 | u8 dei_cfi[0x1]; |
503 | u8 eth_prio[0x3]; | 503 | u8 eth_prio[0x3]; |
504 | u8 sl[0x4]; | 504 | u8 sl[0x4]; |
505 | u8 port[0x8]; | 505 | u8 vhca_port_num[0x8]; |
506 | u8 rmac_47_32[0x10]; | 506 | u8 rmac_47_32[0x10]; |
507 | 507 | ||
508 | u8 rmac_31_0[0x20]; | 508 | u8 rmac_31_0[0x20]; |
@@ -794,7 +794,10 @@ enum { | |||
794 | }; | 794 | }; |
795 | 795 | ||
796 | struct mlx5_ifc_cmd_hca_cap_bits { | 796 | struct mlx5_ifc_cmd_hca_cap_bits { |
797 | u8 reserved_at_0[0x80]; | 797 | u8 reserved_at_0[0x30]; |
798 | u8 vhca_id[0x10]; | ||
799 | |||
800 | u8 reserved_at_40[0x40]; | ||
798 | 801 | ||
799 | u8 log_max_srq_sz[0x8]; | 802 | u8 log_max_srq_sz[0x8]; |
800 | u8 log_max_qp_sz[0x8]; | 803 | u8 log_max_qp_sz[0x8]; |
@@ -1023,13 +1026,21 @@ struct mlx5_ifc_cmd_hca_cap_bits { | |||
1023 | u8 reserved_at_3b8[0x3]; | 1026 | u8 reserved_at_3b8[0x3]; |
1024 | u8 log_min_stride_sz_sq[0x5]; | 1027 | u8 log_min_stride_sz_sq[0x5]; |
1025 | 1028 | ||
1026 | u8 reserved_at_3c0[0x1b]; | 1029 | u8 hairpin[0x1]; |
1030 | u8 reserved_at_3c1[0x2]; | ||
1031 | u8 log_max_hairpin_queues[0x5]; | ||
1032 | u8 reserved_at_3c8[0x3]; | ||
1033 | u8 log_max_hairpin_wq_data_sz[0x5]; | ||
1034 | u8 reserved_at_3d0[0x3]; | ||
1035 | u8 log_max_hairpin_num_packets[0x5]; | ||
1036 | u8 reserved_at_3d8[0x3]; | ||
1027 | u8 log_max_wq_sz[0x5]; | 1037 | u8 log_max_wq_sz[0x5]; |
1028 | 1038 | ||
1029 | u8 nic_vport_change_event[0x1]; | 1039 | u8 nic_vport_change_event[0x1]; |
1030 | u8 disable_local_lb_uc[0x1]; | 1040 | u8 disable_local_lb_uc[0x1]; |
1031 | u8 disable_local_lb_mc[0x1]; | 1041 | u8 disable_local_lb_mc[0x1]; |
1032 | u8 reserved_at_3e3[0x8]; | 1042 | u8 log_min_hairpin_wq_data_sz[0x5]; |
1043 | u8 reserved_at_3e8[0x3]; | ||
1033 | u8 log_max_vlan_list[0x5]; | 1044 | u8 log_max_vlan_list[0x5]; |
1034 | u8 reserved_at_3f0[0x3]; | 1045 | u8 reserved_at_3f0[0x3]; |
1035 | u8 log_max_current_mc_list[0x5]; | 1046 | u8 log_max_current_mc_list[0x5]; |
@@ -1067,7 +1078,12 @@ struct mlx5_ifc_cmd_hca_cap_bits { | |||
1067 | u8 reserved_at_5f8[0x3]; | 1078 | u8 reserved_at_5f8[0x3]; |
1068 | u8 log_max_xrq[0x5]; | 1079 | u8 log_max_xrq[0x5]; |
1069 | 1080 | ||
1070 | u8 reserved_at_600[0x200]; | 1081 | u8 affiliate_nic_vport_criteria[0x8]; |
1082 | u8 native_port_num[0x8]; | ||
1083 | u8 num_vhca_ports[0x8]; | ||
1084 | u8 reserved_at_618[0x6]; | ||
1085 | u8 sw_owner_id[0x1]; | ||
1086 | u8 reserved_at_61f[0x1e1]; | ||
1071 | }; | 1087 | }; |
1072 | 1088 | ||
1073 | enum mlx5_flow_destination_type { | 1089 | enum mlx5_flow_destination_type { |
@@ -1163,7 +1179,12 @@ struct mlx5_ifc_wq_bits { | |||
1163 | u8 reserved_at_118[0x3]; | 1179 | u8 reserved_at_118[0x3]; |
1164 | u8 log_wq_sz[0x5]; | 1180 | u8 log_wq_sz[0x5]; |
1165 | 1181 | ||
1166 | u8 reserved_at_120[0x15]; | 1182 | u8 reserved_at_120[0x3]; |
1183 | u8 log_hairpin_num_packets[0x5]; | ||
1184 | u8 reserved_at_128[0x3]; | ||
1185 | u8 log_hairpin_data_sz[0x5]; | ||
1186 | u8 reserved_at_130[0x5]; | ||
1187 | |||
1167 | u8 log_wqe_num_of_strides[0x3]; | 1188 | u8 log_wqe_num_of_strides[0x3]; |
1168 | u8 two_byte_shift_en[0x1]; | 1189 | u8 two_byte_shift_en[0x1]; |
1169 | u8 reserved_at_139[0x4]; | 1190 | u8 reserved_at_139[0x4]; |
@@ -2483,7 +2504,8 @@ struct mlx5_ifc_sqc_bits { | |||
2483 | u8 state[0x4]; | 2504 | u8 state[0x4]; |
2484 | u8 reg_umr[0x1]; | 2505 | u8 reg_umr[0x1]; |
2485 | u8 allow_swp[0x1]; | 2506 | u8 allow_swp[0x1]; |
2486 | u8 reserved_at_e[0x12]; | 2507 | u8 hairpin[0x1]; |
2508 | u8 reserved_at_f[0x11]; | ||
2487 | 2509 | ||
2488 | u8 reserved_at_20[0x8]; | 2510 | u8 reserved_at_20[0x8]; |
2489 | u8 user_index[0x18]; | 2511 | u8 user_index[0x18]; |
@@ -2491,7 +2513,13 @@ struct mlx5_ifc_sqc_bits { | |||
2491 | u8 reserved_at_40[0x8]; | 2513 | u8 reserved_at_40[0x8]; |
2492 | u8 cqn[0x18]; | 2514 | u8 cqn[0x18]; |
2493 | 2515 | ||
2494 | u8 reserved_at_60[0x90]; | 2516 | u8 reserved_at_60[0x8]; |
2517 | u8 hairpin_peer_rq[0x18]; | ||
2518 | |||
2519 | u8 reserved_at_80[0x10]; | ||
2520 | u8 hairpin_peer_vhca[0x10]; | ||
2521 | |||
2522 | u8 reserved_at_a0[0x50]; | ||
2495 | 2523 | ||
2496 | u8 packet_pacing_rate_limit_index[0x10]; | 2524 | u8 packet_pacing_rate_limit_index[0x10]; |
2497 | u8 tis_lst_sz[0x10]; | 2525 | u8 tis_lst_sz[0x10]; |
@@ -2563,7 +2591,8 @@ struct mlx5_ifc_rqc_bits { | |||
2563 | u8 state[0x4]; | 2591 | u8 state[0x4]; |
2564 | u8 reserved_at_c[0x1]; | 2592 | u8 reserved_at_c[0x1]; |
2565 | u8 flush_in_error_en[0x1]; | 2593 | u8 flush_in_error_en[0x1]; |
2566 | u8 reserved_at_e[0x12]; | 2594 | u8 hairpin[0x1]; |
2595 | u8 reserved_at_f[0x11]; | ||
2567 | 2596 | ||
2568 | u8 reserved_at_20[0x8]; | 2597 | u8 reserved_at_20[0x8]; |
2569 | u8 user_index[0x18]; | 2598 | u8 user_index[0x18]; |
@@ -2577,7 +2606,13 @@ struct mlx5_ifc_rqc_bits { | |||
2577 | u8 reserved_at_80[0x8]; | 2606 | u8 reserved_at_80[0x8]; |
2578 | u8 rmpn[0x18]; | 2607 | u8 rmpn[0x18]; |
2579 | 2608 | ||
2580 | u8 reserved_at_a0[0xe0]; | 2609 | u8 reserved_at_a0[0x8]; |
2610 | u8 hairpin_peer_sq[0x18]; | ||
2611 | |||
2612 | u8 reserved_at_c0[0x10]; | ||
2613 | u8 hairpin_peer_vhca[0x10]; | ||
2614 | |||
2615 | u8 reserved_at_e0[0xa0]; | ||
2581 | 2616 | ||
2582 | struct mlx5_ifc_wq_bits wq; | 2617 | struct mlx5_ifc_wq_bits wq; |
2583 | }; | 2618 | }; |
@@ -2616,7 +2651,12 @@ struct mlx5_ifc_nic_vport_context_bits { | |||
2616 | u8 event_on_mc_address_change[0x1]; | 2651 | u8 event_on_mc_address_change[0x1]; |
2617 | u8 event_on_uc_address_change[0x1]; | 2652 | u8 event_on_uc_address_change[0x1]; |
2618 | 2653 | ||
2619 | u8 reserved_at_40[0xf0]; | 2654 | u8 reserved_at_40[0xc]; |
2655 | |||
2656 | u8 affiliation_criteria[0x4]; | ||
2657 | u8 affiliated_vhca_id[0x10]; | ||
2658 | |||
2659 | u8 reserved_at_60[0xd0]; | ||
2620 | 2660 | ||
2621 | u8 mtu[0x10]; | 2661 | u8 mtu[0x10]; |
2622 | 2662 | ||
@@ -3259,7 +3299,8 @@ struct mlx5_ifc_set_roce_address_in_bits { | |||
3259 | u8 op_mod[0x10]; | 3299 | u8 op_mod[0x10]; |
3260 | 3300 | ||
3261 | u8 roce_address_index[0x10]; | 3301 | u8 roce_address_index[0x10]; |
3262 | u8 reserved_at_50[0x10]; | 3302 | u8 reserved_at_50[0xc]; |
3303 | u8 vhca_port_num[0x4]; | ||
3263 | 3304 | ||
3264 | u8 reserved_at_60[0x20]; | 3305 | u8 reserved_at_60[0x20]; |
3265 | 3306 | ||
@@ -3879,7 +3920,8 @@ struct mlx5_ifc_query_roce_address_in_bits { | |||
3879 | u8 op_mod[0x10]; | 3920 | u8 op_mod[0x10]; |
3880 | 3921 | ||
3881 | u8 roce_address_index[0x10]; | 3922 | u8 roce_address_index[0x10]; |
3882 | u8 reserved_at_50[0x10]; | 3923 | u8 reserved_at_50[0xc]; |
3924 | u8 vhca_port_num[0x4]; | ||
3883 | 3925 | ||
3884 | u8 reserved_at_60[0x20]; | 3926 | u8 reserved_at_60[0x20]; |
3885 | }; | 3927 | }; |
@@ -5311,7 +5353,9 @@ struct mlx5_ifc_modify_nic_vport_context_out_bits { | |||
5311 | }; | 5353 | }; |
5312 | 5354 | ||
5313 | struct mlx5_ifc_modify_nic_vport_field_select_bits { | 5355 | struct mlx5_ifc_modify_nic_vport_field_select_bits { |
5314 | u8 reserved_at_0[0x14]; | 5356 | u8 reserved_at_0[0x12]; |
5357 | u8 affiliation[0x1]; | ||
5358 | u8 reserved_at_e[0x1]; | ||
5315 | u8 disable_uc_local_lb[0x1]; | 5359 | u8 disable_uc_local_lb[0x1]; |
5316 | u8 disable_mc_local_lb[0x1]; | 5360 | u8 disable_mc_local_lb[0x1]; |
5317 | u8 node_guid[0x1]; | 5361 | u8 node_guid[0x1]; |
@@ -5532,6 +5576,7 @@ struct mlx5_ifc_init_hca_in_bits { | |||
5532 | u8 op_mod[0x10]; | 5576 | u8 op_mod[0x10]; |
5533 | 5577 | ||
5534 | u8 reserved_at_40[0x40]; | 5578 | u8 reserved_at_40[0x40]; |
5579 | u8 sw_owner_id[4][0x20]; | ||
5535 | }; | 5580 | }; |
5536 | 5581 | ||
5537 | struct mlx5_ifc_init2rtr_qp_out_bits { | 5582 | struct mlx5_ifc_init2rtr_qp_out_bits { |