3 files changed, 177 insertions, 180 deletions

diff --git a/include/linux/mfd/max77693-common.h b/include/linux/mfd/max77693-common.h
new file mode 100644
index 000000000000..095b121aa725
--- /dev/null
+++ b/include/linux/mfd/max77693-common.h
@@ -0,0 +1,49 @@
+/*
+ * Common data shared between Maxim 77693 and 77843 drivers
+ *
+ * Copyright (C) 2015 Samsung Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __LINUX_MFD_MAX77693_COMMON_H
+#define __LINUX_MFD_MAX77693_COMMON_H
+
+enum max77693_types {
+        TYPE_MAX77693_UNKNOWN,
+        TYPE_MAX77693,
+        TYPE_MAX77843,
+
+        TYPE_MAX77693_NUM,
+};
+
+/*
+ * Shared also with max77843.
+ */
+struct max77693_dev {
+        struct device *dev;
+        struct i2c_client *i2c;         /* 0xCC , PMIC, Charger, Flash LED */
+        struct i2c_client *i2c_muic;    /* 0x4A , MUIC */
+        struct i2c_client *i2c_haptic;  /* MAX77693: 0x90 , Haptic */
+        struct i2c_client *i2c_chg;     /* MAX77843: 0xD2, Charger */
+
+        enum max77693_types type;
+
+        struct regmap *regmap;
+        struct regmap *regmap_muic;
+        struct regmap *regmap_haptic;   /* Only MAX77693 */
+        struct regmap *regmap_chg;      /* Only MAX77843 */
+
+        struct regmap_irq_chip_data *irq_data_led;
+        struct regmap_irq_chip_data *irq_data_topsys;
+        struct regmap_irq_chip_data *irq_data_chg; /* Only MAX77693 */
+        struct regmap_irq_chip_data *irq_data_muic;
+
+        int irq;
+};
+
+
+#endif /*  __LINUX_MFD_MAX77693_COMMON_H */
diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h
index 51633ea6f910..3c7a63b98ad6 100644
--- a/include/linux/mfd/max77693-private.h
+++ b/include/linux/mfd/max77693-private.h
@@ -310,30 +310,30 @@ enum max77693_muic_reg {
 #define INTMASK2_CHGTYP_MASK            (1 << INTMASK2_CHGTYP_SHIFT)
 
 /* MAX77693 MUIC - STATUS1~3 Register */
-#define STATUS1_ADC_SHIFT               (0)
-#define STATUS1_ADCLOW_SHIFT            (5)
-#define STATUS1_ADCERR_SHIFT            (6)
-#define STATUS1_ADC1K_SHIFT             (7)
-#define STATUS1_ADC_MASK                (0x1f << STATUS1_ADC_SHIFT)
-#define STATUS1_ADCLOW_MASK             (0x1 << STATUS1_ADCLOW_SHIFT)
-#define STATUS1_ADCERR_MASK             (0x1 << STATUS1_ADCERR_SHIFT)
-#define STATUS1_ADC1K_MASK              (0x1 << STATUS1_ADC1K_SHIFT)
-
-#define STATUS2_CHGTYP_SHIFT            (0)
-#define STATUS2_CHGDETRUN_SHIFT         (3)
-#define STATUS2_DCDTMR_SHIFT            (4)
-#define STATUS2_DXOVP_SHIFT             (5)
-#define STATUS2_VBVOLT_SHIFT            (6)
-#define STATUS2_VIDRM_SHIFT             (7)
-#define STATUS2_CHGTYP_MASK             (0x7 << STATUS2_CHGTYP_SHIFT)
-#define STATUS2_CHGDETRUN_MASK          (0x1 << STATUS2_CHGDETRUN_SHIFT)
-#define STATUS2_DCDTMR_MASK             (0x1 << STATUS2_DCDTMR_SHIFT)
-#define STATUS2_DXOVP_MASK              (0x1 << STATUS2_DXOVP_SHIFT)
-#define STATUS2_VBVOLT_MASK             (0x1 << STATUS2_VBVOLT_SHIFT)
-#define STATUS2_VIDRM_MASK              (0x1 << STATUS2_VIDRM_SHIFT)
-
-#define STATUS3_OVP_SHIFT               (2)
-#define STATUS3_OVP_MASK                (0x1 << STATUS3_OVP_SHIFT)
+#define MAX77693_STATUS1_ADC_SHIFT              0
+#define MAX77693_STATUS1_ADCLOW_SHIFT           5
+#define MAX77693_STATUS1_ADCERR_SHIFT           6
+#define MAX77693_STATUS1_ADC1K_SHIFT            7
+#define MAX77693_STATUS1_ADC_MASK               (0x1f << MAX77693_STATUS1_ADC_SHIFT)
+#define MAX77693_STATUS1_ADCLOW_MASK            BIT(MAX77693_STATUS1_ADCLOW_SHIFT)
+#define MAX77693_STATUS1_ADCERR_MASK            BIT(MAX77693_STATUS1_ADCERR_SHIFT)
+#define MAX77693_STATUS1_ADC1K_MASK             BIT(MAX77693_STATUS1_ADC1K_SHIFT)
+
+#define MAX77693_STATUS2_CHGTYP_SHIFT           0
+#define MAX77693_STATUS2_CHGDETRUN_SHIFT        3
+#define MAX77693_STATUS2_DCDTMR_SHIFT           4
+#define MAX77693_STATUS2_DXOVP_SHIFT            5
+#define MAX77693_STATUS2_VBVOLT_SHIFT           6
+#define MAX77693_STATUS2_VIDRM_SHIFT            7
+#define MAX77693_STATUS2_CHGTYP_MASK            (0x7 << MAX77693_STATUS2_CHGTYP_SHIFT)
+#define MAX77693_STATUS2_CHGDETRUN_MASK         BIT(MAX77693_STATUS2_CHGDETRUN_SHIFT)
+#define MAX77693_STATUS2_DCDTMR_MASK            BIT(MAX77693_STATUS2_DCDTMR_SHIFT)
+#define MAX77693_STATUS2_DXOVP_MASK             BIT(MAX77693_STATUS2_DXOVP_SHIFT)
+#define MAX77693_STATUS2_VBVOLT_MASK            BIT(MAX77693_STATUS2_VBVOLT_SHIFT)
+#define MAX77693_STATUS2_VIDRM_MASK             BIT(MAX77693_STATUS2_VIDRM_SHIFT)
+
+#define MAX77693_STATUS3_OVP_SHIFT              2
+#define MAX77693_STATUS3_OVP_MASK               BIT(MAX77693_STATUS3_OVP_SHIFT)
 
 /* MAX77693 CDETCTRL1~2 register */
 #define CDETCTRL1_CHGDETEN_SHIFT        (0)
@@ -362,38 +362,38 @@ enum max77693_muic_reg {
 #define COMN1SW_MASK                    (0x7 << COMN1SW_SHIFT)
 #define COMP2SW_MASK                    (0x7 << COMP2SW_SHIFT)
 #define COMP_SW_MASK                    (COMP2SW_MASK | COMN1SW_MASK)
-#define CONTROL1_SW_USB                 ((1 << COMP2SW_SHIFT) \
+#define MAX77693_CONTROL1_SW_USB        ((1 << COMP2SW_SHIFT) \
                                                 | (1 << COMN1SW_SHIFT))
-#define CONTROL1_SW_AUDIO               ((2 << COMP2SW_SHIFT) \
+#define MAX77693_CONTROL1_SW_AUDIO      ((2 << COMP2SW_SHIFT) \
                                                 | (2 << COMN1SW_SHIFT))
-#define CONTROL1_SW_UART                ((3 << COMP2SW_SHIFT) \
+#define MAX77693_CONTROL1_SW_UART       ((3 << COMP2SW_SHIFT) \
                                                 | (3 << COMN1SW_SHIFT))
-#define CONTROL1_SW_OPEN                ((0 << COMP2SW_SHIFT) \
+#define MAX77693_CONTROL1_SW_OPEN       ((0 << COMP2SW_SHIFT) \
                                                 | (0 << COMN1SW_SHIFT))
 
-#define CONTROL2_LOWPWR_SHIFT           (0)
-#define CONTROL2_ADCEN_SHIFT            (1)
-#define CONTROL2_CPEN_SHIFT             (2)
-#define CONTROL2_SFOUTASRT_SHIFT        (3)
-#define CONTROL2_SFOUTORD_SHIFT         (4)
-#define CONTROL2_ACCDET_SHIFT           (5)
-#define CONTROL2_USBCPINT_SHIFT         (6)
-#define CONTROL2_RCPS_SHIFT             (7)
-#define CONTROL2_LOWPWR_MASK            (0x1 << CONTROL2_LOWPWR_SHIFT)
-#define CONTROL2_ADCEN_MASK             (0x1 << CONTROL2_ADCEN_SHIFT)
-#define CONTROL2_CPEN_MASK              (0x1 << CONTROL2_CPEN_SHIFT)
-#define CONTROL2_SFOUTASRT_MASK         (0x1 << CONTROL2_SFOUTASRT_SHIFT)
-#define CONTROL2_SFOUTORD_MASK          (0x1 << CONTROL2_SFOUTORD_SHIFT)
-#define CONTROL2_ACCDET_MASK            (0x1 << CONTROL2_ACCDET_SHIFT)
-#define CONTROL2_USBCPINT_MASK          (0x1 << CONTROL2_USBCPINT_SHIFT)
-#define CONTROL2_RCPS_MASK              (0x1 << CONTROL2_RCPS_SHIFT)
-
-#define CONTROL3_JIGSET_SHIFT           (0)
-#define CONTROL3_BTLDSET_SHIFT          (2)
-#define CONTROL3_ADCDBSET_SHIFT         (4)
-#define CONTROL3_JIGSET_MASK            (0x3 << CONTROL3_JIGSET_SHIFT)
-#define CONTROL3_BTLDSET_MASK           (0x3 << CONTROL3_BTLDSET_SHIFT)
-#define CONTROL3_ADCDBSET_MASK          (0x3 << CONTROL3_ADCDBSET_SHIFT)
+#define MAX77693_CONTROL2_LOWPWR_SHIFT          0
+#define MAX77693_CONTROL2_ADCEN_SHIFT           1
+#define MAX77693_CONTROL2_CPEN_SHIFT            2
+#define MAX77693_CONTROL2_SFOUTASRT_SHIFT       3
+#define MAX77693_CONTROL2_SFOUTORD_SHIFT        4
+#define MAX77693_CONTROL2_ACCDET_SHIFT          5
+#define MAX77693_CONTROL2_USBCPINT_SHIFT        6
+#define MAX77693_CONTROL2_RCPS_SHIFT            7
+#define MAX77693_CONTROL2_LOWPWR_MASK           BIT(MAX77693_CONTROL2_LOWPWR_SHIFT)
+#define MAX77693_CONTROL2_ADCEN_MASK            BIT(MAX77693_CONTROL2_ADCEN_SHIFT)
+#define MAX77693_CONTROL2_CPEN_MASK             BIT(MAX77693_CONTROL2_CPEN_SHIFT)
+#define MAX77693_CONTROL2_SFOUTASRT_MASK        BIT(MAX77693_CONTROL2_SFOUTASRT_SHIFT)
+#define MAX77693_CONTROL2_SFOUTORD_MASK         BIT(MAX77693_CONTROL2_SFOUTORD_SHIFT)
+#define MAX77693_CONTROL2_ACCDET_MASK           BIT(MAX77693_CONTROL2_ACCDET_SHIFT)
+#define MAX77693_CONTROL2_USBCPINT_MASK         BIT(MAX77693_CONTROL2_USBCPINT_SHIFT)
+#define MAX77693_CONTROL2_RCPS_MASK             BIT(MAX77693_CONTROL2_RCPS_SHIFT)
+
+#define MAX77693_CONTROL3_JIGSET_SHIFT          0
+#define MAX77693_CONTROL3_BTLDSET_SHIFT         2
+#define MAX77693_CONTROL3_ADCDBSET_SHIFT        4
+#define MAX77693_CONTROL3_JIGSET_MASK           (0x3 << MAX77693_CONTROL3_JIGSET_SHIFT)
+#define MAX77693_CONTROL3_BTLDSET_MASK          (0x3 << MAX77693_CONTROL3_BTLDSET_SHIFT)
+#define MAX77693_CONTROL3_ADCDBSET_MASK         (0x3 << MAX77693_CONTROL3_ADCDBSET_SHIFT)
 
 /* Slave addr = 0x90: Haptic */
 enum max77693_haptic_reg {
@@ -529,36 +529,4 @@ enum max77693_irq_muic {
         MAX77693_MUIC_IRQ_NR,
 };
 
-struct max77693_dev {
-        struct device *dev;
-        struct i2c_client *i2c;         /* 0xCC , PMIC, Charger, Flash LED */
-        struct i2c_client *muic;        /* 0x4A , MUIC */
-        struct i2c_client *haptic;      /* 0x90 , Haptic */
-
-        int type;
-
-        struct regmap *regmap;
-        struct regmap *regmap_muic;
-        struct regmap *regmap_haptic;
-
-        struct regmap_irq_chip_data *irq_data_led;
-        struct regmap_irq_chip_data *irq_data_topsys;
-        struct regmap_irq_chip_data *irq_data_charger;
-        struct regmap_irq_chip_data *irq_data_muic;
-
-        int irq;
-        int irq_gpio;
-        struct mutex irqlock;
-        int irq_masks_cur[MAX77693_IRQ_GROUP_NR];
-        int irq_masks_cache[MAX77693_IRQ_GROUP_NR];
-};
-
-enum max77693_types {
-        TYPE_MAX77693,
-};
-
-extern int max77693_irq_init(struct max77693_dev *max77686);
-extern void max77693_irq_exit(struct max77693_dev *max77686);
-extern int max77693_irq_resume(struct max77693_dev *max77686);
-
 #endif /*  __LINUX_MFD_MAX77693_PRIV_H */
diff --git a/include/linux/mfd/max77843-private.h b/include/linux/mfd/max77843-private.h
index 7178ace8379e..c19303b0ccfd 100644
--- a/include/linux/mfd/max77843-private.h
+++ b/include/linux/mfd/max77843-private.h
@@ -318,62 +318,62 @@ enum max77843_irq_muic {
         MAX77843_INTSRCMASK_SYS_MASK | MAX77843_INTSRCMASK_CHGR_MASK)
 
 /* MAX77843 STATUS register*/
-#define STATUS1_ADC_SHIFT                       0
-#define STATUS1_ADCERROR_SHIFT                  6
-#define STATUS1_ADC1K_SHIFT                     7
-#define STATUS2_CHGTYP_SHIFT                    0
-#define STATUS2_CHGDETRUN_SHIFT                 3
-#define STATUS2_DCDTMR_SHIFT                    4
-#define STATUS2_DXOVP_SHIFT                     5
-#define STATUS2_VBVOLT_SHIFT                    6
-#define STATUS3_VBADC_SHIFT                     0
-#define STATUS3_VDNMON_SHIFT                    4
-#define STATUS3_DNRES_SHIFT                     5
-#define STATUS3_MPNACK_SHIFT                    6
-
-#define MAX77843_MUIC_STATUS1_ADC_MASK          (0x1f << STATUS1_ADC_SHIFT)
-#define MAX77843_MUIC_STATUS1_ADCERROR_MASK     BIT(STATUS1_ADCERROR_SHIFT)
-#define MAX77843_MUIC_STATUS1_ADC1K_MASK        BIT(STATUS1_ADC1K_SHIFT)
-#define MAX77843_MUIC_STATUS2_CHGTYP_MASK       (0x7 << STATUS2_CHGTYP_SHIFT)
-#define MAX77843_MUIC_STATUS2_CHGDETRUN_MASK    BIT(STATUS2_CHGDETRUN_SHIFT)
-#define MAX77843_MUIC_STATUS2_DCDTMR_MASK       BIT(STATUS2_DCDTMR_SHIFT)
-#define MAX77843_MUIC_STATUS2_DXOVP_MASK        BIT(STATUS2_DXOVP_SHIFT)
-#define MAX77843_MUIC_STATUS2_VBVOLT_MASK       BIT(STATUS2_VBVOLT_SHIFT)
-#define MAX77843_MUIC_STATUS3_VBADC_MASK        (0xf << STATUS3_VBADC_SHIFT)
-#define MAX77843_MUIC_STATUS3_VDNMON_MASK       BIT(STATUS3_VDNMON_SHIFT)
-#define MAX77843_MUIC_STATUS3_DNRES_MASK        BIT(STATUS3_DNRES_SHIFT)
-#define MAX77843_MUIC_STATUS3_MPNACK_MASK       BIT(STATUS3_MPNACK_SHIFT)
+#define MAX77843_MUIC_STATUS1_ADC_SHIFT         0
+#define MAX77843_MUIC_STATUS1_ADCERROR_SHIFT    6
+#define MAX77843_MUIC_STATUS1_ADC1K_SHIFT       7
+#define MAX77843_MUIC_STATUS2_CHGTYP_SHIFT      0
+#define MAX77843_MUIC_STATUS2_CHGDETRUN_SHIFT   3
+#define MAX77843_MUIC_STATUS2_DCDTMR_SHIFT      4
+#define MAX77843_MUIC_STATUS2_DXOVP_SHIFT       5
+#define MAX77843_MUIC_STATUS2_VBVOLT_SHIFT      6
+#define MAX77843_MUIC_STATUS3_VBADC_SHIFT       0
+#define MAX77843_MUIC_STATUS3_VDNMON_SHIFT      4
+#define MAX77843_MUIC_STATUS3_DNRES_SHIFT       5
+#define MAX77843_MUIC_STATUS3_MPNACK_SHIFT      6
+
+#define MAX77843_MUIC_STATUS1_ADC_MASK          (0x1f << MAX77843_MUIC_STATUS1_ADC_SHIFT)
+#define MAX77843_MUIC_STATUS1_ADCERROR_MASK     BIT(MAX77843_MUIC_STATUS1_ADCERROR_SHIFT)
+#define MAX77843_MUIC_STATUS1_ADC1K_MASK        BIT(MAX77843_MUIC_STATUS1_ADC1K_SHIFT)
+#define MAX77843_MUIC_STATUS2_CHGTYP_MASK       (0x7 << MAX77843_MUIC_STATUS2_CHGTYP_SHIFT)
+#define MAX77843_MUIC_STATUS2_CHGDETRUN_MASK    BIT(MAX77843_MUIC_STATUS2_CHGDETRUN_SHIFT)
+#define MAX77843_MUIC_STATUS2_DCDTMR_MASK       BIT(MAX77843_MUIC_STATUS2_DCDTMR_SHIFT)
+#define MAX77843_MUIC_STATUS2_DXOVP_MASK        BIT(MAX77843_MUIC_STATUS2_DXOVP_SHIFT)
+#define MAX77843_MUIC_STATUS2_VBVOLT_MASK       BIT(MAX77843_MUIC_STATUS2_VBVOLT_SHIFT)
+#define MAX77843_MUIC_STATUS3_VBADC_MASK        (0xf << MAX77843_MUIC_STATUS3_VBADC_SHIFT)
+#define MAX77843_MUIC_STATUS3_VDNMON_MASK       BIT(MAX77843_MUIC_STATUS3_VDNMON_SHIFT)
+#define MAX77843_MUIC_STATUS3_DNRES_MASK        BIT(MAX77843_MUIC_STATUS3_DNRES_SHIFT)
+#define MAX77843_MUIC_STATUS3_MPNACK_MASK       BIT(MAX77843_MUIC_STATUS3_MPNACK_SHIFT)
 
 /* MAX77843 CONTROL register */
-#define CONTROL1_COMP1SW_SHIFT                  0
-#define CONTROL1_COMP2SW_SHIFT                  3
-#define CONTROL1_IDBEN_SHIFT                    7
-#define CONTROL2_LOWPWR_SHIFT                   0
-#define CONTROL2_ADCEN_SHIFT                    1
-#define CONTROL2_CPEN_SHIFT                     2
-#define CONTROL2_ACC_DET_SHIFT                  5
-#define CONTROL2_USBCPINT_SHIFT                 6
-#define CONTROL2_RCPS_SHIFT                     7
-#define CONTROL3_JIGSET_SHIFT                   0
-#define CONTROL4_ADCDBSET_SHIFT                 0
-#define CONTROL4_USBAUTO_SHIFT                  4
-#define CONTROL4_FCTAUTO_SHIFT                  5
-#define CONTROL4_ADCMODE_SHIFT                  6
-
-#define MAX77843_MUIC_CONTROL1_COMP1SW_MASK     (0x7 << CONTROL1_COMP1SW_SHIFT)
-#define MAX77843_MUIC_CONTROL1_COMP2SW_MASK     (0x7 << CONTROL1_COMP2SW_SHIFT)
-#define MAX77843_MUIC_CONTROL1_IDBEN_MASK       BIT(CONTROL1_IDBEN_SHIFT)
-#define MAX77843_MUIC_CONTROL2_LOWPWR_MASK      BIT(CONTROL2_LOWPWR_SHIFT)
-#define MAX77843_MUIC_CONTROL2_ADCEN_MASK       BIT(CONTROL2_ADCEN_SHIFT)
-#define MAX77843_MUIC_CONTROL2_CPEN_MASK        BIT(CONTROL2_CPEN_SHIFT)
-#define MAX77843_MUIC_CONTROL2_ACC_DET_MASK     BIT(CONTROL2_ACC_DET_SHIFT)
-#define MAX77843_MUIC_CONTROL2_USBCPINT_MASK    BIT(CONTROL2_USBCPINT_SHIFT)
-#define MAX77843_MUIC_CONTROL2_RCPS_MASK        BIT(CONTROL2_RCPS_SHIFT)
-#define MAX77843_MUIC_CONTROL3_JIGSET_MASK      (0x3 << CONTROL3_JIGSET_SHIFT)
-#define MAX77843_MUIC_CONTROL4_ADCDBSET_MASK    (0x3 << CONTROL4_ADCDBSET_SHIFT)
-#define MAX77843_MUIC_CONTROL4_USBAUTO_MASK     BIT(CONTROL4_USBAUTO_SHIFT)
-#define MAX77843_MUIC_CONTROL4_FCTAUTO_MASK     BIT(CONTROL4_FCTAUTO_SHIFT)
-#define MAX77843_MUIC_CONTROL4_ADCMODE_MASK     (0x3 << CONTROL4_ADCMODE_SHIFT)
+#define MAX77843_MUIC_CONTROL1_COMP1SW_SHIFT    0
+#define MAX77843_MUIC_CONTROL1_COMP2SW_SHIFT    3
+#define MAX77843_MUIC_CONTROL1_IDBEN_SHIFT      7
+#define MAX77843_MUIC_CONTROL2_LOWPWR_SHIFT     0
+#define MAX77843_MUIC_CONTROL2_ADCEN_SHIFT      1
+#define MAX77843_MUIC_CONTROL2_CPEN_SHIFT       2
+#define MAX77843_MUIC_CONTROL2_ACC_DET_SHIFT    5
+#define MAX77843_MUIC_CONTROL2_USBCPINT_SHIFT   6
+#define MAX77843_MUIC_CONTROL2_RCPS_SHIFT       7
+#define MAX77843_MUIC_CONTROL3_JIGSET_SHIFT     0
+#define MAX77843_MUIC_CONTROL4_ADCDBSET_SHIFT   0
+#define MAX77843_MUIC_CONTROL4_USBAUTO_SHIFT    4
+#define MAX77843_MUIC_CONTROL4_FCTAUTO_SHIFT    5
+#define MAX77843_MUIC_CONTROL4_ADCMODE_SHIFT    6
+
+#define MAX77843_MUIC_CONTROL1_COMP1SW_MASK     (0x7 << MAX77843_MUIC_CONTROL1_COMP1SW_SHIFT)
+#define MAX77843_MUIC_CONTROL1_COMP2SW_MASK     (0x7 << MAX77843_MUIC_CONTROL1_COMP2SW_SHIFT)
+#define MAX77843_MUIC_CONTROL1_IDBEN_MASK       BIT(MAX77843_MUIC_CONTROL1_IDBEN_SHIFT)
+#define MAX77843_MUIC_CONTROL2_LOWPWR_MASK      BIT(MAX77843_MUIC_CONTROL2_LOWPWR_SHIFT)
+#define MAX77843_MUIC_CONTROL2_ADCEN_MASK       BIT(MAX77843_MUIC_CONTROL2_ADCEN_SHIFT)
+#define MAX77843_MUIC_CONTROL2_CPEN_MASK        BIT(MAX77843_MUIC_CONTROL2_CPEN_SHIFT)
+#define MAX77843_MUIC_CONTROL2_ACC_DET_MASK     BIT(MAX77843_MUIC_CONTROL2_ACC_DET_SHIFT)
+#define MAX77843_MUIC_CONTROL2_USBCPINT_MASK    BIT(MAX77843_MUIC_CONTROL2_USBCPINT_SHIFT)
+#define MAX77843_MUIC_CONTROL2_RCPS_MASK        BIT(MAX77843_MUIC_CONTROL2_RCPS_SHIFT)
+#define MAX77843_MUIC_CONTROL3_JIGSET_MASK      (0x3 << MAX77843_MUIC_CONTROL3_JIGSET_SHIFT)
+#define MAX77843_MUIC_CONTROL4_ADCDBSET_MASK    (0x3 << MAX77843_MUIC_CONTROL4_ADCDBSET_SHIFT)
+#define MAX77843_MUIC_CONTROL4_USBAUTO_MASK     BIT(MAX77843_MUIC_CONTROL4_USBAUTO_SHIFT)
+#define MAX77843_MUIC_CONTROL4_FCTAUTO_MASK     BIT(MAX77843_MUIC_CONTROL4_FCTAUTO_SHIFT)
+#define MAX77843_MUIC_CONTROL4_ADCMODE_MASK     (0x3 << MAX77843_MUIC_CONTROL4_ADCMODE_SHIFT)
 
 /* MAX77843 switch port */
 #define COM_OPEN                                0
@@ -383,38 +383,38 @@ enum max77843_irq_muic {
 #define COM_AUX_USB                             4
 #define COM_AUX_UART                            5
 
-#define CONTROL1_COM_SW \
+#define MAX77843_MUIC_CONTROL1_COM_SW \
         ((MAX77843_MUIC_CONTROL1_COMP1SW_MASK | \
          MAX77843_MUIC_CONTROL1_COMP2SW_MASK))
 
-#define CONTROL1_SW_OPEN \
-        ((COM_OPEN << CONTROL1_COMP1SW_SHIFT | \
-         COM_OPEN << CONTROL1_COMP2SW_SHIFT))
-#define CONTROL1_SW_USB \
-        ((COM_USB << CONTROL1_COMP1SW_SHIFT | \
-         COM_USB << CONTROL1_COMP2SW_SHIFT))
-#define CONTROL1_SW_AUDIO \
-        ((COM_AUDIO << CONTROL1_COMP1SW_SHIFT | \
-         COM_AUDIO << CONTROL1_COMP2SW_SHIFT))
-#define CONTROL1_SW_UART \
-        ((COM_UART << CONTROL1_COMP1SW_SHIFT | \
-         COM_UART << CONTROL1_COMP2SW_SHIFT))
-#define CONTROL1_SW_AUX_USB \
-        ((COM_AUX_USB << CONTROL1_COMP1SW_SHIFT | \
-         COM_AUX_USB << CONTROL1_COMP2SW_SHIFT))
-#define CONTROL1_SW_AUX_UART \
-        ((COM_AUX_UART << CONTROL1_COMP1SW_SHIFT | \
-         COM_AUX_UART << CONTROL1_COMP2SW_SHIFT))
+#define MAX77843_MUIC_CONTROL1_SW_OPEN \
+        ((COM_OPEN << MAX77843_MUIC_CONTROL1_COMP1SW_SHIFT | \
+         COM_OPEN << MAX77843_MUIC_CONTROL1_COMP2SW_SHIFT))
+#define MAX77843_MUIC_CONTROL1_SW_USB \
+        ((COM_USB << MAX77843_MUIC_CONTROL1_COMP1SW_SHIFT | \
+         COM_USB << MAX77843_MUIC_CONTROL1_COMP2SW_SHIFT))
+#define MAX77843_MUIC_CONTROL1_SW_AUDIO \
+        ((COM_AUDIO << MAX77843_MUIC_CONTROL1_COMP1SW_SHIFT | \
+         COM_AUDIO << MAX77843_MUIC_CONTROL1_COMP2SW_SHIFT))
+#define MAX77843_MUIC_CONTROL1_SW_UART \
+        ((COM_UART << MAX77843_MUIC_CONTROL1_COMP1SW_SHIFT | \
+         COM_UART << MAX77843_MUIC_CONTROL1_COMP2SW_SHIFT))
+#define MAX77843_MUIC_CONTROL1_SW_AUX_USB \
+        ((COM_AUX_USB << MAX77843_MUIC_CONTROL1_COMP1SW_SHIFT | \
+         COM_AUX_USB << MAX77843_MUIC_CONTROL1_COMP2SW_SHIFT))
+#define MAX77843_MUIC_CONTROL1_SW_AUX_UART \
+        ((COM_AUX_UART << MAX77843_MUIC_CONTROL1_COMP1SW_SHIFT | \
+         COM_AUX_UART << MAX77843_MUIC_CONTROL1_COMP2SW_SHIFT))
 
 #define MAX77843_DISABLE                        0
 #define MAX77843_ENABLE                         1
 
 #define CONTROL4_AUTO_DISABLE \
-        ((MAX77843_DISABLE << CONTROL4_USBAUTO_SHIFT) | \
-        (MAX77843_DISABLE << CONTROL4_FCTAUTO_SHIFT))
+        ((MAX77843_DISABLE << MAX77843_MUIC_CONTROL4_USBAUTO_SHIFT) | \
+        (MAX77843_DISABLE << MAX77843_MUIC_CONTROL4_FCTAUTO_SHIFT))
 #define CONTROL4_AUTO_ENABLE \
-        ((MAX77843_ENABLE << CONTROL4_USBAUTO_SHIFT) | \
-        (MAX77843_ENABLE << CONTROL4_FCTAUTO_SHIFT))
+        ((MAX77843_ENABLE << MAX77843_MUIC_CONTROL4_USBAUTO_SHIFT) | \
+        (MAX77843_ENABLE << MAX77843_MUIC_CONTROL4_FCTAUTO_SHIFT))
 
 /* MAX77843 SAFEOUT LDO Control register */
 #define SAFEOUTCTRL_SAFEOUT1_SHIFT              0
@@ -431,24 +431,4 @@ enum max77843_irq_muic {
 #define MAX77843_REG_SAFEOUTCTRL_SAFEOUT2_MASK \
                 (0x3 << SAFEOUTCTRL_SAFEOUT2_SHIFT)
 
-struct max77843 {
-        struct device *dev;
-
-        struct i2c_client *i2c;
-        struct i2c_client *i2c_chg;
-        struct i2c_client *i2c_fuel;
-        struct i2c_client *i2c_muic;
-
-        struct regmap *regmap;
-        struct regmap *regmap_chg;
-        struct regmap *regmap_fuel;
-        struct regmap *regmap_muic;
-
-        struct regmap_irq_chip_data *irq_data;
-        struct regmap_irq_chip_data *irq_data_chg;
-        struct regmap_irq_chip_data *irq_data_fuel;
-        struct regmap_irq_chip_data *irq_data_muic;
-
-        int irq;
-};
 #endif /* __MAX77843_H__ */