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-rw-r--r--include/linux/mfd/88pm860x.h20
-rw-r--r--include/linux/mfd/ab8500.h4
-rw-r--r--include/linux/mfd/ab8500/gpadc.h32
-rw-r--r--include/linux/mfd/ab8500/sysctrl.h254
-rw-r--r--include/linux/mfd/abx500.h1
-rw-r--r--include/linux/mfd/core.h54
-rw-r--r--include/linux/mfd/max8997-private.h347
-rw-r--r--include/linux/mfd/max8997.h114
-rw-r--r--include/linux/mfd/mc13xxx.h3
-rw-r--r--include/linux/mfd/tps6105x.h101
-rw-r--r--include/linux/mfd/wl1273-core.h2
-rw-r--r--include/linux/mfd/wm831x/pdata.h6
-rw-r--r--include/linux/mfd/wm8994/core.h4
13 files changed, 920 insertions, 22 deletions
diff --git a/include/linux/mfd/88pm860x.h b/include/linux/mfd/88pm860x.h
index 4db1fbd8969e..8fba7972ff5f 100644
--- a/include/linux/mfd/88pm860x.h
+++ b/include/linux/mfd/88pm860x.h
@@ -131,9 +131,11 @@ enum {
131 PM8607_ID_LDO8, 131 PM8607_ID_LDO8,
132 PM8607_ID_LDO9, 132 PM8607_ID_LDO9,
133 PM8607_ID_LDO10, 133 PM8607_ID_LDO10,
134 PM8607_ID_LDO11,
134 PM8607_ID_LDO12, 135 PM8607_ID_LDO12,
135 PM8607_ID_LDO13, 136 PM8607_ID_LDO13,
136 PM8607_ID_LDO14, 137 PM8607_ID_LDO14,
138 PM8607_ID_LDO15,
137 139
138 PM8607_ID_RG_MAX, 140 PM8607_ID_RG_MAX,
139}; 141};
@@ -310,8 +312,6 @@ struct pm860x_chip {
310 312
311}; 313};
312 314
313#define PM8607_MAX_REGULATOR PM8607_ID_RG_MAX /* 3 Bucks, 13 LDOs */
314
315enum { 315enum {
316 GI2C_PORT = 0, 316 GI2C_PORT = 0,
317 PI2C_PORT, 317 PI2C_PORT,
@@ -351,23 +351,31 @@ struct pm860x_platform_data {
351 struct pm860x_led_pdata *led; 351 struct pm860x_led_pdata *led;
352 struct pm860x_touch_pdata *touch; 352 struct pm860x_touch_pdata *touch;
353 struct pm860x_power_pdata *power; 353 struct pm860x_power_pdata *power;
354 struct regulator_init_data *regulator;
354 355
355 unsigned short companion_addr; /* I2C address of companion chip */ 356 unsigned short companion_addr; /* I2C address of companion chip */
356 int i2c_port; /* Controlled by GI2C or PI2C */ 357 int i2c_port; /* Controlled by GI2C or PI2C */
357 int irq_mode; /* Clear interrupt by read/write(0/1) */ 358 int irq_mode; /* Clear interrupt by read/write(0/1) */
358 int irq_base; /* IRQ base number of 88pm860x */ 359 int irq_base; /* IRQ base number of 88pm860x */
359 struct regulator_init_data *regulator[PM8607_MAX_REGULATOR]; 360 int num_leds;
361 int num_backlights;
362 int num_regulators;
360}; 363};
361 364
362extern char pm860x_backlight_name[][MFD_NAME_SIZE];
363extern char pm860x_led_name[][MFD_NAME_SIZE];
364
365extern int pm860x_reg_read(struct i2c_client *, int); 365extern int pm860x_reg_read(struct i2c_client *, int);
366extern int pm860x_reg_write(struct i2c_client *, int, unsigned char); 366extern int pm860x_reg_write(struct i2c_client *, int, unsigned char);
367extern int pm860x_bulk_read(struct i2c_client *, int, int, unsigned char *); 367extern int pm860x_bulk_read(struct i2c_client *, int, int, unsigned char *);
368extern int pm860x_bulk_write(struct i2c_client *, int, int, unsigned char *); 368extern int pm860x_bulk_write(struct i2c_client *, int, int, unsigned char *);
369extern int pm860x_set_bits(struct i2c_client *, int, unsigned char, 369extern int pm860x_set_bits(struct i2c_client *, int, unsigned char,
370 unsigned char); 370 unsigned char);
371extern int pm860x_page_reg_read(struct i2c_client *, int);
372extern int pm860x_page_reg_write(struct i2c_client *, int, unsigned char);
373extern int pm860x_page_bulk_read(struct i2c_client *, int, int,
374 unsigned char *);
375extern int pm860x_page_bulk_write(struct i2c_client *, int, int,
376 unsigned char *);
377extern int pm860x_page_set_bits(struct i2c_client *, int, unsigned char,
378 unsigned char);
371 379
372extern int pm860x_device_init(struct pm860x_chip *chip, 380extern int pm860x_device_init(struct pm860x_chip *chip,
373 struct pm860x_platform_data *pdata) __devinit ; 381 struct pm860x_platform_data *pdata) __devinit ;
diff --git a/include/linux/mfd/ab8500.h b/include/linux/mfd/ab8500.h
index 37f56b7c4c15..56f8dea72152 100644
--- a/include/linux/mfd/ab8500.h
+++ b/include/linux/mfd/ab8500.h
@@ -111,8 +111,8 @@
111 * @dev: parent device 111 * @dev: parent device
112 * @lock: read/write operations lock 112 * @lock: read/write operations lock
113 * @irq_lock: genirq bus lock 113 * @irq_lock: genirq bus lock
114 * @revision: chip revision
115 * @irq: irq line 114 * @irq: irq line
115 * @chip_id: chip revision id
116 * @write: register write 116 * @write: register write
117 * @read: register read 117 * @read: register read
118 * @rx_buf: rx buf for SPI 118 * @rx_buf: rx buf for SPI
@@ -124,7 +124,7 @@ struct ab8500 {
124 struct device *dev; 124 struct device *dev;
125 struct mutex lock; 125 struct mutex lock;
126 struct mutex irq_lock; 126 struct mutex irq_lock;
127 int revision; 127
128 int irq_base; 128 int irq_base;
129 int irq; 129 int irq;
130 u8 chip_id; 130 u8 chip_id;
diff --git a/include/linux/mfd/ab8500/gpadc.h b/include/linux/mfd/ab8500/gpadc.h
new file mode 100644
index 000000000000..46b954011f16
--- /dev/null
+++ b/include/linux/mfd/ab8500/gpadc.h
@@ -0,0 +1,32 @@
1/*
2 * Copyright (C) 2010 ST-Ericsson SA
3 * Licensed under GPLv2.
4 *
5 * Author: Arun R Murthy <arun.murthy@stericsson.com>
6 * Author: Daniel Willerud <daniel.willerud@stericsson.com>
7 */
8
9#ifndef _AB8500_GPADC_H
10#define _AB8500_GPADC_H
11
12/* GPADC source: From datasheet(ADCSwSel[4:0] in GPADCCtrl2) */
13#define BAT_CTRL 0x01
14#define BTEMP_BALL 0x02
15#define MAIN_CHARGER_V 0x03
16#define ACC_DETECT1 0x04
17#define ACC_DETECT2 0x05
18#define ADC_AUX1 0x06
19#define ADC_AUX2 0x07
20#define MAIN_BAT_V 0x08
21#define VBUS_V 0x09
22#define MAIN_CHARGER_C 0x0A
23#define USB_CHARGER_C 0x0B
24#define BK_BAT_V 0x0C
25#define DIE_TEMP 0x0D
26
27struct ab8500_gpadc;
28
29struct ab8500_gpadc *ab8500_gpadc_get(char *name);
30int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 input);
31
32#endif /* _AB8500_GPADC_H */
diff --git a/include/linux/mfd/ab8500/sysctrl.h b/include/linux/mfd/ab8500/sysctrl.h
new file mode 100644
index 000000000000..10da0291f8f8
--- /dev/null
+++ b/include/linux/mfd/ab8500/sysctrl.h
@@ -0,0 +1,254 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com> for ST Ericsson.
4 * License terms: GNU General Public License (GPL) version 2
5 */
6#ifndef __AB8500_SYSCTRL_H
7#define __AB8500_SYSCTRL_H
8
9#include <linux/bitops.h>
10
11#ifdef CONFIG_AB8500_CORE
12
13int ab8500_sysctrl_read(u16 reg, u8 *value);
14int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value);
15
16#else
17
18static inline int ab8500_sysctrl_read(u16 reg, u8 *value)
19{
20 return 0;
21}
22
23static inline int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value)
24{
25 return 0;
26}
27
28#endif /* CONFIG_AB8500_CORE */
29
30static inline int ab8500_sysctrl_set(u16 reg, u8 bits)
31{
32 return ab8500_sysctrl_write(reg, bits, bits);
33}
34
35static inline int ab8500_sysctrl_clear(u16 reg, u8 bits)
36{
37 return ab8500_sysctrl_write(reg, bits, 0);
38}
39
40/* Registers */
41#define AB8500_TURNONSTATUS 0x100
42#define AB8500_RESETSTATUS 0x101
43#define AB8500_PONKEY1PRESSSTATUS 0x102
44#define AB8500_SYSCLKREQSTATUS 0x142
45#define AB8500_STW4500CTRL1 0x180
46#define AB8500_STW4500CTRL2 0x181
47#define AB8500_STW4500CTRL3 0x200
48#define AB8500_MAINWDOGCTRL 0x201
49#define AB8500_MAINWDOGTIMER 0x202
50#define AB8500_LOWBAT 0x203
51#define AB8500_BATTOK 0x204
52#define AB8500_SYSCLKTIMER 0x205
53#define AB8500_SMPSCLKCTRL 0x206
54#define AB8500_SMPSCLKSEL1 0x207
55#define AB8500_SMPSCLKSEL2 0x208
56#define AB8500_SMPSCLKSEL3 0x209
57#define AB8500_SYSULPCLKCONF 0x20A
58#define AB8500_SYSULPCLKCTRL1 0x20B
59#define AB8500_SYSCLKCTRL 0x20C
60#define AB8500_SYSCLKREQ1VALID 0x20D
61#define AB8500_SYSTEMCTRLSUP 0x20F
62#define AB8500_SYSCLKREQ1RFCLKBUF 0x210
63#define AB8500_SYSCLKREQ2RFCLKBUF 0x211
64#define AB8500_SYSCLKREQ3RFCLKBUF 0x212
65#define AB8500_SYSCLKREQ4RFCLKBUF 0x213
66#define AB8500_SYSCLKREQ5RFCLKBUF 0x214
67#define AB8500_SYSCLKREQ6RFCLKBUF 0x215
68#define AB8500_SYSCLKREQ7RFCLKBUF 0x216
69#define AB8500_SYSCLKREQ8RFCLKBUF 0x217
70#define AB8500_DITHERCLKCTRL 0x220
71#define AB8500_SWATCTRL 0x230
72#define AB8500_HIQCLKCTRL 0x232
73#define AB8500_VSIMSYSCLKCTRL 0x233
74
75/* Bits */
76#define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
77#define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
78#define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
79#define AB8500_TURNONSTATUS_RTCALARM BIT(3)
80#define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
81#define AB8500_TURNONSTATUS_VBUSDET BIT(5)
82#define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
83
84#define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
85#define AB8500_RESETSTATUS_SWRESETN4500NSTATUS BIT(2)
86
87#define AB8500_PONKEY1PRESSSTATUS_PONKEY1PRESSTIME_MASK 0x7F
88#define AB8500_PONKEY1PRESSSTATUS_PONKEY1PRESSTIME_SHIFT 0
89
90#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ1STATUS BIT(0)
91#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ2STATUS BIT(1)
92#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ3STATUS BIT(2)
93#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ4STATUS BIT(3)
94#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ5STATUS BIT(4)
95#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ6STATUS BIT(5)
96#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ7STATUS BIT(6)
97#define AB8500_SYSCLKREQSTATUS_SYSCLKREQ8STATUS BIT(7)
98
99#define AB8500_STW4500CTRL1_SWOFF BIT(0)
100#define AB8500_STW4500CTRL1_SWRESET4500N BIT(1)
101#define AB8500_STW4500CTRL1_THDB8500SWOFF BIT(2)
102
103#define AB8500_STW4500CTRL2_RESETNVAUX1VALID BIT(0)
104#define AB8500_STW4500CTRL2_RESETNVAUX2VALID BIT(1)
105#define AB8500_STW4500CTRL2_RESETNVAUX3VALID BIT(2)
106#define AB8500_STW4500CTRL2_RESETNVMODVALID BIT(3)
107#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY1VALID BIT(4)
108#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY2VALID BIT(5)
109#define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY3VALID BIT(6)
110#define AB8500_STW4500CTRL2_RESETNVSMPS1VALID BIT(7)
111
112#define AB8500_STW4500CTRL3_CLK32KOUT2DIS BIT(0)
113#define AB8500_STW4500CTRL3_RESETAUDN BIT(1)
114#define AB8500_STW4500CTRL3_RESETDENCN BIT(2)
115#define AB8500_STW4500CTRL3_THSDENA BIT(3)
116
117#define AB8500_MAINWDOGCTRL_MAINWDOGENA BIT(0)
118#define AB8500_MAINWDOGCTRL_MAINWDOGKICK BIT(1)
119#define AB8500_MAINWDOGCTRL_WDEXPTURNONVALID BIT(4)
120
121#define AB8500_MAINWDOGTIMER_MAINWDOGTIMER_MASK 0x7F
122#define AB8500_MAINWDOGTIMER_MAINWDOGTIMER_SHIFT 0
123
124#define AB8500_LOWBAT_LOWBATENA BIT(0)
125#define AB8500_LOWBAT_LOWBAT_MASK 0x7E
126#define AB8500_LOWBAT_LOWBAT_SHIFT 1
127
128#define AB8500_BATTOK_BATTOKSEL0THF_MASK 0x0F
129#define AB8500_BATTOK_BATTOKSEL0THF_SHIFT 0
130#define AB8500_BATTOK_BATTOKSEL1THF_MASK 0xF0
131#define AB8500_BATTOK_BATTOKSEL1THF_SHIFT 4
132
133#define AB8500_SYSCLKTIMER_SYSCLKTIMER_MASK 0x0F
134#define AB8500_SYSCLKTIMER_SYSCLKTIMER_SHIFT 0
135#define AB8500_SYSCLKTIMER_SYSCLKTIMERADJ_MASK 0xF0
136#define AB8500_SYSCLKTIMER_SYSCLKTIMERADJ_SHIFT 4
137
138#define AB8500_SMPSCLKCTRL_SMPSCLKINTSEL_MASK 0x03
139#define AB8500_SMPSCLKCTRL_SMPSCLKINTSEL_SHIFT 0
140#define AB8500_SMPSCLKCTRL_3M2CLKINTENA BIT(2)
141
142#define AB8500_SMPSCLKSEL1_VARMCLKSEL_MASK 0x07
143#define AB8500_SMPSCLKSEL1_VARMCLKSEL_SHIFT 0
144#define AB8500_SMPSCLKSEL1_VAPECLKSEL_MASK 0x38
145#define AB8500_SMPSCLKSEL1_VAPECLKSEL_SHIFT 3
146
147#define AB8500_SMPSCLKSEL2_VMODCLKSEL_MASK 0x07
148#define AB8500_SMPSCLKSEL2_VMODCLKSEL_SHIFT 0
149#define AB8500_SMPSCLKSEL2_VSMPS1CLKSEL_MASK 0x38
150#define AB8500_SMPSCLKSEL2_VSMPS1CLKSEL_SHIFT 3
151
152#define AB8500_SMPSCLKSEL3_VSMPS2CLKSEL_MASK 0x07
153#define AB8500_SMPSCLKSEL3_VSMPS2CLKSEL_SHIFT 0
154#define AB8500_SMPSCLKSEL3_VSMPS3CLKSEL_MASK 0x38
155#define AB8500_SMPSCLKSEL3_VSMPS3CLKSEL_SHIFT 3
156
157#define AB8500_SYSULPCLKCONF_ULPCLKCONF_MASK 0x03
158#define AB8500_SYSULPCLKCONF_ULPCLKCONF_SHIFT 0
159#define AB8500_SYSULPCLKCONF_CLK27MHZSTRE BIT(2)
160#define AB8500_SYSULPCLKCONF_TVOUTCLKDELN BIT(3)
161#define AB8500_SYSULPCLKCONF_TVOUTCLKINV BIT(4)
162#define AB8500_SYSULPCLKCONF_ULPCLKSTRE BIT(5)
163#define AB8500_SYSULPCLKCONF_CLK27MHZBUFENA BIT(6)
164#define AB8500_SYSULPCLKCONF_CLK27MHZPDENA BIT(7)
165
166#define AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_MASK 0x03
167#define AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_SHIFT 0
168#define AB8500_SYSULPCLKCTRL1_ULPCLKREQ BIT(2)
169#define AB8500_SYSULPCLKCTRL1_4500SYSCLKREQ BIT(3)
170#define AB8500_SYSULPCLKCTRL1_AUDIOCLKENA BIT(4)
171#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ BIT(5)
172#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF3REQ BIT(6)
173#define AB8500_SYSULPCLKCTRL1_SYSCLKBUF4REQ BIT(7)
174
175#define AB8500_SYSCLKCTRL_TVOUTPLLENA BIT(0)
176#define AB8500_SYSCLKCTRL_TVOUTCLKENA BIT(1)
177#define AB8500_SYSCLKCTRL_USBCLKENA BIT(2)
178
179#define AB8500_SYSCLKREQ1VALID_SYSCLKREQ1VALID BIT(0)
180#define AB8500_SYSCLKREQ1VALID_ULPCLKREQ1VALID BIT(1)
181#define AB8500_SYSCLKREQ1VALID_USBSYSCLKREQ1VALID BIT(2)
182
183#define AB8500_SYSTEMCTRLSUP_EXTSUP12LPNCLKSEL_MASK 0x03
184#define AB8500_SYSTEMCTRLSUP_EXTSUP12LPNCLKSEL_SHIFT 0
185#define AB8500_SYSTEMCTRLSUP_EXTSUP3LPNCLKSEL_MASK 0x0C
186#define AB8500_SYSTEMCTRLSUP_EXTSUP3LPNCLKSEL_SHIFT 2
187#define AB8500_SYSTEMCTRLSUP_INTDB8500NOD BIT(4)
188
189#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF2 BIT(2)
190#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF3 BIT(3)
191#define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF4 BIT(4)
192
193#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF2 BIT(2)
194#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF3 BIT(3)
195#define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF4 BIT(4)
196
197#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF2 BIT(2)
198#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF3 BIT(3)
199#define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF4 BIT(4)
200
201#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF2 BIT(2)
202#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF3 BIT(3)
203#define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF4 BIT(4)
204
205#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF2 BIT(2)
206#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF3 BIT(3)
207#define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF4 BIT(4)
208
209#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF2 BIT(2)
210#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF3 BIT(3)
211#define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF4 BIT(4)
212
213#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF2 BIT(2)
214#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF3 BIT(3)
215#define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF4 BIT(4)
216
217#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF2 BIT(2)
218#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF3 BIT(3)
219#define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF4 BIT(4)
220
221#define AB8500_DITHERCLKCTRL_VARMDITHERENA BIT(0)
222#define AB8500_DITHERCLKCTRL_VSMPS3DITHERENA BIT(1)
223#define AB8500_DITHERCLKCTRL_VSMPS1DITHERENA BIT(2)
224#define AB8500_DITHERCLKCTRL_VSMPS2DITHERENA BIT(3)
225#define AB8500_DITHERCLKCTRL_VMODDITHERENA BIT(4)
226#define AB8500_DITHERCLKCTRL_VAPEDITHERENA BIT(5)
227#define AB8500_DITHERCLKCTRL_DITHERDEL_MASK 0xC0
228#define AB8500_DITHERCLKCTRL_DITHERDEL_SHIFT 6
229
230#define AB8500_SWATCTRL_UPDATERF BIT(0)
231#define AB8500_SWATCTRL_SWATENABLE BIT(1)
232#define AB8500_SWATCTRL_RFOFFTIMER_MASK 0x1C
233#define AB8500_SWATCTRL_RFOFFTIMER_SHIFT 2
234#define AB8500_SWATCTRL_SWATBIT5 BIT(6)
235
236#define AB8500_HIQCLKCTRL_SYSCLKREQ1HIQENAVALID BIT(0)
237#define AB8500_HIQCLKCTRL_SYSCLKREQ2HIQENAVALID BIT(1)
238#define AB8500_HIQCLKCTRL_SYSCLKREQ3HIQENAVALID BIT(2)
239#define AB8500_HIQCLKCTRL_SYSCLKREQ4HIQENAVALID BIT(3)
240#define AB8500_HIQCLKCTRL_SYSCLKREQ5HIQENAVALID BIT(4)
241#define AB8500_HIQCLKCTRL_SYSCLKREQ6HIQENAVALID BIT(5)
242#define AB8500_HIQCLKCTRL_SYSCLKREQ7HIQENAVALID BIT(6)
243#define AB8500_HIQCLKCTRL_SYSCLKREQ8HIQENAVALID BIT(7)
244
245#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ1VALID BIT(0)
246#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ2VALID BIT(1)
247#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ3VALID BIT(2)
248#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ4VALID BIT(3)
249#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ5VALID BIT(4)
250#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ6VALID BIT(5)
251#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ7VALID BIT(6)
252#define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ8VALID BIT(7)
253
254#endif /* __AB8500_SYSCTRL_H */
diff --git a/include/linux/mfd/abx500.h b/include/linux/mfd/abx500.h
index 67bd6f7ecf32..7d9b6ae1c203 100644
--- a/include/linux/mfd/abx500.h
+++ b/include/linux/mfd/abx500.h
@@ -186,7 +186,6 @@ struct abx500_init_settings {
186struct ab3550_platform_data { 186struct ab3550_platform_data {
187 struct {unsigned int base; unsigned int count; } irq; 187 struct {unsigned int base; unsigned int count; } irq;
188 void *dev_data[AB3550_NUM_DEVICES]; 188 void *dev_data[AB3550_NUM_DEVICES];
189 size_t dev_data_sz[AB3550_NUM_DEVICES];
190 struct abx500_init_settings *init_settings; 189 struct abx500_init_settings *init_settings;
191 unsigned int init_settings_sz; 190 unsigned int init_settings_sz;
192}; 191};
diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h
index 835996e167e1..1408bf8eed5f 100644
--- a/include/linux/mfd/core.h
+++ b/include/linux/mfd/core.h
@@ -25,22 +25,20 @@ struct mfd_cell {
25 const char *name; 25 const char *name;
26 int id; 26 int id;
27 27
28 /* refcounting for multiple drivers to use a single cell */
29 atomic_t *usage_count;
28 int (*enable)(struct platform_device *dev); 30 int (*enable)(struct platform_device *dev);
29 int (*disable)(struct platform_device *dev); 31 int (*disable)(struct platform_device *dev);
32
30 int (*suspend)(struct platform_device *dev); 33 int (*suspend)(struct platform_device *dev);
31 int (*resume)(struct platform_device *dev); 34 int (*resume)(struct platform_device *dev);
32 35
33 /* driver-specific data for MFD-aware "cell" drivers */ 36 /* mfd_data can be used to pass data to client drivers */
34 void *driver_data; 37 void *mfd_data;
35
36 /* platform_data can be used to either pass data to "generic"
37 driver or as a hook to mfd_cell for the "cell" drivers */
38 void *platform_data;
39 size_t data_size;
40 38
41 /* 39 /*
42 * This resources can be specified relatively to the parent device. 40 * These resources can be specified relative to the parent device.
43 * For accessing device you should use resources from device 41 * For accessing hardware you should use resources from the platform dev
44 */ 42 */
45 int num_resources; 43 int num_resources;
46 const struct resource *resources; 44 const struct resource *resources;
@@ -55,11 +53,47 @@ struct mfd_cell {
55 bool pm_runtime_no_callbacks; 53 bool pm_runtime_no_callbacks;
56}; 54};
57 55
56/*
57 * Convenience functions for clients using shared cells. Refcounting
58 * happens automatically, with the cell's enable/disable callbacks
59 * being called only when a device is first being enabled or no other
60 * clients are making use of it.
61 */
62extern int mfd_cell_enable(struct platform_device *pdev);
63extern int mfd_cell_disable(struct platform_device *pdev);
64
65/*
66 * Given a platform device that's been created by mfd_add_devices(), fetch
67 * the mfd_cell that created it.
68 */
69static inline const struct mfd_cell *mfd_get_cell(struct platform_device *pdev)
70{
71 return pdev->dev.platform_data;
72}
73
74/*
75 * Given a platform device that's been created by mfd_add_devices(), fetch
76 * the .mfd_data entry from the mfd_cell that created it.
77 */
78static inline void *mfd_get_data(struct platform_device *pdev)
79{
80 return mfd_get_cell(pdev)->mfd_data;
81}
82
58extern int mfd_add_devices(struct device *parent, int id, 83extern int mfd_add_devices(struct device *parent, int id,
59 const struct mfd_cell *cells, int n_devs, 84 struct mfd_cell *cells, int n_devs,
60 struct resource *mem_base, 85 struct resource *mem_base,
61 int irq_base); 86 int irq_base);
62 87
63extern void mfd_remove_devices(struct device *parent); 88extern void mfd_remove_devices(struct device *parent);
64 89
90/*
91 * For MFD drivers with clients sharing access to resources, these create
92 * multiple platform devices per cell. Contention handling must still be
93 * handled via drivers (ie, with enable/disable hooks).
94 */
95extern int mfd_shared_platform_driver_register(struct platform_driver *drv,
96 const char *cellname);
97extern void mfd_shared_platform_driver_unregister(struct platform_driver *drv);
98
65#endif 99#endif
diff --git a/include/linux/mfd/max8997-private.h b/include/linux/mfd/max8997-private.h
new file mode 100644
index 000000000000..93a9477e075f
--- /dev/null
+++ b/include/linux/mfd/max8997-private.h
@@ -0,0 +1,347 @@
1/*
2 * max8997.h - Voltage regulator driver for the Maxim 8997
3 *
4 * Copyright (C) 2010 Samsung Electrnoics
5 * MyungJoo Ham <myungjoo.ham@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef __LINUX_MFD_MAX8997_PRIV_H
23#define __LINUX_MFD_MAX8997_PRIV_H
24
25#include <linux/i2c.h>
26
27enum max8997_pmic_reg {
28 MAX8997_REG_PMIC_ID0 = 0x00,
29 MAX8997_REG_PMIC_ID1 = 0x01,
30 MAX8997_REG_INTSRC = 0x02,
31 MAX8997_REG_INT1 = 0x03,
32 MAX8997_REG_INT2 = 0x04,
33 MAX8997_REG_INT3 = 0x05,
34 MAX8997_REG_INT4 = 0x06,
35
36 MAX8997_REG_INT1MSK = 0x08,
37 MAX8997_REG_INT2MSK = 0x09,
38 MAX8997_REG_INT3MSK = 0x0a,
39 MAX8997_REG_INT4MSK = 0x0b,
40
41 MAX8997_REG_STATUS1 = 0x0d,
42 MAX8997_REG_STATUS2 = 0x0e,
43 MAX8997_REG_STATUS3 = 0x0f,
44 MAX8997_REG_STATUS4 = 0x10,
45
46 MAX8997_REG_MAINCON1 = 0x13,
47 MAX8997_REG_MAINCON2 = 0x14,
48 MAX8997_REG_BUCKRAMP = 0x15,
49
50 MAX8997_REG_BUCK1CTRL = 0x18,
51 MAX8997_REG_BUCK1DVS1 = 0x19,
52 MAX8997_REG_BUCK1DVS2 = 0x1a,
53 MAX8997_REG_BUCK1DVS3 = 0x1b,
54 MAX8997_REG_BUCK1DVS4 = 0x1c,
55 MAX8997_REG_BUCK1DVS5 = 0x1d,
56 MAX8997_REG_BUCK1DVS6 = 0x1e,
57 MAX8997_REG_BUCK1DVS7 = 0x1f,
58 MAX8997_REG_BUCK1DVS8 = 0x20,
59 MAX8997_REG_BUCK2CTRL = 0x21,
60 MAX8997_REG_BUCK2DVS1 = 0x22,
61 MAX8997_REG_BUCK2DVS2 = 0x23,
62 MAX8997_REG_BUCK2DVS3 = 0x24,
63 MAX8997_REG_BUCK2DVS4 = 0x25,
64 MAX8997_REG_BUCK2DVS5 = 0x26,
65 MAX8997_REG_BUCK2DVS6 = 0x27,
66 MAX8997_REG_BUCK2DVS7 = 0x28,
67 MAX8997_REG_BUCK2DVS8 = 0x29,
68 MAX8997_REG_BUCK3CTRL = 0x2a,
69 MAX8997_REG_BUCK3DVS = 0x2b,
70 MAX8997_REG_BUCK4CTRL = 0x2c,
71 MAX8997_REG_BUCK4DVS = 0x2d,
72 MAX8997_REG_BUCK5CTRL = 0x2e,
73 MAX8997_REG_BUCK5DVS1 = 0x2f,
74 MAX8997_REG_BUCK5DVS2 = 0x30,
75 MAX8997_REG_BUCK5DVS3 = 0x31,
76 MAX8997_REG_BUCK5DVS4 = 0x32,
77 MAX8997_REG_BUCK5DVS5 = 0x33,
78 MAX8997_REG_BUCK5DVS6 = 0x34,
79 MAX8997_REG_BUCK5DVS7 = 0x35,
80 MAX8997_REG_BUCK5DVS8 = 0x36,
81 MAX8997_REG_BUCK6CTRL = 0x37,
82 MAX8997_REG_BUCK6BPSKIPCTRL = 0x38,
83 MAX8997_REG_BUCK7CTRL = 0x39,
84 MAX8997_REG_BUCK7DVS = 0x3a,
85 MAX8997_REG_LDO1CTRL = 0x3b,
86 MAX8997_REG_LDO2CTRL = 0x3c,
87 MAX8997_REG_LDO3CTRL = 0x3d,
88 MAX8997_REG_LDO4CTRL = 0x3e,
89 MAX8997_REG_LDO5CTRL = 0x3f,
90 MAX8997_REG_LDO6CTRL = 0x40,
91 MAX8997_REG_LDO7CTRL = 0x41,
92 MAX8997_REG_LDO8CTRL = 0x42,
93 MAX8997_REG_LDO9CTRL = 0x43,
94 MAX8997_REG_LDO10CTRL = 0x44,
95 MAX8997_REG_LDO11CTRL = 0x45,
96 MAX8997_REG_LDO12CTRL = 0x46,
97 MAX8997_REG_LDO13CTRL = 0x47,
98 MAX8997_REG_LDO14CTRL = 0x48,
99 MAX8997_REG_LDO15CTRL = 0x49,
100 MAX8997_REG_LDO16CTRL = 0x4a,
101 MAX8997_REG_LDO17CTRL = 0x4b,
102 MAX8997_REG_LDO18CTRL = 0x4c,
103 MAX8997_REG_LDO21CTRL = 0x4d,
104
105 MAX8997_REG_MBCCTRL1 = 0x50,
106 MAX8997_REG_MBCCTRL2 = 0x51,
107 MAX8997_REG_MBCCTRL3 = 0x52,
108 MAX8997_REG_MBCCTRL4 = 0x53,
109 MAX8997_REG_MBCCTRL5 = 0x54,
110 MAX8997_REG_MBCCTRL6 = 0x55,
111 MAX8997_REG_OTPCGHCVS = 0x56,
112
113 MAX8997_REG_SAFEOUTCTRL = 0x5a,
114
115 MAX8997_REG_LBCNFG1 = 0x5e,
116 MAX8997_REG_LBCNFG2 = 0x5f,
117 MAX8997_REG_BBCCTRL = 0x60,
118
119 MAX8997_REG_FLASH1_CUR = 0x63, /* 0x63 ~ 0x6e for FLASH */
120 MAX8997_REG_FLASH2_CUR = 0x64,
121 MAX8997_REG_MOVIE_CUR = 0x65,
122 MAX8997_REG_GSMB_CUR = 0x66,
123 MAX8997_REG_BOOST_CNTL = 0x67,
124 MAX8997_REG_LEN_CNTL = 0x68,
125 MAX8997_REG_FLASH_CNTL = 0x69,
126 MAX8997_REG_WDT_CNTL = 0x6a,
127 MAX8997_REG_MAXFLASH1 = 0x6b,
128 MAX8997_REG_MAXFLASH2 = 0x6c,
129 MAX8997_REG_FLASHSTATUS = 0x6d,
130 MAX8997_REG_FLASHSTATUSMASK = 0x6e,
131
132 MAX8997_REG_GPIOCNTL1 = 0x70,
133 MAX8997_REG_GPIOCNTL2 = 0x71,
134 MAX8997_REG_GPIOCNTL3 = 0x72,
135 MAX8997_REG_GPIOCNTL4 = 0x73,
136 MAX8997_REG_GPIOCNTL5 = 0x74,
137 MAX8997_REG_GPIOCNTL6 = 0x75,
138 MAX8997_REG_GPIOCNTL7 = 0x76,
139 MAX8997_REG_GPIOCNTL8 = 0x77,
140 MAX8997_REG_GPIOCNTL9 = 0x78,
141 MAX8997_REG_GPIOCNTL10 = 0x79,
142 MAX8997_REG_GPIOCNTL11 = 0x7a,
143 MAX8997_REG_GPIOCNTL12 = 0x7b,
144
145 MAX8997_REG_LDO1CONFIG = 0x80,
146 MAX8997_REG_LDO2CONFIG = 0x81,
147 MAX8997_REG_LDO3CONFIG = 0x82,
148 MAX8997_REG_LDO4CONFIG = 0x83,
149 MAX8997_REG_LDO5CONFIG = 0x84,
150 MAX8997_REG_LDO6CONFIG = 0x85,
151 MAX8997_REG_LDO7CONFIG = 0x86,
152 MAX8997_REG_LDO8CONFIG = 0x87,
153 MAX8997_REG_LDO9CONFIG = 0x88,
154 MAX8997_REG_LDO10CONFIG = 0x89,
155 MAX8997_REG_LDO11CONFIG = 0x8a,
156 MAX8997_REG_LDO12CONFIG = 0x8b,
157 MAX8997_REG_LDO13CONFIG = 0x8c,
158 MAX8997_REG_LDO14CONFIG = 0x8d,
159 MAX8997_REG_LDO15CONFIG = 0x8e,
160 MAX8997_REG_LDO16CONFIG = 0x8f,
161 MAX8997_REG_LDO17CONFIG = 0x90,
162 MAX8997_REG_LDO18CONFIG = 0x91,
163 MAX8997_REG_LDO21CONFIG = 0x92,
164
165 MAX8997_REG_DVSOKTIMER1 = 0x97,
166 MAX8997_REG_DVSOKTIMER2 = 0x98,
167 MAX8997_REG_DVSOKTIMER4 = 0x99,
168 MAX8997_REG_DVSOKTIMER5 = 0x9a,
169
170 MAX8997_REG_PMIC_END = 0x9b,
171};
172
173enum max8997_muic_reg {
174 MAX8997_MUIC_REG_ID = 0x0,
175 MAX8997_MUIC_REG_INT1 = 0x1,
176 MAX8997_MUIC_REG_INT2 = 0x2,
177 MAX8997_MUIC_REG_INT3 = 0x3,
178 MAX8997_MUIC_REG_STATUS1 = 0x4,
179 MAX8997_MUIC_REG_STATUS2 = 0x5,
180 MAX8997_MUIC_REG_STATUS3 = 0x6,
181 MAX8997_MUIC_REG_INTMASK1 = 0x7,
182 MAX8997_MUIC_REG_INTMASK2 = 0x8,
183 MAX8997_MUIC_REG_INTMASK3 = 0x9,
184 MAX8997_MUIC_REG_CDETCTRL = 0xa,
185
186 MAX8997_MUIC_REG_CONTROL1 = 0xc,
187 MAX8997_MUIC_REG_CONTROL2 = 0xd,
188 MAX8997_MUIC_REG_CONTROL3 = 0xe,
189
190 MAX8997_MUIC_REG_END = 0xf,
191};
192
193enum max8997_haptic_reg {
194 MAX8997_HAPTIC_REG_GENERAL = 0x00,
195 MAX8997_HAPTIC_REG_CONF1 = 0x01,
196 MAX8997_HAPTIC_REG_CONF2 = 0x02,
197 MAX8997_HAPTIC_REG_DRVCONF = 0x03,
198 MAX8997_HAPTIC_REG_CYCLECONF1 = 0x04,
199 MAX8997_HAPTIC_REG_CYCLECONF2 = 0x05,
200 MAX8997_HAPTIC_REG_SIGCONF1 = 0x06,
201 MAX8997_HAPTIC_REG_SIGCONF2 = 0x07,
202 MAX8997_HAPTIC_REG_SIGCONF3 = 0x08,
203 MAX8997_HAPTIC_REG_SIGCONF4 = 0x09,
204 MAX8997_HAPTIC_REG_SIGDC1 = 0x0a,
205 MAX8997_HAPTIC_REG_SIGDC2 = 0x0b,
206 MAX8997_HAPTIC_REG_SIGPWMDC1 = 0x0c,
207 MAX8997_HAPTIC_REG_SIGPWMDC2 = 0x0d,
208 MAX8997_HAPTIC_REG_SIGPWMDC3 = 0x0e,
209 MAX8997_HAPTIC_REG_SIGPWMDC4 = 0x0f,
210 MAX8997_HAPTIC_REG_MTR_REV = 0x10,
211
212 MAX8997_HAPTIC_REG_END = 0x11,
213};
214
215/* slave addr = 0x0c: using "2nd part" of rev4 datasheet */
216enum max8997_rtc_reg {
217 MAX8997_RTC_CTRLMASK = 0x02,
218 MAX8997_RTC_CTRL = 0x03,
219 MAX8997_RTC_UPDATE1 = 0x04,
220 MAX8997_RTC_UPDATE2 = 0x05,
221 MAX8997_RTC_WTSR_SMPL = 0x06,
222
223 MAX8997_RTC_SEC = 0x10,
224 MAX8997_RTC_MIN = 0x11,
225 MAX8997_RTC_HOUR = 0x12,
226 MAX8997_RTC_DAY_OF_WEEK = 0x13,
227 MAX8997_RTC_MONTH = 0x14,
228 MAX8997_RTC_YEAR = 0x15,
229 MAX8997_RTC_DAY_OF_MONTH = 0x16,
230 MAX8997_RTC_ALARM1_SEC = 0x17,
231 MAX8997_RTC_ALARM1_MIN = 0x18,
232 MAX8997_RTC_ALARM1_HOUR = 0x19,
233 MAX8997_RTC_ALARM1_DAY_OF_WEEK = 0x1a,
234 MAX8997_RTC_ALARM1_MONTH = 0x1b,
235 MAX8997_RTC_ALARM1_YEAR = 0x1c,
236 MAX8997_RTC_ALARM1_DAY_OF_MONTH = 0x1d,
237 MAX8997_RTC_ALARM2_SEC = 0x1e,
238 MAX8997_RTC_ALARM2_MIN = 0x1f,
239 MAX8997_RTC_ALARM2_HOUR = 0x20,
240 MAX8997_RTC_ALARM2_DAY_OF_WEEK = 0x21,
241 MAX8997_RTC_ALARM2_MONTH = 0x22,
242 MAX8997_RTC_ALARM2_YEAR = 0x23,
243 MAX8997_RTC_ALARM2_DAY_OF_MONTH = 0x24,
244};
245
246enum max8997_irq_source {
247 PMIC_INT1 = 0,
248 PMIC_INT2,
249 PMIC_INT3,
250 PMIC_INT4,
251
252 FUEL_GAUGE, /* Ignored (MAX17042 driver handles) */
253
254 MUIC_INT1,
255 MUIC_INT2,
256 MUIC_INT3,
257
258 GPIO_LOW, /* Not implemented */
259 GPIO_HI, /* Not implemented */
260
261 FLASH_STATUS, /* Not implemented */
262
263 MAX8997_IRQ_GROUP_NR,
264};
265
266enum max8997_irq {
267 MAX8997_PMICIRQ_PWRONR,
268 MAX8997_PMICIRQ_PWRONF,
269 MAX8997_PMICIRQ_PWRON1SEC,
270 MAX8997_PMICIRQ_JIGONR,
271 MAX8997_PMICIRQ_JIGONF,
272 MAX8997_PMICIRQ_LOWBAT2,
273 MAX8997_PMICIRQ_LOWBAT1,
274
275 MAX8997_PMICIRQ_JIGR,
276 MAX8997_PMICIRQ_JIGF,
277 MAX8997_PMICIRQ_MR,
278 MAX8997_PMICIRQ_DVS1OK,
279 MAX8997_PMICIRQ_DVS2OK,
280 MAX8997_PMICIRQ_DVS3OK,
281 MAX8997_PMICIRQ_DVS4OK,
282
283 MAX8997_PMICIRQ_CHGINS,
284 MAX8997_PMICIRQ_CHGRM,
285 MAX8997_PMICIRQ_DCINOVP,
286 MAX8997_PMICIRQ_TOPOFFR,
287 MAX8997_PMICIRQ_CHGRSTF,
288 MAX8997_PMICIRQ_MBCHGTMEXPD,
289
290 MAX8997_PMICIRQ_RTC60S,
291 MAX8997_PMICIRQ_RTCA1,
292 MAX8997_PMICIRQ_RTCA2,
293 MAX8997_PMICIRQ_SMPL_INT,
294 MAX8997_PMICIRQ_RTC1S,
295 MAX8997_PMICIRQ_WTSR,
296
297 MAX8997_MUICIRQ_ADCError,
298 MAX8997_MUICIRQ_ADCLow,
299 MAX8997_MUICIRQ_ADC,
300
301 MAX8997_MUICIRQ_VBVolt,
302 MAX8997_MUICIRQ_DBChg,
303 MAX8997_MUICIRQ_DCDTmr,
304 MAX8997_MUICIRQ_ChgDetRun,
305 MAX8997_MUICIRQ_ChgTyp,
306
307 MAX8997_MUICIRQ_OVP,
308
309 MAX8997_IRQ_NR,
310};
311
312#define MAX8997_REG_BUCK1DVS(x) (MAX8997_REG_BUCK1DVS1 + (x) - 1)
313#define MAX8997_REG_BUCK2DVS(x) (MAX8997_REG_BUCK2DVS1 + (x) - 1)
314#define MAX8997_REG_BUCK5DVS(x) (MAX8997_REG_BUCK5DVS1 + (x) - 1)
315
316struct max8997_dev {
317 struct device *dev;
318 struct i2c_client *i2c; /* 0xcc / PMIC, Battery Control, and FLASH */
319 struct i2c_client *rtc; /* slave addr 0x0c */
320 struct i2c_client *haptic; /* slave addr 0x90 */
321 struct i2c_client *muic; /* slave addr 0x4a */
322 struct mutex iolock;
323
324 int type;
325 struct platform_device *battery; /* battery control (not fuel gauge) */
326
327 bool wakeup;
328
329 /* For hibernation */
330 u8 reg_dump[MAX8997_REG_PMIC_END + MAX8997_MUIC_REG_END +
331 MAX8997_HAPTIC_REG_END];
332};
333
334enum max8997_types {
335 TYPE_MAX8997,
336 TYPE_MAX8966,
337};
338
339extern int max8997_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest);
340extern int max8997_bulk_read(struct i2c_client *i2c, u8 reg, int count,
341 u8 *buf);
342extern int max8997_write_reg(struct i2c_client *i2c, u8 reg, u8 value);
343extern int max8997_bulk_write(struct i2c_client *i2c, u8 reg, int count,
344 u8 *buf);
345extern int max8997_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask);
346
347#endif /* __LINUX_MFD_MAX8997_PRIV_H */
diff --git a/include/linux/mfd/max8997.h b/include/linux/mfd/max8997.h
new file mode 100644
index 000000000000..cb671b3451bf
--- /dev/null
+++ b/include/linux/mfd/max8997.h
@@ -0,0 +1,114 @@
1/*
2 * max8997.h - Driver for the Maxim 8997/8966
3 *
4 * Copyright (C) 2009-2010 Samsung Electrnoics
5 * MyungJoo Ham <myungjoo.ham@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 * This driver is based on max8998.h
22 *
23 * MAX8997 has PMIC, MUIC, HAPTIC, RTC, FLASH, and Fuel Gauge devices.
24 * Except Fuel Gauge, every device shares the same I2C bus and included in
25 * this mfd driver. Although the fuel gauge is included in the chip, it is
26 * excluded from the driver because a) it has a different I2C bus from
27 * others and b) it can be enabled simply by using MAX17042 driver.
28 */
29
30#ifndef __LINUX_MFD_MAX8998_H
31#define __LINUX_MFD_MAX8998_H
32
33#include <linux/regulator/consumer.h>
34
35/* MAX8997/8966 regulator IDs */
36enum max8998_regulators {
37 MAX8997_LDO1 = 0,
38 MAX8997_LDO2,
39 MAX8997_LDO3,
40 MAX8997_LDO4,
41 MAX8997_LDO5,
42 MAX8997_LDO6,
43 MAX8997_LDO7,
44 MAX8997_LDO8,
45 MAX8997_LDO9,
46 MAX8997_LDO10,
47 MAX8997_LDO11,
48 MAX8997_LDO12,
49 MAX8997_LDO13,
50 MAX8997_LDO14,
51 MAX8997_LDO15,
52 MAX8997_LDO16,
53 MAX8997_LDO17,
54 MAX8997_LDO18,
55 MAX8997_LDO21,
56 MAX8997_BUCK1,
57 MAX8997_BUCK2,
58 MAX8997_BUCK3,
59 MAX8997_BUCK4,
60 MAX8997_BUCK5,
61 MAX8997_BUCK6,
62 MAX8997_BUCK7,
63 MAX8997_EN32KHZ_AP,
64 MAX8997_EN32KHZ_CP,
65 MAX8997_ENVICHG,
66 MAX8997_ESAFEOUT1,
67 MAX8997_ESAFEOUT2,
68 MAX8997_CHARGER_CV, /* control MBCCV of MBCCTRL3 */
69 MAX8997_CHARGER, /* charger current, MBCCTRL4 */
70 MAX8997_CHARGER_TOPOFF, /* MBCCTRL5 */
71
72 MAX8997_REG_MAX,
73};
74
75struct max8997_regulator_data {
76 int id;
77 struct regulator_init_data *initdata;
78};
79
80struct max8997_platform_data {
81 bool wakeup;
82 /* IRQ: Not implemented */
83 /* ---- PMIC ---- */
84 struct max8997_regulator_data *regulators;
85 int num_regulators;
86
87 /*
88 * SET1~3 DVS GPIOs control Buck1, 2, and 5 simultaneously. Therefore,
89 * With buckx_gpiodvs enabled, the buckx cannot be controlled
90 * independently. To control buckx (of 1, 2, and 5) independently,
91 * disable buckx_gpiodvs and control with BUCKxDVS1 register.
92 *
93 * When buckx_gpiodvs and bucky_gpiodvs are both enabled, set_voltage
94 * on buckx will change the voltage of bucky at the same time.
95 *
96 */
97 bool ignore_gpiodvs_side_effect;
98 int buck125_gpios[3]; /* GPIO of [0]SET1, [1]SET2, [2]SET3 */
99 int buck125_default_idx; /* Default value of SET1, 2, 3 */
100 unsigned int buck1_voltage[8]; /* buckx_voltage in uV */
101 bool buck1_gpiodvs;
102 unsigned int buck2_voltage[8];
103 bool buck2_gpiodvs;
104 unsigned int buck5_voltage[8];
105 bool buck5_gpiodvs;
106
107 /* MUIC: Not implemented */
108 /* HAPTIC: Not implemented */
109 /* RTC: Not implemented */
110 /* Flash: Not implemented */
111 /* Charger control: Not implemented */
112};
113
114#endif /* __LINUX_MFD_MAX8998_H */
diff --git a/include/linux/mfd/mc13xxx.h b/include/linux/mfd/mc13xxx.h
index a1d391b40e68..c064beaaccb7 100644
--- a/include/linux/mfd/mc13xxx.h
+++ b/include/linux/mfd/mc13xxx.h
@@ -146,8 +146,7 @@ struct mc13xxx_platform_data {
146#define MC13XXX_USE_LED (1 << 5) 146#define MC13XXX_USE_LED (1 << 5)
147 unsigned int flags; 147 unsigned int flags;
148 148
149 int num_regulators; 149 struct mc13xxx_regulator_platform_data regulators;
150 struct mc13xxx_regulator_init_data *regulators;
151 struct mc13xxx_leds_platform_data *leds; 150 struct mc13xxx_leds_platform_data *leds;
152}; 151};
153 152
diff --git a/include/linux/mfd/tps6105x.h b/include/linux/mfd/tps6105x.h
new file mode 100644
index 000000000000..386743dd931c
--- /dev/null
+++ b/include/linux/mfd/tps6105x.h
@@ -0,0 +1,101 @@
1/*
2 * Copyright (C) 2011 ST-Ericsson SA
3 * Written on behalf of Linaro for ST-Ericsson
4 *
5 * Author: Linus Walleij <linus.walleij@linaro.org>
6 *
7 * License terms: GNU General Public License (GPL) version 2
8 */
9#ifndef MFD_TPS6105X_H
10#define MFD_TPS6105X_H
11
12#include <linux/i2c.h>
13#include <linux/regulator/machine.h>
14
15/*
16 * Register definitions to all subdrivers
17 */
18#define TPS6105X_REG_0 0x00
19#define TPS6105X_REG0_MODE_SHIFT 6
20#define TPS6105X_REG0_MODE_MASK (0x03<<6)
21/* These defines for both reg0 and reg1 */
22#define TPS6105X_REG0_MODE_SHUTDOWN 0x00
23#define TPS6105X_REG0_MODE_TORCH 0x01
24#define TPS6105X_REG0_MODE_TORCH_FLASH 0x02
25#define TPS6105X_REG0_MODE_VOLTAGE 0x03
26#define TPS6105X_REG0_VOLTAGE_SHIFT 4
27#define TPS6105X_REG0_VOLTAGE_MASK (3<<4)
28#define TPS6105X_REG0_VOLTAGE_450 0
29#define TPS6105X_REG0_VOLTAGE_500 1
30#define TPS6105X_REG0_VOLTAGE_525 2
31#define TPS6105X_REG0_VOLTAGE_500_2 3
32#define TPS6105X_REG0_DIMMING_SHIFT 3
33#define TPS6105X_REG0_TORCHC_SHIFT 0
34#define TPS6105X_REG0_TORCHC_MASK (7<<0)
35#define TPS6105X_REG0_TORCHC_0 0x00
36#define TPS6105X_REG0_TORCHC_50 0x01
37#define TPS6105X_REG0_TORCHC_75 0x02
38#define TPS6105X_REG0_TORCHC_100 0x03
39#define TPS6105X_REG0_TORCHC_150 0x04
40#define TPS6105X_REG0_TORCHC_200 0x05
41#define TPS6105X_REG0_TORCHC_250_400 0x06
42#define TPS6105X_REG0_TORCHC_250_500 0x07
43#define TPS6105X_REG_1 0x01
44#define TPS6105X_REG1_MODE_SHIFT 6
45#define TPS6105X_REG1_MODE_MASK (0x03<<6)
46#define TPS6105X_REG1_MODE_SHUTDOWN 0x00
47#define TPS6105X_REG1_MODE_TORCH 0x01
48#define TPS6105X_REG1_MODE_TORCH_FLASH 0x02
49#define TPS6105X_REG1_MODE_VOLTAGE 0x03
50#define TPS6105X_REG_2 0x02
51#define TPS6105X_REG_3 0x03
52
53/**
54 * enum tps6105x_mode - desired mode for the TPS6105x
55 * @TPS6105X_MODE_SHUTDOWN: this instance is inactive, not used for anything
56 * @TPS61905X_MODE_TORCH: this instance is used as a LED, usually a while
57 * LED, for example as backlight or flashlight. If this is set, the
58 * TPS6105X will register to the LED framework
59 * @TPS6105X_MODE_TORCH_FLASH: this instance is used as a flashgun, usually
60 * in a camera
61 * @TPS6105X_MODE_VOLTAGE: this instance is used as a voltage regulator and
62 * will register to the regulator framework
63 */
64enum tps6105x_mode {
65 TPS6105X_MODE_SHUTDOWN,
66 TPS6105X_MODE_TORCH,
67 TPS6105X_MODE_TORCH_FLASH,
68 TPS6105X_MODE_VOLTAGE,
69};
70
71/**
72 * struct tps6105x_platform_data - TPS61905x platform data
73 * @mode: what mode this instance shall be operated in,
74 * this is not selectable at runtime
75 * @regulator_data: initialization data for the voltage
76 * regulator if used as a voltage source
77 */
78struct tps6105x_platform_data {
79 enum tps6105x_mode mode;
80 struct regulator_init_data *regulator_data;
81};
82
83/**
84 * struct tps6105x - state holder for the TPS6105x drivers
85 * @mutex: mutex to serialize I2C accesses
86 * @i2c_client: corresponding I2C client
87 * @regulator: regulator device if used in voltage mode
88 */
89struct tps6105x {
90 struct tps6105x_platform_data *pdata;
91 struct mutex lock;
92 struct i2c_client *client;
93 struct regulator_dev *regulator;
94};
95
96extern int tps6105x_set(struct tps6105x *tps6105x, u8 reg, u8 value);
97extern int tps6105x_get(struct tps6105x *tps6105x, u8 reg, u8 *buf);
98extern int tps6105x_mask_and_set(struct tps6105x *tps6105x, u8 reg,
99 u8 bitmask, u8 bitvalues);
100
101#endif
diff --git a/include/linux/mfd/wl1273-core.h b/include/linux/mfd/wl1273-core.h
index 9787293eae5f..db2f3f454a1b 100644
--- a/include/linux/mfd/wl1273-core.h
+++ b/include/linux/mfd/wl1273-core.h
@@ -280,7 +280,9 @@ struct wl1273_core {
280 280
281 struct i2c_client *client; 281 struct i2c_client *client;
282 282
283 int (*read)(struct wl1273_core *core, u8, u16 *);
283 int (*write)(struct wl1273_core *core, u8, u16); 284 int (*write)(struct wl1273_core *core, u8, u16);
285 int (*write_data)(struct wl1273_core *core, u8 *, u16);
284 int (*set_audio)(struct wl1273_core *core, unsigned int); 286 int (*set_audio)(struct wl1273_core *core, unsigned int);
285 int (*set_volume)(struct wl1273_core *core, unsigned int); 287 int (*set_volume)(struct wl1273_core *core, unsigned int);
286}; 288};
diff --git a/include/linux/mfd/wm831x/pdata.h b/include/linux/mfd/wm831x/pdata.h
index 173086d42af4..afe4db49402d 100644
--- a/include/linux/mfd/wm831x/pdata.h
+++ b/include/linux/mfd/wm831x/pdata.h
@@ -104,11 +104,17 @@ struct wm831x_watchdog_pdata {
104#define WM831X_MAX_ISINK 2 104#define WM831X_MAX_ISINK 2
105 105
106struct wm831x_pdata { 106struct wm831x_pdata {
107 /** Used to distinguish multiple WM831x chips */
108 int wm831x_num;
109
107 /** Called before subdevices are set up */ 110 /** Called before subdevices are set up */
108 int (*pre_init)(struct wm831x *wm831x); 111 int (*pre_init)(struct wm831x *wm831x);
109 /** Called after subdevices are set up */ 112 /** Called after subdevices are set up */
110 int (*post_init)(struct wm831x *wm831x); 113 int (*post_init)(struct wm831x *wm831x);
111 114
115 /** Put the /IRQ line into CMOS mode */
116 bool irq_cmos;
117
112 int irq_base; 118 int irq_base;
113 int gpio_base; 119 int gpio_base;
114 struct wm831x_backlight_pdata *backlight; 120 struct wm831x_backlight_pdata *backlight;
diff --git a/include/linux/mfd/wm8994/core.h b/include/linux/mfd/wm8994/core.h
index ef4f0b6083a3..f0b69cdae41c 100644
--- a/include/linux/mfd/wm8994/core.h
+++ b/include/linux/mfd/wm8994/core.h
@@ -59,7 +59,7 @@ struct wm8994 {
59 int (*read_dev)(struct wm8994 *wm8994, unsigned short reg, 59 int (*read_dev)(struct wm8994 *wm8994, unsigned short reg,
60 int bytes, void *dest); 60 int bytes, void *dest);
61 int (*write_dev)(struct wm8994 *wm8994, unsigned short reg, 61 int (*write_dev)(struct wm8994 *wm8994, unsigned short reg,
62 int bytes, void *src); 62 int bytes, const void *src);
63 63
64 void *control_data; 64 void *control_data;
65 65
@@ -88,6 +88,8 @@ int wm8994_set_bits(struct wm8994 *wm8994, unsigned short reg,
88 unsigned short mask, unsigned short val); 88 unsigned short mask, unsigned short val);
89int wm8994_bulk_read(struct wm8994 *wm8994, unsigned short reg, 89int wm8994_bulk_read(struct wm8994 *wm8994, unsigned short reg,
90 int count, u16 *buf); 90 int count, u16 *buf);
91int wm8994_bulk_write(struct wm8994 *wm8994, unsigned short reg,
92 int count, const u16 *buf);
91 93
92 94
93/* Helper to save on boilerplate */ 95/* Helper to save on boilerplate */
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-01 14:54:25 -0400