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Diffstat (limited to 'include/dt-bindings/clock/imx8mq-clock.h')
-rw-r--r--include/dt-bindings/clock/imx8mq-clock.h35
1 files changed, 22 insertions, 13 deletions
diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h
index b53be41929be..b58cc643c9c9 100644
--- a/include/dt-bindings/clock/imx8mq-clock.h
+++ b/include/dt-bindings/clock/imx8mq-clock.h
@@ -350,7 +350,7 @@
350#define IMX8MQ_CLK_VPU_G2_ROOT 241 350#define IMX8MQ_CLK_VPU_G2_ROOT 241
351 351
352/* SCCG PLL GATE */ 352/* SCCG PLL GATE */
353#define IMX8MQ_SYS1_PLL_OUT 232 353#define IMX8MQ_SYS1_PLL_OUT 242
354#define IMX8MQ_SYS2_PLL_OUT 243 354#define IMX8MQ_SYS2_PLL_OUT 243
355#define IMX8MQ_SYS3_PLL_OUT 244 355#define IMX8MQ_SYS3_PLL_OUT 244
356#define IMX8MQ_DRAM_PLL_OUT 245 356#define IMX8MQ_DRAM_PLL_OUT 245
@@ -372,24 +372,33 @@
372/* txesc clock */ 372/* txesc clock */
373#define IMX8MQ_CLK_DSI_IPG_DIV 256 373#define IMX8MQ_CLK_DSI_IPG_DIV 256
374 374
375#define IMX8MQ_CLK_TMU_ROOT 265 375#define IMX8MQ_CLK_TMU_ROOT 257
376 376
377/* Display root clocks */ 377/* Display root clocks */
378#define IMX8MQ_CLK_DISP_AXI_ROOT 266 378#define IMX8MQ_CLK_DISP_AXI_ROOT 258
379#define IMX8MQ_CLK_DISP_APB_ROOT 267 379#define IMX8MQ_CLK_DISP_APB_ROOT 259
380#define IMX8MQ_CLK_DISP_RTRM_ROOT 268 380#define IMX8MQ_CLK_DISP_RTRM_ROOT 260
381 381
382#define IMX8MQ_CLK_OCOTP_ROOT 269 382#define IMX8MQ_CLK_OCOTP_ROOT 261
383 383
384#define IMX8MQ_CLK_DRAM_ALT_ROOT 270 384#define IMX8MQ_CLK_DRAM_ALT_ROOT 262
385#define IMX8MQ_CLK_DRAM_CORE 271 385#define IMX8MQ_CLK_DRAM_CORE 263
386 386
387#define IMX8MQ_CLK_MU_ROOT 272 387#define IMX8MQ_CLK_MU_ROOT 264
388#define IMX8MQ_VIDEO2_PLL_OUT 273 388#define IMX8MQ_VIDEO2_PLL_OUT 265
389 389
390#define IMX8MQ_CLK_CLKO2 274 390#define IMX8MQ_CLK_CLKO2 266
391 391
392#define IMX8MQ_CLK_NAND_USDHC_BUS_RAWNAND_CLK 275 392#define IMX8MQ_CLK_NAND_USDHC_BUS_RAWNAND_CLK 267
393 393
394#define IMX8MQ_CLK_END 276 394#define IMX8MQ_CLK_CLKO1 268
395#define IMX8MQ_CLK_ARM 269
396
397#define IMX8MQ_CLK_GPIO1_ROOT 270
398#define IMX8MQ_CLK_GPIO2_ROOT 271
399#define IMX8MQ_CLK_GPIO3_ROOT 272
400#define IMX8MQ_CLK_GPIO4_ROOT 273
401#define IMX8MQ_CLK_GPIO5_ROOT 274
402
403#define IMX8MQ_CLK_END 275
395#endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */ 404#endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */