diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/misc/spear13xx_pcie_gadget.c | 216 |
1 files changed, 71 insertions, 145 deletions
diff --git a/drivers/misc/spear13xx_pcie_gadget.c b/drivers/misc/spear13xx_pcie_gadget.c index b8374cdaf9c9..ee120dcbb3e6 100644 --- a/drivers/misc/spear13xx_pcie_gadget.c +++ b/drivers/misc/spear13xx_pcie_gadget.c | |||
| @@ -220,11 +220,17 @@ static irqreturn_t spear_pcie_gadget_irq(int irq, void *dev_id) | |||
| 220 | /* | 220 | /* |
| 221 | * configfs interfaces show/store functions | 221 | * configfs interfaces show/store functions |
| 222 | */ | 222 | */ |
| 223 | static ssize_t pcie_gadget_show_link( | 223 | |
| 224 | struct spear_pcie_gadget_config *config, | 224 | static struct pcie_gadget_target *to_target(struct config_item *item) |
| 225 | char *buf) | ||
| 226 | { | 225 | { |
| 227 | struct pcie_app_reg __iomem *app_reg = config->va_app_base; | 226 | return item ? |
| 227 | container_of(to_configfs_subsystem(to_config_group(item)), | ||
| 228 | struct pcie_gadget_target, subsys) : NULL; | ||
| 229 | } | ||
| 230 | |||
| 231 | static ssize_t pcie_gadget_link_show(struct config_item *item, char *buf) | ||
| 232 | { | ||
| 233 | struct pcie_app_reg __iomem *app_reg = to_target(item)->va_app_base; | ||
| 228 | 234 | ||
| 229 | if (readl(&app_reg->app_status_1) & ((u32)1 << XMLH_LINK_UP_ID)) | 235 | if (readl(&app_reg->app_status_1) & ((u32)1 << XMLH_LINK_UP_ID)) |
| 230 | return sprintf(buf, "UP"); | 236 | return sprintf(buf, "UP"); |
| @@ -232,11 +238,10 @@ static ssize_t pcie_gadget_show_link( | |||
| 232 | return sprintf(buf, "DOWN"); | 238 | return sprintf(buf, "DOWN"); |
| 233 | } | 239 | } |
| 234 | 240 | ||
| 235 | static ssize_t pcie_gadget_store_link( | 241 | static ssize_t pcie_gadget_link_store(struct config_item *item, |
| 236 | struct spear_pcie_gadget_config *config, | ||
| 237 | const char *buf, size_t count) | 242 | const char *buf, size_t count) |
| 238 | { | 243 | { |
| 239 | struct pcie_app_reg __iomem *app_reg = config->va_app_base; | 244 | struct pcie_app_reg __iomem *app_reg = to_target(item)->va_app_base; |
| 240 | 245 | ||
| 241 | if (sysfs_streq(buf, "UP")) | 246 | if (sysfs_streq(buf, "UP")) |
| 242 | writel(readl(&app_reg->app_ctrl_0) | (1 << APP_LTSSM_ENABLE_ID), | 247 | writel(readl(&app_reg->app_ctrl_0) | (1 << APP_LTSSM_ENABLE_ID), |
| @@ -250,17 +255,15 @@ static ssize_t pcie_gadget_store_link( | |||
| 250 | return count; | 255 | return count; |
| 251 | } | 256 | } |
| 252 | 257 | ||
| 253 | static ssize_t pcie_gadget_show_int_type( | 258 | static ssize_t pcie_gadget_int_type_show(struct config_item *item, char *buf) |
| 254 | struct spear_pcie_gadget_config *config, | ||
| 255 | char *buf) | ||
| 256 | { | 259 | { |
| 257 | return sprintf(buf, "%s", config->int_type); | 260 | return sprintf(buf, "%s", to_target(item)->int_type); |
| 258 | } | 261 | } |
| 259 | 262 | ||
| 260 | static ssize_t pcie_gadget_store_int_type( | 263 | static ssize_t pcie_gadget_int_type_store(struct config_item *item, |
| 261 | struct spear_pcie_gadget_config *config, | ||
| 262 | const char *buf, size_t count) | 264 | const char *buf, size_t count) |
| 263 | { | 265 | { |
| 266 | struct spear_pcie_gadget_config *config = to_target(item) | ||
| 264 | u32 cap, vec, flags; | 267 | u32 cap, vec, flags; |
| 265 | ulong vector; | 268 | ulong vector; |
| 266 | 269 | ||
| @@ -288,11 +291,10 @@ static ssize_t pcie_gadget_store_int_type( | |||
| 288 | return count; | 291 | return count; |
| 289 | } | 292 | } |
| 290 | 293 | ||
| 291 | static ssize_t pcie_gadget_show_no_of_msi( | 294 | static ssize_t pcie_gadget_no_of_msi_show(struct config_item *item, char *buf) |
| 292 | struct spear_pcie_gadget_config *config, | ||
| 293 | char *buf) | ||
| 294 | { | 295 | { |
| 295 | struct pcie_app_reg __iomem *app_reg = config->va_app_base; | 296 | struct spear_pcie_gadget_config *config = to_target(item) |
| 297 | struct pcie_app_reg __iomem *app_reg = to_target(item)->va_app_base; | ||
| 296 | u32 cap, vec, flags; | 298 | u32 cap, vec, flags; |
| 297 | ulong vector; | 299 | ulong vector; |
| 298 | 300 | ||
| @@ -313,13 +315,12 @@ static ssize_t pcie_gadget_show_no_of_msi( | |||
| 313 | return sprintf(buf, "%lu", vector); | 315 | return sprintf(buf, "%lu", vector); |
| 314 | } | 316 | } |
| 315 | 317 | ||
| 316 | static ssize_t pcie_gadget_store_no_of_msi( | 318 | static ssize_t pcie_gadget_no_of_msi_store(struct config_item *item, |
| 317 | struct spear_pcie_gadget_config *config, | ||
| 318 | const char *buf, size_t count) | 319 | const char *buf, size_t count) |
| 319 | { | 320 | { |
| 320 | int ret; | 321 | int ret; |
| 321 | 322 | ||
| 322 | ret = kstrtoul(buf, 0, &config->requested_msi); | 323 | ret = kstrtoul(buf, 0, &to_target(item)->requested_msi); |
| 323 | if (ret) | 324 | if (ret) |
| 324 | return ret; | 325 | return ret; |
| 325 | 326 | ||
| @@ -329,11 +330,10 @@ static ssize_t pcie_gadget_store_no_of_msi( | |||
| 329 | return count; | 330 | return count; |
| 330 | } | 331 | } |
| 331 | 332 | ||
| 332 | static ssize_t pcie_gadget_store_inta( | 333 | static ssize_t pcie_gadget_inta_store(struct config_item *item, |
| 333 | struct spear_pcie_gadget_config *config, | ||
| 334 | const char *buf, size_t count) | 334 | const char *buf, size_t count) |
| 335 | { | 335 | { |
| 336 | struct pcie_app_reg __iomem *app_reg = config->va_app_base; | 336 | struct pcie_app_reg __iomem *app_reg = to_target(item)->va_app_base; |
| 337 | ulong en; | 337 | ulong en; |
| 338 | int ret; | 338 | int ret; |
| 339 | 339 | ||
| @@ -351,10 +351,10 @@ static ssize_t pcie_gadget_store_inta( | |||
| 351 | return count; | 351 | return count; |
| 352 | } | 352 | } |
| 353 | 353 | ||
| 354 | static ssize_t pcie_gadget_store_send_msi( | 354 | static ssize_t pcie_gadget_send_msi_store(struct config_item *item, |
| 355 | struct spear_pcie_gadget_config *config, | ||
| 356 | const char *buf, size_t count) | 355 | const char *buf, size_t count) |
| 357 | { | 356 | { |
| 357 | struct spear_pcie_gadget_config *config = to_target(item) | ||
| 358 | struct pcie_app_reg __iomem *app_reg = config->va_app_base; | 358 | struct pcie_app_reg __iomem *app_reg = config->va_app_base; |
| 359 | ulong vector; | 359 | ulong vector; |
| 360 | u32 ven_msi; | 360 | u32 ven_msi; |
| @@ -388,19 +388,16 @@ static ssize_t pcie_gadget_store_send_msi( | |||
| 388 | return count; | 388 | return count; |
| 389 | } | 389 | } |
| 390 | 390 | ||
| 391 | static ssize_t pcie_gadget_show_vendor_id( | 391 | static ssize_t pcie_gadget_vendor_id_show(struct config_item *item, char *buf) |
| 392 | struct spear_pcie_gadget_config *config, | ||
| 393 | char *buf) | ||
| 394 | { | 392 | { |
| 395 | u32 id; | 393 | u32 id; |
| 396 | 394 | ||
| 397 | spear_dbi_read_reg(config, PCI_VENDOR_ID, 2, &id); | 395 | spear_dbi_read_reg(to_target(item), PCI_VENDOR_ID, 2, &id); |
| 398 | 396 | ||
| 399 | return sprintf(buf, "%x", id); | 397 | return sprintf(buf, "%x", id); |
| 400 | } | 398 | } |
| 401 | 399 | ||
| 402 | static ssize_t pcie_gadget_store_vendor_id( | 400 | static ssize_t pcie_gadget_vendor_id_store(struct config_item *item, |
| 403 | struct spear_pcie_gadget_config *config, | ||
| 404 | const char *buf, size_t count) | 401 | const char *buf, size_t count) |
| 405 | { | 402 | { |
| 406 | ulong id; | 403 | ulong id; |
| @@ -410,24 +407,21 @@ static ssize_t pcie_gadget_store_vendor_id( | |||
| 410 | if (ret) | 407 | if (ret) |
| 411 | return ret; | 408 | return ret; |
| 412 | 409 | ||
| 413 | spear_dbi_write_reg(config, PCI_VENDOR_ID, 2, id); | 410 | spear_dbi_write_reg(to_target(item), PCI_VENDOR_ID, 2, id); |
| 414 | 411 | ||
| 415 | return count; | 412 | return count; |
| 416 | } | 413 | } |
| 417 | 414 | ||
| 418 | static ssize_t pcie_gadget_show_device_id( | 415 | static ssize_t pcie_gadget_device_id_show(struct config_item *item, char *buf) |
| 419 | struct spear_pcie_gadget_config *config, | ||
| 420 | char *buf) | ||
| 421 | { | 416 | { |
| 422 | u32 id; | 417 | u32 id; |
| 423 | 418 | ||
| 424 | spear_dbi_read_reg(config, PCI_DEVICE_ID, 2, &id); | 419 | spear_dbi_read_reg(to_target(item), PCI_DEVICE_ID, 2, &id); |
| 425 | 420 | ||
| 426 | return sprintf(buf, "%x", id); | 421 | return sprintf(buf, "%x", id); |
| 427 | } | 422 | } |
| 428 | 423 | ||
| 429 | static ssize_t pcie_gadget_store_device_id( | 424 | static ssize_t pcie_gadget_device_id_store(struct config_item *item, |
| 430 | struct spear_pcie_gadget_config *config, | ||
| 431 | const char *buf, size_t count) | 425 | const char *buf, size_t count) |
| 432 | { | 426 | { |
| 433 | ulong id; | 427 | ulong id; |
| @@ -437,22 +431,20 @@ static ssize_t pcie_gadget_store_device_id( | |||
| 437 | if (ret) | 431 | if (ret) |
| 438 | return ret; | 432 | return ret; |
| 439 | 433 | ||
| 440 | spear_dbi_write_reg(config, PCI_DEVICE_ID, 2, id); | 434 | spear_dbi_write_reg(to_target(item), PCI_DEVICE_ID, 2, id); |
| 441 | 435 | ||
| 442 | return count; | 436 | return count; |
| 443 | } | 437 | } |
| 444 | 438 | ||
| 445 | static ssize_t pcie_gadget_show_bar0_size( | 439 | static ssize_t pcie_gadget_bar0_size_show(struct config_item *item, char *buf) |
| 446 | struct spear_pcie_gadget_config *config, | ||
| 447 | char *buf) | ||
| 448 | { | 440 | { |
| 449 | return sprintf(buf, "%lx", config->bar0_size); | 441 | return sprintf(buf, "%lx", to_target(item)->bar0_size); |
| 450 | } | 442 | } |
| 451 | 443 | ||
| 452 | static ssize_t pcie_gadget_store_bar0_size( | 444 | static ssize_t pcie_gadget_bar0_size_store(struct config_item *item, |
| 453 | struct spear_pcie_gadget_config *config, | ||
| 454 | const char *buf, size_t count) | 445 | const char *buf, size_t count) |
| 455 | { | 446 | { |
| 447 | struct spear_pcie_gadget_config *config = to_target(item) | ||
| 456 | ulong size; | 448 | ulong size; |
| 457 | u32 pos, pos1; | 449 | u32 pos, pos1; |
| 458 | u32 no_of_bit = 0; | 450 | u32 no_of_bit = 0; |
| @@ -489,21 +481,20 @@ static ssize_t pcie_gadget_store_bar0_size( | |||
| 489 | return count; | 481 | return count; |
| 490 | } | 482 | } |
| 491 | 483 | ||
| 492 | static ssize_t pcie_gadget_show_bar0_address( | 484 | static ssize_t pcie_gadget_bar0_address_show(struct config_item *item, |
| 493 | struct spear_pcie_gadget_config *config, | ||
| 494 | char *buf) | 485 | char *buf) |
| 495 | { | 486 | { |
| 496 | struct pcie_app_reg __iomem *app_reg = config->va_app_base; | 487 | struct pcie_app_reg __iomem *app_reg = to_target(item)->va_app_base; |
| 497 | 488 | ||
| 498 | u32 address = readl(&app_reg->pim0_mem_addr_start); | 489 | u32 address = readl(&app_reg->pim0_mem_addr_start); |
| 499 | 490 | ||
| 500 | return sprintf(buf, "%x", address); | 491 | return sprintf(buf, "%x", address); |
| 501 | } | 492 | } |
| 502 | 493 | ||
| 503 | static ssize_t pcie_gadget_store_bar0_address( | 494 | static ssize_t pcie_gadget_bar0_address_store(struct config_item *item, |
| 504 | struct spear_pcie_gadget_config *config, | ||
| 505 | const char *buf, size_t count) | 495 | const char *buf, size_t count) |
| 506 | { | 496 | { |
| 497 | struct spear_pcie_gadget_config *config = to_target(item) | ||
| 507 | struct pcie_app_reg __iomem *app_reg = config->va_app_base; | 498 | struct pcie_app_reg __iomem *app_reg = config->va_app_base; |
| 508 | ulong address; | 499 | ulong address; |
| 509 | int ret; | 500 | int ret; |
| @@ -524,15 +515,13 @@ static ssize_t pcie_gadget_store_bar0_address( | |||
| 524 | return count; | 515 | return count; |
| 525 | } | 516 | } |
| 526 | 517 | ||
| 527 | static ssize_t pcie_gadget_show_bar0_rw_offset( | 518 | static ssize_t pcie_gadget_bar0_rw_offset_show(struct config_item *item, |
| 528 | struct spear_pcie_gadget_config *config, | ||
| 529 | char *buf) | 519 | char *buf) |
| 530 | { | 520 | { |
| 531 | return sprintf(buf, "%lx", config->bar0_rw_offset); | 521 | return sprintf(buf, "%lx", to_target(item)->bar0_rw_offset); |
| 532 | } | 522 | } |
| 533 | 523 | ||
| 534 | static ssize_t pcie_gadget_store_bar0_rw_offset( | 524 | static ssize_t pcie_gadget_bar0_rw_offset_store(struct config_item *item, |
| 535 | struct spear_pcie_gadget_config *config, | ||
| 536 | const char *buf, size_t count) | 525 | const char *buf, size_t count) |
| 537 | { | 526 | { |
| 538 | ulong offset; | 527 | ulong offset; |
| @@ -545,15 +534,14 @@ static ssize_t pcie_gadget_store_bar0_rw_offset( | |||
| 545 | if (offset % 4) | 534 | if (offset % 4) |
| 546 | return -EINVAL; | 535 | return -EINVAL; |
| 547 | 536 | ||
| 548 | config->bar0_rw_offset = offset; | 537 | to_target(item)->bar0_rw_offset = offset; |
| 549 | 538 | ||
| 550 | return count; | 539 | return count; |
| 551 | } | 540 | } |
| 552 | 541 | ||
| 553 | static ssize_t pcie_gadget_show_bar0_data( | 542 | static ssize_t pcie_gadget_bar0_data_show(struct config_item *item, char *buf) |
| 554 | struct spear_pcie_gadget_config *config, | ||
| 555 | char *buf) | ||
| 556 | { | 543 | { |
| 544 | struct spear_pcie_gadget_config *config = to_target(item) | ||
| 557 | ulong data; | 545 | ulong data; |
| 558 | 546 | ||
| 559 | if (!config->va_bar0_address) | 547 | if (!config->va_bar0_address) |
| @@ -564,10 +552,10 @@ static ssize_t pcie_gadget_show_bar0_data( | |||
| 564 | return sprintf(buf, "%lx", data); | 552 | return sprintf(buf, "%lx", data); |
| 565 | } | 553 | } |
| 566 | 554 | ||
| 567 | static ssize_t pcie_gadget_store_bar0_data( | 555 | static ssize_t pcie_gadget_bar0_data_store(struct config_item *item, |
| 568 | struct spear_pcie_gadget_config *config, | ||
| 569 | const char *buf, size_t count) | 556 | const char *buf, size_t count) |
| 570 | { | 557 | { |
| 558 | struct spear_pcie_gadget_config *config = to_target(item) | ||
| 571 | ulong data; | 559 | ulong data; |
| 572 | int ret; | 560 | int ret; |
| 573 | 561 | ||
| @@ -583,97 +571,35 @@ static ssize_t pcie_gadget_store_bar0_data( | |||
| 583 | return count; | 571 | return count; |
| 584 | } | 572 | } |
| 585 | 573 | ||
| 586 | /* | 574 | CONFIGFS_ATTR(pcie_gadget_, link); |
| 587 | * Attribute definitions. | 575 | CONFIGFS_ATTR(pcie_gadget_, int_type); |
| 588 | */ | 576 | CONFIGFS_ATTR(pcie_gadget_, no_of_msi); |
| 589 | 577 | CONFIGFS_ATTR_WO(pcie_gadget_, inta); | |
| 590 | #define PCIE_GADGET_TARGET_ATTR_RO(_name) \ | 578 | CONFIGFS_ATTR_WO(pcie_gadget_, send_msi); |
| 591 | static struct pcie_gadget_target_attr pcie_gadget_target_##_name = \ | 579 | CONFIGFS_ATTR(pcie_gadget_, vendor_id); |
| 592 | __CONFIGFS_ATTR(_name, S_IRUGO, pcie_gadget_show_##_name, NULL) | 580 | CONFIGFS_ATTR(pcie_gadget_, device_id); |
| 593 | 581 | CONFIGFS_ATTR(pcie_gadget_, bar0_size); | |
| 594 | #define PCIE_GADGET_TARGET_ATTR_WO(_name) \ | 582 | CONFIGFS_ATTR(pcie_gadget_, bar0_address); |
| 595 | static struct pcie_gadget_target_attr pcie_gadget_target_##_name = \ | 583 | CONFIGFS_ATTR(pcie_gadget_, bar0_rw_offset); |
| 596 | __CONFIGFS_ATTR(_name, S_IWUSR, NULL, pcie_gadget_store_##_name) | 584 | CONFIGFS_ATTR(pcie_gadget_, bar0_data); |
| 597 | |||
| 598 | #define PCIE_GADGET_TARGET_ATTR_RW(_name) \ | ||
| 599 | static struct pcie_gadget_target_attr pcie_gadget_target_##_name = \ | ||
| 600 | __CONFIGFS_ATTR(_name, S_IRUGO | S_IWUSR, pcie_gadget_show_##_name, \ | ||
| 601 | pcie_gadget_store_##_name) | ||
| 602 | PCIE_GADGET_TARGET_ATTR_RW(link); | ||
| 603 | PCIE_GADGET_TARGET_ATTR_RW(int_type); | ||
| 604 | PCIE_GADGET_TARGET_ATTR_RW(no_of_msi); | ||
| 605 | PCIE_GADGET_TARGET_ATTR_WO(inta); | ||
| 606 | PCIE_GADGET_TARGET_ATTR_WO(send_msi); | ||
| 607 | PCIE_GADGET_TARGET_ATTR_RW(vendor_id); | ||
| 608 | PCIE_GADGET_TARGET_ATTR_RW(device_id); | ||
| 609 | PCIE_GADGET_TARGET_ATTR_RW(bar0_size); | ||
| 610 | PCIE_GADGET_TARGET_ATTR_RW(bar0_address); | ||
| 611 | PCIE_GADGET_TARGET_ATTR_RW(bar0_rw_offset); | ||
| 612 | PCIE_GADGET_TARGET_ATTR_RW(bar0_data); | ||
| 613 | 585 | ||
| 614 | static struct configfs_attribute *pcie_gadget_target_attrs[] = { | 586 | static struct configfs_attribute *pcie_gadget_target_attrs[] = { |
| 615 | &pcie_gadget_target_link.attr, | 587 | &pcie_gadget_attr_link, |
| 616 | &pcie_gadget_target_int_type.attr, | 588 | &pcie_gadget_attr_int_type, |
| 617 | &pcie_gadget_target_no_of_msi.attr, | 589 | &pcie_gadget_attr_no_of_msi, |
| 618 | &pcie_gadget_target_inta.attr, | 590 | &pcie_gadget_attr_inta, |
| 619 | &pcie_gadget_target_send_msi.attr, | 591 | &pcie_gadget_attr_send_msi, |
| 620 | &pcie_gadget_target_vendor_id.attr, | 592 | &pcie_gadget_attr_vendor_id, |
| 621 | &pcie_gadget_target_device_id.attr, | 593 | &pcie_gadget_attr_device_id, |
| 622 | &pcie_gadget_target_bar0_size.attr, | 594 | &pcie_gadget_attr_bar0_size, |
| 623 | &pcie_gadget_target_bar0_address.attr, | 595 | &pcie_gadget_attr_bar0_address, |
| 624 | &pcie_gadget_target_bar0_rw_offset.attr, | 596 | &pcie_gadget_attr_bar0_rw_offset, |
| 625 | &pcie_gadget_target_bar0_data.attr, | 597 | &pcie_gadget_attr_bar0_data, |
| 626 | NULL, | 598 | NULL, |
| 627 | }; | 599 | }; |
| 628 | 600 | ||
| 629 | static struct pcie_gadget_target *to_target(struct config_item *item) | ||
| 630 | { | ||
| 631 | return item ? | ||
| 632 | container_of(to_configfs_subsystem(to_config_group(item)), | ||
| 633 | struct pcie_gadget_target, subsys) : NULL; | ||
| 634 | } | ||
| 635 | |||
| 636 | /* | ||
| 637 | * Item operations and type for pcie_gadget_target. | ||
| 638 | */ | ||
| 639 | |||
| 640 | static ssize_t pcie_gadget_target_attr_show(struct config_item *item, | ||
| 641 | struct configfs_attribute *attr, | ||
| 642 | char *buf) | ||
| 643 | { | ||
| 644 | ssize_t ret = -EINVAL; | ||
| 645 | struct pcie_gadget_target *target = to_target(item); | ||
| 646 | struct pcie_gadget_target_attr *t_attr = | ||
| 647 | container_of(attr, struct pcie_gadget_target_attr, attr); | ||
| 648 | |||
| 649 | if (t_attr->show) | ||
| 650 | ret = t_attr->show(&target->config, buf); | ||
| 651 | return ret; | ||
| 652 | } | ||
| 653 | |||
| 654 | static ssize_t pcie_gadget_target_attr_store(struct config_item *item, | ||
| 655 | struct configfs_attribute *attr, | ||
| 656 | const char *buf, | ||
| 657 | size_t count) | ||
| 658 | { | ||
| 659 | ssize_t ret = -EINVAL; | ||
| 660 | struct pcie_gadget_target *target = to_target(item); | ||
| 661 | struct pcie_gadget_target_attr *t_attr = | ||
| 662 | container_of(attr, struct pcie_gadget_target_attr, attr); | ||
| 663 | |||
| 664 | if (t_attr->store) | ||
| 665 | ret = t_attr->store(&target->config, buf, count); | ||
| 666 | return ret; | ||
| 667 | } | ||
| 668 | |||
| 669 | static struct configfs_item_operations pcie_gadget_target_item_ops = { | ||
| 670 | .show_attribute = pcie_gadget_target_attr_show, | ||
| 671 | .store_attribute = pcie_gadget_target_attr_store, | ||
| 672 | }; | ||
| 673 | |||
| 674 | static struct config_item_type pcie_gadget_target_type = { | 601 | static struct config_item_type pcie_gadget_target_type = { |
| 675 | .ct_attrs = pcie_gadget_target_attrs, | 602 | .ct_attrs = pcie_gadget_target_attrs, |
| 676 | .ct_item_ops = &pcie_gadget_target_item_ops, | ||
| 677 | .ct_owner = THIS_MODULE, | 603 | .ct_owner = THIS_MODULE, |
| 678 | }; | 604 | }; |
| 679 | 605 | ||
