diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_audio.c | 27 |
2 files changed, 30 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 773d1d24e604..3aaed099e4fe 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
| @@ -6479,6 +6479,9 @@ enum skl_disp_power_wells { | |||
| 6479 | #define AUDIO_CP_READY(trans) ((1 << 1) << ((trans) * 4)) | 6479 | #define AUDIO_CP_READY(trans) ((1 << 1) << ((trans) * 4)) |
| 6480 | #define AUDIO_ELD_VALID(trans) ((1 << 0) << ((trans) * 4)) | 6480 | #define AUDIO_ELD_VALID(trans) ((1 << 0) << ((trans) * 4)) |
| 6481 | 6481 | ||
| 6482 | #define HSW_AUD_CHICKENBIT 0x65f10 | ||
| 6483 | #define SKL_AUD_CODEC_WAKE_SIGNAL (1 << 15) | ||
| 6484 | |||
| 6482 | /* HSW Power Wells */ | 6485 | /* HSW Power Wells */ |
| 6483 | #define HSW_PWR_WELL_BIOS 0x45400 /* CTL1 */ | 6486 | #define HSW_PWR_WELL_BIOS 0x45400 /* CTL1 */ |
| 6484 | #define HSW_PWR_WELL_DRIVER 0x45404 /* CTL2 */ | 6487 | #define HSW_PWR_WELL_DRIVER 0x45404 /* CTL2 */ |
diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 2396cc702d18..ef342571ae6a 100644 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i915/intel_audio.c | |||
| @@ -475,6 +475,32 @@ static void i915_audio_component_put_power(struct device *dev) | |||
| 475 | intel_display_power_put(dev_to_i915(dev), POWER_DOMAIN_AUDIO); | 475 | intel_display_power_put(dev_to_i915(dev), POWER_DOMAIN_AUDIO); |
| 476 | } | 476 | } |
| 477 | 477 | ||
| 478 | static void i915_audio_component_codec_wake_override(struct device *dev, | ||
| 479 | bool enable) | ||
| 480 | { | ||
| 481 | struct drm_i915_private *dev_priv = dev_to_i915(dev); | ||
| 482 | u32 tmp; | ||
| 483 | |||
| 484 | if (!IS_SKYLAKE(dev_priv)) | ||
| 485 | return; | ||
| 486 | |||
| 487 | /* | ||
| 488 | * Enable/disable generating the codec wake signal, overriding the | ||
| 489 | * internal logic to generate the codec wake to controller. | ||
| 490 | */ | ||
| 491 | tmp = I915_READ(HSW_AUD_CHICKENBIT); | ||
| 492 | tmp &= ~SKL_AUD_CODEC_WAKE_SIGNAL; | ||
| 493 | I915_WRITE(HSW_AUD_CHICKENBIT, tmp); | ||
| 494 | usleep_range(1000, 1500); | ||
| 495 | |||
| 496 | if (enable) { | ||
| 497 | tmp = I915_READ(HSW_AUD_CHICKENBIT); | ||
| 498 | tmp |= SKL_AUD_CODEC_WAKE_SIGNAL; | ||
| 499 | I915_WRITE(HSW_AUD_CHICKENBIT, tmp); | ||
| 500 | usleep_range(1000, 1500); | ||
| 501 | } | ||
| 502 | } | ||
| 503 | |||
| 478 | /* Get CDCLK in kHz */ | 504 | /* Get CDCLK in kHz */ |
| 479 | static int i915_audio_component_get_cdclk_freq(struct device *dev) | 505 | static int i915_audio_component_get_cdclk_freq(struct device *dev) |
| 480 | { | 506 | { |
| @@ -495,6 +521,7 @@ static const struct i915_audio_component_ops i915_audio_component_ops = { | |||
| 495 | .owner = THIS_MODULE, | 521 | .owner = THIS_MODULE, |
| 496 | .get_power = i915_audio_component_get_power, | 522 | .get_power = i915_audio_component_get_power, |
| 497 | .put_power = i915_audio_component_put_power, | 523 | .put_power = i915_audio_component_put_power, |
| 524 | .codec_wake_override = i915_audio_component_codec_wake_override, | ||
| 498 | .get_cdclk_freq = i915_audio_component_get_cdclk_freq, | 525 | .get_cdclk_freq = i915_audio_component_get_cdclk_freq, |
| 499 | }; | 526 | }; |
| 500 | 527 | ||
