2 files changed, 54 insertions, 58 deletions

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index ede5672ab34d..da6c0ba61d4f 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -548,7 +548,7 @@ static int gic_starting_cpu(unsigned int cpu)
 static u16 gic_compute_target_list(int *base_cpu, const struct cpumask *mask,
                                    unsigned long cluster_id)
 {
-        int cpu = *base_cpu;
+        int next_cpu, cpu = *base_cpu;
         unsigned long mpidr = cpu_logical_map(cpu);
         u16 tlist = 0;
 
@@ -562,9 +562,10 @@ static u16 gic_compute_target_list(int *base_cpu, const struct cpumask *mask,
 
                 tlist |= 1 << (mpidr & 0xf);
 
-                cpu = cpumask_next(cpu, mask);
-                if (cpu >= nr_cpu_ids)
+                next_cpu = cpumask_next(cpu, mask);
+                if (next_cpu >= nr_cpu_ids)
                         goto out;
+                cpu = next_cpu;
 
                 mpidr = cpu_logical_map(cpu);
 
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 83f498393a7f..6185696405d5 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -638,27 +638,6 @@ static int gic_local_irq_domain_map(struct irq_domain *d, unsigned int virq,
         if (!gic_local_irq_is_routable(intr))
                 return -EPERM;
 
-        /*
-         * HACK: These are all really percpu interrupts, but the rest
-         * of the MIPS kernel code does not use the percpu IRQ API for
-         * the CP0 timer and performance counter interrupts.
-         */
-        switch (intr) {
-        case GIC_LOCAL_INT_TIMER:
-        case GIC_LOCAL_INT_PERFCTR:
-        case GIC_LOCAL_INT_FDC:
-                irq_set_chip_and_handler(virq,
-                                         &gic_all_vpes_local_irq_controller,
-                                         handle_percpu_irq);
-                break;
-        default:
-                irq_set_chip_and_handler(virq,
-                                         &gic_local_irq_controller,
-                                         handle_percpu_devid_irq);
-                irq_set_percpu_devid(virq);
-                break;
-        }
-
         spin_lock_irqsave(&gic_lock, flags);
         for (i = 0; i < gic_vpes; i++) {
                 u32 val = GIC_MAP_TO_PIN_MSK | gic_cpu_pin;
@@ -724,16 +703,42 @@ static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq,
         return 0;
 }
 
-static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq,
-                              irq_hw_number_t hw)
+static int gic_setup_dev_chip(struct irq_domain *d, unsigned int virq,
+                              unsigned int hwirq)
 {
-        if (GIC_HWIRQ_TO_LOCAL(hw) < GIC_NUM_LOCAL_INTRS)
-                return gic_local_irq_domain_map(d, virq, hw);
+        struct irq_chip *chip;
+        int err;
+
+        if (hwirq >= GIC_SHARED_HWIRQ_BASE) {
+                err = irq_domain_set_hwirq_and_chip(d, virq, hwirq,
+                                                    &gic_level_irq_controller,
+                                                    NULL);
+        } else {
+                switch (GIC_HWIRQ_TO_LOCAL(hwirq)) {
+                case GIC_LOCAL_INT_TIMER:
+                case GIC_LOCAL_INT_PERFCTR:
+                case GIC_LOCAL_INT_FDC:
+                        /*
+                         * HACK: These are all really percpu interrupts, but
+                         * the rest of the MIPS kernel code does not use the
+                         * percpu IRQ API for them.
+                         */
+                        chip = &gic_all_vpes_local_irq_controller;
+                        irq_set_handler(virq, handle_percpu_irq);
+                        break;
+
+                default:
+                        chip = &gic_local_irq_controller;
+                        irq_set_handler(virq, handle_percpu_devid_irq);
+                        irq_set_percpu_devid(virq);
+                        break;
+                }
 
-        irq_set_chip_and_handler(virq, &gic_level_irq_controller,
-                                 handle_level_irq);
+                err = irq_domain_set_hwirq_and_chip(d, virq, hwirq,
+                                                    chip, NULL);
+        }
 
-        return gic_shared_irq_domain_map(d, virq, hw, 0);
+        return err;
 }
 
 static int gic_irq_domain_alloc(struct irq_domain *d, unsigned int virq,
@@ -744,15 +749,12 @@ static int gic_irq_domain_alloc(struct irq_domain *d, unsigned int virq,
         int cpu, ret, i;
 
         if (spec->type == GIC_DEVICE) {
-                /* verify that it doesn't conflict with an IPI irq */
-                if (test_bit(spec->hwirq, ipi_resrv))
+                /* verify that shared irqs don't conflict with an IPI irq */
+                if ((spec->hwirq >= GIC_SHARED_HWIRQ_BASE) &&
+                    test_bit(GIC_HWIRQ_TO_SHARED(spec->hwirq), ipi_resrv))
                         return -EBUSY;
 
-                hwirq = GIC_SHARED_TO_HWIRQ(spec->hwirq);
-
-                return irq_domain_set_hwirq_and_chip(d, virq, hwirq,
-                                                     &gic_level_irq_controller,
-                                                     NULL);
+                return gic_setup_dev_chip(d, virq, spec->hwirq);
         } else {
                 base_hwirq = find_first_bit(ipi_resrv, gic_shared_intrs);
                 if (base_hwirq == gic_shared_intrs) {
@@ -821,7 +823,6 @@ int gic_irq_domain_match(struct irq_domain *d, struct device_node *node,
 }
 
 static const struct irq_domain_ops gic_irq_domain_ops = {
-        .map = gic_irq_domain_map,
         .alloc = gic_irq_domain_alloc,
         .free = gic_irq_domain_free,
         .match = gic_irq_domain_match,
@@ -852,29 +853,20 @@ static int gic_dev_domain_alloc(struct irq_domain *d, unsigned int virq,
         struct irq_fwspec *fwspec = arg;
         struct gic_irq_spec spec = {
                 .type = GIC_DEVICE,
-                .hwirq = fwspec->param[1],
         };
         int i, ret;
-        bool is_shared = fwspec->param[0] == GIC_SHARED;
 
-        if (is_shared) {
-                ret = irq_domain_alloc_irqs_parent(d, virq, nr_irqs, &spec);
-                if (ret)
-                        return ret;
-        }
-
-        for (i = 0; i < nr_irqs; i++) {
-                irq_hw_number_t hwirq;
+        if (fwspec->param[0] == GIC_SHARED)
+                spec.hwirq = GIC_SHARED_TO_HWIRQ(fwspec->param[1]);
+        else
+                spec.hwirq = GIC_LOCAL_TO_HWIRQ(fwspec->param[1]);
 
-                if (is_shared)
-                        hwirq = GIC_SHARED_TO_HWIRQ(spec.hwirq + i);
-                else
-                        hwirq = GIC_LOCAL_TO_HWIRQ(spec.hwirq + i);
+        ret = irq_domain_alloc_irqs_parent(d, virq, nr_irqs, &spec);
+        if (ret)
+                return ret;
 
-                ret = irq_domain_set_hwirq_and_chip(d, virq + i,
-                                                    hwirq,
-                                                    &gic_level_irq_controller,
-                                                    NULL);
+        for (i = 0; i < nr_irqs; i++) {
+                ret = gic_setup_dev_chip(d, virq + i, spec.hwirq + i);
                 if (ret)
                         goto error;
         }
@@ -896,7 +888,10 @@ void gic_dev_domain_free(struct irq_domain *d, unsigned int virq,
 static void gic_dev_domain_activate(struct irq_domain *domain,
                                     struct irq_data *d)
 {
-        gic_shared_irq_domain_map(domain, d->irq, d->hwirq, 0);
+        if (GIC_HWIRQ_TO_LOCAL(d->hwirq) < GIC_NUM_LOCAL_INTRS)
+                gic_local_irq_domain_map(domain, d->irq, d->hwirq);
+        else
+                gic_shared_irq_domain_map(domain, d->irq, d->hwirq, 0);
 }
 
 static struct irq_domain_ops gic_dev_domain_ops = {