diff options
Diffstat (limited to 'drivers')
25 files changed, 225 insertions, 165 deletions
diff --git a/drivers/base/dma-coherent.c b/drivers/base/dma-coherent.c index a39b2166b145..744f64f43454 100644 --- a/drivers/base/dma-coherent.c +++ b/drivers/base/dma-coherent.c | |||
@@ -348,16 +348,15 @@ static int rmem_dma_device_init(struct reserved_mem *rmem, struct device *dev) | |||
348 | struct dma_coherent_mem *mem = rmem->priv; | 348 | struct dma_coherent_mem *mem = rmem->priv; |
349 | int ret; | 349 | int ret; |
350 | 350 | ||
351 | if (!mem) | 351 | if (!mem) { |
352 | return -ENODEV; | 352 | ret = dma_init_coherent_memory(rmem->base, rmem->base, |
353 | 353 | rmem->size, | |
354 | ret = dma_init_coherent_memory(rmem->base, rmem->base, rmem->size, | 354 | DMA_MEMORY_EXCLUSIVE, &mem); |
355 | DMA_MEMORY_EXCLUSIVE, &mem); | 355 | if (ret) { |
356 | 356 | pr_err("Reserved memory: failed to init DMA memory pool at %pa, size %ld MiB\n", | |
357 | if (ret) { | 357 | &rmem->base, (unsigned long)rmem->size / SZ_1M); |
358 | pr_err("Reserved memory: failed to init DMA memory pool at %pa, size %ld MiB\n", | 358 | return ret; |
359 | &rmem->base, (unsigned long)rmem->size / SZ_1M); | 359 | } |
360 | return ret; | ||
361 | } | 360 | } |
362 | mem->use_dev_dma_pfn_offset = true; | 361 | mem->use_dev_dma_pfn_offset = true; |
363 | rmem->priv = mem; | 362 | rmem->priv = mem; |
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c index 681b639f5133..0649dd43e780 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c | |||
@@ -183,7 +183,7 @@ static void uninitialize(struct kernel_queue *kq) | |||
183 | { | 183 | { |
184 | if (kq->queue->properties.type == KFD_QUEUE_TYPE_HIQ) | 184 | if (kq->queue->properties.type == KFD_QUEUE_TYPE_HIQ) |
185 | kq->mqd->destroy_mqd(kq->mqd, | 185 | kq->mqd->destroy_mqd(kq->mqd, |
186 | NULL, | 186 | kq->queue->mqd, |
187 | false, | 187 | false, |
188 | QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS, | 188 | QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS, |
189 | kq->queue->pipe, | 189 | kq->queue->pipe, |
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c index 1cae95e2b13a..03bec765b03d 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | |||
@@ -143,7 +143,6 @@ int pqm_create_queue(struct process_queue_manager *pqm, | |||
143 | int num_queues = 0; | 143 | int num_queues = 0; |
144 | struct queue *cur; | 144 | struct queue *cur; |
145 | 145 | ||
146 | memset(&q_properties, 0, sizeof(struct queue_properties)); | ||
147 | memcpy(&q_properties, properties, sizeof(struct queue_properties)); | 146 | memcpy(&q_properties, properties, sizeof(struct queue_properties)); |
148 | q = NULL; | 147 | q = NULL; |
149 | kq = NULL; | 148 | kq = NULL; |
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c index 730b8d9db187..6be5b53c3b27 100644 --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/clk.h> | 14 | #include <linux/clk.h> |
15 | #include <linux/component.h> | 15 | #include <linux/component.h> |
16 | #include <linux/iopoll.h> | 16 | #include <linux/iopoll.h> |
17 | #include <linux/irq.h> | ||
17 | #include <linux/mfd/syscon.h> | 18 | #include <linux/mfd/syscon.h> |
18 | #include <linux/of_device.h> | 19 | #include <linux/of_device.h> |
19 | #include <linux/of_gpio.h> | 20 | #include <linux/of_gpio.h> |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c index b1f7299600f0..e651a58c18cf 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c | |||
@@ -168,23 +168,19 @@ static struct drm_driver exynos_drm_driver = { | |||
168 | static int exynos_drm_suspend(struct device *dev) | 168 | static int exynos_drm_suspend(struct device *dev) |
169 | { | 169 | { |
170 | struct drm_device *drm_dev = dev_get_drvdata(dev); | 170 | struct drm_device *drm_dev = dev_get_drvdata(dev); |
171 | struct drm_connector *connector; | 171 | struct exynos_drm_private *private = drm_dev->dev_private; |
172 | struct drm_connector_list_iter conn_iter; | ||
173 | 172 | ||
174 | if (pm_runtime_suspended(dev) || !drm_dev) | 173 | if (pm_runtime_suspended(dev) || !drm_dev) |
175 | return 0; | 174 | return 0; |
176 | 175 | ||
177 | drm_connector_list_iter_begin(drm_dev, &conn_iter); | 176 | drm_kms_helper_poll_disable(drm_dev); |
178 | drm_for_each_connector_iter(connector, &conn_iter) { | 177 | exynos_drm_fbdev_suspend(drm_dev); |
179 | int old_dpms = connector->dpms; | 178 | private->suspend_state = drm_atomic_helper_suspend(drm_dev); |
180 | 179 | if (IS_ERR(private->suspend_state)) { | |
181 | if (connector->funcs->dpms) | 180 | exynos_drm_fbdev_resume(drm_dev); |
182 | connector->funcs->dpms(connector, DRM_MODE_DPMS_OFF); | 181 | drm_kms_helper_poll_enable(drm_dev); |
183 | 182 | return PTR_ERR(private->suspend_state); | |
184 | /* Set the old mode back to the connector for resume */ | ||
185 | connector->dpms = old_dpms; | ||
186 | } | 183 | } |
187 | drm_connector_list_iter_end(&conn_iter); | ||
188 | 184 | ||
189 | return 0; | 185 | return 0; |
190 | } | 186 | } |
@@ -192,22 +188,14 @@ static int exynos_drm_suspend(struct device *dev) | |||
192 | static int exynos_drm_resume(struct device *dev) | 188 | static int exynos_drm_resume(struct device *dev) |
193 | { | 189 | { |
194 | struct drm_device *drm_dev = dev_get_drvdata(dev); | 190 | struct drm_device *drm_dev = dev_get_drvdata(dev); |
195 | struct drm_connector *connector; | 191 | struct exynos_drm_private *private = drm_dev->dev_private; |
196 | struct drm_connector_list_iter conn_iter; | ||
197 | 192 | ||
198 | if (pm_runtime_suspended(dev) || !drm_dev) | 193 | if (pm_runtime_suspended(dev) || !drm_dev) |
199 | return 0; | 194 | return 0; |
200 | 195 | ||
201 | drm_connector_list_iter_begin(drm_dev, &conn_iter); | 196 | drm_atomic_helper_resume(drm_dev, private->suspend_state); |
202 | drm_for_each_connector_iter(connector, &conn_iter) { | 197 | exynos_drm_fbdev_resume(drm_dev); |
203 | if (connector->funcs->dpms) { | 198 | drm_kms_helper_poll_enable(drm_dev); |
204 | int dpms = connector->dpms; | ||
205 | |||
206 | connector->dpms = DRM_MODE_DPMS_OFF; | ||
207 | connector->funcs->dpms(connector, dpms); | ||
208 | } | ||
209 | } | ||
210 | drm_connector_list_iter_end(&conn_iter); | ||
211 | 199 | ||
212 | return 0; | 200 | return 0; |
213 | } | 201 | } |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index cf131c2aa23e..f8bae4cb4823 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h | |||
@@ -202,6 +202,7 @@ struct drm_exynos_file_private { | |||
202 | */ | 202 | */ |
203 | struct exynos_drm_private { | 203 | struct exynos_drm_private { |
204 | struct drm_fb_helper *fb_helper; | 204 | struct drm_fb_helper *fb_helper; |
205 | struct drm_atomic_state *suspend_state; | ||
205 | 206 | ||
206 | struct device *dma_dev; | 207 | struct device *dma_dev; |
207 | void *mapping; | 208 | void *mapping; |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c index c3a068409b48..dfb66ecf417b 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c | |||
@@ -18,6 +18,8 @@ | |||
18 | #include <drm/drm_crtc_helper.h> | 18 | #include <drm/drm_crtc_helper.h> |
19 | #include <drm/exynos_drm.h> | 19 | #include <drm/exynos_drm.h> |
20 | 20 | ||
21 | #include <linux/console.h> | ||
22 | |||
21 | #include "exynos_drm_drv.h" | 23 | #include "exynos_drm_drv.h" |
22 | #include "exynos_drm_fb.h" | 24 | #include "exynos_drm_fb.h" |
23 | #include "exynos_drm_fbdev.h" | 25 | #include "exynos_drm_fbdev.h" |
@@ -285,3 +287,21 @@ void exynos_drm_output_poll_changed(struct drm_device *dev) | |||
285 | 287 | ||
286 | drm_fb_helper_hotplug_event(fb_helper); | 288 | drm_fb_helper_hotplug_event(fb_helper); |
287 | } | 289 | } |
290 | |||
291 | void exynos_drm_fbdev_suspend(struct drm_device *dev) | ||
292 | { | ||
293 | struct exynos_drm_private *private = dev->dev_private; | ||
294 | |||
295 | console_lock(); | ||
296 | drm_fb_helper_set_suspend(private->fb_helper, 1); | ||
297 | console_unlock(); | ||
298 | } | ||
299 | |||
300 | void exynos_drm_fbdev_resume(struct drm_device *dev) | ||
301 | { | ||
302 | struct exynos_drm_private *private = dev->dev_private; | ||
303 | |||
304 | console_lock(); | ||
305 | drm_fb_helper_set_suspend(private->fb_helper, 0); | ||
306 | console_unlock(); | ||
307 | } | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.h b/drivers/gpu/drm/exynos/exynos_drm_fbdev.h index 330eef87f718..645d1bb7f665 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.h +++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.h | |||
@@ -21,6 +21,8 @@ int exynos_drm_fbdev_init(struct drm_device *dev); | |||
21 | void exynos_drm_fbdev_fini(struct drm_device *dev); | 21 | void exynos_drm_fbdev_fini(struct drm_device *dev); |
22 | void exynos_drm_fbdev_restore_mode(struct drm_device *dev); | 22 | void exynos_drm_fbdev_restore_mode(struct drm_device *dev); |
23 | void exynos_drm_output_poll_changed(struct drm_device *dev); | 23 | void exynos_drm_output_poll_changed(struct drm_device *dev); |
24 | void exynos_drm_fbdev_suspend(struct drm_device *drm); | ||
25 | void exynos_drm_fbdev_resume(struct drm_device *drm); | ||
24 | 26 | ||
25 | #else | 27 | #else |
26 | 28 | ||
@@ -39,6 +41,14 @@ static inline void exynos_drm_fbdev_restore_mode(struct drm_device *dev) | |||
39 | 41 | ||
40 | #define exynos_drm_output_poll_changed (NULL) | 42 | #define exynos_drm_output_poll_changed (NULL) |
41 | 43 | ||
44 | static inline void exynos_drm_fbdev_suspend(struct drm_device *drm) | ||
45 | { | ||
46 | } | ||
47 | |||
48 | static inline void exynos_drm_fbdev_resume(struct drm_device *drm) | ||
49 | { | ||
50 | } | ||
51 | |||
42 | #endif | 52 | #endif |
43 | 53 | ||
44 | #endif | 54 | #endif |
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 214fa5e51963..0109ff40b1db 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c | |||
@@ -944,22 +944,27 @@ static bool hdmi_mode_fixup(struct drm_encoder *encoder, | |||
944 | struct drm_device *dev = encoder->dev; | 944 | struct drm_device *dev = encoder->dev; |
945 | struct drm_connector *connector; | 945 | struct drm_connector *connector; |
946 | struct drm_display_mode *m; | 946 | struct drm_display_mode *m; |
947 | struct drm_connector_list_iter conn_iter; | ||
947 | int mode_ok; | 948 | int mode_ok; |
948 | 949 | ||
949 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 950 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
950 | 951 | ||
951 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | 952 | drm_connector_list_iter_begin(dev, &conn_iter); |
953 | drm_for_each_connector_iter(connector, &conn_iter) { | ||
952 | if (connector->encoder == encoder) | 954 | if (connector->encoder == encoder) |
953 | break; | 955 | break; |
954 | } | 956 | } |
957 | if (connector) | ||
958 | drm_connector_get(connector); | ||
959 | drm_connector_list_iter_end(&conn_iter); | ||
955 | 960 | ||
956 | if (connector->encoder != encoder) | 961 | if (!connector) |
957 | return true; | 962 | return true; |
958 | 963 | ||
959 | mode_ok = hdmi_mode_valid(connector, adjusted_mode); | 964 | mode_ok = hdmi_mode_valid(connector, adjusted_mode); |
960 | 965 | ||
961 | if (mode_ok == MODE_OK) | 966 | if (mode_ok == MODE_OK) |
962 | return true; | 967 | goto cleanup; |
963 | 968 | ||
964 | /* | 969 | /* |
965 | * Find the most suitable mode and copy it to adjusted_mode. | 970 | * Find the most suitable mode and copy it to adjusted_mode. |
@@ -979,6 +984,9 @@ static bool hdmi_mode_fixup(struct drm_encoder *encoder, | |||
979 | } | 984 | } |
980 | } | 985 | } |
981 | 986 | ||
987 | cleanup: | ||
988 | drm_connector_put(connector); | ||
989 | |||
982 | return true; | 990 | return true; |
983 | } | 991 | } |
984 | 992 | ||
diff --git a/drivers/gpu/drm/i915/gvt/cfg_space.c b/drivers/gpu/drm/i915/gvt/cfg_space.c index 40af17ec6312..ff3154fe6588 100644 --- a/drivers/gpu/drm/i915/gvt/cfg_space.c +++ b/drivers/gpu/drm/i915/gvt/cfg_space.c | |||
@@ -197,78 +197,65 @@ static int emulate_pci_command_write(struct intel_vgpu *vgpu, | |||
197 | static int emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset, | 197 | static int emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset, |
198 | void *p_data, unsigned int bytes) | 198 | void *p_data, unsigned int bytes) |
199 | { | 199 | { |
200 | unsigned int bar_index = | ||
201 | (rounddown(offset, 8) % PCI_BASE_ADDRESS_0) / 8; | ||
202 | u32 new = *(u32 *)(p_data); | 200 | u32 new = *(u32 *)(p_data); |
203 | bool lo = IS_ALIGNED(offset, 8); | 201 | bool lo = IS_ALIGNED(offset, 8); |
204 | u64 size; | 202 | u64 size; |
205 | int ret = 0; | 203 | int ret = 0; |
206 | bool mmio_enabled = | 204 | bool mmio_enabled = |
207 | vgpu_cfg_space(vgpu)[PCI_COMMAND] & PCI_COMMAND_MEMORY; | 205 | vgpu_cfg_space(vgpu)[PCI_COMMAND] & PCI_COMMAND_MEMORY; |
206 | struct intel_vgpu_pci_bar *bars = vgpu->cfg_space.bar; | ||
208 | 207 | ||
209 | if (WARN_ON(bar_index >= INTEL_GVT_PCI_BAR_MAX)) | 208 | /* |
210 | return -EINVAL; | 209 | * Power-up software can determine how much address |
211 | 210 | * space the device requires by writing a value of | |
211 | * all 1's to the register and then reading the value | ||
212 | * back. The device will return 0's in all don't-care | ||
213 | * address bits. | ||
214 | */ | ||
212 | if (new == 0xffffffff) { | 215 | if (new == 0xffffffff) { |
213 | /* | 216 | switch (offset) { |
214 | * Power-up software can determine how much address | 217 | case PCI_BASE_ADDRESS_0: |
215 | * space the device requires by writing a value of | 218 | case PCI_BASE_ADDRESS_1: |
216 | * all 1's to the register and then reading the value | 219 | size = ~(bars[INTEL_GVT_PCI_BAR_GTTMMIO].size -1); |
217 | * back. The device will return 0's in all don't-care | 220 | intel_vgpu_write_pci_bar(vgpu, offset, |
218 | * address bits. | 221 | size >> (lo ? 0 : 32), lo); |
219 | */ | 222 | /* |
220 | size = vgpu->cfg_space.bar[bar_index].size; | 223 | * Untrap the BAR, since guest hasn't configured a |
221 | if (lo) { | 224 | * valid GPA |
222 | new = rounddown(new, size); | ||
223 | } else { | ||
224 | u32 val = vgpu_cfg_space(vgpu)[rounddown(offset, 8)]; | ||
225 | /* for 32bit mode bar it returns all-0 in upper 32 | ||
226 | * bit, for 64bit mode bar it will calculate the | ||
227 | * size with lower 32bit and return the corresponding | ||
228 | * value | ||
229 | */ | 225 | */ |
230 | if (val & PCI_BASE_ADDRESS_MEM_TYPE_64) | ||
231 | new &= (~(size-1)) >> 32; | ||
232 | else | ||
233 | new = 0; | ||
234 | } | ||
235 | /* | ||
236 | * Unmapp & untrap the BAR, since guest hasn't configured a | ||
237 | * valid GPA | ||
238 | */ | ||
239 | switch (bar_index) { | ||
240 | case INTEL_GVT_PCI_BAR_GTTMMIO: | ||
241 | ret = trap_gttmmio(vgpu, false); | 226 | ret = trap_gttmmio(vgpu, false); |
242 | break; | 227 | break; |
243 | case INTEL_GVT_PCI_BAR_APERTURE: | 228 | case PCI_BASE_ADDRESS_2: |
229 | case PCI_BASE_ADDRESS_3: | ||
230 | size = ~(bars[INTEL_GVT_PCI_BAR_APERTURE].size -1); | ||
231 | intel_vgpu_write_pci_bar(vgpu, offset, | ||
232 | size >> (lo ? 0 : 32), lo); | ||
244 | ret = map_aperture(vgpu, false); | 233 | ret = map_aperture(vgpu, false); |
245 | break; | 234 | break; |
235 | default: | ||
236 | /* Unimplemented BARs */ | ||
237 | intel_vgpu_write_pci_bar(vgpu, offset, 0x0, false); | ||
246 | } | 238 | } |
247 | intel_vgpu_write_pci_bar(vgpu, offset, new, lo); | ||
248 | } else { | 239 | } else { |
249 | /* | 240 | switch (offset) { |
250 | * Unmapp & untrap the old BAR first, since guest has | 241 | case PCI_BASE_ADDRESS_0: |
251 | * re-configured the BAR | 242 | case PCI_BASE_ADDRESS_1: |
252 | */ | 243 | /* |
253 | switch (bar_index) { | 244 | * Untrap the old BAR first, since guest has |
254 | case INTEL_GVT_PCI_BAR_GTTMMIO: | 245 | * re-configured the BAR |
255 | ret = trap_gttmmio(vgpu, false); | 246 | */ |
247 | trap_gttmmio(vgpu, false); | ||
248 | intel_vgpu_write_pci_bar(vgpu, offset, new, lo); | ||
249 | ret = trap_gttmmio(vgpu, mmio_enabled); | ||
256 | break; | 250 | break; |
257 | case INTEL_GVT_PCI_BAR_APERTURE: | 251 | case PCI_BASE_ADDRESS_2: |
258 | ret = map_aperture(vgpu, false); | 252 | case PCI_BASE_ADDRESS_3: |
253 | map_aperture(vgpu, false); | ||
254 | intel_vgpu_write_pci_bar(vgpu, offset, new, lo); | ||
255 | ret = map_aperture(vgpu, mmio_enabled); | ||
259 | break; | 256 | break; |
260 | } | 257 | default: |
261 | intel_vgpu_write_pci_bar(vgpu, offset, new, lo); | 258 | intel_vgpu_write_pci_bar(vgpu, offset, new, lo); |
262 | /* Track the new BAR */ | ||
263 | if (mmio_enabled) { | ||
264 | switch (bar_index) { | ||
265 | case INTEL_GVT_PCI_BAR_GTTMMIO: | ||
266 | ret = trap_gttmmio(vgpu, true); | ||
267 | break; | ||
268 | case INTEL_GVT_PCI_BAR_APERTURE: | ||
269 | ret = map_aperture(vgpu, true); | ||
270 | break; | ||
271 | } | ||
272 | } | 259 | } |
273 | } | 260 | } |
274 | return ret; | 261 | return ret; |
@@ -299,10 +286,7 @@ int intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset, | |||
299 | } | 286 | } |
300 | 287 | ||
301 | switch (rounddown(offset, 4)) { | 288 | switch (rounddown(offset, 4)) { |
302 | case PCI_BASE_ADDRESS_0: | 289 | case PCI_BASE_ADDRESS_0 ... PCI_BASE_ADDRESS_5: |
303 | case PCI_BASE_ADDRESS_1: | ||
304 | case PCI_BASE_ADDRESS_2: | ||
305 | case PCI_BASE_ADDRESS_3: | ||
306 | if (WARN_ON(!IS_ALIGNED(offset, 4))) | 290 | if (WARN_ON(!IS_ALIGNED(offset, 4))) |
307 | return -EINVAL; | 291 | return -EINVAL; |
308 | return emulate_pci_bar_write(vgpu, offset, p_data, bytes); | 292 | return emulate_pci_bar_write(vgpu, offset, p_data, bytes); |
@@ -344,7 +328,6 @@ void intel_vgpu_init_cfg_space(struct intel_vgpu *vgpu, | |||
344 | struct intel_gvt *gvt = vgpu->gvt; | 328 | struct intel_gvt *gvt = vgpu->gvt; |
345 | const struct intel_gvt_device_info *info = &gvt->device_info; | 329 | const struct intel_gvt_device_info *info = &gvt->device_info; |
346 | u16 *gmch_ctl; | 330 | u16 *gmch_ctl; |
347 | int i; | ||
348 | 331 | ||
349 | memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space, | 332 | memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space, |
350 | info->cfg_space_size); | 333 | info->cfg_space_size); |
@@ -371,13 +354,13 @@ void intel_vgpu_init_cfg_space(struct intel_vgpu *vgpu, | |||
371 | */ | 354 | */ |
372 | memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_1, 0, 4); | 355 | memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_1, 0, 4); |
373 | memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_3, 0, 4); | 356 | memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_3, 0, 4); |
357 | memset(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_4, 0, 8); | ||
374 | memset(vgpu_cfg_space(vgpu) + INTEL_GVT_PCI_OPREGION, 0, 4); | 358 | memset(vgpu_cfg_space(vgpu) + INTEL_GVT_PCI_OPREGION, 0, 4); |
375 | 359 | ||
376 | for (i = 0; i < INTEL_GVT_MAX_BAR_NUM; i++) { | 360 | vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_GTTMMIO].size = |
377 | vgpu->cfg_space.bar[i].size = pci_resource_len( | 361 | pci_resource_len(gvt->dev_priv->drm.pdev, 0); |
378 | gvt->dev_priv->drm.pdev, i * 2); | 362 | vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_APERTURE].size = |
379 | vgpu->cfg_space.bar[i].tracked = false; | 363 | pci_resource_len(gvt->dev_priv->drm.pdev, 2); |
380 | } | ||
381 | } | 364 | } |
382 | 365 | ||
383 | /** | 366 | /** |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index e21ce9c18b6e..b63893eeca73 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -839,7 +839,6 @@ static bool i915_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, | |||
839 | pipe); | 839 | pipe); |
840 | int position; | 840 | int position; |
841 | int vbl_start, vbl_end, hsync_start, htotal, vtotal; | 841 | int vbl_start, vbl_end, hsync_start, htotal, vtotal; |
842 | bool in_vbl = true; | ||
843 | unsigned long irqflags; | 842 | unsigned long irqflags; |
844 | 843 | ||
845 | if (WARN_ON(!mode->crtc_clock)) { | 844 | if (WARN_ON(!mode->crtc_clock)) { |
@@ -922,8 +921,6 @@ static bool i915_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe, | |||
922 | 921 | ||
923 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); | 922 | spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); |
924 | 923 | ||
925 | in_vbl = position >= vbl_start && position < vbl_end; | ||
926 | |||
927 | /* | 924 | /* |
928 | * While in vblank, position will be negative | 925 | * While in vblank, position will be negative |
929 | * counting up towards 0 at vbl_end. And outside | 926 | * counting up towards 0 at vbl_end. And outside |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f17275519484..00cd17c76fdc 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -14030,7 +14030,7 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb, | |||
14030 | 14030 | ||
14031 | if (mode_cmd->handles[i] != mode_cmd->handles[0]) { | 14031 | if (mode_cmd->handles[i] != mode_cmd->handles[0]) { |
14032 | DRM_DEBUG_KMS("bad plane %d handle\n", i); | 14032 | DRM_DEBUG_KMS("bad plane %d handle\n", i); |
14033 | return -EINVAL; | 14033 | goto err; |
14034 | } | 14034 | } |
14035 | 14035 | ||
14036 | stride_alignment = intel_fb_stride_alignment(fb, i); | 14036 | stride_alignment = intel_fb_stride_alignment(fb, i); |
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index f0c11aec5ea5..7442891762be 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c | |||
@@ -892,8 +892,6 @@ static void intel_dsi_disable(struct intel_encoder *encoder, | |||
892 | struct intel_crtc_state *old_crtc_state, | 892 | struct intel_crtc_state *old_crtc_state, |
893 | struct drm_connector_state *old_conn_state) | 893 | struct drm_connector_state *old_conn_state) |
894 | { | 894 | { |
895 | struct drm_device *dev = encoder->base.dev; | ||
896 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
897 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); | 895 | struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); |
898 | enum port port; | 896 | enum port port; |
899 | 897 | ||
@@ -903,15 +901,6 @@ static void intel_dsi_disable(struct intel_encoder *encoder, | |||
903 | intel_panel_disable_backlight(old_conn_state); | 901 | intel_panel_disable_backlight(old_conn_state); |
904 | 902 | ||
905 | /* | 903 | /* |
906 | * Disable Device ready before the port shutdown in order | ||
907 | * to avoid split screen | ||
908 | */ | ||
909 | if (IS_BROXTON(dev_priv)) { | ||
910 | for_each_dsi_port(port, intel_dsi->ports) | ||
911 | I915_WRITE(MIPI_DEVICE_READY(port), 0); | ||
912 | } | ||
913 | |||
914 | /* | ||
915 | * According to the spec we should send SHUTDOWN before | 904 | * According to the spec we should send SHUTDOWN before |
916 | * MIPI_SEQ_DISPLAY_OFF only for v3+ VBTs, but field testing | 905 | * MIPI_SEQ_DISPLAY_OFF only for v3+ VBTs, but field testing |
917 | * has shown that the v3 sequence works for v2 VBTs too | 906 | * has shown that the v3 sequence works for v2 VBTs too |
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index a17b1de7d7e0..3b1c5d783ee7 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c | |||
@@ -1699,6 +1699,8 @@ bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) | |||
1699 | if (!panel->backlight.max) | 1699 | if (!panel->backlight.max) |
1700 | return -ENODEV; | 1700 | return -ENODEV; |
1701 | 1701 | ||
1702 | panel->backlight.min = get_backlight_min_vbt(connector); | ||
1703 | |||
1702 | val = bxt_get_backlight(connector); | 1704 | val = bxt_get_backlight(connector); |
1703 | val = intel_panel_compute_brightness(connector, val); | 1705 | val = intel_panel_compute_brightness(connector, val); |
1704 | panel->backlight.level = clamp(val, panel->backlight.min, | 1706 | panel->backlight.level = clamp(val, panel->backlight.min, |
@@ -1735,6 +1737,8 @@ cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) | |||
1735 | if (!panel->backlight.max) | 1737 | if (!panel->backlight.max) |
1736 | return -ENODEV; | 1738 | return -ENODEV; |
1737 | 1739 | ||
1740 | panel->backlight.min = get_backlight_min_vbt(connector); | ||
1741 | |||
1738 | val = bxt_get_backlight(connector); | 1742 | val = bxt_get_backlight(connector); |
1739 | val = intel_panel_compute_brightness(connector, val); | 1743 | val = intel_panel_compute_brightness(connector, val); |
1740 | panel->backlight.level = clamp(val, panel->backlight.min, | 1744 | panel->backlight.level = clamp(val, panel->backlight.min, |
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index 4188a4881148..076409455b60 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c | |||
@@ -811,6 +811,14 @@ static void stripe_add_to_batch_list(struct r5conf *conf, struct stripe_head *sh | |||
811 | spin_unlock(&head->batch_head->batch_lock); | 811 | spin_unlock(&head->batch_head->batch_lock); |
812 | goto unlock_out; | 812 | goto unlock_out; |
813 | } | 813 | } |
814 | /* | ||
815 | * We must assign batch_head of this stripe within the | ||
816 | * batch_lock, otherwise clear_batch_ready of batch head | ||
817 | * stripe could clear BATCH_READY bit of this stripe and | ||
818 | * this stripe->batch_head doesn't get assigned, which | ||
819 | * could confuse clear_batch_ready for this stripe | ||
820 | */ | ||
821 | sh->batch_head = head->batch_head; | ||
814 | 822 | ||
815 | /* | 823 | /* |
816 | * at this point, head's BATCH_READY could be cleared, but we | 824 | * at this point, head's BATCH_READY could be cleared, but we |
@@ -818,8 +826,6 @@ static void stripe_add_to_batch_list(struct r5conf *conf, struct stripe_head *sh | |||
818 | */ | 826 | */ |
819 | list_add(&sh->batch_list, &head->batch_list); | 827 | list_add(&sh->batch_list, &head->batch_list); |
820 | spin_unlock(&head->batch_head->batch_lock); | 828 | spin_unlock(&head->batch_head->batch_lock); |
821 | |||
822 | sh->batch_head = head->batch_head; | ||
823 | } else { | 829 | } else { |
824 | head->batch_head = head; | 830 | head->batch_head = head; |
825 | sh->batch_head = head->batch_head; | 831 | sh->batch_head = head->batch_head; |
@@ -4599,7 +4605,8 @@ static void break_stripe_batch_list(struct stripe_head *head_sh, | |||
4599 | 4605 | ||
4600 | set_mask_bits(&sh->state, ~(STRIPE_EXPAND_SYNC_FLAGS | | 4606 | set_mask_bits(&sh->state, ~(STRIPE_EXPAND_SYNC_FLAGS | |
4601 | (1 << STRIPE_PREREAD_ACTIVE) | | 4607 | (1 << STRIPE_PREREAD_ACTIVE) | |
4602 | (1 << STRIPE_DEGRADED)), | 4608 | (1 << STRIPE_DEGRADED) | |
4609 | (1 << STRIPE_ON_UNPLUG_LIST)), | ||
4603 | head_sh->state & (1 << STRIPE_INSYNC)); | 4610 | head_sh->state & (1 << STRIPE_INSYNC)); |
4604 | 4611 | ||
4605 | sh->check_state = head_sh->check_state; | 4612 | sh->check_state = head_sh->check_state; |
diff --git a/drivers/mmc/core/queue.c b/drivers/mmc/core/queue.c index affa7370ba82..74c663b1c0a7 100644 --- a/drivers/mmc/core/queue.c +++ b/drivers/mmc/core/queue.c | |||
@@ -242,6 +242,12 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card, | |||
242 | if (mmc_dev(host)->dma_mask && *mmc_dev(host)->dma_mask) | 242 | if (mmc_dev(host)->dma_mask && *mmc_dev(host)->dma_mask) |
243 | limit = (u64)dma_max_pfn(mmc_dev(host)) << PAGE_SHIFT; | 243 | limit = (u64)dma_max_pfn(mmc_dev(host)) << PAGE_SHIFT; |
244 | 244 | ||
245 | /* | ||
246 | * mmc_init_request() depends on card->bouncesz so it must be calculated | ||
247 | * before blk_init_allocated_queue() starts allocating requests. | ||
248 | */ | ||
249 | card->bouncesz = mmc_queue_calc_bouncesz(host); | ||
250 | |||
245 | mq->card = card; | 251 | mq->card = card; |
246 | mq->queue = blk_alloc_queue(GFP_KERNEL); | 252 | mq->queue = blk_alloc_queue(GFP_KERNEL); |
247 | if (!mq->queue) | 253 | if (!mq->queue) |
@@ -265,7 +271,6 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card, | |||
265 | if (mmc_can_erase(card)) | 271 | if (mmc_can_erase(card)) |
266 | mmc_queue_setup_discard(mq->queue, card); | 272 | mmc_queue_setup_discard(mq->queue, card); |
267 | 273 | ||
268 | card->bouncesz = mmc_queue_calc_bouncesz(host); | ||
269 | if (card->bouncesz) { | 274 | if (card->bouncesz) { |
270 | blk_queue_max_hw_sectors(mq->queue, card->bouncesz / 512); | 275 | blk_queue_max_hw_sectors(mq->queue, card->bouncesz / 512); |
271 | blk_queue_max_segments(mq->queue, card->bouncesz / 512); | 276 | blk_queue_max_segments(mq->queue, card->bouncesz / 512); |
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 02179ed2a40d..8c15637178ff 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig | |||
@@ -5,7 +5,7 @@ | |||
5 | comment "MMC/SD/SDIO Host Controller Drivers" | 5 | comment "MMC/SD/SDIO Host Controller Drivers" |
6 | 6 | ||
7 | config MMC_DEBUG | 7 | config MMC_DEBUG |
8 | bool "MMC host drivers debugginG" | 8 | bool "MMC host drivers debugging" |
9 | depends on MMC != n | 9 | depends on MMC != n |
10 | help | 10 | help |
11 | This is an option for use by developers; most people should | 11 | This is an option for use by developers; most people should |
diff --git a/drivers/mmc/host/cavium-thunderx.c b/drivers/mmc/host/cavium-thunderx.c index b9cc95998799..eee08d81b242 100644 --- a/drivers/mmc/host/cavium-thunderx.c +++ b/drivers/mmc/host/cavium-thunderx.c | |||
@@ -7,6 +7,7 @@ | |||
7 | * | 7 | * |
8 | * Copyright (C) 2016 Cavium Inc. | 8 | * Copyright (C) 2016 Cavium Inc. |
9 | */ | 9 | */ |
10 | #include <linux/device.h> | ||
10 | #include <linux/dma-mapping.h> | 11 | #include <linux/dma-mapping.h> |
11 | #include <linux/interrupt.h> | 12 | #include <linux/interrupt.h> |
12 | #include <linux/mmc/mmc.h> | 13 | #include <linux/mmc/mmc.h> |
@@ -149,8 +150,11 @@ error: | |||
149 | for (i = 0; i < CAVIUM_MAX_MMC; i++) { | 150 | for (i = 0; i < CAVIUM_MAX_MMC; i++) { |
150 | if (host->slot[i]) | 151 | if (host->slot[i]) |
151 | cvm_mmc_of_slot_remove(host->slot[i]); | 152 | cvm_mmc_of_slot_remove(host->slot[i]); |
152 | if (host->slot_pdev[i]) | 153 | if (host->slot_pdev[i]) { |
154 | get_device(&host->slot_pdev[i]->dev); | ||
153 | of_platform_device_destroy(&host->slot_pdev[i]->dev, NULL); | 155 | of_platform_device_destroy(&host->slot_pdev[i]->dev, NULL); |
156 | put_device(&host->slot_pdev[i]->dev); | ||
157 | } | ||
154 | } | 158 | } |
155 | clk_disable_unprepare(host->clk); | 159 | clk_disable_unprepare(host->clk); |
156 | return ret; | 160 | return ret; |
diff --git a/drivers/mtd/nand/lpc32xx_mlc.c b/drivers/mtd/nand/lpc32xx_mlc.c index c3bb358ef01e..5796468db653 100644 --- a/drivers/mtd/nand/lpc32xx_mlc.c +++ b/drivers/mtd/nand/lpc32xx_mlc.c | |||
@@ -707,7 +707,7 @@ static int lpc32xx_nand_probe(struct platform_device *pdev) | |||
707 | } | 707 | } |
708 | res = clk_prepare_enable(host->clk); | 708 | res = clk_prepare_enable(host->clk); |
709 | if (res) | 709 | if (res) |
710 | goto err_exit1; | 710 | goto err_put_clk; |
711 | 711 | ||
712 | nand_chip->cmd_ctrl = lpc32xx_nand_cmd_ctrl; | 712 | nand_chip->cmd_ctrl = lpc32xx_nand_cmd_ctrl; |
713 | nand_chip->dev_ready = lpc32xx_nand_device_ready; | 713 | nand_chip->dev_ready = lpc32xx_nand_device_ready; |
@@ -814,6 +814,7 @@ err_exit3: | |||
814 | dma_release_channel(host->dma_chan); | 814 | dma_release_channel(host->dma_chan); |
815 | err_exit2: | 815 | err_exit2: |
816 | clk_disable_unprepare(host->clk); | 816 | clk_disable_unprepare(host->clk); |
817 | err_put_clk: | ||
817 | clk_put(host->clk); | 818 | clk_put(host->clk); |
818 | err_exit1: | 819 | err_exit1: |
819 | lpc32xx_wp_enable(host); | 820 | lpc32xx_wp_enable(host); |
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index bcc8cef1c615..12edaae17d81 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c | |||
@@ -2668,7 +2668,7 @@ static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len, | |||
2668 | static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, | 2668 | static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, |
2669 | struct mtd_oob_ops *ops) | 2669 | struct mtd_oob_ops *ops) |
2670 | { | 2670 | { |
2671 | int chipnr, realpage, page, blockmask, column; | 2671 | int chipnr, realpage, page, column; |
2672 | struct nand_chip *chip = mtd_to_nand(mtd); | 2672 | struct nand_chip *chip = mtd_to_nand(mtd); |
2673 | uint32_t writelen = ops->len; | 2673 | uint32_t writelen = ops->len; |
2674 | 2674 | ||
@@ -2704,7 +2704,6 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, | |||
2704 | 2704 | ||
2705 | realpage = (int)(to >> chip->page_shift); | 2705 | realpage = (int)(to >> chip->page_shift); |
2706 | page = realpage & chip->pagemask; | 2706 | page = realpage & chip->pagemask; |
2707 | blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; | ||
2708 | 2707 | ||
2709 | /* Invalidate the page cache, when we write to the cached page */ | 2708 | /* Invalidate the page cache, when we write to the cached page */ |
2710 | if (to <= ((loff_t)chip->pagebuf << chip->page_shift) && | 2709 | if (to <= ((loff_t)chip->pagebuf << chip->page_shift) && |
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index cf1d4a15e10a..19c000722cbc 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c | |||
@@ -1784,7 +1784,7 @@ spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, | |||
1784 | * @nor: pointer to a 'struct spi_nor' | 1784 | * @nor: pointer to a 'struct spi_nor' |
1785 | * @addr: offset in the SFDP area to start reading data from | 1785 | * @addr: offset in the SFDP area to start reading data from |
1786 | * @len: number of bytes to read | 1786 | * @len: number of bytes to read |
1787 | * @buf: buffer where the SFDP data are copied into | 1787 | * @buf: buffer where the SFDP data are copied into (dma-safe memory) |
1788 | * | 1788 | * |
1789 | * Whatever the actual numbers of bytes for address and dummy cycles are | 1789 | * Whatever the actual numbers of bytes for address and dummy cycles are |
1790 | * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always | 1790 | * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always |
@@ -1829,6 +1829,36 @@ read_err: | |||
1829 | return ret; | 1829 | return ret; |
1830 | } | 1830 | } |
1831 | 1831 | ||
1832 | /** | ||
1833 | * spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters. | ||
1834 | * @nor: pointer to a 'struct spi_nor' | ||
1835 | * @addr: offset in the SFDP area to start reading data from | ||
1836 | * @len: number of bytes to read | ||
1837 | * @buf: buffer where the SFDP data are copied into | ||
1838 | * | ||
1839 | * Wrap spi_nor_read_sfdp() using a kmalloc'ed bounce buffer as @buf is now not | ||
1840 | * guaranteed to be dma-safe. | ||
1841 | * | ||
1842 | * Return: -ENOMEM if kmalloc() fails, the return code of spi_nor_read_sfdp() | ||
1843 | * otherwise. | ||
1844 | */ | ||
1845 | static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr, | ||
1846 | size_t len, void *buf) | ||
1847 | { | ||
1848 | void *dma_safe_buf; | ||
1849 | int ret; | ||
1850 | |||
1851 | dma_safe_buf = kmalloc(len, GFP_KERNEL); | ||
1852 | if (!dma_safe_buf) | ||
1853 | return -ENOMEM; | ||
1854 | |||
1855 | ret = spi_nor_read_sfdp(nor, addr, len, dma_safe_buf); | ||
1856 | memcpy(buf, dma_safe_buf, len); | ||
1857 | kfree(dma_safe_buf); | ||
1858 | |||
1859 | return ret; | ||
1860 | } | ||
1861 | |||
1832 | struct sfdp_parameter_header { | 1862 | struct sfdp_parameter_header { |
1833 | u8 id_lsb; | 1863 | u8 id_lsb; |
1834 | u8 minor; | 1864 | u8 minor; |
@@ -2101,7 +2131,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, | |||
2101 | bfpt_header->length * sizeof(u32)); | 2131 | bfpt_header->length * sizeof(u32)); |
2102 | addr = SFDP_PARAM_HEADER_PTP(bfpt_header); | 2132 | addr = SFDP_PARAM_HEADER_PTP(bfpt_header); |
2103 | memset(&bfpt, 0, sizeof(bfpt)); | 2133 | memset(&bfpt, 0, sizeof(bfpt)); |
2104 | err = spi_nor_read_sfdp(nor, addr, len, &bfpt); | 2134 | err = spi_nor_read_sfdp_dma_unsafe(nor, addr, len, &bfpt); |
2105 | if (err < 0) | 2135 | if (err < 0) |
2106 | return err; | 2136 | return err; |
2107 | 2137 | ||
@@ -2127,6 +2157,15 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, | |||
2127 | params->size = bfpt.dwords[BFPT_DWORD(2)]; | 2157 | params->size = bfpt.dwords[BFPT_DWORD(2)]; |
2128 | if (params->size & BIT(31)) { | 2158 | if (params->size & BIT(31)) { |
2129 | params->size &= ~BIT(31); | 2159 | params->size &= ~BIT(31); |
2160 | |||
2161 | /* | ||
2162 | * Prevent overflows on params->size. Anyway, a NOR of 2^64 | ||
2163 | * bits is unlikely to exist so this error probably means | ||
2164 | * the BFPT we are reading is corrupted/wrong. | ||
2165 | */ | ||
2166 | if (params->size > 63) | ||
2167 | return -EINVAL; | ||
2168 | |||
2130 | params->size = 1ULL << params->size; | 2169 | params->size = 1ULL << params->size; |
2131 | } else { | 2170 | } else { |
2132 | params->size++; | 2171 | params->size++; |
@@ -2243,7 +2282,7 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, | |||
2243 | int i, err; | 2282 | int i, err; |
2244 | 2283 | ||
2245 | /* Get the SFDP header. */ | 2284 | /* Get the SFDP header. */ |
2246 | err = spi_nor_read_sfdp(nor, 0, sizeof(header), &header); | 2285 | err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(header), &header); |
2247 | if (err < 0) | 2286 | if (err < 0) |
2248 | return err; | 2287 | return err; |
2249 | 2288 | ||
diff --git a/drivers/scsi/arm/acornscsi.c b/drivers/scsi/arm/acornscsi.c index 690816f3c6af..421fe869a11e 100644 --- a/drivers/scsi/arm/acornscsi.c +++ b/drivers/scsi/arm/acornscsi.c | |||
@@ -2725,9 +2725,9 @@ int acornscsi_abort(struct scsi_cmnd *SCpnt) | |||
2725 | * Params : SCpnt - command causing reset | 2725 | * Params : SCpnt - command causing reset |
2726 | * Returns : one of SCSI_RESET_ macros | 2726 | * Returns : one of SCSI_RESET_ macros |
2727 | */ | 2727 | */ |
2728 | int acornscsi_host_reset(struct Scsi_Host *shpnt) | 2728 | int acornscsi_host_reset(struct scsi_cmnd *SCpnt) |
2729 | { | 2729 | { |
2730 | AS_Host *host = (AS_Host *)shpnt->hostdata; | 2730 | AS_Host *host = (AS_Host *)SCpnt->device->host->hostdata; |
2731 | struct scsi_cmnd *SCptr; | 2731 | struct scsi_cmnd *SCptr; |
2732 | 2732 | ||
2733 | host->stats.resets += 1; | 2733 | host->stats.resets += 1; |
@@ -2741,7 +2741,7 @@ int acornscsi_host_reset(struct Scsi_Host *shpnt) | |||
2741 | 2741 | ||
2742 | printk(KERN_WARNING "acornscsi_reset: "); | 2742 | printk(KERN_WARNING "acornscsi_reset: "); |
2743 | print_sbic_status(asr, ssr, host->scsi.phase); | 2743 | print_sbic_status(asr, ssr, host->scsi.phase); |
2744 | for (devidx = 0; devidx < 9; devidx ++) { | 2744 | for (devidx = 0; devidx < 9; devidx++) |
2745 | acornscsi_dumplog(host, devidx); | 2745 | acornscsi_dumplog(host, devidx); |
2746 | } | 2746 | } |
2747 | #endif | 2747 | #endif |
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c index 3c6bc0081fcb..ba9d70f8a6a1 100644 --- a/drivers/scsi/scsi_transport_fc.c +++ b/drivers/scsi/scsi_transport_fc.c | |||
@@ -3571,7 +3571,7 @@ fc_vport_sched_delete(struct work_struct *work) | |||
3571 | static enum blk_eh_timer_return | 3571 | static enum blk_eh_timer_return |
3572 | fc_bsg_job_timeout(struct request *req) | 3572 | fc_bsg_job_timeout(struct request *req) |
3573 | { | 3573 | { |
3574 | struct bsg_job *job = (void *) req->special; | 3574 | struct bsg_job *job = blk_mq_rq_to_pdu(req); |
3575 | struct Scsi_Host *shost = fc_bsg_to_shost(job); | 3575 | struct Scsi_Host *shost = fc_bsg_to_shost(job); |
3576 | struct fc_rport *rport = fc_bsg_to_rport(job); | 3576 | struct fc_rport *rport = fc_bsg_to_rport(job); |
3577 | struct fc_internal *i = to_fc_internal(shost->transportt); | 3577 | struct fc_internal *i = to_fc_internal(shost->transportt); |
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c index 11c1738c2100..fb9f8b5f4673 100644 --- a/drivers/scsi/sd.c +++ b/drivers/scsi/sd.c | |||
@@ -2915,8 +2915,6 @@ static void sd_read_block_limits(struct scsi_disk *sdkp) | |||
2915 | sd_config_discard(sdkp, SD_LBP_WS16); | 2915 | sd_config_discard(sdkp, SD_LBP_WS16); |
2916 | else if (sdkp->lbpws10) | 2916 | else if (sdkp->lbpws10) |
2917 | sd_config_discard(sdkp, SD_LBP_WS10); | 2917 | sd_config_discard(sdkp, SD_LBP_WS10); |
2918 | else if (sdkp->lbpu && sdkp->max_unmap_blocks) | ||
2919 | sd_config_discard(sdkp, SD_LBP_UNMAP); | ||
2920 | else | 2918 | else |
2921 | sd_config_discard(sdkp, SD_LBP_DISABLE); | 2919 | sd_config_discard(sdkp, SD_LBP_DISABLE); |
2922 | } | 2920 | } |
diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c index cf0e71db9e51..0419c2298eab 100644 --- a/drivers/scsi/sg.c +++ b/drivers/scsi/sg.c | |||
@@ -828,6 +828,39 @@ static int max_sectors_bytes(struct request_queue *q) | |||
828 | return max_sectors << 9; | 828 | return max_sectors << 9; |
829 | } | 829 | } |
830 | 830 | ||
831 | static void | ||
832 | sg_fill_request_table(Sg_fd *sfp, sg_req_info_t *rinfo) | ||
833 | { | ||
834 | Sg_request *srp; | ||
835 | int val; | ||
836 | unsigned int ms; | ||
837 | |||
838 | val = 0; | ||
839 | list_for_each_entry(srp, &sfp->rq_list, entry) { | ||
840 | if (val > SG_MAX_QUEUE) | ||
841 | break; | ||
842 | rinfo[val].req_state = srp->done + 1; | ||
843 | rinfo[val].problem = | ||
844 | srp->header.masked_status & | ||
845 | srp->header.host_status & | ||
846 | srp->header.driver_status; | ||
847 | if (srp->done) | ||
848 | rinfo[val].duration = | ||
849 | srp->header.duration; | ||
850 | else { | ||
851 | ms = jiffies_to_msecs(jiffies); | ||
852 | rinfo[val].duration = | ||
853 | (ms > srp->header.duration) ? | ||
854 | (ms - srp->header.duration) : 0; | ||
855 | } | ||
856 | rinfo[val].orphan = srp->orphan; | ||
857 | rinfo[val].sg_io_owned = srp->sg_io_owned; | ||
858 | rinfo[val].pack_id = srp->header.pack_id; | ||
859 | rinfo[val].usr_ptr = srp->header.usr_ptr; | ||
860 | val++; | ||
861 | } | ||
862 | } | ||
863 | |||
831 | static long | 864 | static long |
832 | sg_ioctl(struct file *filp, unsigned int cmd_in, unsigned long arg) | 865 | sg_ioctl(struct file *filp, unsigned int cmd_in, unsigned long arg) |
833 | { | 866 | { |
@@ -1012,38 +1045,13 @@ sg_ioctl(struct file *filp, unsigned int cmd_in, unsigned long arg) | |||
1012 | return -EFAULT; | 1045 | return -EFAULT; |
1013 | else { | 1046 | else { |
1014 | sg_req_info_t *rinfo; | 1047 | sg_req_info_t *rinfo; |
1015 | unsigned int ms; | ||
1016 | 1048 | ||
1017 | rinfo = kmalloc(SZ_SG_REQ_INFO * SG_MAX_QUEUE, | 1049 | rinfo = kzalloc(SZ_SG_REQ_INFO * SG_MAX_QUEUE, |
1018 | GFP_KERNEL); | 1050 | GFP_KERNEL); |
1019 | if (!rinfo) | 1051 | if (!rinfo) |
1020 | return -ENOMEM; | 1052 | return -ENOMEM; |
1021 | read_lock_irqsave(&sfp->rq_list_lock, iflags); | 1053 | read_lock_irqsave(&sfp->rq_list_lock, iflags); |
1022 | val = 0; | 1054 | sg_fill_request_table(sfp, rinfo); |
1023 | list_for_each_entry(srp, &sfp->rq_list, entry) { | ||
1024 | if (val >= SG_MAX_QUEUE) | ||
1025 | break; | ||
1026 | memset(&rinfo[val], 0, SZ_SG_REQ_INFO); | ||
1027 | rinfo[val].req_state = srp->done + 1; | ||
1028 | rinfo[val].problem = | ||
1029 | srp->header.masked_status & | ||
1030 | srp->header.host_status & | ||
1031 | srp->header.driver_status; | ||
1032 | if (srp->done) | ||
1033 | rinfo[val].duration = | ||
1034 | srp->header.duration; | ||
1035 | else { | ||
1036 | ms = jiffies_to_msecs(jiffies); | ||
1037 | rinfo[val].duration = | ||
1038 | (ms > srp->header.duration) ? | ||
1039 | (ms - srp->header.duration) : 0; | ||
1040 | } | ||
1041 | rinfo[val].orphan = srp->orphan; | ||
1042 | rinfo[val].sg_io_owned = srp->sg_io_owned; | ||
1043 | rinfo[val].pack_id = srp->header.pack_id; | ||
1044 | rinfo[val].usr_ptr = srp->header.usr_ptr; | ||
1045 | val++; | ||
1046 | } | ||
1047 | read_unlock_irqrestore(&sfp->rq_list_lock, iflags); | 1055 | read_unlock_irqrestore(&sfp->rq_list_lock, iflags); |
1048 | result = __copy_to_user(p, rinfo, | 1056 | result = __copy_to_user(p, rinfo, |
1049 | SZ_SG_REQ_INFO * SG_MAX_QUEUE); | 1057 | SZ_SG_REQ_INFO * SG_MAX_QUEUE); |