diff options
Diffstat (limited to 'drivers')
352 files changed, 3974 insertions, 6399 deletions
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c index 6ecbbabf1233..eec263c9019e 100644 --- a/drivers/acpi/bus.c +++ b/drivers/acpi/bus.c | |||
| @@ -1043,9 +1043,6 @@ void __init acpi_early_init(void) | |||
| 1043 | 1043 | ||
| 1044 | acpi_permanent_mmap = true; | 1044 | acpi_permanent_mmap = true; |
| 1045 | 1045 | ||
| 1046 | /* Initialize debug output. Linux does not use ACPICA defaults */ | ||
| 1047 | acpi_dbg_level = ACPI_LV_INFO | ACPI_LV_REPAIR; | ||
| 1048 | |||
| 1049 | #ifdef CONFIG_X86 | 1046 | #ifdef CONFIG_X86 |
| 1050 | /* | 1047 | /* |
| 1051 | * If the machine falls into the DMI check table, | 1048 | * If the machine falls into the DMI check table, |
diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index 1b207fca1420..d4244e7d0e38 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c | |||
| @@ -1150,8 +1150,13 @@ int cppc_get_perf_caps(int cpunum, struct cppc_perf_caps *perf_caps) | |||
| 1150 | cpc_read(cpunum, nominal_reg, &nom); | 1150 | cpc_read(cpunum, nominal_reg, &nom); |
| 1151 | perf_caps->nominal_perf = nom; | 1151 | perf_caps->nominal_perf = nom; |
| 1152 | 1152 | ||
| 1153 | cpc_read(cpunum, guaranteed_reg, &guaranteed); | 1153 | if (guaranteed_reg->type != ACPI_TYPE_BUFFER || |
| 1154 | perf_caps->guaranteed_perf = guaranteed; | 1154 | IS_NULL_REG(&guaranteed_reg->cpc_entry.reg)) { |
| 1155 | perf_caps->guaranteed_perf = 0; | ||
| 1156 | } else { | ||
| 1157 | cpc_read(cpunum, guaranteed_reg, &guaranteed); | ||
| 1158 | perf_caps->guaranteed_perf = guaranteed; | ||
| 1159 | } | ||
| 1155 | 1160 | ||
| 1156 | cpc_read(cpunum, lowest_non_linear_reg, &min_nonlinear); | 1161 | cpc_read(cpunum, lowest_non_linear_reg, &min_nonlinear); |
| 1157 | perf_caps->lowest_nonlinear_perf = min_nonlinear; | 1162 | perf_caps->lowest_nonlinear_perf = min_nonlinear; |
diff --git a/drivers/acpi/utils.c b/drivers/acpi/utils.c index 78db97687f26..c4b06cc075f9 100644 --- a/drivers/acpi/utils.c +++ b/drivers/acpi/utils.c | |||
| @@ -800,6 +800,7 @@ bool acpi_dev_present(const char *hid, const char *uid, s64 hrv) | |||
| 800 | match.hrv = hrv; | 800 | match.hrv = hrv; |
| 801 | 801 | ||
| 802 | dev = bus_find_device(&acpi_bus_type, NULL, &match, acpi_dev_match_cb); | 802 | dev = bus_find_device(&acpi_bus_type, NULL, &match, acpi_dev_match_cb); |
| 803 | put_device(dev); | ||
| 803 | return !!dev; | 804 | return !!dev; |
| 804 | } | 805 | } |
| 805 | EXPORT_SYMBOL(acpi_dev_present); | 806 | EXPORT_SYMBOL(acpi_dev_present); |
diff --git a/drivers/android/binder.c b/drivers/android/binder.c index 8685882da64c..4b9c7ca492e6 100644 --- a/drivers/android/binder.c +++ b/drivers/android/binder.c | |||
| @@ -2057,7 +2057,8 @@ static size_t binder_get_object(struct binder_proc *proc, | |||
| 2057 | size_t object_size = 0; | 2057 | size_t object_size = 0; |
| 2058 | 2058 | ||
| 2059 | read_size = min_t(size_t, sizeof(*object), buffer->data_size - offset); | 2059 | read_size = min_t(size_t, sizeof(*object), buffer->data_size - offset); |
| 2060 | if (read_size < sizeof(*hdr) || !IS_ALIGNED(offset, sizeof(u32))) | 2060 | if (offset > buffer->data_size || read_size < sizeof(*hdr) || |
| 2061 | !IS_ALIGNED(offset, sizeof(u32))) | ||
| 2061 | return 0; | 2062 | return 0; |
| 2062 | binder_alloc_copy_from_buffer(&proc->alloc, object, buffer, | 2063 | binder_alloc_copy_from_buffer(&proc->alloc, object, buffer, |
| 2063 | offset, read_size); | 2064 | offset, read_size); |
diff --git a/drivers/android/binder_alloc.c b/drivers/android/binder_alloc.c index 6389467670a0..195f120c4e8c 100644 --- a/drivers/android/binder_alloc.c +++ b/drivers/android/binder_alloc.c | |||
| @@ -927,14 +927,13 @@ enum lru_status binder_alloc_free_page(struct list_head *item, | |||
| 927 | 927 | ||
| 928 | index = page - alloc->pages; | 928 | index = page - alloc->pages; |
| 929 | page_addr = (uintptr_t)alloc->buffer + index * PAGE_SIZE; | 929 | page_addr = (uintptr_t)alloc->buffer + index * PAGE_SIZE; |
| 930 | |||
| 931 | mm = alloc->vma_vm_mm; | ||
| 932 | if (!mmget_not_zero(mm)) | ||
| 933 | goto err_mmget; | ||
| 934 | if (!down_write_trylock(&mm->mmap_sem)) | ||
| 935 | goto err_down_write_mmap_sem_failed; | ||
| 930 | vma = binder_alloc_get_vma(alloc); | 936 | vma = binder_alloc_get_vma(alloc); |
| 931 | if (vma) { | ||
| 932 | if (!mmget_not_zero(alloc->vma_vm_mm)) | ||
| 933 | goto err_mmget; | ||
| 934 | mm = alloc->vma_vm_mm; | ||
| 935 | if (!down_read_trylock(&mm->mmap_sem)) | ||
| 936 | goto err_down_write_mmap_sem_failed; | ||
| 937 | } | ||
| 938 | 937 | ||
| 939 | list_lru_isolate(lru, item); | 938 | list_lru_isolate(lru, item); |
| 940 | spin_unlock(lock); | 939 | spin_unlock(lock); |
| @@ -945,10 +944,9 @@ enum lru_status binder_alloc_free_page(struct list_head *item, | |||
| 945 | zap_page_range(vma, page_addr, PAGE_SIZE); | 944 | zap_page_range(vma, page_addr, PAGE_SIZE); |
| 946 | 945 | ||
| 947 | trace_binder_unmap_user_end(alloc, index); | 946 | trace_binder_unmap_user_end(alloc, index); |
| 948 | |||
| 949 | up_read(&mm->mmap_sem); | ||
| 950 | mmput(mm); | ||
| 951 | } | 947 | } |
| 948 | up_write(&mm->mmap_sem); | ||
| 949 | mmput(mm); | ||
| 952 | 950 | ||
| 953 | trace_binder_unmap_kernel_start(alloc, index); | 951 | trace_binder_unmap_kernel_start(alloc, index); |
| 954 | 952 | ||
diff --git a/drivers/ata/libata-zpodd.c b/drivers/ata/libata-zpodd.c index b3ed8f9953a8..173e6f2dd9af 100644 --- a/drivers/ata/libata-zpodd.c +++ b/drivers/ata/libata-zpodd.c | |||
| @@ -52,38 +52,52 @@ static int eject_tray(struct ata_device *dev) | |||
| 52 | /* Per the spec, only slot type and drawer type ODD can be supported */ | 52 | /* Per the spec, only slot type and drawer type ODD can be supported */ |
| 53 | static enum odd_mech_type zpodd_get_mech_type(struct ata_device *dev) | 53 | static enum odd_mech_type zpodd_get_mech_type(struct ata_device *dev) |
| 54 | { | 54 | { |
| 55 | char buf[16]; | 55 | char *buf; |
| 56 | unsigned int ret; | 56 | unsigned int ret; |
| 57 | struct rm_feature_desc *desc = (void *)(buf + 8); | 57 | struct rm_feature_desc *desc; |
| 58 | struct ata_taskfile tf; | 58 | struct ata_taskfile tf; |
| 59 | static const char cdb[] = { GPCMD_GET_CONFIGURATION, | 59 | static const char cdb[] = { GPCMD_GET_CONFIGURATION, |
| 60 | 2, /* only 1 feature descriptor requested */ | 60 | 2, /* only 1 feature descriptor requested */ |
| 61 | 0, 3, /* 3, removable medium feature */ | 61 | 0, 3, /* 3, removable medium feature */ |
| 62 | 0, 0, 0,/* reserved */ | 62 | 0, 0, 0,/* reserved */ |
| 63 | 0, sizeof(buf), | 63 | 0, 16, |
| 64 | 0, 0, 0, | 64 | 0, 0, 0, |
| 65 | }; | 65 | }; |
| 66 | 66 | ||
| 67 | buf = kzalloc(16, GFP_KERNEL); | ||
| 68 | if (!buf) | ||
| 69 | return ODD_MECH_TYPE_UNSUPPORTED; | ||
| 70 | desc = (void *)(buf + 8); | ||
| 71 | |||
| 67 | ata_tf_init(dev, &tf); | 72 | ata_tf_init(dev, &tf); |
| 68 | tf.flags = ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | 73 | tf.flags = ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; |
| 69 | tf.command = ATA_CMD_PACKET; | 74 | tf.command = ATA_CMD_PACKET; |
| 70 | tf.protocol = ATAPI_PROT_PIO; | 75 | tf.protocol = ATAPI_PROT_PIO; |
| 71 | tf.lbam = sizeof(buf); | 76 | tf.lbam = 16; |
| 72 | 77 | ||
| 73 | ret = ata_exec_internal(dev, &tf, cdb, DMA_FROM_DEVICE, | 78 | ret = ata_exec_internal(dev, &tf, cdb, DMA_FROM_DEVICE, |
| 74 | buf, sizeof(buf), 0); | 79 | buf, 16, 0); |
| 75 | if (ret) | 80 | if (ret) { |
| 81 | kfree(buf); | ||
| 76 | return ODD_MECH_TYPE_UNSUPPORTED; | 82 | return ODD_MECH_TYPE_UNSUPPORTED; |
| 83 | } | ||
| 77 | 84 | ||
| 78 | if (be16_to_cpu(desc->feature_code) != 3) | 85 | if (be16_to_cpu(desc->feature_code) != 3) { |
| 86 | kfree(buf); | ||
| 79 | return ODD_MECH_TYPE_UNSUPPORTED; | 87 | return ODD_MECH_TYPE_UNSUPPORTED; |
| 88 | } | ||
| 80 | 89 | ||
| 81 | if (desc->mech_type == 0 && desc->load == 0 && desc->eject == 1) | 90 | if (desc->mech_type == 0 && desc->load == 0 && desc->eject == 1) { |
| 91 | kfree(buf); | ||
| 82 | return ODD_MECH_TYPE_SLOT; | 92 | return ODD_MECH_TYPE_SLOT; |
| 83 | else if (desc->mech_type == 1 && desc->load == 0 && desc->eject == 1) | 93 | } else if (desc->mech_type == 1 && desc->load == 0 && |
| 94 | desc->eject == 1) { | ||
| 95 | kfree(buf); | ||
| 84 | return ODD_MECH_TYPE_DRAWER; | 96 | return ODD_MECH_TYPE_DRAWER; |
| 85 | else | 97 | } else { |
| 98 | kfree(buf); | ||
| 86 | return ODD_MECH_TYPE_UNSUPPORTED; | 99 | return ODD_MECH_TYPE_UNSUPPORTED; |
| 100 | } | ||
| 87 | } | 101 | } |
| 88 | 102 | ||
| 89 | /* Test if ODD is zero power ready by sense code */ | 103 | /* Test if ODD is zero power ready by sense code */ |
diff --git a/drivers/auxdisplay/Kconfig b/drivers/auxdisplay/Kconfig index 57410f9c5d44..c52c738e554a 100644 --- a/drivers/auxdisplay/Kconfig +++ b/drivers/auxdisplay/Kconfig | |||
| @@ -164,9 +164,7 @@ config ARM_CHARLCD | |||
| 164 | line and the Linux version on the second line, but that's | 164 | line and the Linux version on the second line, but that's |
| 165 | still useful. | 165 | still useful. |
| 166 | 166 | ||
| 167 | endif # AUXDISPLAY | 167 | menuconfig PARPORT_PANEL |
| 168 | |||
| 169 | menuconfig PANEL | ||
| 170 | tristate "Parallel port LCD/Keypad Panel support" | 168 | tristate "Parallel port LCD/Keypad Panel support" |
| 171 | depends on PARPORT | 169 | depends on PARPORT |
| 172 | select CHARLCD | 170 | select CHARLCD |
| @@ -178,7 +176,7 @@ menuconfig PANEL | |||
| 178 | compiled as a module, or linked into the kernel and started at boot. | 176 | compiled as a module, or linked into the kernel and started at boot. |
| 179 | If you don't understand what all this is about, say N. | 177 | If you don't understand what all this is about, say N. |
| 180 | 178 | ||
| 181 | if PANEL | 179 | if PARPORT_PANEL |
| 182 | 180 | ||
| 183 | config PANEL_PARPORT | 181 | config PANEL_PARPORT |
| 184 | int "Default parallel port number (0=LPT1)" | 182 | int "Default parallel port number (0=LPT1)" |
| @@ -419,8 +417,11 @@ config PANEL_LCD_PIN_BL | |||
| 419 | 417 | ||
| 420 | Default for the 'BL' pin in custom profile is '0' (uncontrolled). | 418 | Default for the 'BL' pin in custom profile is '0' (uncontrolled). |
| 421 | 419 | ||
| 420 | endif # PARPORT_PANEL | ||
| 421 | |||
| 422 | config PANEL_CHANGE_MESSAGE | 422 | config PANEL_CHANGE_MESSAGE |
| 423 | bool "Change LCD initialization message ?" | 423 | bool "Change LCD initialization message ?" |
| 424 | depends on CHARLCD | ||
| 424 | default "n" | 425 | default "n" |
| 425 | ---help--- | 426 | ---help--- |
| 426 | This allows you to replace the boot message indicating the kernel version | 427 | This allows you to replace the boot message indicating the kernel version |
| @@ -444,7 +445,34 @@ config PANEL_BOOT_MESSAGE | |||
| 444 | An empty message will only clear the display at driver init time. Any other | 445 | An empty message will only clear the display at driver init time. Any other |
| 445 | printf()-formatted message is valid with newline and escape codes. | 446 | printf()-formatted message is valid with newline and escape codes. |
| 446 | 447 | ||
| 447 | endif # PANEL | 448 | choice |
| 449 | prompt "Backlight initial state" | ||
| 450 | default CHARLCD_BL_FLASH | ||
| 451 | |||
| 452 | config CHARLCD_BL_OFF | ||
| 453 | bool "Off" | ||
| 454 | help | ||
| 455 | Backlight is initially turned off | ||
| 456 | |||
| 457 | config CHARLCD_BL_ON | ||
| 458 | bool "On" | ||
| 459 | help | ||
| 460 | Backlight is initially turned on | ||
| 461 | |||
| 462 | config CHARLCD_BL_FLASH | ||
| 463 | bool "Flash" | ||
| 464 | help | ||
| 465 | Backlight is flashed briefly on init | ||
| 466 | |||
| 467 | endchoice | ||
| 468 | |||
| 469 | endif # AUXDISPLAY | ||
| 470 | |||
| 471 | config PANEL | ||
| 472 | tristate "Parallel port LCD/Keypad Panel support (OLD OPTION)" | ||
| 473 | depends on PARPORT | ||
| 474 | select AUXDISPLAY | ||
| 475 | select PARPORT_PANEL | ||
| 448 | 476 | ||
| 449 | config CHARLCD | 477 | config CHARLCD |
| 450 | tristate "Character LCD core support" if COMPILE_TEST | 478 | tristate "Character LCD core support" if COMPILE_TEST |
diff --git a/drivers/auxdisplay/Makefile b/drivers/auxdisplay/Makefile index 7ac6776ca3f6..cf54b5efb07e 100644 --- a/drivers/auxdisplay/Makefile +++ b/drivers/auxdisplay/Makefile | |||
| @@ -10,4 +10,4 @@ obj-$(CONFIG_CFAG12864B) += cfag12864b.o cfag12864bfb.o | |||
| 10 | obj-$(CONFIG_IMG_ASCII_LCD) += img-ascii-lcd.o | 10 | obj-$(CONFIG_IMG_ASCII_LCD) += img-ascii-lcd.o |
| 11 | obj-$(CONFIG_HD44780) += hd44780.o | 11 | obj-$(CONFIG_HD44780) += hd44780.o |
| 12 | obj-$(CONFIG_HT16K33) += ht16k33.o | 12 | obj-$(CONFIG_HT16K33) += ht16k33.o |
| 13 | obj-$(CONFIG_PANEL) += panel.o | 13 | obj-$(CONFIG_PARPORT_PANEL) += panel.o |
diff --git a/drivers/auxdisplay/charlcd.c b/drivers/auxdisplay/charlcd.c index 60e0b772673f..92745efefb54 100644 --- a/drivers/auxdisplay/charlcd.c +++ b/drivers/auxdisplay/charlcd.c | |||
| @@ -91,7 +91,7 @@ struct charlcd_priv { | |||
| 91 | unsigned long long drvdata[0]; | 91 | unsigned long long drvdata[0]; |
| 92 | }; | 92 | }; |
| 93 | 93 | ||
| 94 | #define to_priv(p) container_of(p, struct charlcd_priv, lcd) | 94 | #define charlcd_to_priv(p) container_of(p, struct charlcd_priv, lcd) |
| 95 | 95 | ||
| 96 | /* Device single-open policy control */ | 96 | /* Device single-open policy control */ |
| 97 | static atomic_t charlcd_available = ATOMIC_INIT(1); | 97 | static atomic_t charlcd_available = ATOMIC_INIT(1); |
| @@ -105,7 +105,7 @@ static void long_sleep(int ms) | |||
| 105 | /* turn the backlight on or off */ | 105 | /* turn the backlight on or off */ |
| 106 | static void charlcd_backlight(struct charlcd *lcd, int on) | 106 | static void charlcd_backlight(struct charlcd *lcd, int on) |
| 107 | { | 107 | { |
| 108 | struct charlcd_priv *priv = to_priv(lcd); | 108 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 109 | 109 | ||
| 110 | if (!lcd->ops->backlight) | 110 | if (!lcd->ops->backlight) |
| 111 | return; | 111 | return; |
| @@ -134,7 +134,7 @@ static void charlcd_bl_off(struct work_struct *work) | |||
| 134 | /* turn the backlight on for a little while */ | 134 | /* turn the backlight on for a little while */ |
| 135 | void charlcd_poke(struct charlcd *lcd) | 135 | void charlcd_poke(struct charlcd *lcd) |
| 136 | { | 136 | { |
| 137 | struct charlcd_priv *priv = to_priv(lcd); | 137 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 138 | 138 | ||
| 139 | if (!lcd->ops->backlight) | 139 | if (!lcd->ops->backlight) |
| 140 | return; | 140 | return; |
| @@ -152,7 +152,7 @@ EXPORT_SYMBOL_GPL(charlcd_poke); | |||
| 152 | 152 | ||
| 153 | static void charlcd_gotoxy(struct charlcd *lcd) | 153 | static void charlcd_gotoxy(struct charlcd *lcd) |
| 154 | { | 154 | { |
| 155 | struct charlcd_priv *priv = to_priv(lcd); | 155 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 156 | unsigned int addr; | 156 | unsigned int addr; |
| 157 | 157 | ||
| 158 | /* | 158 | /* |
| @@ -170,7 +170,7 @@ static void charlcd_gotoxy(struct charlcd *lcd) | |||
| 170 | 170 | ||
| 171 | static void charlcd_home(struct charlcd *lcd) | 171 | static void charlcd_home(struct charlcd *lcd) |
| 172 | { | 172 | { |
| 173 | struct charlcd_priv *priv = to_priv(lcd); | 173 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 174 | 174 | ||
| 175 | priv->addr.x = 0; | 175 | priv->addr.x = 0; |
| 176 | priv->addr.y = 0; | 176 | priv->addr.y = 0; |
| @@ -179,7 +179,7 @@ static void charlcd_home(struct charlcd *lcd) | |||
| 179 | 179 | ||
| 180 | static void charlcd_print(struct charlcd *lcd, char c) | 180 | static void charlcd_print(struct charlcd *lcd, char c) |
| 181 | { | 181 | { |
| 182 | struct charlcd_priv *priv = to_priv(lcd); | 182 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 183 | 183 | ||
| 184 | if (priv->addr.x < lcd->bwidth) { | 184 | if (priv->addr.x < lcd->bwidth) { |
| 185 | if (lcd->char_conv) | 185 | if (lcd->char_conv) |
| @@ -211,7 +211,7 @@ static void charlcd_clear_fast(struct charlcd *lcd) | |||
| 211 | /* clears the display and resets X/Y */ | 211 | /* clears the display and resets X/Y */ |
| 212 | static void charlcd_clear_display(struct charlcd *lcd) | 212 | static void charlcd_clear_display(struct charlcd *lcd) |
| 213 | { | 213 | { |
| 214 | struct charlcd_priv *priv = to_priv(lcd); | 214 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 215 | 215 | ||
| 216 | lcd->ops->write_cmd(lcd, LCD_CMD_DISPLAY_CLEAR); | 216 | lcd->ops->write_cmd(lcd, LCD_CMD_DISPLAY_CLEAR); |
| 217 | priv->addr.x = 0; | 217 | priv->addr.x = 0; |
| @@ -223,7 +223,7 @@ static void charlcd_clear_display(struct charlcd *lcd) | |||
| 223 | static int charlcd_init_display(struct charlcd *lcd) | 223 | static int charlcd_init_display(struct charlcd *lcd) |
| 224 | { | 224 | { |
| 225 | void (*write_cmd_raw)(struct charlcd *lcd, int cmd); | 225 | void (*write_cmd_raw)(struct charlcd *lcd, int cmd); |
| 226 | struct charlcd_priv *priv = to_priv(lcd); | 226 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 227 | u8 init; | 227 | u8 init; |
| 228 | 228 | ||
| 229 | if (lcd->ifwidth != 4 && lcd->ifwidth != 8) | 229 | if (lcd->ifwidth != 4 && lcd->ifwidth != 8) |
| @@ -369,7 +369,7 @@ static bool parse_xy(const char *s, unsigned long *x, unsigned long *y) | |||
| 369 | 369 | ||
| 370 | static inline int handle_lcd_special_code(struct charlcd *lcd) | 370 | static inline int handle_lcd_special_code(struct charlcd *lcd) |
| 371 | { | 371 | { |
| 372 | struct charlcd_priv *priv = to_priv(lcd); | 372 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 373 | 373 | ||
| 374 | /* LCD special codes */ | 374 | /* LCD special codes */ |
| 375 | 375 | ||
| @@ -580,7 +580,7 @@ static inline int handle_lcd_special_code(struct charlcd *lcd) | |||
| 580 | 580 | ||
| 581 | static void charlcd_write_char(struct charlcd *lcd, char c) | 581 | static void charlcd_write_char(struct charlcd *lcd, char c) |
| 582 | { | 582 | { |
| 583 | struct charlcd_priv *priv = to_priv(lcd); | 583 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 584 | 584 | ||
| 585 | /* first, we'll test if we're in escape mode */ | 585 | /* first, we'll test if we're in escape mode */ |
| 586 | if ((c != '\n') && priv->esc_seq.len >= 0) { | 586 | if ((c != '\n') && priv->esc_seq.len >= 0) { |
| @@ -705,7 +705,7 @@ static ssize_t charlcd_write(struct file *file, const char __user *buf, | |||
| 705 | 705 | ||
| 706 | static int charlcd_open(struct inode *inode, struct file *file) | 706 | static int charlcd_open(struct inode *inode, struct file *file) |
| 707 | { | 707 | { |
| 708 | struct charlcd_priv *priv = to_priv(the_charlcd); | 708 | struct charlcd_priv *priv = charlcd_to_priv(the_charlcd); |
| 709 | int ret; | 709 | int ret; |
| 710 | 710 | ||
| 711 | ret = -EBUSY; | 711 | ret = -EBUSY; |
| @@ -763,10 +763,24 @@ static void charlcd_puts(struct charlcd *lcd, const char *s) | |||
| 763 | } | 763 | } |
| 764 | } | 764 | } |
| 765 | 765 | ||
| 766 | #ifdef CONFIG_PANEL_BOOT_MESSAGE | ||
| 767 | #define LCD_INIT_TEXT CONFIG_PANEL_BOOT_MESSAGE | ||
| 768 | #else | ||
| 769 | #define LCD_INIT_TEXT "Linux-" UTS_RELEASE "\n" | ||
| 770 | #endif | ||
| 771 | |||
| 772 | #ifdef CONFIG_CHARLCD_BL_ON | ||
| 773 | #define LCD_INIT_BL "\x1b[L+" | ||
| 774 | #elif defined(CONFIG_CHARLCD_BL_FLASH) | ||
| 775 | #define LCD_INIT_BL "\x1b[L*" | ||
| 776 | #else | ||
| 777 | #define LCD_INIT_BL "\x1b[L-" | ||
| 778 | #endif | ||
| 779 | |||
| 766 | /* initialize the LCD driver */ | 780 | /* initialize the LCD driver */ |
| 767 | static int charlcd_init(struct charlcd *lcd) | 781 | static int charlcd_init(struct charlcd *lcd) |
| 768 | { | 782 | { |
| 769 | struct charlcd_priv *priv = to_priv(lcd); | 783 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 770 | int ret; | 784 | int ret; |
| 771 | 785 | ||
| 772 | if (lcd->ops->backlight) { | 786 | if (lcd->ops->backlight) { |
| @@ -784,13 +798,8 @@ static int charlcd_init(struct charlcd *lcd) | |||
| 784 | return ret; | 798 | return ret; |
| 785 | 799 | ||
| 786 | /* display a short message */ | 800 | /* display a short message */ |
| 787 | #ifdef CONFIG_PANEL_CHANGE_MESSAGE | 801 | charlcd_puts(lcd, "\x1b[Lc\x1b[Lb" LCD_INIT_BL LCD_INIT_TEXT); |
| 788 | #ifdef CONFIG_PANEL_BOOT_MESSAGE | 802 | |
| 789 | charlcd_puts(lcd, "\x1b[Lc\x1b[Lb\x1b[L*" CONFIG_PANEL_BOOT_MESSAGE); | ||
| 790 | #endif | ||
| 791 | #else | ||
| 792 | charlcd_puts(lcd, "\x1b[Lc\x1b[Lb\x1b[L*Linux-" UTS_RELEASE "\n"); | ||
| 793 | #endif | ||
| 794 | /* clear the display on the next device opening */ | 803 | /* clear the display on the next device opening */ |
| 795 | priv->must_clear = true; | 804 | priv->must_clear = true; |
| 796 | charlcd_home(lcd); | 805 | charlcd_home(lcd); |
| @@ -818,6 +827,12 @@ struct charlcd *charlcd_alloc(unsigned int drvdata_size) | |||
| 818 | } | 827 | } |
| 819 | EXPORT_SYMBOL_GPL(charlcd_alloc); | 828 | EXPORT_SYMBOL_GPL(charlcd_alloc); |
| 820 | 829 | ||
| 830 | void charlcd_free(struct charlcd *lcd) | ||
| 831 | { | ||
| 832 | kfree(charlcd_to_priv(lcd)); | ||
| 833 | } | ||
| 834 | EXPORT_SYMBOL_GPL(charlcd_free); | ||
| 835 | |||
| 821 | static int panel_notify_sys(struct notifier_block *this, unsigned long code, | 836 | static int panel_notify_sys(struct notifier_block *this, unsigned long code, |
| 822 | void *unused) | 837 | void *unused) |
| 823 | { | 838 | { |
| @@ -866,7 +881,7 @@ EXPORT_SYMBOL_GPL(charlcd_register); | |||
| 866 | 881 | ||
| 867 | int charlcd_unregister(struct charlcd *lcd) | 882 | int charlcd_unregister(struct charlcd *lcd) |
| 868 | { | 883 | { |
| 869 | struct charlcd_priv *priv = to_priv(lcd); | 884 | struct charlcd_priv *priv = charlcd_to_priv(lcd); |
| 870 | 885 | ||
| 871 | unregister_reboot_notifier(&panel_notifier); | 886 | unregister_reboot_notifier(&panel_notifier); |
| 872 | charlcd_puts(lcd, "\x0cLCD driver unloaded.\x1b[Lc\x1b[Lb\x1b[L-"); | 887 | charlcd_puts(lcd, "\x0cLCD driver unloaded.\x1b[Lc\x1b[Lb\x1b[L-"); |
diff --git a/drivers/auxdisplay/hd44780.c b/drivers/auxdisplay/hd44780.c index 9ad93ea42fdc..ab15b64707ad 100644 --- a/drivers/auxdisplay/hd44780.c +++ b/drivers/auxdisplay/hd44780.c | |||
| @@ -271,7 +271,7 @@ static int hd44780_probe(struct platform_device *pdev) | |||
| 271 | return 0; | 271 | return 0; |
| 272 | 272 | ||
| 273 | fail: | 273 | fail: |
| 274 | kfree(lcd); | 274 | charlcd_free(lcd); |
| 275 | return ret; | 275 | return ret; |
| 276 | } | 276 | } |
| 277 | 277 | ||
| @@ -280,6 +280,8 @@ static int hd44780_remove(struct platform_device *pdev) | |||
| 280 | struct charlcd *lcd = platform_get_drvdata(pdev); | 280 | struct charlcd *lcd = platform_get_drvdata(pdev); |
| 281 | 281 | ||
| 282 | charlcd_unregister(lcd); | 282 | charlcd_unregister(lcd); |
| 283 | |||
| 284 | charlcd_free(lcd); | ||
| 283 | return 0; | 285 | return 0; |
| 284 | } | 286 | } |
| 285 | 287 | ||
diff --git a/drivers/auxdisplay/panel.c b/drivers/auxdisplay/panel.c index 21b9b2f2470a..e06de63497cf 100644 --- a/drivers/auxdisplay/panel.c +++ b/drivers/auxdisplay/panel.c | |||
| @@ -1620,7 +1620,7 @@ err_lcd_unreg: | |||
| 1620 | if (lcd.enabled) | 1620 | if (lcd.enabled) |
| 1621 | charlcd_unregister(lcd.charlcd); | 1621 | charlcd_unregister(lcd.charlcd); |
| 1622 | err_unreg_device: | 1622 | err_unreg_device: |
| 1623 | kfree(lcd.charlcd); | 1623 | charlcd_free(lcd.charlcd); |
| 1624 | lcd.charlcd = NULL; | 1624 | lcd.charlcd = NULL; |
| 1625 | parport_unregister_device(pprt); | 1625 | parport_unregister_device(pprt); |
| 1626 | pprt = NULL; | 1626 | pprt = NULL; |
| @@ -1647,7 +1647,7 @@ static void panel_detach(struct parport *port) | |||
| 1647 | if (lcd.enabled) { | 1647 | if (lcd.enabled) { |
| 1648 | charlcd_unregister(lcd.charlcd); | 1648 | charlcd_unregister(lcd.charlcd); |
| 1649 | lcd.initialized = false; | 1649 | lcd.initialized = false; |
| 1650 | kfree(lcd.charlcd); | 1650 | charlcd_free(lcd.charlcd); |
| 1651 | lcd.charlcd = NULL; | 1651 | lcd.charlcd = NULL; |
| 1652 | } | 1652 | } |
| 1653 | 1653 | ||
diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c index 76c9969b7124..96a6dc9d305c 100644 --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c | |||
| @@ -1469,12 +1469,12 @@ static int genpd_add_device(struct generic_pm_domain *genpd, struct device *dev, | |||
| 1469 | if (IS_ERR(gpd_data)) | 1469 | if (IS_ERR(gpd_data)) |
| 1470 | return PTR_ERR(gpd_data); | 1470 | return PTR_ERR(gpd_data); |
| 1471 | 1471 | ||
| 1472 | genpd_lock(genpd); | ||
| 1473 | |||
| 1474 | ret = genpd->attach_dev ? genpd->attach_dev(genpd, dev) : 0; | 1472 | ret = genpd->attach_dev ? genpd->attach_dev(genpd, dev) : 0; |
| 1475 | if (ret) | 1473 | if (ret) |
| 1476 | goto out; | 1474 | goto out; |
| 1477 | 1475 | ||
| 1476 | genpd_lock(genpd); | ||
| 1477 | |||
| 1478 | dev_pm_domain_set(dev, &genpd->domain); | 1478 | dev_pm_domain_set(dev, &genpd->domain); |
| 1479 | 1479 | ||
| 1480 | genpd->device_count++; | 1480 | genpd->device_count++; |
| @@ -1482,9 +1482,8 @@ static int genpd_add_device(struct generic_pm_domain *genpd, struct device *dev, | |||
| 1482 | 1482 | ||
| 1483 | list_add_tail(&gpd_data->base.list_node, &genpd->dev_list); | 1483 | list_add_tail(&gpd_data->base.list_node, &genpd->dev_list); |
| 1484 | 1484 | ||
| 1485 | out: | ||
| 1486 | genpd_unlock(genpd); | 1485 | genpd_unlock(genpd); |
| 1487 | 1486 | out: | |
| 1488 | if (ret) | 1487 | if (ret) |
| 1489 | genpd_free_dev_data(dev, gpd_data); | 1488 | genpd_free_dev_data(dev, gpd_data); |
| 1490 | else | 1489 | else |
| @@ -1533,15 +1532,15 @@ static int genpd_remove_device(struct generic_pm_domain *genpd, | |||
| 1533 | genpd->device_count--; | 1532 | genpd->device_count--; |
| 1534 | genpd->max_off_time_changed = true; | 1533 | genpd->max_off_time_changed = true; |
| 1535 | 1534 | ||
| 1536 | if (genpd->detach_dev) | ||
| 1537 | genpd->detach_dev(genpd, dev); | ||
| 1538 | |||
| 1539 | dev_pm_domain_set(dev, NULL); | 1535 | dev_pm_domain_set(dev, NULL); |
| 1540 | 1536 | ||
| 1541 | list_del_init(&pdd->list_node); | 1537 | list_del_init(&pdd->list_node); |
| 1542 | 1538 | ||
| 1543 | genpd_unlock(genpd); | 1539 | genpd_unlock(genpd); |
| 1544 | 1540 | ||
| 1541 | if (genpd->detach_dev) | ||
| 1542 | genpd->detach_dev(genpd, dev); | ||
| 1543 | |||
| 1545 | genpd_free_dev_data(dev, gpd_data); | 1544 | genpd_free_dev_data(dev, gpd_data); |
| 1546 | 1545 | ||
| 1547 | return 0; | 1546 | return 0; |
diff --git a/drivers/base/swnode.c b/drivers/base/swnode.c index 1fad9291f6aa..7fc5a18e02ad 100644 --- a/drivers/base/swnode.c +++ b/drivers/base/swnode.c | |||
| @@ -472,7 +472,7 @@ static int software_node_read_string_array(const struct fwnode_handle *fwnode, | |||
| 472 | val, nval); | 472 | val, nval); |
| 473 | } | 473 | } |
| 474 | 474 | ||
| 475 | struct fwnode_handle * | 475 | static struct fwnode_handle * |
| 476 | software_node_get_parent(const struct fwnode_handle *fwnode) | 476 | software_node_get_parent(const struct fwnode_handle *fwnode) |
| 477 | { | 477 | { |
| 478 | struct software_node *swnode = to_software_node(fwnode); | 478 | struct software_node *swnode = to_software_node(fwnode); |
| @@ -481,7 +481,7 @@ software_node_get_parent(const struct fwnode_handle *fwnode) | |||
| 481 | NULL; | 481 | NULL; |
| 482 | } | 482 | } |
| 483 | 483 | ||
| 484 | struct fwnode_handle * | 484 | static struct fwnode_handle * |
| 485 | software_node_get_next_child(const struct fwnode_handle *fwnode, | 485 | software_node_get_next_child(const struct fwnode_handle *fwnode, |
| 486 | struct fwnode_handle *child) | 486 | struct fwnode_handle *child) |
| 487 | { | 487 | { |
diff --git a/drivers/block/loop.c b/drivers/block/loop.c index 1e6edd568214..bf1c61cab8eb 100644 --- a/drivers/block/loop.c +++ b/drivers/block/loop.c | |||
| @@ -656,7 +656,7 @@ static int loop_validate_file(struct file *file, struct block_device *bdev) | |||
| 656 | return -EBADF; | 656 | return -EBADF; |
| 657 | 657 | ||
| 658 | l = f->f_mapping->host->i_bdev->bd_disk->private_data; | 658 | l = f->f_mapping->host->i_bdev->bd_disk->private_data; |
| 659 | if (l->lo_state == Lo_unbound) { | 659 | if (l->lo_state != Lo_bound) { |
| 660 | return -EINVAL; | 660 | return -EINVAL; |
| 661 | } | 661 | } |
| 662 | f = l->lo_backing_file; | 662 | f = l->lo_backing_file; |
diff --git a/drivers/block/paride/pcd.c b/drivers/block/paride/pcd.c index 96670eefaeb2..377a694dc228 100644 --- a/drivers/block/paride/pcd.c +++ b/drivers/block/paride/pcd.c | |||
| @@ -749,8 +749,12 @@ static int pcd_detect(void) | |||
| 749 | return 0; | 749 | return 0; |
| 750 | 750 | ||
| 751 | printk("%s: No CD-ROM drive found\n", name); | 751 | printk("%s: No CD-ROM drive found\n", name); |
| 752 | for (unit = 0, cd = pcd; unit < PCD_UNITS; unit++, cd++) | 752 | for (unit = 0, cd = pcd; unit < PCD_UNITS; unit++, cd++) { |
| 753 | blk_cleanup_queue(cd->disk->queue); | ||
| 754 | cd->disk->queue = NULL; | ||
| 755 | blk_mq_free_tag_set(&cd->tag_set); | ||
| 753 | put_disk(cd->disk); | 756 | put_disk(cd->disk); |
| 757 | } | ||
| 754 | pi_unregister_driver(par_drv); | 758 | pi_unregister_driver(par_drv); |
| 755 | return -1; | 759 | return -1; |
| 756 | } | 760 | } |
diff --git a/drivers/block/paride/pf.c b/drivers/block/paride/pf.c index e92e7a8eeeb2..103b617cdc31 100644 --- a/drivers/block/paride/pf.c +++ b/drivers/block/paride/pf.c | |||
| @@ -761,8 +761,12 @@ static int pf_detect(void) | |||
| 761 | return 0; | 761 | return 0; |
| 762 | 762 | ||
| 763 | printk("%s: No ATAPI disk detected\n", name); | 763 | printk("%s: No ATAPI disk detected\n", name); |
| 764 | for (pf = units, unit = 0; unit < PF_UNITS; pf++, unit++) | 764 | for (pf = units, unit = 0; unit < PF_UNITS; pf++, unit++) { |
| 765 | blk_cleanup_queue(pf->disk->queue); | ||
| 766 | pf->disk->queue = NULL; | ||
| 767 | blk_mq_free_tag_set(&pf->tag_set); | ||
| 765 | put_disk(pf->disk); | 768 | put_disk(pf->disk); |
| 769 | } | ||
| 766 | pi_unregister_driver(par_drv); | 770 | pi_unregister_driver(par_drv); |
| 767 | return -1; | 771 | return -1; |
| 768 | } | 772 | } |
| @@ -1047,13 +1051,15 @@ static void __exit pf_exit(void) | |||
| 1047 | int unit; | 1051 | int unit; |
| 1048 | unregister_blkdev(major, name); | 1052 | unregister_blkdev(major, name); |
| 1049 | for (pf = units, unit = 0; unit < PF_UNITS; pf++, unit++) { | 1053 | for (pf = units, unit = 0; unit < PF_UNITS; pf++, unit++) { |
| 1050 | if (!pf->present) | 1054 | if (pf->present) |
| 1051 | continue; | 1055 | del_gendisk(pf->disk); |
| 1052 | del_gendisk(pf->disk); | 1056 | |
| 1053 | blk_cleanup_queue(pf->disk->queue); | 1057 | blk_cleanup_queue(pf->disk->queue); |
| 1054 | blk_mq_free_tag_set(&pf->tag_set); | 1058 | blk_mq_free_tag_set(&pf->tag_set); |
| 1055 | put_disk(pf->disk); | 1059 | put_disk(pf->disk); |
| 1056 | pi_release(pf->pi); | 1060 | |
| 1061 | if (pf->present) | ||
| 1062 | pi_release(pf->pi); | ||
| 1057 | } | 1063 | } |
| 1058 | } | 1064 | } |
| 1059 | 1065 | ||
diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c index 4ba967d65cf9..2210c1b9491b 100644 --- a/drivers/block/rbd.c +++ b/drivers/block/rbd.c | |||
| @@ -833,7 +833,7 @@ static int parse_rbd_opts_token(char *c, void *private) | |||
| 833 | pctx->opts->queue_depth = intval; | 833 | pctx->opts->queue_depth = intval; |
| 834 | break; | 834 | break; |
| 835 | case Opt_alloc_size: | 835 | case Opt_alloc_size: |
| 836 | if (intval < 1) { | 836 | if (intval < SECTOR_SIZE) { |
| 837 | pr_err("alloc_size out of range\n"); | 837 | pr_err("alloc_size out of range\n"); |
| 838 | return -EINVAL; | 838 | return -EINVAL; |
| 839 | } | 839 | } |
| @@ -924,23 +924,6 @@ static void rbd_put_client(struct rbd_client *rbdc) | |||
| 924 | kref_put(&rbdc->kref, rbd_client_release); | 924 | kref_put(&rbdc->kref, rbd_client_release); |
| 925 | } | 925 | } |
| 926 | 926 | ||
| 927 | static int wait_for_latest_osdmap(struct ceph_client *client) | ||
| 928 | { | ||
| 929 | u64 newest_epoch; | ||
| 930 | int ret; | ||
| 931 | |||
| 932 | ret = ceph_monc_get_version(&client->monc, "osdmap", &newest_epoch); | ||
| 933 | if (ret) | ||
| 934 | return ret; | ||
| 935 | |||
| 936 | if (client->osdc.osdmap->epoch >= newest_epoch) | ||
| 937 | return 0; | ||
| 938 | |||
| 939 | ceph_osdc_maybe_request_map(&client->osdc); | ||
| 940 | return ceph_monc_wait_osdmap(&client->monc, newest_epoch, | ||
| 941 | client->options->mount_timeout); | ||
| 942 | } | ||
| 943 | |||
| 944 | /* | 927 | /* |
| 945 | * Get a ceph client with specific addr and configuration, if one does | 928 | * Get a ceph client with specific addr and configuration, if one does |
| 946 | * not exist create it. Either way, ceph_opts is consumed by this | 929 | * not exist create it. Either way, ceph_opts is consumed by this |
| @@ -960,7 +943,8 @@ static struct rbd_client *rbd_get_client(struct ceph_options *ceph_opts) | |||
| 960 | * Using an existing client. Make sure ->pg_pools is up to | 943 | * Using an existing client. Make sure ->pg_pools is up to |
| 961 | * date before we look up the pool id in do_rbd_add(). | 944 | * date before we look up the pool id in do_rbd_add(). |
| 962 | */ | 945 | */ |
| 963 | ret = wait_for_latest_osdmap(rbdc->client); | 946 | ret = ceph_wait_for_latest_osdmap(rbdc->client, |
| 947 | rbdc->client->options->mount_timeout); | ||
| 964 | if (ret) { | 948 | if (ret) { |
| 965 | rbd_warn(NULL, "failed to get latest osdmap: %d", ret); | 949 | rbd_warn(NULL, "failed to get latest osdmap: %d", ret); |
| 966 | rbd_put_client(rbdc); | 950 | rbd_put_client(rbdc); |
| @@ -4203,12 +4187,12 @@ static int rbd_init_disk(struct rbd_device *rbd_dev) | |||
| 4203 | q->limits.max_sectors = queue_max_hw_sectors(q); | 4187 | q->limits.max_sectors = queue_max_hw_sectors(q); |
| 4204 | blk_queue_max_segments(q, USHRT_MAX); | 4188 | blk_queue_max_segments(q, USHRT_MAX); |
| 4205 | blk_queue_max_segment_size(q, UINT_MAX); | 4189 | blk_queue_max_segment_size(q, UINT_MAX); |
| 4206 | blk_queue_io_min(q, objset_bytes); | 4190 | blk_queue_io_min(q, rbd_dev->opts->alloc_size); |
| 4207 | blk_queue_io_opt(q, objset_bytes); | 4191 | blk_queue_io_opt(q, rbd_dev->opts->alloc_size); |
| 4208 | 4192 | ||
| 4209 | if (rbd_dev->opts->trim) { | 4193 | if (rbd_dev->opts->trim) { |
| 4210 | blk_queue_flag_set(QUEUE_FLAG_DISCARD, q); | 4194 | blk_queue_flag_set(QUEUE_FLAG_DISCARD, q); |
| 4211 | q->limits.discard_granularity = objset_bytes; | 4195 | q->limits.discard_granularity = rbd_dev->opts->alloc_size; |
| 4212 | blk_queue_max_discard_sectors(q, objset_bytes >> SECTOR_SHIFT); | 4196 | blk_queue_max_discard_sectors(q, objset_bytes >> SECTOR_SHIFT); |
| 4213 | blk_queue_max_write_zeroes_sectors(q, objset_bytes >> SECTOR_SHIFT); | 4197 | blk_queue_max_write_zeroes_sectors(q, objset_bytes >> SECTOR_SHIFT); |
| 4214 | } | 4198 | } |
diff --git a/drivers/block/zram/zram_drv.c b/drivers/block/zram/zram_drv.c index e7a5f1d1c314..399cad7daae7 100644 --- a/drivers/block/zram/zram_drv.c +++ b/drivers/block/zram/zram_drv.c | |||
| @@ -290,18 +290,8 @@ static ssize_t idle_store(struct device *dev, | |||
| 290 | struct zram *zram = dev_to_zram(dev); | 290 | struct zram *zram = dev_to_zram(dev); |
| 291 | unsigned long nr_pages = zram->disksize >> PAGE_SHIFT; | 291 | unsigned long nr_pages = zram->disksize >> PAGE_SHIFT; |
| 292 | int index; | 292 | int index; |
| 293 | char mode_buf[8]; | ||
| 294 | ssize_t sz; | ||
| 295 | 293 | ||
| 296 | sz = strscpy(mode_buf, buf, sizeof(mode_buf)); | 294 | if (!sysfs_streq(buf, "all")) |
| 297 | if (sz <= 0) | ||
| 298 | return -EINVAL; | ||
| 299 | |||
| 300 | /* ignore trailing new line */ | ||
| 301 | if (mode_buf[sz - 1] == '\n') | ||
| 302 | mode_buf[sz - 1] = 0x00; | ||
| 303 | |||
| 304 | if (strcmp(mode_buf, "all")) | ||
| 305 | return -EINVAL; | 295 | return -EINVAL; |
| 306 | 296 | ||
| 307 | down_read(&zram->init_lock); | 297 | down_read(&zram->init_lock); |
| @@ -635,25 +625,15 @@ static ssize_t writeback_store(struct device *dev, | |||
| 635 | struct bio bio; | 625 | struct bio bio; |
| 636 | struct bio_vec bio_vec; | 626 | struct bio_vec bio_vec; |
| 637 | struct page *page; | 627 | struct page *page; |
| 638 | ssize_t ret, sz; | 628 | ssize_t ret; |
| 639 | char mode_buf[8]; | 629 | int mode; |
| 640 | int mode = -1; | ||
| 641 | unsigned long blk_idx = 0; | 630 | unsigned long blk_idx = 0; |
| 642 | 631 | ||
| 643 | sz = strscpy(mode_buf, buf, sizeof(mode_buf)); | 632 | if (sysfs_streq(buf, "idle")) |
| 644 | if (sz <= 0) | ||
| 645 | return -EINVAL; | ||
| 646 | |||
| 647 | /* ignore trailing newline */ | ||
| 648 | if (mode_buf[sz - 1] == '\n') | ||
| 649 | mode_buf[sz - 1] = 0x00; | ||
| 650 | |||
| 651 | if (!strcmp(mode_buf, "idle")) | ||
| 652 | mode = IDLE_WRITEBACK; | 633 | mode = IDLE_WRITEBACK; |
| 653 | else if (!strcmp(mode_buf, "huge")) | 634 | else if (sysfs_streq(buf, "huge")) |
| 654 | mode = HUGE_WRITEBACK; | 635 | mode = HUGE_WRITEBACK; |
| 655 | 636 | else | |
| 656 | if (mode == -1) | ||
| 657 | return -EINVAL; | 637 | return -EINVAL; |
| 658 | 638 | ||
| 659 | down_read(&zram->init_lock); | 639 | down_read(&zram->init_lock); |
diff --git a/drivers/bus/tegra-aconnect.c b/drivers/bus/tegra-aconnect.c index 084ae286fa23..ac58142301f4 100644 --- a/drivers/bus/tegra-aconnect.c +++ b/drivers/bus/tegra-aconnect.c | |||
| @@ -12,28 +12,38 @@ | |||
| 12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
| 13 | #include <linux/of_platform.h> | 13 | #include <linux/of_platform.h> |
| 14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/pm_clock.h> | ||
| 16 | #include <linux/pm_runtime.h> | 15 | #include <linux/pm_runtime.h> |
| 17 | 16 | ||
| 17 | struct tegra_aconnect { | ||
| 18 | struct clk *ape_clk; | ||
| 19 | struct clk *apb2ape_clk; | ||
| 20 | }; | ||
| 21 | |||
| 18 | static int tegra_aconnect_probe(struct platform_device *pdev) | 22 | static int tegra_aconnect_probe(struct platform_device *pdev) |
| 19 | { | 23 | { |
| 20 | int ret; | 24 | struct tegra_aconnect *aconnect; |
| 21 | 25 | ||
| 22 | if (!pdev->dev.of_node) | 26 | if (!pdev->dev.of_node) |
| 23 | return -EINVAL; | 27 | return -EINVAL; |
| 24 | 28 | ||
| 25 | ret = pm_clk_create(&pdev->dev); | 29 | aconnect = devm_kzalloc(&pdev->dev, sizeof(struct tegra_aconnect), |
| 26 | if (ret) | 30 | GFP_KERNEL); |
| 27 | return ret; | 31 | if (!aconnect) |
| 32 | return -ENOMEM; | ||
| 28 | 33 | ||
| 29 | ret = of_pm_clk_add_clk(&pdev->dev, "ape"); | 34 | aconnect->ape_clk = devm_clk_get(&pdev->dev, "ape"); |
| 30 | if (ret) | 35 | if (IS_ERR(aconnect->ape_clk)) { |
| 31 | goto clk_destroy; | 36 | dev_err(&pdev->dev, "Can't retrieve ape clock\n"); |
| 37 | return PTR_ERR(aconnect->ape_clk); | ||
| 38 | } | ||
| 32 | 39 | ||
| 33 | ret = of_pm_clk_add_clk(&pdev->dev, "apb2ape"); | 40 | aconnect->apb2ape_clk = devm_clk_get(&pdev->dev, "apb2ape"); |
| 34 | if (ret) | 41 | if (IS_ERR(aconnect->apb2ape_clk)) { |
| 35 | goto clk_destroy; | 42 | dev_err(&pdev->dev, "Can't retrieve apb2ape clock\n"); |
| 43 | return PTR_ERR(aconnect->apb2ape_clk); | ||
| 44 | } | ||
| 36 | 45 | ||
| 46 | dev_set_drvdata(&pdev->dev, aconnect); | ||
| 37 | pm_runtime_enable(&pdev->dev); | 47 | pm_runtime_enable(&pdev->dev); |
| 38 | 48 | ||
| 39 | of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev); | 49 | of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev); |
| @@ -41,35 +51,51 @@ static int tegra_aconnect_probe(struct platform_device *pdev) | |||
| 41 | dev_info(&pdev->dev, "Tegra ACONNECT bus registered\n"); | 51 | dev_info(&pdev->dev, "Tegra ACONNECT bus registered\n"); |
| 42 | 52 | ||
| 43 | return 0; | 53 | return 0; |
| 44 | |||
| 45 | clk_destroy: | ||
| 46 | pm_clk_destroy(&pdev->dev); | ||
| 47 | |||
| 48 | return ret; | ||
| 49 | } | 54 | } |
| 50 | 55 | ||
| 51 | static int tegra_aconnect_remove(struct platform_device *pdev) | 56 | static int tegra_aconnect_remove(struct platform_device *pdev) |
| 52 | { | 57 | { |
| 53 | pm_runtime_disable(&pdev->dev); | 58 | pm_runtime_disable(&pdev->dev); |
| 54 | 59 | ||
| 55 | pm_clk_destroy(&pdev->dev); | ||
| 56 | |||
| 57 | return 0; | 60 | return 0; |
| 58 | } | 61 | } |
| 59 | 62 | ||
| 60 | static int tegra_aconnect_runtime_resume(struct device *dev) | 63 | static int tegra_aconnect_runtime_resume(struct device *dev) |
| 61 | { | 64 | { |
| 62 | return pm_clk_resume(dev); | 65 | struct tegra_aconnect *aconnect = dev_get_drvdata(dev); |
| 66 | int ret; | ||
| 67 | |||
| 68 | ret = clk_prepare_enable(aconnect->ape_clk); | ||
| 69 | if (ret) { | ||
| 70 | dev_err(dev, "ape clk_enable failed: %d\n", ret); | ||
| 71 | return ret; | ||
| 72 | } | ||
| 73 | |||
| 74 | ret = clk_prepare_enable(aconnect->apb2ape_clk); | ||
| 75 | if (ret) { | ||
| 76 | clk_disable_unprepare(aconnect->ape_clk); | ||
| 77 | dev_err(dev, "apb2ape clk_enable failed: %d\n", ret); | ||
| 78 | return ret; | ||
| 79 | } | ||
| 80 | |||
| 81 | return 0; | ||
| 63 | } | 82 | } |
| 64 | 83 | ||
| 65 | static int tegra_aconnect_runtime_suspend(struct device *dev) | 84 | static int tegra_aconnect_runtime_suspend(struct device *dev) |
| 66 | { | 85 | { |
| 67 | return pm_clk_suspend(dev); | 86 | struct tegra_aconnect *aconnect = dev_get_drvdata(dev); |
| 87 | |||
| 88 | clk_disable_unprepare(aconnect->ape_clk); | ||
| 89 | clk_disable_unprepare(aconnect->apb2ape_clk); | ||
| 90 | |||
| 91 | return 0; | ||
| 68 | } | 92 | } |
| 69 | 93 | ||
| 70 | static const struct dev_pm_ops tegra_aconnect_pm_ops = { | 94 | static const struct dev_pm_ops tegra_aconnect_pm_ops = { |
| 71 | SET_RUNTIME_PM_OPS(tegra_aconnect_runtime_suspend, | 95 | SET_RUNTIME_PM_OPS(tegra_aconnect_runtime_suspend, |
| 72 | tegra_aconnect_runtime_resume, NULL) | 96 | tegra_aconnect_runtime_resume, NULL) |
| 97 | SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, | ||
| 98 | pm_runtime_force_resume) | ||
| 73 | }; | 99 | }; |
| 74 | 100 | ||
| 75 | static const struct of_device_id tegra_aconnect_of_match[] = { | 101 | static const struct of_device_id tegra_aconnect_of_match[] = { |
diff --git a/drivers/clk/zynqmp/clkc.c b/drivers/clk/zynqmp/clkc.c index b0908ec62f73..2b1d43457f09 100644 --- a/drivers/clk/zynqmp/clkc.c +++ b/drivers/clk/zynqmp/clkc.c | |||
| @@ -695,8 +695,8 @@ static int zynqmp_clock_probe(struct platform_device *pdev) | |||
| 695 | struct device *dev = &pdev->dev; | 695 | struct device *dev = &pdev->dev; |
| 696 | 696 | ||
| 697 | eemi_ops = zynqmp_pm_get_eemi_ops(); | 697 | eemi_ops = zynqmp_pm_get_eemi_ops(); |
| 698 | if (!eemi_ops) | 698 | if (IS_ERR(eemi_ops)) |
| 699 | return -ENXIO; | 699 | return PTR_ERR(eemi_ops); |
| 700 | 700 | ||
| 701 | ret = zynqmp_clk_setup(dev->of_node); | 701 | ret = zynqmp_clk_setup(dev->of_node); |
| 702 | 702 | ||
diff --git a/drivers/clocksource/clps711x-timer.c b/drivers/clocksource/clps711x-timer.c index a8dd80576c95..857f8c086274 100644 --- a/drivers/clocksource/clps711x-timer.c +++ b/drivers/clocksource/clps711x-timer.c | |||
| @@ -31,16 +31,9 @@ static u64 notrace clps711x_sched_clock_read(void) | |||
| 31 | return ~readw(tcd); | 31 | return ~readw(tcd); |
| 32 | } | 32 | } |
| 33 | 33 | ||
| 34 | static int __init _clps711x_clksrc_init(struct clk *clock, void __iomem *base) | 34 | static void __init clps711x_clksrc_init(struct clk *clock, void __iomem *base) |
| 35 | { | 35 | { |
| 36 | unsigned long rate; | 36 | unsigned long rate = clk_get_rate(clock); |
| 37 | |||
| 38 | if (!base) | ||
| 39 | return -ENOMEM; | ||
| 40 | if (IS_ERR(clock)) | ||
| 41 | return PTR_ERR(clock); | ||
| 42 | |||
| 43 | rate = clk_get_rate(clock); | ||
| 44 | 37 | ||
| 45 | tcd = base; | 38 | tcd = base; |
| 46 | 39 | ||
| @@ -48,8 +41,6 @@ static int __init _clps711x_clksrc_init(struct clk *clock, void __iomem *base) | |||
| 48 | clocksource_mmio_readw_down); | 41 | clocksource_mmio_readw_down); |
| 49 | 42 | ||
| 50 | sched_clock_register(clps711x_sched_clock_read, 16, rate); | 43 | sched_clock_register(clps711x_sched_clock_read, 16, rate); |
| 51 | |||
| 52 | return 0; | ||
| 53 | } | 44 | } |
| 54 | 45 | ||
| 55 | static irqreturn_t clps711x_timer_interrupt(int irq, void *dev_id) | 46 | static irqreturn_t clps711x_timer_interrupt(int irq, void *dev_id) |
| @@ -67,13 +58,6 @@ static int __init _clps711x_clkevt_init(struct clk *clock, void __iomem *base, | |||
| 67 | struct clock_event_device *clkevt; | 58 | struct clock_event_device *clkevt; |
| 68 | unsigned long rate; | 59 | unsigned long rate; |
| 69 | 60 | ||
| 70 | if (!irq) | ||
| 71 | return -EINVAL; | ||
| 72 | if (!base) | ||
| 73 | return -ENOMEM; | ||
| 74 | if (IS_ERR(clock)) | ||
| 75 | return PTR_ERR(clock); | ||
| 76 | |||
| 77 | clkevt = kzalloc(sizeof(*clkevt), GFP_KERNEL); | 61 | clkevt = kzalloc(sizeof(*clkevt), GFP_KERNEL); |
| 78 | if (!clkevt) | 62 | if (!clkevt) |
| 79 | return -ENOMEM; | 63 | return -ENOMEM; |
| @@ -93,31 +77,29 @@ static int __init _clps711x_clkevt_init(struct clk *clock, void __iomem *base, | |||
| 93 | "clps711x-timer", clkevt); | 77 | "clps711x-timer", clkevt); |
| 94 | } | 78 | } |
| 95 | 79 | ||
| 96 | void __init clps711x_clksrc_init(void __iomem *tc1_base, void __iomem *tc2_base, | ||
| 97 | unsigned int irq) | ||
| 98 | { | ||
| 99 | struct clk *tc1 = clk_get_sys("clps711x-timer.0", NULL); | ||
| 100 | struct clk *tc2 = clk_get_sys("clps711x-timer.1", NULL); | ||
| 101 | |||
| 102 | BUG_ON(_clps711x_clksrc_init(tc1, tc1_base)); | ||
| 103 | BUG_ON(_clps711x_clkevt_init(tc2, tc2_base, irq)); | ||
| 104 | } | ||
| 105 | |||
| 106 | #ifdef CONFIG_TIMER_OF | ||
| 107 | static int __init clps711x_timer_init(struct device_node *np) | 80 | static int __init clps711x_timer_init(struct device_node *np) |
| 108 | { | 81 | { |
| 109 | unsigned int irq = irq_of_parse_and_map(np, 0); | 82 | unsigned int irq = irq_of_parse_and_map(np, 0); |
| 110 | struct clk *clock = of_clk_get(np, 0); | 83 | struct clk *clock = of_clk_get(np, 0); |
| 111 | void __iomem *base = of_iomap(np, 0); | 84 | void __iomem *base = of_iomap(np, 0); |
| 112 | 85 | ||
| 86 | if (!base) | ||
| 87 | return -ENOMEM; | ||
| 88 | if (!irq) | ||
| 89 | return -EINVAL; | ||
| 90 | if (IS_ERR(clock)) | ||
| 91 | return PTR_ERR(clock); | ||
| 92 | |||
| 113 | switch (of_alias_get_id(np, "timer")) { | 93 | switch (of_alias_get_id(np, "timer")) { |
| 114 | case CLPS711X_CLKSRC_CLOCKSOURCE: | 94 | case CLPS711X_CLKSRC_CLOCKSOURCE: |
| 115 | return _clps711x_clksrc_init(clock, base); | 95 | clps711x_clksrc_init(clock, base); |
| 96 | break; | ||
| 116 | case CLPS711X_CLKSRC_CLOCKEVENT: | 97 | case CLPS711X_CLKSRC_CLOCKEVENT: |
| 117 | return _clps711x_clkevt_init(clock, base, irq); | 98 | return _clps711x_clkevt_init(clock, base, irq); |
| 118 | default: | 99 | default: |
| 119 | return -EINVAL; | 100 | return -EINVAL; |
| 120 | } | 101 | } |
| 102 | |||
| 103 | return 0; | ||
| 121 | } | 104 | } |
| 122 | TIMER_OF_DECLARE(clps711x, "cirrus,ep7209-timer", clps711x_timer_init); | 105 | TIMER_OF_DECLARE(clps711x, "cirrus,ep7209-timer", clps711x_timer_init); |
| 123 | #endif | ||
diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c index 54f8a331b53a..37671a5d4ed9 100644 --- a/drivers/clocksource/mips-gic-timer.c +++ b/drivers/clocksource/mips-gic-timer.c | |||
| @@ -67,7 +67,7 @@ static irqreturn_t gic_compare_interrupt(int irq, void *dev_id) | |||
| 67 | return IRQ_HANDLED; | 67 | return IRQ_HANDLED; |
| 68 | } | 68 | } |
| 69 | 69 | ||
| 70 | struct irqaction gic_compare_irqaction = { | 70 | static struct irqaction gic_compare_irqaction = { |
| 71 | .handler = gic_compare_interrupt, | 71 | .handler = gic_compare_interrupt, |
| 72 | .percpu_dev_id = &gic_clockevent_device, | 72 | .percpu_dev_id = &gic_clockevent_device, |
| 73 | .flags = IRQF_PERCPU | IRQF_TIMER, | 73 | .flags = IRQF_PERCPU | IRQF_TIMER, |
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c index 43f4d5c4d6fa..f987027ca566 100644 --- a/drivers/clocksource/tcb_clksrc.c +++ b/drivers/clocksource/tcb_clksrc.c | |||
| @@ -71,7 +71,7 @@ static u64 tc_get_cycles32(struct clocksource *cs) | |||
| 71 | return readl_relaxed(tcaddr + ATMEL_TC_REG(0, CV)); | 71 | return readl_relaxed(tcaddr + ATMEL_TC_REG(0, CV)); |
| 72 | } | 72 | } |
| 73 | 73 | ||
| 74 | void tc_clksrc_suspend(struct clocksource *cs) | 74 | static void tc_clksrc_suspend(struct clocksource *cs) |
| 75 | { | 75 | { |
| 76 | int i; | 76 | int i; |
| 77 | 77 | ||
| @@ -86,7 +86,7 @@ void tc_clksrc_suspend(struct clocksource *cs) | |||
| 86 | bmr_cache = readl(tcaddr + ATMEL_TC_BMR); | 86 | bmr_cache = readl(tcaddr + ATMEL_TC_BMR); |
| 87 | } | 87 | } |
| 88 | 88 | ||
| 89 | void tc_clksrc_resume(struct clocksource *cs) | 89 | static void tc_clksrc_resume(struct clocksource *cs) |
| 90 | { | 90 | { |
| 91 | int i; | 91 | int i; |
| 92 | 92 | ||
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index e8163693e936..5e6038fbf115 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c | |||
| @@ -58,7 +58,7 @@ static u64 riscv_sched_clock(void) | |||
| 58 | static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = { | 58 | static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = { |
| 59 | .name = "riscv_clocksource", | 59 | .name = "riscv_clocksource", |
| 60 | .rating = 300, | 60 | .rating = 300, |
| 61 | .mask = CLOCKSOURCE_MASK(BITS_PER_LONG), | 61 | .mask = CLOCKSOURCE_MASK(64), |
| 62 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 62 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 63 | .read = riscv_clocksource_rdtime, | 63 | .read = riscv_clocksource_rdtime, |
| 64 | }; | 64 | }; |
| @@ -120,8 +120,7 @@ static int __init riscv_timer_init_dt(struct device_node *n) | |||
| 120 | return error; | 120 | return error; |
| 121 | } | 121 | } |
| 122 | 122 | ||
| 123 | sched_clock_register(riscv_sched_clock, | 123 | sched_clock_register(riscv_sched_clock, 64, riscv_timebase); |
| 124 | BITS_PER_LONG, riscv_timebase); | ||
| 125 | 124 | ||
| 126 | error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING, | 125 | error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING, |
| 127 | "clockevents/riscv/timer:starting", | 126 | "clockevents/riscv/timer:starting", |
diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index c364027638e1..3352da6ed61f 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c | |||
| @@ -586,8 +586,8 @@ static int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, | |||
| 586 | } | 586 | } |
| 587 | 587 | ||
| 588 | /* Optimized set_load which removes costly spin wait in timer_start */ | 588 | /* Optimized set_load which removes costly spin wait in timer_start */ |
| 589 | int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, | 589 | static int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, |
| 590 | unsigned int load) | 590 | int autoreload, unsigned int load) |
| 591 | { | 591 | { |
| 592 | u32 l; | 592 | u32 l; |
| 593 | 593 | ||
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index e22f0dbaebb1..b599c7318aab 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c | |||
| @@ -385,7 +385,10 @@ static int intel_pstate_get_cppc_guranteed(int cpu) | |||
| 385 | if (ret) | 385 | if (ret) |
| 386 | return ret; | 386 | return ret; |
| 387 | 387 | ||
| 388 | return cppc_perf.guaranteed_perf; | 388 | if (cppc_perf.guaranteed_perf) |
| 389 | return cppc_perf.guaranteed_perf; | ||
| 390 | |||
| 391 | return cppc_perf.nominal_perf; | ||
| 389 | } | 392 | } |
| 390 | 393 | ||
| 391 | #else /* CONFIG_ACPI_CPPC_LIB */ | 394 | #else /* CONFIG_ACPI_CPPC_LIB */ |
diff --git a/drivers/cpufreq/scpi-cpufreq.c b/drivers/cpufreq/scpi-cpufreq.c index 3f49427766b8..2b51e0718c9f 100644 --- a/drivers/cpufreq/scpi-cpufreq.c +++ b/drivers/cpufreq/scpi-cpufreq.c | |||
| @@ -189,8 +189,8 @@ static int scpi_cpufreq_exit(struct cpufreq_policy *policy) | |||
| 189 | 189 | ||
| 190 | clk_put(priv->clk); | 190 | clk_put(priv->clk); |
| 191 | dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table); | 191 | dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table); |
| 192 | kfree(priv); | ||
| 193 | dev_pm_opp_remove_all_dynamic(priv->cpu_dev); | 192 | dev_pm_opp_remove_all_dynamic(priv->cpu_dev); |
| 193 | kfree(priv); | ||
| 194 | 194 | ||
| 195 | return 0; | 195 | return 0; |
| 196 | } | 196 | } |
diff --git a/drivers/dma/stm32-mdma.c b/drivers/dma/stm32-mdma.c index 4e0eede599a8..ac0301b69593 100644 --- a/drivers/dma/stm32-mdma.c +++ b/drivers/dma/stm32-mdma.c | |||
| @@ -1578,11 +1578,9 @@ static int stm32_mdma_probe(struct platform_device *pdev) | |||
| 1578 | 1578 | ||
| 1579 | dmadev->nr_channels = nr_channels; | 1579 | dmadev->nr_channels = nr_channels; |
| 1580 | dmadev->nr_requests = nr_requests; | 1580 | dmadev->nr_requests = nr_requests; |
| 1581 | ret = device_property_read_u32_array(&pdev->dev, "st,ahb-addr-masks", | 1581 | device_property_read_u32_array(&pdev->dev, "st,ahb-addr-masks", |
| 1582 | dmadev->ahb_addr_masks, | 1582 | dmadev->ahb_addr_masks, |
| 1583 | count); | 1583 | count); |
| 1584 | if (ret) | ||
| 1585 | return ret; | ||
| 1586 | dmadev->nr_ahb_addr_masks = count; | 1584 | dmadev->nr_ahb_addr_masks = count; |
| 1587 | 1585 | ||
| 1588 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1586 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c index 8f952f2f1a29..b5bc4c7a8fab 100644 --- a/drivers/firmware/arm_scmi/driver.c +++ b/drivers/firmware/arm_scmi/driver.c | |||
| @@ -654,9 +654,7 @@ static int scmi_xfer_info_init(struct scmi_info *sinfo) | |||
| 654 | 654 | ||
| 655 | static int scmi_mailbox_check(struct device_node *np) | 655 | static int scmi_mailbox_check(struct device_node *np) |
| 656 | { | 656 | { |
| 657 | struct of_phandle_args arg; | 657 | return of_parse_phandle_with_args(np, "mboxes", "#mbox-cells", 0, NULL); |
| 658 | |||
| 659 | return of_parse_phandle_with_args(np, "mboxes", "#mbox-cells", 0, &arg); | ||
| 660 | } | 658 | } |
| 661 | 659 | ||
| 662 | static int scmi_mbox_free_channel(int id, void *p, void *data) | 660 | static int scmi_mbox_free_channel(int id, void *p, void *data) |
| @@ -798,7 +796,9 @@ static int scmi_probe(struct platform_device *pdev) | |||
| 798 | return -EINVAL; | 796 | return -EINVAL; |
| 799 | } | 797 | } |
| 800 | 798 | ||
| 801 | desc = of_match_device(scmi_of_match, dev)->data; | 799 | desc = of_device_get_match_data(dev); |
| 800 | if (!desc) | ||
| 801 | return -EINVAL; | ||
| 802 | 802 | ||
| 803 | info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL); | 803 | info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL); |
| 804 | if (!info) | 804 | if (!info) |
diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile index 1b2e15b3c9ca..802c4ad8e8f9 100644 --- a/drivers/firmware/imx/Makefile +++ b/drivers/firmware/imx/Makefile | |||
| @@ -1,3 +1,3 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o | 2 | obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o |
| 3 | obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o | 3 | obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o |
diff --git a/drivers/firmware/imx/imx-scu-irq.c b/drivers/firmware/imx/imx-scu-irq.c new file mode 100644 index 000000000000..043833ad3c1a --- /dev/null +++ b/drivers/firmware/imx/imx-scu-irq.c | |||
| @@ -0,0 +1,168 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0+ | ||
| 2 | /* | ||
| 3 | * Copyright 2019 NXP | ||
| 4 | * | ||
| 5 | * Implementation of the SCU IRQ functions using MU. | ||
| 6 | * | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <dt-bindings/firmware/imx/rsrc.h> | ||
| 10 | #include <linux/firmware/imx/ipc.h> | ||
| 11 | #include <linux/mailbox_client.h> | ||
| 12 | |||
| 13 | #define IMX_SC_IRQ_FUNC_ENABLE 1 | ||
| 14 | #define IMX_SC_IRQ_FUNC_STATUS 2 | ||
| 15 | #define IMX_SC_IRQ_NUM_GROUP 4 | ||
| 16 | |||
| 17 | static u32 mu_resource_id; | ||
| 18 | |||
| 19 | struct imx_sc_msg_irq_get_status { | ||
| 20 | struct imx_sc_rpc_msg hdr; | ||
| 21 | union { | ||
| 22 | struct { | ||
| 23 | u16 resource; | ||
| 24 | u8 group; | ||
| 25 | u8 reserved; | ||
| 26 | } __packed req; | ||
| 27 | struct { | ||
| 28 | u32 status; | ||
| 29 | } resp; | ||
| 30 | } data; | ||
| 31 | }; | ||
| 32 | |||
| 33 | struct imx_sc_msg_irq_enable { | ||
| 34 | struct imx_sc_rpc_msg hdr; | ||
| 35 | u32 mask; | ||
| 36 | u16 resource; | ||
| 37 | u8 group; | ||
| 38 | u8 enable; | ||
| 39 | } __packed; | ||
| 40 | |||
| 41 | static struct imx_sc_ipc *imx_sc_irq_ipc_handle; | ||
| 42 | static struct work_struct imx_sc_irq_work; | ||
| 43 | static ATOMIC_NOTIFIER_HEAD(imx_scu_irq_notifier_chain); | ||
| 44 | |||
| 45 | int imx_scu_irq_register_notifier(struct notifier_block *nb) | ||
| 46 | { | ||
| 47 | return atomic_notifier_chain_register( | ||
| 48 | &imx_scu_irq_notifier_chain, nb); | ||
| 49 | } | ||
| 50 | EXPORT_SYMBOL(imx_scu_irq_register_notifier); | ||
| 51 | |||
| 52 | int imx_scu_irq_unregister_notifier(struct notifier_block *nb) | ||
| 53 | { | ||
| 54 | return atomic_notifier_chain_unregister( | ||
| 55 | &imx_scu_irq_notifier_chain, nb); | ||
| 56 | } | ||
| 57 | EXPORT_SYMBOL(imx_scu_irq_unregister_notifier); | ||
| 58 | |||
| 59 | static int imx_scu_irq_notifier_call_chain(unsigned long status, u8 *group) | ||
| 60 | { | ||
| 61 | return atomic_notifier_call_chain(&imx_scu_irq_notifier_chain, | ||
| 62 | status, (void *)group); | ||
| 63 | } | ||
| 64 | |||
| 65 | static void imx_scu_irq_work_handler(struct work_struct *work) | ||
| 66 | { | ||
| 67 | struct imx_sc_msg_irq_get_status msg; | ||
| 68 | struct imx_sc_rpc_msg *hdr = &msg.hdr; | ||
| 69 | u32 irq_status; | ||
| 70 | int ret; | ||
| 71 | u8 i; | ||
| 72 | |||
| 73 | for (i = 0; i < IMX_SC_IRQ_NUM_GROUP; i++) { | ||
| 74 | hdr->ver = IMX_SC_RPC_VERSION; | ||
| 75 | hdr->svc = IMX_SC_RPC_SVC_IRQ; | ||
| 76 | hdr->func = IMX_SC_IRQ_FUNC_STATUS; | ||
| 77 | hdr->size = 2; | ||
| 78 | |||
| 79 | msg.data.req.resource = mu_resource_id; | ||
| 80 | msg.data.req.group = i; | ||
| 81 | |||
| 82 | ret = imx_scu_call_rpc(imx_sc_irq_ipc_handle, &msg, true); | ||
| 83 | if (ret) { | ||
| 84 | pr_err("get irq group %d status failed, ret %d\n", | ||
| 85 | i, ret); | ||
| 86 | return; | ||
| 87 | } | ||
| 88 | |||
| 89 | irq_status = msg.data.resp.status; | ||
| 90 | if (!irq_status) | ||
| 91 | continue; | ||
| 92 | |||
| 93 | imx_scu_irq_notifier_call_chain(irq_status, &i); | ||
| 94 | } | ||
| 95 | } | ||
| 96 | |||
| 97 | int imx_scu_irq_group_enable(u8 group, u32 mask, u8 enable) | ||
| 98 | { | ||
| 99 | struct imx_sc_msg_irq_enable msg; | ||
| 100 | struct imx_sc_rpc_msg *hdr = &msg.hdr; | ||
| 101 | int ret; | ||
| 102 | |||
| 103 | hdr->ver = IMX_SC_RPC_VERSION; | ||
| 104 | hdr->svc = IMX_SC_RPC_SVC_IRQ; | ||
| 105 | hdr->func = IMX_SC_IRQ_FUNC_ENABLE; | ||
| 106 | hdr->size = 3; | ||
| 107 | |||
| 108 | msg.resource = mu_resource_id; | ||
| 109 | msg.group = group; | ||
| 110 | msg.mask = mask; | ||
| 111 | msg.enable = enable; | ||
| 112 | |||
| 113 | ret = imx_scu_call_rpc(imx_sc_irq_ipc_handle, &msg, true); | ||
| 114 | if (ret) | ||
| 115 | pr_err("enable irq failed, group %d, mask %d, ret %d\n", | ||
| 116 | group, mask, ret); | ||
| 117 | |||
| 118 | return ret; | ||
| 119 | } | ||
| 120 | EXPORT_SYMBOL(imx_scu_irq_group_enable); | ||
| 121 | |||
| 122 | static void imx_scu_irq_callback(struct mbox_client *c, void *msg) | ||
| 123 | { | ||
| 124 | schedule_work(&imx_sc_irq_work); | ||
| 125 | } | ||
| 126 | |||
| 127 | int imx_scu_enable_general_irq_channel(struct device *dev) | ||
| 128 | { | ||
| 129 | struct of_phandle_args spec; | ||
| 130 | struct mbox_client *cl; | ||
| 131 | struct mbox_chan *ch; | ||
| 132 | int ret = 0, i = 0; | ||
| 133 | |||
| 134 | ret = imx_scu_get_handle(&imx_sc_irq_ipc_handle); | ||
| 135 | if (ret) | ||
| 136 | return ret; | ||
| 137 | |||
| 138 | cl = devm_kzalloc(dev, sizeof(*cl), GFP_KERNEL); | ||
| 139 | if (!cl) | ||
| 140 | return -ENOMEM; | ||
| 141 | |||
| 142 | cl->dev = dev; | ||
| 143 | cl->rx_callback = imx_scu_irq_callback; | ||
| 144 | |||
| 145 | /* SCU general IRQ uses general interrupt channel 3 */ | ||
| 146 | ch = mbox_request_channel_byname(cl, "gip3"); | ||
| 147 | if (IS_ERR(ch)) { | ||
| 148 | ret = PTR_ERR(ch); | ||
| 149 | dev_err(dev, "failed to request mbox chan gip3, ret %d\n", ret); | ||
| 150 | devm_kfree(dev, cl); | ||
| 151 | return ret; | ||
| 152 | } | ||
| 153 | |||
| 154 | INIT_WORK(&imx_sc_irq_work, imx_scu_irq_work_handler); | ||
| 155 | |||
| 156 | if (!of_parse_phandle_with_args(dev->of_node, "mboxes", | ||
| 157 | "#mbox-cells", 0, &spec)) | ||
| 158 | i = of_alias_get_id(spec.np, "mu"); | ||
| 159 | |||
| 160 | /* use mu1 as general mu irq channel if failed */ | ||
| 161 | if (i < 0) | ||
| 162 | i = 1; | ||
| 163 | |||
| 164 | mu_resource_id = IMX_SC_R_MU_0A + i; | ||
| 165 | |||
| 166 | return ret; | ||
| 167 | } | ||
| 168 | EXPORT_SYMBOL(imx_scu_enable_general_irq_channel); | ||
diff --git a/drivers/firmware/imx/imx-scu.c b/drivers/firmware/imx/imx-scu.c index 2bb1a19c413f..04a24a863d6e 100644 --- a/drivers/firmware/imx/imx-scu.c +++ b/drivers/firmware/imx/imx-scu.c | |||
| @@ -10,6 +10,7 @@ | |||
| 10 | #include <linux/err.h> | 10 | #include <linux/err.h> |
| 11 | #include <linux/firmware/imx/types.h> | 11 | #include <linux/firmware/imx/types.h> |
| 12 | #include <linux/firmware/imx/ipc.h> | 12 | #include <linux/firmware/imx/ipc.h> |
| 13 | #include <linux/firmware/imx/sci.h> | ||
| 13 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
| 14 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
| 15 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
| @@ -246,6 +247,11 @@ static int imx_scu_probe(struct platform_device *pdev) | |||
| 246 | 247 | ||
| 247 | imx_sc_ipc_handle = sc_ipc; | 248 | imx_sc_ipc_handle = sc_ipc; |
| 248 | 249 | ||
| 250 | ret = imx_scu_enable_general_irq_channel(dev); | ||
| 251 | if (ret) | ||
| 252 | dev_warn(dev, | ||
| 253 | "failed to enable general irq channel: %d\n", ret); | ||
| 254 | |||
| 249 | dev_info(dev, "NXP i.MX SCU Initialized\n"); | 255 | dev_info(dev, "NXP i.MX SCU Initialized\n"); |
| 250 | 256 | ||
| 251 | return devm_of_platform_populate(dev); | 257 | return devm_of_platform_populate(dev); |
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c index 39a94c7177fc..480cec69e2c9 100644 --- a/drivers/firmware/imx/scu-pd.c +++ b/drivers/firmware/imx/scu-pd.c | |||
| @@ -74,7 +74,10 @@ struct imx_sc_pd_range { | |||
| 74 | char *name; | 74 | char *name; |
| 75 | u32 rsrc; | 75 | u32 rsrc; |
| 76 | u8 num; | 76 | u8 num; |
| 77 | |||
| 78 | /* add domain index */ | ||
| 77 | bool postfix; | 79 | bool postfix; |
| 80 | u8 start_from; | ||
| 78 | }; | 81 | }; |
| 79 | 82 | ||
| 80 | struct imx_sc_pd_soc { | 83 | struct imx_sc_pd_soc { |
| @@ -84,71 +87,75 @@ struct imx_sc_pd_soc { | |||
| 84 | 87 | ||
| 85 | static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { | 88 | static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { |
| 86 | /* LSIO SS */ | 89 | /* LSIO SS */ |
| 87 | { "lsio-pwm", IMX_SC_R_PWM_0, 8, 1 }, | 90 | { "pwm", IMX_SC_R_PWM_0, 8, true, 0 }, |
| 88 | { "lsio-gpio", IMX_SC_R_GPIO_0, 8, 1 }, | 91 | { "gpio", IMX_SC_R_GPIO_0, 8, true, 0 }, |
| 89 | { "lsio-gpt", IMX_SC_R_GPT_0, 5, 1 }, | 92 | { "gpt", IMX_SC_R_GPT_0, 5, true, 0 }, |
| 90 | { "lsio-kpp", IMX_SC_R_KPP, 1, 0 }, | 93 | { "kpp", IMX_SC_R_KPP, 1, false, 0 }, |
| 91 | { "lsio-fspi", IMX_SC_R_FSPI_0, 2, 1 }, | 94 | { "fspi", IMX_SC_R_FSPI_0, 2, true, 0 }, |
| 92 | { "lsio-mu", IMX_SC_R_MU_0A, 14, 1 }, | 95 | { "mu", IMX_SC_R_MU_0A, 14, true, 0 }, |
| 93 | 96 | ||
| 94 | /* CONN SS */ | 97 | /* CONN SS */ |
| 95 | { "con-usb", IMX_SC_R_USB_0, 2, 1 }, | 98 | { "usb", IMX_SC_R_USB_0, 2, true, 0 }, |
| 96 | { "con-usb0phy", IMX_SC_R_USB_0_PHY, 1, 0 }, | 99 | { "usb0phy", IMX_SC_R_USB_0_PHY, 1, false, 0 }, |
| 97 | { "con-usb2", IMX_SC_R_USB_2, 1, 0 }, | 100 | { "usb2", IMX_SC_R_USB_2, 1, false, 0 }, |
| 98 | { "con-usb2phy", IMX_SC_R_USB_2_PHY, 1, 0 }, | 101 | { "usb2phy", IMX_SC_R_USB_2_PHY, 1, false, 0 }, |
| 99 | { "con-sdhc", IMX_SC_R_SDHC_0, 3, 1 }, | 102 | { "sdhc", IMX_SC_R_SDHC_0, 3, true, 0 }, |
| 100 | { "con-enet", IMX_SC_R_ENET_0, 2, 1 }, | 103 | { "enet", IMX_SC_R_ENET_0, 2, true, 0 }, |
| 101 | { "con-nand", IMX_SC_R_NAND, 1, 0 }, | 104 | { "nand", IMX_SC_R_NAND, 1, false, 0 }, |
| 102 | { "con-mlb", IMX_SC_R_MLB_0, 1, 1 }, | 105 | { "mlb", IMX_SC_R_MLB_0, 1, true, 0 }, |
| 103 | 106 | ||
| 104 | /* Audio DMA SS */ | 107 | /* AUDIO SS */ |
| 105 | { "adma-audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, 0 }, | 108 | { "audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, false, 0 }, |
| 106 | { "adma-audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, 0 }, | 109 | { "audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, false, 0 }, |
| 107 | { "adma-audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, 0 }, | 110 | { "audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, false, 0 }, |
| 108 | { "adma-dma0-ch", IMX_SC_R_DMA_0_CH0, 16, 1 }, | 111 | { "dma0-ch", IMX_SC_R_DMA_0_CH0, 16, true, 0 }, |
| 109 | { "adma-dma1-ch", IMX_SC_R_DMA_1_CH0, 16, 1 }, | 112 | { "dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true, 0 }, |
| 110 | { "adma-dma2-ch", IMX_SC_R_DMA_2_CH0, 5, 1 }, | 113 | { "dma2-ch", IMX_SC_R_DMA_2_CH0, 5, true, 0 }, |
| 111 | { "adma-asrc0", IMX_SC_R_ASRC_0, 1, 0 }, | 114 | { "asrc0", IMX_SC_R_ASRC_0, 1, false, 0 }, |
| 112 | { "adma-asrc1", IMX_SC_R_ASRC_1, 1, 0 }, | 115 | { "asrc1", IMX_SC_R_ASRC_1, 1, false, 0 }, |
| 113 | { "adma-esai0", IMX_SC_R_ESAI_0, 1, 0 }, | 116 | { "esai0", IMX_SC_R_ESAI_0, 1, false, 0 }, |
| 114 | { "adma-spdif0", IMX_SC_R_SPDIF_0, 1, 0 }, | 117 | { "spdif0", IMX_SC_R_SPDIF_0, 1, false, 0 }, |
| 115 | { "adma-sai", IMX_SC_R_SAI_0, 3, 1 }, | 118 | { "sai", IMX_SC_R_SAI_0, 3, true, 0 }, |
| 116 | { "adma-amix", IMX_SC_R_AMIX, 1, 0 }, | 119 | { "amix", IMX_SC_R_AMIX, 1, false, 0 }, |
| 117 | { "adma-mqs0", IMX_SC_R_MQS_0, 1, 0 }, | 120 | { "mqs0", IMX_SC_R_MQS_0, 1, false, 0 }, |
| 118 | { "adma-dsp", IMX_SC_R_DSP, 1, 0 }, | 121 | { "dsp", IMX_SC_R_DSP, 1, false, 0 }, |
| 119 | { "adma-dsp-ram", IMX_SC_R_DSP_RAM, 1, 0 }, | 122 | { "dsp-ram", IMX_SC_R_DSP_RAM, 1, false, 0 }, |
| 120 | { "adma-can", IMX_SC_R_CAN_0, 3, 1 }, | 123 | |
| 121 | { "adma-ftm", IMX_SC_R_FTM_0, 2, 1 }, | 124 | /* DMA SS */ |
| 122 | { "adma-lpi2c", IMX_SC_R_I2C_0, 4, 1 }, | 125 | { "can", IMX_SC_R_CAN_0, 3, true, 0 }, |
| 123 | { "adma-adc", IMX_SC_R_ADC_0, 1, 1 }, | 126 | { "ftm", IMX_SC_R_FTM_0, 2, true, 0 }, |
| 124 | { "adma-lcd", IMX_SC_R_LCD_0, 1, 1 }, | 127 | { "lpi2c", IMX_SC_R_I2C_0, 4, true, 0 }, |
| 125 | { "adma-lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, 1 }, | 128 | { "adc", IMX_SC_R_ADC_0, 1, true, 0 }, |
| 126 | { "adma-lpuart", IMX_SC_R_UART_0, 4, 1 }, | 129 | { "lcd", IMX_SC_R_LCD_0, 1, true, 0 }, |
| 127 | { "adma-lpspi", IMX_SC_R_SPI_0, 4, 1 }, | 130 | { "lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, true, 0 }, |
| 128 | 131 | { "lpuart", IMX_SC_R_UART_0, 4, true, 0 }, | |
| 129 | /* VPU SS */ | 132 | { "lpspi", IMX_SC_R_SPI_0, 4, true, 0 }, |
| 130 | { "vpu", IMX_SC_R_VPU, 1, 0 }, | 133 | |
| 131 | { "vpu-pid", IMX_SC_R_VPU_PID0, 8, 1 }, | 134 | /* VPU SS */ |
| 132 | { "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, 0 }, | 135 | { "vpu", IMX_SC_R_VPU, 1, false, 0 }, |
| 133 | { "vpu-enc0", IMX_SC_R_VPU_ENC_0, 1, 0 }, | 136 | { "vpu-pid", IMX_SC_R_VPU_PID0, 8, true, 0 }, |
| 137 | { "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, false, 0 }, | ||
| 138 | { "vpu-enc0", IMX_SC_R_VPU_ENC_0, 1, false, 0 }, | ||
| 134 | 139 | ||
| 135 | /* GPU SS */ | 140 | /* GPU SS */ |
| 136 | { "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, 1 }, | 141 | { "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 }, |
| 137 | 142 | ||
| 138 | /* HSIO SS */ | 143 | /* HSIO SS */ |
| 139 | { "hsio-pcie-b", IMX_SC_R_PCIE_B, 1, 0 }, | 144 | { "pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 }, |
| 140 | { "hsio-serdes-1", IMX_SC_R_SERDES_1, 1, 0 }, | 145 | { "serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 }, |
| 141 | { "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, 0 }, | 146 | { "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 }, |
| 147 | |||
| 148 | /* MIPI SS */ | ||
| 149 | { "mipi0", IMX_SC_R_MIPI_0, 1, false, 0 }, | ||
| 150 | { "mipi0-pwm0", IMX_SC_R_MIPI_0_PWM_0, 1, false, 0 }, | ||
| 151 | { "mipi0-i2c", IMX_SC_R_MIPI_0_I2C_0, 2, true, 0 }, | ||
| 142 | 152 | ||
| 143 | /* MIPI/LVDS SS */ | 153 | /* LVDS SS */ |
| 144 | { "mipi0", IMX_SC_R_MIPI_0, 1, 0 }, | 154 | { "lvds0", IMX_SC_R_LVDS_0, 1, false, 0 }, |
| 145 | { "mipi0-pwm0", IMX_SC_R_MIPI_0_PWM_0, 1, 0 }, | ||
| 146 | { "mipi0-i2c", IMX_SC_R_MIPI_0_I2C_0, 2, 1 }, | ||
| 147 | { "lvds0", IMX_SC_R_LVDS_0, 1, 0 }, | ||
| 148 | 155 | ||
| 149 | /* DC SS */ | 156 | /* DC SS */ |
| 150 | { "dc0", IMX_SC_R_DC_0, 1, 0 }, | 157 | { "dc0", IMX_SC_R_DC_0, 1, false, 0 }, |
| 151 | { "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, 1 }, | 158 | { "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 }, |
| 152 | }; | 159 | }; |
| 153 | 160 | ||
| 154 | static const struct imx_sc_pd_soc imx8qxp_scu_pd = { | 161 | static const struct imx_sc_pd_soc imx8qxp_scu_pd = { |
| @@ -236,7 +243,7 @@ imx_scu_add_pm_domain(struct device *dev, int idx, | |||
| 236 | 243 | ||
| 237 | if (pd_ranges->postfix) | 244 | if (pd_ranges->postfix) |
| 238 | snprintf(sc_pd->name, sizeof(sc_pd->name), | 245 | snprintf(sc_pd->name, sizeof(sc_pd->name), |
| 239 | "%s%i", pd_ranges->name, idx); | 246 | "%s%i", pd_ranges->name, pd_ranges->start_from + idx); |
| 240 | else | 247 | else |
| 241 | snprintf(sc_pd->name, sizeof(sc_pd->name), | 248 | snprintf(sc_pd->name, sizeof(sc_pd->name), |
| 242 | "%s", pd_ranges->name); | 249 | "%s", pd_ranges->name); |
diff --git a/drivers/firmware/xilinx/zynqmp-debug.c b/drivers/firmware/xilinx/zynqmp-debug.c index 2771df6df379..c6d0724da4db 100644 --- a/drivers/firmware/xilinx/zynqmp-debug.c +++ b/drivers/firmware/xilinx/zynqmp-debug.c | |||
| @@ -90,9 +90,6 @@ static int process_api_request(u32 pm_id, u64 *pm_api_arg, u32 *pm_api_ret) | |||
| 90 | int ret; | 90 | int ret; |
| 91 | struct zynqmp_pm_query_data qdata = {0}; | 91 | struct zynqmp_pm_query_data qdata = {0}; |
| 92 | 92 | ||
| 93 | if (!eemi_ops) | ||
| 94 | return -ENXIO; | ||
| 95 | |||
| 96 | switch (pm_id) { | 93 | switch (pm_id) { |
| 97 | case PM_GET_API_VERSION: | 94 | case PM_GET_API_VERSION: |
| 98 | ret = eemi_ops->get_api_version(&pm_api_version); | 95 | ret = eemi_ops->get_api_version(&pm_api_version); |
| @@ -163,21 +160,14 @@ static ssize_t zynqmp_pm_debugfs_api_write(struct file *file, | |||
| 163 | 160 | ||
| 164 | strcpy(debugfs_buf, ""); | 161 | strcpy(debugfs_buf, ""); |
| 165 | 162 | ||
| 166 | if (*off != 0 || len == 0) | 163 | if (*off != 0 || len <= 1 || len > PAGE_SIZE - 1) |
| 167 | return -EINVAL; | 164 | return -EINVAL; |
| 168 | 165 | ||
| 169 | kern_buff = kzalloc(len, GFP_KERNEL); | 166 | kern_buff = memdup_user_nul(ptr, len); |
| 170 | if (!kern_buff) | 167 | if (IS_ERR(kern_buff)) |
| 171 | return -ENOMEM; | 168 | return PTR_ERR(kern_buff); |
| 172 | |||
| 173 | tmp_buff = kern_buff; | 169 | tmp_buff = kern_buff; |
| 174 | 170 | ||
| 175 | ret = strncpy_from_user(kern_buff, ptr, len); | ||
| 176 | if (ret < 0) { | ||
| 177 | ret = -EFAULT; | ||
| 178 | goto err; | ||
| 179 | } | ||
| 180 | |||
| 181 | /* Read the API name from a user request */ | 171 | /* Read the API name from a user request */ |
| 182 | pm_api_req = strsep(&kern_buff, " "); | 172 | pm_api_req = strsep(&kern_buff, " "); |
| 183 | 173 | ||
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 98f936125643..fd3d83745208 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c | |||
| @@ -24,6 +24,8 @@ | |||
| 24 | #include <linux/firmware/xlnx-zynqmp.h> | 24 | #include <linux/firmware/xlnx-zynqmp.h> |
| 25 | #include "zynqmp-debug.h" | 25 | #include "zynqmp-debug.h" |
| 26 | 26 | ||
| 27 | static const struct zynqmp_eemi_ops *eemi_ops_tbl; | ||
| 28 | |||
| 27 | static const struct mfd_cell firmware_devs[] = { | 29 | static const struct mfd_cell firmware_devs[] = { |
| 28 | { | 30 | { |
| 29 | .name = "zynqmp_power_controller", | 31 | .name = "zynqmp_power_controller", |
| @@ -538,6 +540,49 @@ static int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, | |||
| 538 | } | 540 | } |
| 539 | 541 | ||
| 540 | /** | 542 | /** |
| 543 | * zynqmp_pm_fpga_load - Perform the fpga load | ||
| 544 | * @address: Address to write to | ||
| 545 | * @size: pl bitstream size | ||
| 546 | * @flags: Bitstream type | ||
| 547 | * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration | ||
| 548 | * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration | ||
| 549 | * | ||
| 550 | * This function provides access to pmufw. To transfer | ||
| 551 | * the required bitstream into PL. | ||
| 552 | * | ||
| 553 | * Return: Returns status, either success or error+reason | ||
| 554 | */ | ||
| 555 | static int zynqmp_pm_fpga_load(const u64 address, const u32 size, | ||
| 556 | const u32 flags) | ||
| 557 | { | ||
| 558 | return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address), | ||
| 559 | upper_32_bits(address), size, flags, NULL); | ||
| 560 | } | ||
| 561 | |||
| 562 | /** | ||
| 563 | * zynqmp_pm_fpga_get_status - Read value from PCAP status register | ||
| 564 | * @value: Value to read | ||
| 565 | * | ||
| 566 | * This function provides access to the pmufw to get the PCAP | ||
| 567 | * status | ||
| 568 | * | ||
| 569 | * Return: Returns status, either success or error+reason | ||
| 570 | */ | ||
| 571 | static int zynqmp_pm_fpga_get_status(u32 *value) | ||
| 572 | { | ||
| 573 | u32 ret_payload[PAYLOAD_ARG_CNT]; | ||
| 574 | int ret; | ||
| 575 | |||
| 576 | if (!value) | ||
| 577 | return -EINVAL; | ||
| 578 | |||
| 579 | ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload); | ||
| 580 | *value = ret_payload[1]; | ||
| 581 | |||
| 582 | return ret; | ||
| 583 | } | ||
| 584 | |||
| 585 | /** | ||
| 541 | * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller | 586 | * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller |
| 542 | * master has initialized its own power management | 587 | * master has initialized its own power management |
| 543 | * | 588 | * |
| @@ -640,6 +685,8 @@ static const struct zynqmp_eemi_ops eemi_ops = { | |||
| 640 | .request_node = zynqmp_pm_request_node, | 685 | .request_node = zynqmp_pm_request_node, |
| 641 | .release_node = zynqmp_pm_release_node, | 686 | .release_node = zynqmp_pm_release_node, |
| 642 | .set_requirement = zynqmp_pm_set_requirement, | 687 | .set_requirement = zynqmp_pm_set_requirement, |
| 688 | .fpga_load = zynqmp_pm_fpga_load, | ||
| 689 | .fpga_get_status = zynqmp_pm_fpga_get_status, | ||
| 643 | }; | 690 | }; |
| 644 | 691 | ||
| 645 | /** | 692 | /** |
| @@ -649,7 +696,11 @@ static const struct zynqmp_eemi_ops eemi_ops = { | |||
| 649 | */ | 696 | */ |
| 650 | const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) | 697 | const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) |
| 651 | { | 698 | { |
| 652 | return &eemi_ops; | 699 | if (eemi_ops_tbl) |
| 700 | return eemi_ops_tbl; | ||
| 701 | else | ||
| 702 | return ERR_PTR(-EPROBE_DEFER); | ||
| 703 | |||
| 653 | } | 704 | } |
| 654 | EXPORT_SYMBOL_GPL(zynqmp_pm_get_eemi_ops); | 705 | EXPORT_SYMBOL_GPL(zynqmp_pm_get_eemi_ops); |
| 655 | 706 | ||
| @@ -694,6 +745,9 @@ static int zynqmp_firmware_probe(struct platform_device *pdev) | |||
| 694 | pr_info("%s Trustzone version v%d.%d\n", __func__, | 745 | pr_info("%s Trustzone version v%d.%d\n", __func__, |
| 695 | pm_tz_version >> 16, pm_tz_version & 0xFFFF); | 746 | pm_tz_version >> 16, pm_tz_version & 0xFFFF); |
| 696 | 747 | ||
| 748 | /* Assign eemi_ops_table */ | ||
| 749 | eemi_ops_tbl = &eemi_ops; | ||
| 750 | |||
| 697 | zynqmp_pm_api_debugfs_init(); | 751 | zynqmp_pm_api_debugfs_init(); |
| 698 | 752 | ||
| 699 | ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, | 753 | ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, |
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index c20445b867ae..d892f3efcd76 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig | |||
| @@ -204,4 +204,13 @@ config FPGA_DFL_PCI | |||
| 204 | 204 | ||
| 205 | To compile this as a module, choose M here. | 205 | To compile this as a module, choose M here. |
| 206 | 206 | ||
| 207 | config FPGA_MGR_ZYNQMP_FPGA | ||
| 208 | tristate "Xilinx ZynqMP FPGA" | ||
| 209 | depends on ARCH_ZYNQMP || COMPILE_TEST | ||
| 210 | help | ||
| 211 | FPGA manager driver support for Xilinx ZynqMP FPGAs. | ||
| 212 | This driver uses the processor configuration port(PCAP) | ||
| 213 | to configure the programmable logic(PL) through PS | ||
| 214 | on ZynqMP SoC. | ||
| 215 | |||
| 207 | endif # FPGA | 216 | endif # FPGA |
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index c0dd4c82fbdb..312b9371742f 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile | |||
| @@ -17,6 +17,7 @@ obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o | |||
| 17 | obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o | 17 | obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o |
| 18 | obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o | 18 | obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o |
| 19 | obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o | 19 | obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o |
| 20 | obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o | ||
| 20 | obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o | 21 | obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o |
| 21 | obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o | 22 | obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o |
| 22 | 23 | ||
diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c new file mode 100644 index 000000000000..f7cbaadf49ab --- /dev/null +++ b/drivers/fpga/zynqmp-fpga.c | |||
| @@ -0,0 +1,159 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0+ | ||
| 2 | /* | ||
| 3 | * Copyright (C) 2019 Xilinx, Inc. | ||
| 4 | */ | ||
| 5 | |||
| 6 | #include <linux/dma-mapping.h> | ||
| 7 | #include <linux/fpga/fpga-mgr.h> | ||
| 8 | #include <linux/io.h> | ||
| 9 | #include <linux/kernel.h> | ||
| 10 | #include <linux/module.h> | ||
| 11 | #include <linux/of_address.h> | ||
| 12 | #include <linux/string.h> | ||
| 13 | #include <linux/firmware/xlnx-zynqmp.h> | ||
| 14 | |||
| 15 | /* Constant Definitions */ | ||
| 16 | #define IXR_FPGA_DONE_MASK BIT(3) | ||
| 17 | |||
| 18 | /** | ||
| 19 | * struct zynqmp_fpga_priv - Private data structure | ||
| 20 | * @dev: Device data structure | ||
| 21 | * @flags: flags which is used to identify the bitfile type | ||
| 22 | */ | ||
| 23 | struct zynqmp_fpga_priv { | ||
| 24 | struct device *dev; | ||
| 25 | u32 flags; | ||
| 26 | }; | ||
| 27 | |||
| 28 | static int zynqmp_fpga_ops_write_init(struct fpga_manager *mgr, | ||
| 29 | struct fpga_image_info *info, | ||
| 30 | const char *buf, size_t size) | ||
| 31 | { | ||
| 32 | struct zynqmp_fpga_priv *priv; | ||
| 33 | |||
| 34 | priv = mgr->priv; | ||
| 35 | priv->flags = info->flags; | ||
| 36 | |||
| 37 | return 0; | ||
| 38 | } | ||
| 39 | |||
| 40 | static int zynqmp_fpga_ops_write(struct fpga_manager *mgr, | ||
| 41 | const char *buf, size_t size) | ||
| 42 | { | ||
| 43 | const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); | ||
| 44 | struct zynqmp_fpga_priv *priv; | ||
| 45 | dma_addr_t dma_addr; | ||
| 46 | u32 eemi_flags = 0; | ||
| 47 | char *kbuf; | ||
| 48 | int ret; | ||
| 49 | |||
| 50 | if (!eemi_ops || !eemi_ops->fpga_load) | ||
| 51 | return -ENXIO; | ||
| 52 | |||
| 53 | priv = mgr->priv; | ||
| 54 | |||
| 55 | kbuf = dma_alloc_coherent(priv->dev, size, &dma_addr, GFP_KERNEL); | ||
| 56 | if (!kbuf) | ||
| 57 | return -ENOMEM; | ||
| 58 | |||
| 59 | memcpy(kbuf, buf, size); | ||
| 60 | |||
| 61 | wmb(); /* ensure all writes are done before initiate FW call */ | ||
| 62 | |||
| 63 | if (priv->flags & FPGA_MGR_PARTIAL_RECONFIG) | ||
| 64 | eemi_flags |= XILINX_ZYNQMP_PM_FPGA_PARTIAL; | ||
| 65 | |||
| 66 | ret = eemi_ops->fpga_load(dma_addr, size, eemi_flags); | ||
| 67 | |||
| 68 | dma_free_coherent(priv->dev, size, kbuf, dma_addr); | ||
| 69 | |||
| 70 | return ret; | ||
| 71 | } | ||
| 72 | |||
| 73 | static int zynqmp_fpga_ops_write_complete(struct fpga_manager *mgr, | ||
| 74 | struct fpga_image_info *info) | ||
| 75 | { | ||
| 76 | return 0; | ||
| 77 | } | ||
| 78 | |||
| 79 | static enum fpga_mgr_states zynqmp_fpga_ops_state(struct fpga_manager *mgr) | ||
| 80 | { | ||
| 81 | const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); | ||
| 82 | u32 status; | ||
| 83 | |||
| 84 | if (!eemi_ops || !eemi_ops->fpga_get_status) | ||
| 85 | return FPGA_MGR_STATE_UNKNOWN; | ||
| 86 | |||
| 87 | eemi_ops->fpga_get_status(&status); | ||
| 88 | if (status & IXR_FPGA_DONE_MASK) | ||
| 89 | return FPGA_MGR_STATE_OPERATING; | ||
| 90 | |||
| 91 | return FPGA_MGR_STATE_UNKNOWN; | ||
| 92 | } | ||
| 93 | |||
| 94 | static const struct fpga_manager_ops zynqmp_fpga_ops = { | ||
| 95 | .state = zynqmp_fpga_ops_state, | ||
| 96 | .write_init = zynqmp_fpga_ops_write_init, | ||
| 97 | .write = zynqmp_fpga_ops_write, | ||
| 98 | .write_complete = zynqmp_fpga_ops_write_complete, | ||
| 99 | }; | ||
| 100 | |||
| 101 | static int zynqmp_fpga_probe(struct platform_device *pdev) | ||
| 102 | { | ||
| 103 | struct device *dev = &pdev->dev; | ||
| 104 | struct zynqmp_fpga_priv *priv; | ||
| 105 | struct fpga_manager *mgr; | ||
| 106 | int ret; | ||
| 107 | |||
| 108 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); | ||
| 109 | if (!priv) | ||
| 110 | return -ENOMEM; | ||
| 111 | |||
| 112 | priv->dev = dev; | ||
| 113 | |||
| 114 | mgr = devm_fpga_mgr_create(dev, "Xilinx ZynqMP FPGA Manager", | ||
| 115 | &zynqmp_fpga_ops, priv); | ||
| 116 | if (!mgr) | ||
| 117 | return -ENOMEM; | ||
| 118 | |||
| 119 | platform_set_drvdata(pdev, mgr); | ||
| 120 | |||
| 121 | ret = fpga_mgr_register(mgr); | ||
| 122 | if (ret) { | ||
| 123 | dev_err(dev, "unable to register FPGA manager"); | ||
| 124 | return ret; | ||
| 125 | } | ||
| 126 | |||
| 127 | return 0; | ||
| 128 | } | ||
| 129 | |||
| 130 | static int zynqmp_fpga_remove(struct platform_device *pdev) | ||
| 131 | { | ||
| 132 | struct fpga_manager *mgr = platform_get_drvdata(pdev); | ||
| 133 | |||
| 134 | fpga_mgr_unregister(mgr); | ||
| 135 | |||
| 136 | return 0; | ||
| 137 | } | ||
| 138 | |||
| 139 | static const struct of_device_id zynqmp_fpga_of_match[] = { | ||
| 140 | { .compatible = "xlnx,zynqmp-pcap-fpga", }, | ||
| 141 | {}, | ||
| 142 | }; | ||
| 143 | |||
| 144 | MODULE_DEVICE_TABLE(of, zynqmp_fpga_of_match); | ||
| 145 | |||
| 146 | static struct platform_driver zynqmp_fpga_driver = { | ||
| 147 | .probe = zynqmp_fpga_probe, | ||
| 148 | .remove = zynqmp_fpga_remove, | ||
| 149 | .driver = { | ||
| 150 | .name = "zynqmp_fpga_manager", | ||
| 151 | .of_match_table = of_match_ptr(zynqmp_fpga_of_match), | ||
| 152 | }, | ||
| 153 | }; | ||
| 154 | |||
| 155 | module_platform_driver(zynqmp_fpga_driver); | ||
| 156 | |||
| 157 | MODULE_AUTHOR("Nava kishore Manne <navam@xilinx.com>"); | ||
| 158 | MODULE_DESCRIPTION("Xilinx ZynqMp FPGA Manager"); | ||
| 159 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/gpio/gpio-adnp.c b/drivers/gpio/gpio-adnp.c index 91b90c0cea73..12acdac85820 100644 --- a/drivers/gpio/gpio-adnp.c +++ b/drivers/gpio/gpio-adnp.c | |||
| @@ -132,8 +132,10 @@ static int adnp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
| 132 | if (err < 0) | 132 | if (err < 0) |
| 133 | goto out; | 133 | goto out; |
| 134 | 134 | ||
| 135 | if (err & BIT(pos)) | 135 | if (value & BIT(pos)) { |
| 136 | err = -EACCES; | 136 | err = -EPERM; |
| 137 | goto out; | ||
| 138 | } | ||
| 137 | 139 | ||
| 138 | err = 0; | 140 | err = 0; |
| 139 | 141 | ||
diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index 854bce4fb9e7..217507002dbc 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c | |||
| @@ -1224,6 +1224,8 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev) | |||
| 1224 | 1224 | ||
| 1225 | gpio->offset_timer = | 1225 | gpio->offset_timer = |
| 1226 | devm_kzalloc(&pdev->dev, gpio->chip.ngpio, GFP_KERNEL); | 1226 | devm_kzalloc(&pdev->dev, gpio->chip.ngpio, GFP_KERNEL); |
| 1227 | if (!gpio->offset_timer) | ||
| 1228 | return -ENOMEM; | ||
| 1227 | 1229 | ||
| 1228 | return aspeed_gpio_setup_irqs(gpio, pdev); | 1230 | return aspeed_gpio_setup_irqs(gpio, pdev); |
| 1229 | } | 1231 | } |
diff --git a/drivers/gpio/gpio-exar.c b/drivers/gpio/gpio-exar.c index 0ecd2369c2ca..a09d2f9ebacc 100644 --- a/drivers/gpio/gpio-exar.c +++ b/drivers/gpio/gpio-exar.c | |||
| @@ -148,6 +148,8 @@ static int gpio_exar_probe(struct platform_device *pdev) | |||
| 148 | mutex_init(&exar_gpio->lock); | 148 | mutex_init(&exar_gpio->lock); |
| 149 | 149 | ||
| 150 | index = ida_simple_get(&ida_index, 0, 0, GFP_KERNEL); | 150 | index = ida_simple_get(&ida_index, 0, 0, GFP_KERNEL); |
| 151 | if (index < 0) | ||
| 152 | goto err_destroy; | ||
| 151 | 153 | ||
| 152 | sprintf(exar_gpio->name, "exar_gpio%d", index); | 154 | sprintf(exar_gpio->name, "exar_gpio%d", index); |
| 153 | exar_gpio->gpio_chip.label = exar_gpio->name; | 155 | exar_gpio->gpio_chip.label = exar_gpio->name; |
diff --git a/drivers/gpio/gpio-mockup.c b/drivers/gpio/gpio-mockup.c index 154d959e8993..b6a4efce7c92 100644 --- a/drivers/gpio/gpio-mockup.c +++ b/drivers/gpio/gpio-mockup.c | |||
| @@ -204,8 +204,8 @@ static ssize_t gpio_mockup_debugfs_read(struct file *file, | |||
| 204 | struct gpio_mockup_chip *chip; | 204 | struct gpio_mockup_chip *chip; |
| 205 | struct seq_file *sfile; | 205 | struct seq_file *sfile; |
| 206 | struct gpio_chip *gc; | 206 | struct gpio_chip *gc; |
| 207 | int val, cnt; | ||
| 207 | char buf[3]; | 208 | char buf[3]; |
| 208 | int val, rv; | ||
| 209 | 209 | ||
| 210 | if (*ppos != 0) | 210 | if (*ppos != 0) |
| 211 | return 0; | 211 | return 0; |
| @@ -216,13 +216,9 @@ static ssize_t gpio_mockup_debugfs_read(struct file *file, | |||
| 216 | gc = &chip->gc; | 216 | gc = &chip->gc; |
| 217 | 217 | ||
| 218 | val = gpio_mockup_get(gc, priv->offset); | 218 | val = gpio_mockup_get(gc, priv->offset); |
| 219 | snprintf(buf, sizeof(buf), "%d\n", val); | 219 | cnt = snprintf(buf, sizeof(buf), "%d\n", val); |
| 220 | 220 | ||
| 221 | rv = copy_to_user(usr_buf, buf, sizeof(buf)); | 221 | return simple_read_from_buffer(usr_buf, size, ppos, buf, cnt); |
| 222 | if (rv) | ||
| 223 | return rv; | ||
| 224 | |||
| 225 | return sizeof(buf) - 1; | ||
| 226 | } | 222 | } |
| 227 | 223 | ||
| 228 | static ssize_t gpio_mockup_debugfs_write(struct file *file, | 224 | static ssize_t gpio_mockup_debugfs_write(struct file *file, |
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index 8b9c3ab70f6e..6a3ec575a404 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c | |||
| @@ -120,7 +120,8 @@ static void of_gpio_flags_quirks(struct device_node *np, | |||
| 120 | * to determine if the flags should have inverted semantics. | 120 | * to determine if the flags should have inverted semantics. |
| 121 | */ | 121 | */ |
| 122 | if (IS_ENABLED(CONFIG_SPI_MASTER) && | 122 | if (IS_ENABLED(CONFIG_SPI_MASTER) && |
| 123 | of_property_read_bool(np, "cs-gpios")) { | 123 | of_property_read_bool(np, "cs-gpios") && |
| 124 | !strcmp(propname, "cs-gpios")) { | ||
| 124 | struct device_node *child; | 125 | struct device_node *child; |
| 125 | u32 cs; | 126 | u32 cs; |
| 126 | int ret; | 127 | int ret; |
| @@ -142,16 +143,16 @@ static void of_gpio_flags_quirks(struct device_node *np, | |||
| 142 | * conflict and the "spi-cs-high" flag will | 143 | * conflict and the "spi-cs-high" flag will |
| 143 | * take precedence. | 144 | * take precedence. |
| 144 | */ | 145 | */ |
| 145 | if (of_property_read_bool(np, "spi-cs-high")) { | 146 | if (of_property_read_bool(child, "spi-cs-high")) { |
| 146 | if (*flags & OF_GPIO_ACTIVE_LOW) { | 147 | if (*flags & OF_GPIO_ACTIVE_LOW) { |
| 147 | pr_warn("%s GPIO handle specifies active low - ignored\n", | 148 | pr_warn("%s GPIO handle specifies active low - ignored\n", |
| 148 | of_node_full_name(np)); | 149 | of_node_full_name(child)); |
| 149 | *flags &= ~OF_GPIO_ACTIVE_LOW; | 150 | *flags &= ~OF_GPIO_ACTIVE_LOW; |
| 150 | } | 151 | } |
| 151 | } else { | 152 | } else { |
| 152 | if (!(*flags & OF_GPIO_ACTIVE_LOW)) | 153 | if (!(*flags & OF_GPIO_ACTIVE_LOW)) |
| 153 | pr_info("%s enforce active low on chipselect handle\n", | 154 | pr_info("%s enforce active low on chipselect handle\n", |
| 154 | of_node_full_name(np)); | 155 | of_node_full_name(child)); |
| 155 | *flags |= OF_GPIO_ACTIVE_LOW; | 156 | *flags |= OF_GPIO_ACTIVE_LOW; |
| 156 | } | 157 | } |
| 157 | break; | 158 | break; |
| @@ -717,7 +718,13 @@ int of_gpiochip_add(struct gpio_chip *chip) | |||
| 717 | 718 | ||
| 718 | of_node_get(chip->of_node); | 719 | of_node_get(chip->of_node); |
| 719 | 720 | ||
| 720 | return of_gpiochip_scan_gpios(chip); | 721 | status = of_gpiochip_scan_gpios(chip); |
| 722 | if (status) { | ||
| 723 | of_node_put(chip->of_node); | ||
| 724 | gpiochip_remove_pin_ranges(chip); | ||
| 725 | } | ||
| 726 | |||
| 727 | return status; | ||
| 721 | } | 728 | } |
| 722 | 729 | ||
| 723 | void of_gpiochip_remove(struct gpio_chip *chip) | 730 | void of_gpiochip_remove(struct gpio_chip *chip) |
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 144af0733581..0495bf1d480a 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c | |||
| @@ -2776,7 +2776,7 @@ int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) | |||
| 2776 | } | 2776 | } |
| 2777 | 2777 | ||
| 2778 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); | 2778 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
| 2779 | return gpio_set_config(chip, gpio_chip_hwgpio(desc), config); | 2779 | return chip->set_config(chip, gpio_chip_hwgpio(desc), config); |
| 2780 | } | 2780 | } |
| 2781 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); | 2781 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
| 2782 | 2782 | ||
| @@ -2813,7 +2813,7 @@ int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) | |||
| 2813 | packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE, | 2813 | packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE, |
| 2814 | !transitory); | 2814 | !transitory); |
| 2815 | gpio = gpio_chip_hwgpio(desc); | 2815 | gpio = gpio_chip_hwgpio(desc); |
| 2816 | rc = gpio_set_config(chip, gpio, packed); | 2816 | rc = chip->set_config(chip, gpio, packed); |
| 2817 | if (rc == -ENOTSUPP) { | 2817 | if (rc == -ENOTSUPP) { |
| 2818 | dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n", | 2818 | dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n", |
| 2819 | gpio); | 2819 | gpio); |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index bfa9062ce6b9..16fcb56c232b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | |||
| @@ -700,6 +700,8 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm, | |||
| 700 | struct amdgpu_vm_bo_base *bo_base, *tmp; | 700 | struct amdgpu_vm_bo_base *bo_base, *tmp; |
| 701 | int r = 0; | 701 | int r = 0; |
| 702 | 702 | ||
| 703 | vm->bulk_moveable &= list_empty(&vm->evicted); | ||
| 704 | |||
| 703 | list_for_each_entry_safe(bo_base, tmp, &vm->evicted, vm_status) { | 705 | list_for_each_entry_safe(bo_base, tmp, &vm->evicted, vm_status) { |
| 704 | struct amdgpu_bo *bo = bo_base->bo; | 706 | struct amdgpu_bo *bo = bo_base->bo; |
| 705 | 707 | ||
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index 600259b4e291..2fe8397241ea 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | |||
| @@ -742,7 +742,7 @@ static int gmc_v9_0_allocate_vm_inv_eng(struct amdgpu_device *adev) | |||
| 742 | } | 742 | } |
| 743 | 743 | ||
| 744 | ring->vm_inv_eng = inv_eng - 1; | 744 | ring->vm_inv_eng = inv_eng - 1; |
| 745 | change_bit(inv_eng - 1, (unsigned long *)(&vm_inv_engs[vmhub])); | 745 | vm_inv_engs[vmhub] &= ~(1 << ring->vm_inv_eng); |
| 746 | 746 | ||
| 747 | dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n", | 747 | dev_info(adev->dev, "ring %s uses VM inv eng %u on hub %u\n", |
| 748 | ring->name, ring->vm_inv_eng, ring->funcs->vmhub); | 748 | ring->name, ring->vm_inv_eng, ring->funcs->vmhub); |
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index fb27783d7a54..81127f7d6ed1 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | |||
| @@ -5429,9 +5429,11 @@ static void get_freesync_config_for_crtc( | |||
| 5429 | struct amdgpu_dm_connector *aconnector = | 5429 | struct amdgpu_dm_connector *aconnector = |
| 5430 | to_amdgpu_dm_connector(new_con_state->base.connector); | 5430 | to_amdgpu_dm_connector(new_con_state->base.connector); |
| 5431 | struct drm_display_mode *mode = &new_crtc_state->base.mode; | 5431 | struct drm_display_mode *mode = &new_crtc_state->base.mode; |
| 5432 | int vrefresh = drm_mode_vrefresh(mode); | ||
| 5432 | 5433 | ||
| 5433 | new_crtc_state->vrr_supported = new_con_state->freesync_capable && | 5434 | new_crtc_state->vrr_supported = new_con_state->freesync_capable && |
| 5434 | aconnector->min_vfreq <= drm_mode_vrefresh(mode); | 5435 | vrefresh >= aconnector->min_vfreq && |
| 5436 | vrefresh <= aconnector->max_vfreq; | ||
| 5435 | 5437 | ||
| 5436 | if (new_crtc_state->vrr_supported) { | 5438 | if (new_crtc_state->vrr_supported) { |
| 5437 | new_crtc_state->stream->ignore_msa_timing_param = true; | 5439 | new_crtc_state->stream->ignore_msa_timing_param = true; |
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c index 381581b01d48..05bbc2b622fc 100644 --- a/drivers/gpu/drm/drm_drv.c +++ b/drivers/gpu/drm/drm_drv.c | |||
| @@ -376,11 +376,7 @@ void drm_dev_unplug(struct drm_device *dev) | |||
| 376 | synchronize_srcu(&drm_unplug_srcu); | 376 | synchronize_srcu(&drm_unplug_srcu); |
| 377 | 377 | ||
| 378 | drm_dev_unregister(dev); | 378 | drm_dev_unregister(dev); |
| 379 | 379 | drm_dev_put(dev); | |
| 380 | mutex_lock(&drm_global_mutex); | ||
| 381 | if (dev->open_count == 0) | ||
| 382 | drm_dev_put(dev); | ||
| 383 | mutex_unlock(&drm_global_mutex); | ||
| 384 | } | 380 | } |
| 385 | EXPORT_SYMBOL(drm_dev_unplug); | 381 | EXPORT_SYMBOL(drm_dev_unplug); |
| 386 | 382 | ||
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 0e9349ff2d16..af2ab640cadb 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c | |||
| @@ -1963,7 +1963,7 @@ static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper, | |||
| 1963 | best_depth = fmt->depth; | 1963 | best_depth = fmt->depth; |
| 1964 | } | 1964 | } |
| 1965 | } | 1965 | } |
| 1966 | if (sizes.surface_depth != best_depth) { | 1966 | if (sizes.surface_depth != best_depth && best_depth) { |
| 1967 | DRM_INFO("requested bpp %d, scaled depth down to %d", | 1967 | DRM_INFO("requested bpp %d, scaled depth down to %d", |
| 1968 | sizes.surface_bpp, best_depth); | 1968 | sizes.surface_bpp, best_depth); |
| 1969 | sizes.surface_depth = best_depth; | 1969 | sizes.surface_depth = best_depth; |
diff --git a/drivers/gpu/drm/drm_file.c b/drivers/gpu/drm/drm_file.c index 83a5bbca6e7e..7caa3c7ed978 100644 --- a/drivers/gpu/drm/drm_file.c +++ b/drivers/gpu/drm/drm_file.c | |||
| @@ -489,11 +489,9 @@ int drm_release(struct inode *inode, struct file *filp) | |||
| 489 | 489 | ||
| 490 | drm_close_helper(filp); | 490 | drm_close_helper(filp); |
| 491 | 491 | ||
| 492 | if (!--dev->open_count) { | 492 | if (!--dev->open_count) |
| 493 | drm_lastclose(dev); | 493 | drm_lastclose(dev); |
| 494 | if (drm_dev_is_unplugged(dev)) | 494 | |
| 495 | drm_put_dev(dev); | ||
| 496 | } | ||
| 497 | mutex_unlock(&drm_global_mutex); | 495 | mutex_unlock(&drm_global_mutex); |
| 498 | 496 | ||
| 499 | drm_minor_release(minor); | 497 | drm_minor_release(minor); |
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 0573eab0e190..f35e4ab55b27 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
| @@ -20,6 +20,7 @@ | |||
| 20 | #include "regs-vp.h" | 20 | #include "regs-vp.h" |
| 21 | 21 | ||
| 22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/ktime.h> | ||
| 23 | #include <linux/spinlock.h> | 24 | #include <linux/spinlock.h> |
| 24 | #include <linux/wait.h> | 25 | #include <linux/wait.h> |
| 25 | #include <linux/i2c.h> | 26 | #include <linux/i2c.h> |
| @@ -352,15 +353,62 @@ static void mixer_cfg_vp_blend(struct mixer_context *ctx, unsigned int alpha) | |||
| 352 | mixer_reg_write(ctx, MXR_VIDEO_CFG, val); | 353 | mixer_reg_write(ctx, MXR_VIDEO_CFG, val); |
| 353 | } | 354 | } |
| 354 | 355 | ||
| 355 | static void mixer_vsync_set_update(struct mixer_context *ctx, bool enable) | 356 | static bool mixer_is_synced(struct mixer_context *ctx) |
| 356 | { | 357 | { |
| 357 | /* block update on vsync */ | 358 | u32 base, shadow; |
| 358 | mixer_reg_writemask(ctx, MXR_STATUS, enable ? | ||
| 359 | MXR_STATUS_SYNC_ENABLE : 0, MXR_STATUS_SYNC_ENABLE); | ||
| 360 | 359 | ||
| 360 | if (ctx->mxr_ver == MXR_VER_16_0_33_0 || | ||
| 361 | ctx->mxr_ver == MXR_VER_128_0_0_184) | ||
| 362 | return !(mixer_reg_read(ctx, MXR_CFG) & | ||
| 363 | MXR_CFG_LAYER_UPDATE_COUNT_MASK); | ||
| 364 | |||
| 365 | if (test_bit(MXR_BIT_VP_ENABLED, &ctx->flags) && | ||
| 366 | vp_reg_read(ctx, VP_SHADOW_UPDATE)) | ||
| 367 | return false; | ||
| 368 | |||
| 369 | base = mixer_reg_read(ctx, MXR_CFG); | ||
| 370 | shadow = mixer_reg_read(ctx, MXR_CFG_S); | ||
| 371 | if (base != shadow) | ||
| 372 | return false; | ||
| 373 | |||
| 374 | base = mixer_reg_read(ctx, MXR_GRAPHIC_BASE(0)); | ||
| 375 | shadow = mixer_reg_read(ctx, MXR_GRAPHIC_BASE_S(0)); | ||
| 376 | if (base != shadow) | ||
| 377 | return false; | ||
| 378 | |||
| 379 | base = mixer_reg_read(ctx, MXR_GRAPHIC_BASE(1)); | ||
| 380 | shadow = mixer_reg_read(ctx, MXR_GRAPHIC_BASE_S(1)); | ||
| 381 | if (base != shadow) | ||
| 382 | return false; | ||
| 383 | |||
| 384 | return true; | ||
| 385 | } | ||
| 386 | |||
| 387 | static int mixer_wait_for_sync(struct mixer_context *ctx) | ||
| 388 | { | ||
| 389 | ktime_t timeout = ktime_add_us(ktime_get(), 100000); | ||
| 390 | |||
| 391 | while (!mixer_is_synced(ctx)) { | ||
| 392 | usleep_range(1000, 2000); | ||
| 393 | if (ktime_compare(ktime_get(), timeout) > 0) | ||
| 394 | return -ETIMEDOUT; | ||
| 395 | } | ||
| 396 | return 0; | ||
| 397 | } | ||
| 398 | |||
| 399 | static void mixer_disable_sync(struct mixer_context *ctx) | ||
| 400 | { | ||
| 401 | mixer_reg_writemask(ctx, MXR_STATUS, 0, MXR_STATUS_SYNC_ENABLE); | ||
| 402 | } | ||
| 403 | |||
| 404 | static void mixer_enable_sync(struct mixer_context *ctx) | ||
| 405 | { | ||
| 406 | if (ctx->mxr_ver == MXR_VER_16_0_33_0 || | ||
| 407 | ctx->mxr_ver == MXR_VER_128_0_0_184) | ||
| 408 | mixer_reg_writemask(ctx, MXR_CFG, ~0, MXR_CFG_LAYER_UPDATE); | ||
| 409 | mixer_reg_writemask(ctx, MXR_STATUS, ~0, MXR_STATUS_SYNC_ENABLE); | ||
| 361 | if (test_bit(MXR_BIT_VP_ENABLED, &ctx->flags)) | 410 | if (test_bit(MXR_BIT_VP_ENABLED, &ctx->flags)) |
| 362 | vp_reg_write(ctx, VP_SHADOW_UPDATE, enable ? | 411 | vp_reg_write(ctx, VP_SHADOW_UPDATE, VP_SHADOW_UPDATE_ENABLE); |
| 363 | VP_SHADOW_UPDATE_ENABLE : 0); | ||
| 364 | } | 412 | } |
| 365 | 413 | ||
| 366 | static void mixer_cfg_scan(struct mixer_context *ctx, int width, int height) | 414 | static void mixer_cfg_scan(struct mixer_context *ctx, int width, int height) |
| @@ -498,7 +546,6 @@ static void vp_video_buffer(struct mixer_context *ctx, | |||
| 498 | 546 | ||
| 499 | spin_lock_irqsave(&ctx->reg_slock, flags); | 547 | spin_lock_irqsave(&ctx->reg_slock, flags); |
| 500 | 548 | ||
| 501 | vp_reg_write(ctx, VP_SHADOW_UPDATE, 1); | ||
| 502 | /* interlace or progressive scan mode */ | 549 | /* interlace or progressive scan mode */ |
| 503 | val = (test_bit(MXR_BIT_INTERLACE, &ctx->flags) ? ~0 : 0); | 550 | val = (test_bit(MXR_BIT_INTERLACE, &ctx->flags) ? ~0 : 0); |
| 504 | vp_reg_writemask(ctx, VP_MODE, val, VP_MODE_LINE_SKIP); | 551 | vp_reg_writemask(ctx, VP_MODE, val, VP_MODE_LINE_SKIP); |
| @@ -553,11 +600,6 @@ static void vp_video_buffer(struct mixer_context *ctx, | |||
| 553 | vp_regs_dump(ctx); | 600 | vp_regs_dump(ctx); |
| 554 | } | 601 | } |
| 555 | 602 | ||
| 556 | static void mixer_layer_update(struct mixer_context *ctx) | ||
| 557 | { | ||
| 558 | mixer_reg_writemask(ctx, MXR_CFG, ~0, MXR_CFG_LAYER_UPDATE); | ||
| 559 | } | ||
| 560 | |||
| 561 | static void mixer_graph_buffer(struct mixer_context *ctx, | 603 | static void mixer_graph_buffer(struct mixer_context *ctx, |
| 562 | struct exynos_drm_plane *plane) | 604 | struct exynos_drm_plane *plane) |
| 563 | { | 605 | { |
| @@ -640,11 +682,6 @@ static void mixer_graph_buffer(struct mixer_context *ctx, | |||
| 640 | mixer_cfg_layer(ctx, win, priority, true); | 682 | mixer_cfg_layer(ctx, win, priority, true); |
| 641 | mixer_cfg_gfx_blend(ctx, win, pixel_alpha, state->base.alpha); | 683 | mixer_cfg_gfx_blend(ctx, win, pixel_alpha, state->base.alpha); |
| 642 | 684 | ||
| 643 | /* layer update mandatory for mixer 16.0.33.0 */ | ||
| 644 | if (ctx->mxr_ver == MXR_VER_16_0_33_0 || | ||
| 645 | ctx->mxr_ver == MXR_VER_128_0_0_184) | ||
| 646 | mixer_layer_update(ctx); | ||
| 647 | |||
| 648 | spin_unlock_irqrestore(&ctx->reg_slock, flags); | 685 | spin_unlock_irqrestore(&ctx->reg_slock, flags); |
| 649 | 686 | ||
| 650 | mixer_regs_dump(ctx); | 687 | mixer_regs_dump(ctx); |
| @@ -709,7 +746,7 @@ static void mixer_win_reset(struct mixer_context *ctx) | |||
| 709 | static irqreturn_t mixer_irq_handler(int irq, void *arg) | 746 | static irqreturn_t mixer_irq_handler(int irq, void *arg) |
| 710 | { | 747 | { |
| 711 | struct mixer_context *ctx = arg; | 748 | struct mixer_context *ctx = arg; |
| 712 | u32 val, base, shadow; | 749 | u32 val; |
| 713 | 750 | ||
| 714 | spin_lock(&ctx->reg_slock); | 751 | spin_lock(&ctx->reg_slock); |
| 715 | 752 | ||
| @@ -723,26 +760,9 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) | |||
| 723 | val &= ~MXR_INT_STATUS_VSYNC; | 760 | val &= ~MXR_INT_STATUS_VSYNC; |
| 724 | 761 | ||
| 725 | /* interlace scan need to check shadow register */ | 762 | /* interlace scan need to check shadow register */ |
| 726 | if (test_bit(MXR_BIT_INTERLACE, &ctx->flags)) { | 763 | if (test_bit(MXR_BIT_INTERLACE, &ctx->flags) |
| 727 | if (test_bit(MXR_BIT_VP_ENABLED, &ctx->flags) && | 764 | && !mixer_is_synced(ctx)) |
| 728 | vp_reg_read(ctx, VP_SHADOW_UPDATE)) | 765 | goto out; |
| 729 | goto out; | ||
| 730 | |||
| 731 | base = mixer_reg_read(ctx, MXR_CFG); | ||
| 732 | shadow = mixer_reg_read(ctx, MXR_CFG_S); | ||
| 733 | if (base != shadow) | ||
| 734 | goto out; | ||
| 735 | |||
| 736 | base = mixer_reg_read(ctx, MXR_GRAPHIC_BASE(0)); | ||
| 737 | shadow = mixer_reg_read(ctx, MXR_GRAPHIC_BASE_S(0)); | ||
| 738 | if (base != shadow) | ||
| 739 | goto out; | ||
| 740 | |||
| 741 | base = mixer_reg_read(ctx, MXR_GRAPHIC_BASE(1)); | ||
| 742 | shadow = mixer_reg_read(ctx, MXR_GRAPHIC_BASE_S(1)); | ||
| 743 | if (base != shadow) | ||
| 744 | goto out; | ||
| 745 | } | ||
| 746 | 766 | ||
| 747 | drm_crtc_handle_vblank(&ctx->crtc->base); | 767 | drm_crtc_handle_vblank(&ctx->crtc->base); |
| 748 | } | 768 | } |
| @@ -917,12 +937,14 @@ static void mixer_disable_vblank(struct exynos_drm_crtc *crtc) | |||
| 917 | 937 | ||
| 918 | static void mixer_atomic_begin(struct exynos_drm_crtc *crtc) | 938 | static void mixer_atomic_begin(struct exynos_drm_crtc *crtc) |
| 919 | { | 939 | { |
| 920 | struct mixer_context *mixer_ctx = crtc->ctx; | 940 | struct mixer_context *ctx = crtc->ctx; |
| 921 | 941 | ||
| 922 | if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) | 942 | if (!test_bit(MXR_BIT_POWERED, &ctx->flags)) |
| 923 | return; | 943 | return; |
| 924 | 944 | ||
| 925 | mixer_vsync_set_update(mixer_ctx, false); | 945 | if (mixer_wait_for_sync(ctx)) |
| 946 | dev_err(ctx->dev, "timeout waiting for VSYNC\n"); | ||
| 947 | mixer_disable_sync(ctx); | ||
| 926 | } | 948 | } |
| 927 | 949 | ||
| 928 | static void mixer_update_plane(struct exynos_drm_crtc *crtc, | 950 | static void mixer_update_plane(struct exynos_drm_crtc *crtc, |
| @@ -964,7 +986,7 @@ static void mixer_atomic_flush(struct exynos_drm_crtc *crtc) | |||
| 964 | if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) | 986 | if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) |
| 965 | return; | 987 | return; |
| 966 | 988 | ||
| 967 | mixer_vsync_set_update(mixer_ctx, true); | 989 | mixer_enable_sync(mixer_ctx); |
| 968 | exynos_crtc_handle_event(crtc); | 990 | exynos_crtc_handle_event(crtc); |
| 969 | } | 991 | } |
| 970 | 992 | ||
| @@ -979,7 +1001,7 @@ static void mixer_enable(struct exynos_drm_crtc *crtc) | |||
| 979 | 1001 | ||
| 980 | exynos_drm_pipe_clk_enable(crtc, true); | 1002 | exynos_drm_pipe_clk_enable(crtc, true); |
| 981 | 1003 | ||
| 982 | mixer_vsync_set_update(ctx, false); | 1004 | mixer_disable_sync(ctx); |
| 983 | 1005 | ||
| 984 | mixer_reg_writemask(ctx, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET); | 1006 | mixer_reg_writemask(ctx, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET); |
| 985 | 1007 | ||
| @@ -992,7 +1014,7 @@ static void mixer_enable(struct exynos_drm_crtc *crtc) | |||
| 992 | 1014 | ||
| 993 | mixer_commit(ctx); | 1015 | mixer_commit(ctx); |
| 994 | 1016 | ||
| 995 | mixer_vsync_set_update(ctx, true); | 1017 | mixer_enable_sync(ctx); |
| 996 | 1018 | ||
| 997 | set_bit(MXR_BIT_POWERED, &ctx->flags); | 1019 | set_bit(MXR_BIT_POWERED, &ctx->flags); |
| 998 | } | 1020 | } |
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c index 35b4ec3f7618..3592d04c33b2 100644 --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c | |||
| @@ -1441,7 +1441,7 @@ static inline int cmd_address_audit(struct parser_exec_state *s, | |||
| 1441 | } | 1441 | } |
| 1442 | 1442 | ||
| 1443 | if (index_mode) { | 1443 | if (index_mode) { |
| 1444 | if (guest_gma >= I915_GTT_PAGE_SIZE / sizeof(u64)) { | 1444 | if (guest_gma >= I915_GTT_PAGE_SIZE) { |
| 1445 | ret = -EFAULT; | 1445 | ret = -EFAULT; |
| 1446 | goto err; | 1446 | goto err; |
| 1447 | } | 1447 | } |
diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c index c7103dd2d8d5..d7052ab7908c 100644 --- a/drivers/gpu/drm/i915/gvt/gtt.c +++ b/drivers/gpu/drm/i915/gvt/gtt.c | |||
| @@ -1882,7 +1882,11 @@ struct intel_vgpu_mm *intel_vgpu_create_ppgtt_mm(struct intel_vgpu *vgpu, | |||
| 1882 | } | 1882 | } |
| 1883 | 1883 | ||
| 1884 | list_add_tail(&mm->ppgtt_mm.list, &vgpu->gtt.ppgtt_mm_list_head); | 1884 | list_add_tail(&mm->ppgtt_mm.list, &vgpu->gtt.ppgtt_mm_list_head); |
| 1885 | |||
| 1886 | mutex_lock(&gvt->gtt.ppgtt_mm_lock); | ||
| 1885 | list_add_tail(&mm->ppgtt_mm.lru_list, &gvt->gtt.ppgtt_mm_lru_list_head); | 1887 | list_add_tail(&mm->ppgtt_mm.lru_list, &gvt->gtt.ppgtt_mm_lru_list_head); |
| 1888 | mutex_unlock(&gvt->gtt.ppgtt_mm_lock); | ||
| 1889 | |||
| 1886 | return mm; | 1890 | return mm; |
| 1887 | } | 1891 | } |
| 1888 | 1892 | ||
| @@ -1967,9 +1971,10 @@ int intel_vgpu_pin_mm(struct intel_vgpu_mm *mm) | |||
| 1967 | if (ret) | 1971 | if (ret) |
| 1968 | return ret; | 1972 | return ret; |
| 1969 | 1973 | ||
| 1974 | mutex_lock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock); | ||
| 1970 | list_move_tail(&mm->ppgtt_mm.lru_list, | 1975 | list_move_tail(&mm->ppgtt_mm.lru_list, |
| 1971 | &mm->vgpu->gvt->gtt.ppgtt_mm_lru_list_head); | 1976 | &mm->vgpu->gvt->gtt.ppgtt_mm_lru_list_head); |
| 1972 | 1977 | mutex_unlock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock); | |
| 1973 | } | 1978 | } |
| 1974 | 1979 | ||
| 1975 | return 0; | 1980 | return 0; |
| @@ -1980,6 +1985,8 @@ static int reclaim_one_ppgtt_mm(struct intel_gvt *gvt) | |||
| 1980 | struct intel_vgpu_mm *mm; | 1985 | struct intel_vgpu_mm *mm; |
| 1981 | struct list_head *pos, *n; | 1986 | struct list_head *pos, *n; |
| 1982 | 1987 | ||
| 1988 | mutex_lock(&gvt->gtt.ppgtt_mm_lock); | ||
| 1989 | |||
| 1983 | list_for_each_safe(pos, n, &gvt->gtt.ppgtt_mm_lru_list_head) { | 1990 | list_for_each_safe(pos, n, &gvt->gtt.ppgtt_mm_lru_list_head) { |
| 1984 | mm = container_of(pos, struct intel_vgpu_mm, ppgtt_mm.lru_list); | 1991 | mm = container_of(pos, struct intel_vgpu_mm, ppgtt_mm.lru_list); |
| 1985 | 1992 | ||
| @@ -1987,9 +1994,11 @@ static int reclaim_one_ppgtt_mm(struct intel_gvt *gvt) | |||
| 1987 | continue; | 1994 | continue; |
| 1988 | 1995 | ||
| 1989 | list_del_init(&mm->ppgtt_mm.lru_list); | 1996 | list_del_init(&mm->ppgtt_mm.lru_list); |
| 1997 | mutex_unlock(&gvt->gtt.ppgtt_mm_lock); | ||
| 1990 | invalidate_ppgtt_mm(mm); | 1998 | invalidate_ppgtt_mm(mm); |
| 1991 | return 1; | 1999 | return 1; |
| 1992 | } | 2000 | } |
| 2001 | mutex_unlock(&gvt->gtt.ppgtt_mm_lock); | ||
| 1993 | return 0; | 2002 | return 0; |
| 1994 | } | 2003 | } |
| 1995 | 2004 | ||
| @@ -2659,6 +2668,7 @@ int intel_gvt_init_gtt(struct intel_gvt *gvt) | |||
| 2659 | } | 2668 | } |
| 2660 | } | 2669 | } |
| 2661 | INIT_LIST_HEAD(&gvt->gtt.ppgtt_mm_lru_list_head); | 2670 | INIT_LIST_HEAD(&gvt->gtt.ppgtt_mm_lru_list_head); |
| 2671 | mutex_init(&gvt->gtt.ppgtt_mm_lock); | ||
| 2662 | return 0; | 2672 | return 0; |
| 2663 | } | 2673 | } |
| 2664 | 2674 | ||
| @@ -2699,7 +2709,9 @@ void intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu) | |||
| 2699 | list_for_each_safe(pos, n, &vgpu->gtt.ppgtt_mm_list_head) { | 2709 | list_for_each_safe(pos, n, &vgpu->gtt.ppgtt_mm_list_head) { |
| 2700 | mm = container_of(pos, struct intel_vgpu_mm, ppgtt_mm.list); | 2710 | mm = container_of(pos, struct intel_vgpu_mm, ppgtt_mm.list); |
| 2701 | if (mm->type == INTEL_GVT_MM_PPGTT) { | 2711 | if (mm->type == INTEL_GVT_MM_PPGTT) { |
| 2712 | mutex_lock(&vgpu->gvt->gtt.ppgtt_mm_lock); | ||
| 2702 | list_del_init(&mm->ppgtt_mm.lru_list); | 2713 | list_del_init(&mm->ppgtt_mm.lru_list); |
| 2714 | mutex_unlock(&vgpu->gvt->gtt.ppgtt_mm_lock); | ||
| 2703 | if (mm->ppgtt_mm.shadowed) | 2715 | if (mm->ppgtt_mm.shadowed) |
| 2704 | invalidate_ppgtt_mm(mm); | 2716 | invalidate_ppgtt_mm(mm); |
| 2705 | } | 2717 | } |
diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h index d8cb04cc946d..edb610dc5d86 100644 --- a/drivers/gpu/drm/i915/gvt/gtt.h +++ b/drivers/gpu/drm/i915/gvt/gtt.h | |||
| @@ -88,6 +88,7 @@ struct intel_gvt_gtt { | |||
| 88 | void (*mm_free_page_table)(struct intel_vgpu_mm *mm); | 88 | void (*mm_free_page_table)(struct intel_vgpu_mm *mm); |
| 89 | struct list_head oos_page_use_list_head; | 89 | struct list_head oos_page_use_list_head; |
| 90 | struct list_head oos_page_free_list_head; | 90 | struct list_head oos_page_free_list_head; |
| 91 | struct mutex ppgtt_mm_lock; | ||
| 91 | struct list_head ppgtt_mm_lru_list_head; | 92 | struct list_head ppgtt_mm_lru_list_head; |
| 92 | 93 | ||
| 93 | struct page *scratch_page; | 94 | struct page *scratch_page; |
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c index 7d84cfb9051a..7902fb162d09 100644 --- a/drivers/gpu/drm/i915/gvt/mmio_context.c +++ b/drivers/gpu/drm/i915/gvt/mmio_context.c | |||
| @@ -132,6 +132,7 @@ static struct engine_mmio gen9_engine_mmio_list[] __cacheline_aligned = { | |||
| 132 | 132 | ||
| 133 | {RCS, GEN9_GAMT_ECO_REG_RW_IA, 0x0, false}, /* 0x4ab0 */ | 133 | {RCS, GEN9_GAMT_ECO_REG_RW_IA, 0x0, false}, /* 0x4ab0 */ |
| 134 | {RCS, GEN9_CSFE_CHICKEN1_RCS, 0xffff, false}, /* 0x20d4 */ | 134 | {RCS, GEN9_CSFE_CHICKEN1_RCS, 0xffff, false}, /* 0x20d4 */ |
| 135 | {RCS, _MMIO(0x20D8), 0xffff, true}, /* 0x20d8 */ | ||
| 135 | 136 | ||
| 136 | {RCS, GEN8_GARBCNTL, 0x0, false}, /* 0xb004 */ | 137 | {RCS, GEN8_GARBCNTL, 0x0, false}, /* 0xb004 */ |
| 137 | {RCS, GEN7_FF_THREAD_MODE, 0x0, false}, /* 0x20a0 */ | 138 | {RCS, GEN7_FF_THREAD_MODE, 0x0, false}, /* 0x20a0 */ |
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c index 1bb8f936fdaa..159192c097cc 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.c +++ b/drivers/gpu/drm/i915/gvt/scheduler.c | |||
| @@ -346,7 +346,7 @@ static int set_context_ppgtt_from_shadow(struct intel_vgpu_workload *workload, | |||
| 346 | int i = 0; | 346 | int i = 0; |
| 347 | 347 | ||
| 348 | if (mm->type != INTEL_GVT_MM_PPGTT || !mm->ppgtt_mm.shadowed) | 348 | if (mm->type != INTEL_GVT_MM_PPGTT || !mm->ppgtt_mm.shadowed) |
| 349 | return -1; | 349 | return -EINVAL; |
| 350 | 350 | ||
| 351 | if (mm->ppgtt_mm.root_entry_type == GTT_TYPE_PPGTT_ROOT_L4_ENTRY) { | 351 | if (mm->ppgtt_mm.root_entry_type == GTT_TYPE_PPGTT_ROOT_L4_ENTRY) { |
| 352 | px_dma(&ppgtt->pml4) = mm->ppgtt_mm.shadow_pdps[0]; | 352 | px_dma(&ppgtt->pml4) = mm->ppgtt_mm.shadow_pdps[0]; |
| @@ -410,12 +410,6 @@ int intel_gvt_scan_and_shadow_workload(struct intel_vgpu_workload *workload) | |||
| 410 | if (workload->shadow) | 410 | if (workload->shadow) |
| 411 | return 0; | 411 | return 0; |
| 412 | 412 | ||
| 413 | ret = set_context_ppgtt_from_shadow(workload, shadow_ctx); | ||
| 414 | if (ret < 0) { | ||
| 415 | gvt_vgpu_err("workload shadow ppgtt isn't ready\n"); | ||
| 416 | return ret; | ||
| 417 | } | ||
| 418 | |||
| 419 | /* pin shadow context by gvt even the shadow context will be pinned | 413 | /* pin shadow context by gvt even the shadow context will be pinned |
| 420 | * when i915 alloc request. That is because gvt will update the guest | 414 | * when i915 alloc request. That is because gvt will update the guest |
| 421 | * context from shadow context when workload is completed, and at that | 415 | * context from shadow context when workload is completed, and at that |
| @@ -678,6 +672,9 @@ static int dispatch_workload(struct intel_vgpu_workload *workload) | |||
| 678 | { | 672 | { |
| 679 | struct intel_vgpu *vgpu = workload->vgpu; | 673 | struct intel_vgpu *vgpu = workload->vgpu; |
| 680 | struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; | 674 | struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; |
| 675 | struct intel_vgpu_submission *s = &vgpu->submission; | ||
| 676 | struct i915_gem_context *shadow_ctx = s->shadow_ctx; | ||
| 677 | struct i915_request *rq; | ||
| 681 | int ring_id = workload->ring_id; | 678 | int ring_id = workload->ring_id; |
| 682 | int ret; | 679 | int ret; |
| 683 | 680 | ||
| @@ -687,6 +684,12 @@ static int dispatch_workload(struct intel_vgpu_workload *workload) | |||
| 687 | mutex_lock(&vgpu->vgpu_lock); | 684 | mutex_lock(&vgpu->vgpu_lock); |
| 688 | mutex_lock(&dev_priv->drm.struct_mutex); | 685 | mutex_lock(&dev_priv->drm.struct_mutex); |
| 689 | 686 | ||
| 687 | ret = set_context_ppgtt_from_shadow(workload, shadow_ctx); | ||
| 688 | if (ret < 0) { | ||
| 689 | gvt_vgpu_err("workload shadow ppgtt isn't ready\n"); | ||
| 690 | goto err_req; | ||
| 691 | } | ||
| 692 | |||
| 690 | ret = intel_gvt_workload_req_alloc(workload); | 693 | ret = intel_gvt_workload_req_alloc(workload); |
| 691 | if (ret) | 694 | if (ret) |
| 692 | goto err_req; | 695 | goto err_req; |
| @@ -703,6 +706,14 @@ static int dispatch_workload(struct intel_vgpu_workload *workload) | |||
| 703 | 706 | ||
| 704 | ret = prepare_workload(workload); | 707 | ret = prepare_workload(workload); |
| 705 | out: | 708 | out: |
| 709 | if (ret) { | ||
| 710 | /* We might still need to add request with | ||
| 711 | * clean ctx to retire it properly.. | ||
| 712 | */ | ||
| 713 | rq = fetch_and_zero(&workload->req); | ||
| 714 | i915_request_put(rq); | ||
| 715 | } | ||
| 716 | |||
| 706 | if (!IS_ERR_OR_NULL(workload->req)) { | 717 | if (!IS_ERR_OR_NULL(workload->req)) { |
| 707 | gvt_dbg_sched("ring id %d submit workload to i915 %p\n", | 718 | gvt_dbg_sched("ring id %d submit workload to i915 %p\n", |
| 708 | ring_id, workload->req); | 719 | ring_id, workload->req); |
| @@ -739,7 +750,8 @@ static struct intel_vgpu_workload *pick_next_workload( | |||
| 739 | goto out; | 750 | goto out; |
| 740 | } | 751 | } |
| 741 | 752 | ||
| 742 | if (list_empty(workload_q_head(scheduler->current_vgpu, ring_id))) | 753 | if (!scheduler->current_vgpu->active || |
| 754 | list_empty(workload_q_head(scheduler->current_vgpu, ring_id))) | ||
| 743 | goto out; | 755 | goto out; |
| 744 | 756 | ||
| 745 | /* | 757 | /* |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9adc7bb9e69c..a67a63b5aa84 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
| @@ -2346,7 +2346,8 @@ static inline unsigned int i915_sg_segment_size(void) | |||
| 2346 | INTEL_DEVID(dev_priv) == 0x5915 || \ | 2346 | INTEL_DEVID(dev_priv) == 0x5915 || \ |
| 2347 | INTEL_DEVID(dev_priv) == 0x591E) | 2347 | INTEL_DEVID(dev_priv) == 0x591E) |
| 2348 | #define IS_AML_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x591C || \ | 2348 | #define IS_AML_ULX(dev_priv) (INTEL_DEVID(dev_priv) == 0x591C || \ |
| 2349 | INTEL_DEVID(dev_priv) == 0x87C0) | 2349 | INTEL_DEVID(dev_priv) == 0x87C0 || \ |
| 2350 | INTEL_DEVID(dev_priv) == 0x87CA) | ||
| 2350 | #define IS_SKL_GT2(dev_priv) (IS_SKYLAKE(dev_priv) && \ | 2351 | #define IS_SKL_GT2(dev_priv) (IS_SKYLAKE(dev_priv) && \ |
| 2351 | INTEL_INFO(dev_priv)->gt == 2) | 2352 | INTEL_INFO(dev_priv)->gt == 2) |
| 2352 | #define IS_SKL_GT3(dev_priv) (IS_SKYLAKE(dev_priv) && \ | 2353 | #define IS_SKL_GT3(dev_priv) (IS_SKYLAKE(dev_priv) && \ |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 30d516e975c6..8558e81fdc2a 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
| @@ -1734,8 +1734,13 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data, | |||
| 1734 | * pages from. | 1734 | * pages from. |
| 1735 | */ | 1735 | */ |
| 1736 | if (!obj->base.filp) { | 1736 | if (!obj->base.filp) { |
| 1737 | i915_gem_object_put(obj); | 1737 | addr = -ENXIO; |
| 1738 | return -ENXIO; | 1738 | goto err; |
| 1739 | } | ||
| 1740 | |||
| 1741 | if (range_overflows(args->offset, args->size, (u64)obj->base.size)) { | ||
| 1742 | addr = -EINVAL; | ||
| 1743 | goto err; | ||
| 1739 | } | 1744 | } |
| 1740 | 1745 | ||
| 1741 | addr = vm_mmap(obj->base.filp, 0, args->size, | 1746 | addr = vm_mmap(obj->base.filp, 0, args->size, |
| @@ -1749,8 +1754,8 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data, | |||
| 1749 | struct vm_area_struct *vma; | 1754 | struct vm_area_struct *vma; |
| 1750 | 1755 | ||
| 1751 | if (down_write_killable(&mm->mmap_sem)) { | 1756 | if (down_write_killable(&mm->mmap_sem)) { |
| 1752 | i915_gem_object_put(obj); | 1757 | addr = -EINTR; |
| 1753 | return -EINTR; | 1758 | goto err; |
| 1754 | } | 1759 | } |
| 1755 | vma = find_vma(mm, addr); | 1760 | vma = find_vma(mm, addr); |
| 1756 | if (vma && __vma_matches(vma, obj->base.filp, addr, args->size)) | 1761 | if (vma && __vma_matches(vma, obj->base.filp, addr, args->size)) |
| @@ -1768,12 +1773,10 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data, | |||
| 1768 | i915_gem_object_put(obj); | 1773 | i915_gem_object_put(obj); |
| 1769 | 1774 | ||
| 1770 | args->addr_ptr = (u64)addr; | 1775 | args->addr_ptr = (u64)addr; |
| 1771 | |||
| 1772 | return 0; | 1776 | return 0; |
| 1773 | 1777 | ||
| 1774 | err: | 1778 | err: |
| 1775 | i915_gem_object_put(obj); | 1779 | i915_gem_object_put(obj); |
| 1776 | |||
| 1777 | return addr; | 1780 | return addr; |
| 1778 | } | 1781 | } |
| 1779 | 1782 | ||
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 9a65341fec09..aa6791255252 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c | |||
| @@ -1721,7 +1721,7 @@ error_msg(struct i915_gpu_state *error, unsigned long engines, const char *msg) | |||
| 1721 | i915_error_generate_code(error, engines)); | 1721 | i915_error_generate_code(error, engines)); |
| 1722 | if (engines) { | 1722 | if (engines) { |
| 1723 | /* Just show the first executing process, more is confusing */ | 1723 | /* Just show the first executing process, more is confusing */ |
| 1724 | i = ffs(engines); | 1724 | i = __ffs(engines); |
| 1725 | len += scnprintf(error->error_msg + len, | 1725 | len += scnprintf(error->error_msg + len, |
| 1726 | sizeof(error->error_msg) - len, | 1726 | sizeof(error->error_msg) - len, |
| 1727 | ", in %s [%d]", | 1727 | ", in %s [%d]", |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 638a586469f9..047855dd8c6b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
| @@ -2863,7 +2863,7 @@ enum i915_power_well_id { | |||
| 2863 | #define GEN11_GT_VEBOX_VDBOX_DISABLE _MMIO(0x9140) | 2863 | #define GEN11_GT_VEBOX_VDBOX_DISABLE _MMIO(0x9140) |
| 2864 | #define GEN11_GT_VDBOX_DISABLE_MASK 0xff | 2864 | #define GEN11_GT_VDBOX_DISABLE_MASK 0xff |
| 2865 | #define GEN11_GT_VEBOX_DISABLE_SHIFT 16 | 2865 | #define GEN11_GT_VEBOX_DISABLE_SHIFT 16 |
| 2866 | #define GEN11_GT_VEBOX_DISABLE_MASK (0xff << GEN11_GT_VEBOX_DISABLE_SHIFT) | 2866 | #define GEN11_GT_VEBOX_DISABLE_MASK (0x0f << GEN11_GT_VEBOX_DISABLE_SHIFT) |
| 2867 | 2867 | ||
| 2868 | #define GEN11_EU_DISABLE _MMIO(0x9134) | 2868 | #define GEN11_EU_DISABLE _MMIO(0x9134) |
| 2869 | #define GEN11_EU_DIS_MASK 0xFF | 2869 | #define GEN11_EU_DIS_MASK 0xFF |
| @@ -9243,7 +9243,7 @@ enum skl_power_gate { | |||
| 9243 | #define TRANS_DDI_FUNC_CTL2(tran) _MMIO_TRANS2(tran, \ | 9243 | #define TRANS_DDI_FUNC_CTL2(tran) _MMIO_TRANS2(tran, \ |
| 9244 | _TRANS_DDI_FUNC_CTL2_A) | 9244 | _TRANS_DDI_FUNC_CTL2_A) |
| 9245 | #define PORT_SYNC_MODE_ENABLE (1 << 4) | 9245 | #define PORT_SYNC_MODE_ENABLE (1 << 4) |
| 9246 | #define PORT_SYNC_MODE_MASTER_SELECT(x) ((x) < 0) | 9246 | #define PORT_SYNC_MODE_MASTER_SELECT(x) ((x) << 0) |
| 9247 | #define PORT_SYNC_MODE_MASTER_SELECT_MASK (0x7 << 0) | 9247 | #define PORT_SYNC_MODE_MASTER_SELECT_MASK (0x7 << 0) |
| 9248 | #define PORT_SYNC_MODE_MASTER_SELECT_SHIFT 0 | 9248 | #define PORT_SYNC_MODE_MASTER_SELECT_SHIFT 0 |
| 9249 | 9249 | ||
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index b508d8a735e0..4364f42cac6b 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c | |||
| @@ -1673,6 +1673,7 @@ init_vbt_missing_defaults(struct drm_i915_private *dev_priv) | |||
| 1673 | info->supports_dvi = (port != PORT_A && port != PORT_E); | 1673 | info->supports_dvi = (port != PORT_A && port != PORT_E); |
| 1674 | info->supports_hdmi = info->supports_dvi; | 1674 | info->supports_hdmi = info->supports_dvi; |
| 1675 | info->supports_dp = (port != PORT_E); | 1675 | info->supports_dp = (port != PORT_E); |
| 1676 | info->supports_edp = (port == PORT_A); | ||
| 1676 | } | 1677 | } |
| 1677 | } | 1678 | } |
| 1678 | 1679 | ||
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c index 32dce7176f63..b9b0ea4e2404 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c | |||
| @@ -455,7 +455,7 @@ static int igt_evict_contexts(void *arg) | |||
| 455 | struct i915_gem_context *ctx; | 455 | struct i915_gem_context *ctx; |
| 456 | 456 | ||
| 457 | ctx = live_context(i915, file); | 457 | ctx = live_context(i915, file); |
| 458 | if (!ctx) | 458 | if (IS_ERR(ctx)) |
| 459 | break; | 459 | break; |
| 460 | 460 | ||
| 461 | /* We will need some GGTT space for the rq's context */ | 461 | /* We will need some GGTT space for the rq's context */ |
diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c index 2281ed3eb774..8a4ebcb6405c 100644 --- a/drivers/gpu/drm/meson/meson_drv.c +++ b/drivers/gpu/drm/meson/meson_drv.c | |||
| @@ -337,12 +337,14 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) | |||
| 337 | 337 | ||
| 338 | ret = drm_dev_register(drm, 0); | 338 | ret = drm_dev_register(drm, 0); |
| 339 | if (ret) | 339 | if (ret) |
| 340 | goto free_drm; | 340 | goto uninstall_irq; |
| 341 | 341 | ||
| 342 | drm_fbdev_generic_setup(drm, 32); | 342 | drm_fbdev_generic_setup(drm, 32); |
| 343 | 343 | ||
| 344 | return 0; | 344 | return 0; |
| 345 | 345 | ||
| 346 | uninstall_irq: | ||
| 347 | drm_irq_uninstall(drm); | ||
| 346 | free_drm: | 348 | free_drm: |
| 347 | drm_dev_put(drm); | 349 | drm_dev_put(drm); |
| 348 | 350 | ||
| @@ -356,8 +358,8 @@ static int meson_drv_bind(struct device *dev) | |||
| 356 | 358 | ||
| 357 | static void meson_drv_unbind(struct device *dev) | 359 | static void meson_drv_unbind(struct device *dev) |
| 358 | { | 360 | { |
| 359 | struct drm_device *drm = dev_get_drvdata(dev); | 361 | struct meson_drm *priv = dev_get_drvdata(dev); |
| 360 | struct meson_drm *priv = drm->dev_private; | 362 | struct drm_device *drm = priv->drm; |
| 361 | 363 | ||
| 362 | if (priv->canvas) { | 364 | if (priv->canvas) { |
| 363 | meson_canvas_free(priv->canvas, priv->canvas_id_osd1); | 365 | meson_canvas_free(priv->canvas, priv->canvas_id_osd1); |
| @@ -367,6 +369,7 @@ static void meson_drv_unbind(struct device *dev) | |||
| 367 | } | 369 | } |
| 368 | 370 | ||
| 369 | drm_dev_unregister(drm); | 371 | drm_dev_unregister(drm); |
| 372 | drm_irq_uninstall(drm); | ||
| 370 | drm_kms_helper_poll_fini(drm); | 373 | drm_kms_helper_poll_fini(drm); |
| 371 | drm_mode_config_cleanup(drm); | 374 | drm_mode_config_cleanup(drm); |
| 372 | drm_dev_put(drm); | 375 | drm_dev_put(drm); |
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c index e28814f4ea6c..563953ec6ad0 100644 --- a/drivers/gpu/drm/meson/meson_dw_hdmi.c +++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c | |||
| @@ -569,7 +569,8 @@ dw_hdmi_mode_valid(struct drm_connector *connector, | |||
| 569 | DRM_DEBUG_DRIVER("Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); | 569 | DRM_DEBUG_DRIVER("Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); |
| 570 | 570 | ||
| 571 | /* If sink max TMDS clock, we reject the mode */ | 571 | /* If sink max TMDS clock, we reject the mode */ |
| 572 | if (mode->clock > connector->display_info.max_tmds_clock) | 572 | if (connector->display_info.max_tmds_clock && |
| 573 | mode->clock > connector->display_info.max_tmds_clock) | ||
| 573 | return MODE_BAD; | 574 | return MODE_BAD; |
| 574 | 575 | ||
| 575 | /* Check against non-VIC supported modes */ | 576 | /* Check against non-VIC supported modes */ |
diff --git a/drivers/gpu/drm/nouveau/nouveau_debugfs.c b/drivers/gpu/drm/nouveau/nouveau_debugfs.c index 88a52f6b39fe..7dfbbbc1beea 100644 --- a/drivers/gpu/drm/nouveau/nouveau_debugfs.c +++ b/drivers/gpu/drm/nouveau/nouveau_debugfs.c | |||
| @@ -181,7 +181,7 @@ nouveau_debugfs_pstate_set(struct file *file, const char __user *ubuf, | |||
| 181 | } | 181 | } |
| 182 | 182 | ||
| 183 | ret = pm_runtime_get_sync(drm->dev); | 183 | ret = pm_runtime_get_sync(drm->dev); |
| 184 | if (IS_ERR_VALUE(ret) && ret != -EACCES) | 184 | if (ret < 0 && ret != -EACCES) |
| 185 | return ret; | 185 | return ret; |
| 186 | ret = nvif_mthd(ctrl, NVIF_CONTROL_PSTATE_USER, &args, sizeof(args)); | 186 | ret = nvif_mthd(ctrl, NVIF_CONTROL_PSTATE_USER, &args, sizeof(args)); |
| 187 | pm_runtime_put_autosuspend(drm->dev); | 187 | pm_runtime_put_autosuspend(drm->dev); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_dmem.c b/drivers/gpu/drm/nouveau/nouveau_dmem.c index aa9fec80492d..40c47d6a7d78 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dmem.c +++ b/drivers/gpu/drm/nouveau/nouveau_dmem.c | |||
| @@ -100,12 +100,10 @@ static void | |||
| 100 | nouveau_dmem_free(struct hmm_devmem *devmem, struct page *page) | 100 | nouveau_dmem_free(struct hmm_devmem *devmem, struct page *page) |
| 101 | { | 101 | { |
| 102 | struct nouveau_dmem_chunk *chunk; | 102 | struct nouveau_dmem_chunk *chunk; |
| 103 | struct nouveau_drm *drm; | ||
| 104 | unsigned long idx; | 103 | unsigned long idx; |
| 105 | 104 | ||
| 106 | chunk = (void *)hmm_devmem_page_get_drvdata(page); | 105 | chunk = (void *)hmm_devmem_page_get_drvdata(page); |
| 107 | idx = page_to_pfn(page) - chunk->pfn_first; | 106 | idx = page_to_pfn(page) - chunk->pfn_first; |
| 108 | drm = chunk->drm; | ||
| 109 | 107 | ||
| 110 | /* | 108 | /* |
| 111 | * FIXME: | 109 | * FIXME: |
| @@ -456,11 +454,6 @@ nouveau_dmem_resume(struct nouveau_drm *drm) | |||
| 456 | /* FIXME handle pin failure */ | 454 | /* FIXME handle pin failure */ |
| 457 | WARN_ON(ret); | 455 | WARN_ON(ret); |
| 458 | } | 456 | } |
| 459 | list_for_each_entry (chunk, &drm->dmem->chunk_empty, list) { | ||
| 460 | ret = nouveau_bo_pin(chunk->bo, TTM_PL_FLAG_VRAM, false); | ||
| 461 | /* FIXME handle pin failure */ | ||
| 462 | WARN_ON(ret); | ||
| 463 | } | ||
| 464 | mutex_unlock(&drm->dmem->mutex); | 457 | mutex_unlock(&drm->dmem->mutex); |
| 465 | } | 458 | } |
| 466 | 459 | ||
| @@ -479,9 +472,6 @@ nouveau_dmem_suspend(struct nouveau_drm *drm) | |||
| 479 | list_for_each_entry (chunk, &drm->dmem->chunk_full, list) { | 472 | list_for_each_entry (chunk, &drm->dmem->chunk_full, list) { |
| 480 | nouveau_bo_unpin(chunk->bo); | 473 | nouveau_bo_unpin(chunk->bo); |
| 481 | } | 474 | } |
| 482 | list_for_each_entry (chunk, &drm->dmem->chunk_empty, list) { | ||
| 483 | nouveau_bo_unpin(chunk->bo); | ||
| 484 | } | ||
| 485 | mutex_unlock(&drm->dmem->mutex); | 475 | mutex_unlock(&drm->dmem->mutex); |
| 486 | } | 476 | } |
| 487 | 477 | ||
| @@ -623,7 +613,7 @@ nouveau_dmem_init(struct nouveau_drm *drm) | |||
| 623 | */ | 613 | */ |
| 624 | drm->dmem->devmem = hmm_devmem_add(&nouveau_dmem_devmem_ops, | 614 | drm->dmem->devmem = hmm_devmem_add(&nouveau_dmem_devmem_ops, |
| 625 | device, size); | 615 | device, size); |
| 626 | if (drm->dmem->devmem == NULL) { | 616 | if (IS_ERR(drm->dmem->devmem)) { |
| 627 | kfree(drm->dmem); | 617 | kfree(drm->dmem); |
| 628 | drm->dmem = NULL; | 618 | drm->dmem = NULL; |
| 629 | return; | 619 | return; |
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index c7d4c6073ea5..0d4ade9d4722 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c | |||
| @@ -541,6 +541,18 @@ static void vop_core_clks_disable(struct vop *vop) | |||
| 541 | clk_disable(vop->hclk); | 541 | clk_disable(vop->hclk); |
| 542 | } | 542 | } |
| 543 | 543 | ||
| 544 | static void vop_win_disable(struct vop *vop, const struct vop_win_data *win) | ||
| 545 | { | ||
| 546 | if (win->phy->scl && win->phy->scl->ext) { | ||
| 547 | VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, SCALE_NONE); | ||
| 548 | VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, SCALE_NONE); | ||
| 549 | VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, SCALE_NONE); | ||
| 550 | VOP_SCL_SET_EXT(vop, win, cbcr_ver_scl_mode, SCALE_NONE); | ||
| 551 | } | ||
| 552 | |||
| 553 | VOP_WIN_SET(vop, win, enable, 0); | ||
| 554 | } | ||
| 555 | |||
| 544 | static int vop_enable(struct drm_crtc *crtc) | 556 | static int vop_enable(struct drm_crtc *crtc) |
| 545 | { | 557 | { |
| 546 | struct vop *vop = to_vop(crtc); | 558 | struct vop *vop = to_vop(crtc); |
| @@ -586,7 +598,7 @@ static int vop_enable(struct drm_crtc *crtc) | |||
| 586 | struct vop_win *vop_win = &vop->win[i]; | 598 | struct vop_win *vop_win = &vop->win[i]; |
| 587 | const struct vop_win_data *win = vop_win->data; | 599 | const struct vop_win_data *win = vop_win->data; |
| 588 | 600 | ||
| 589 | VOP_WIN_SET(vop, win, enable, 0); | 601 | vop_win_disable(vop, win); |
| 590 | } | 602 | } |
| 591 | spin_unlock(&vop->reg_lock); | 603 | spin_unlock(&vop->reg_lock); |
| 592 | 604 | ||
| @@ -735,7 +747,7 @@ static void vop_plane_atomic_disable(struct drm_plane *plane, | |||
| 735 | 747 | ||
| 736 | spin_lock(&vop->reg_lock); | 748 | spin_lock(&vop->reg_lock); |
| 737 | 749 | ||
| 738 | VOP_WIN_SET(vop, win, enable, 0); | 750 | vop_win_disable(vop, win); |
| 739 | 751 | ||
| 740 | spin_unlock(&vop->reg_lock); | 752 | spin_unlock(&vop->reg_lock); |
| 741 | } | 753 | } |
| @@ -1622,7 +1634,7 @@ static int vop_initial(struct vop *vop) | |||
| 1622 | int channel = i * 2 + 1; | 1634 | int channel = i * 2 + 1; |
| 1623 | 1635 | ||
| 1624 | VOP_WIN_SET(vop, win, channel, (channel + 1) << 4 | channel); | 1636 | VOP_WIN_SET(vop, win, channel, (channel + 1) << 4 | channel); |
| 1625 | VOP_WIN_SET(vop, win, enable, 0); | 1637 | vop_win_disable(vop, win); |
| 1626 | VOP_WIN_SET(vop, win, gate, 1); | 1638 | VOP_WIN_SET(vop, win, gate, 1); |
| 1627 | } | 1639 | } |
| 1628 | 1640 | ||
diff --git a/drivers/gpu/drm/tegra/hub.c b/drivers/gpu/drm/tegra/hub.c index ba9b3cfb8c3d..b3436c2aed68 100644 --- a/drivers/gpu/drm/tegra/hub.c +++ b/drivers/gpu/drm/tegra/hub.c | |||
| @@ -378,14 +378,16 @@ static int tegra_shared_plane_atomic_check(struct drm_plane *plane, | |||
| 378 | static void tegra_shared_plane_atomic_disable(struct drm_plane *plane, | 378 | static void tegra_shared_plane_atomic_disable(struct drm_plane *plane, |
| 379 | struct drm_plane_state *old_state) | 379 | struct drm_plane_state *old_state) |
| 380 | { | 380 | { |
| 381 | struct tegra_dc *dc = to_tegra_dc(old_state->crtc); | ||
| 382 | struct tegra_plane *p = to_tegra_plane(plane); | 381 | struct tegra_plane *p = to_tegra_plane(plane); |
| 382 | struct tegra_dc *dc; | ||
| 383 | u32 value; | 383 | u32 value; |
| 384 | 384 | ||
| 385 | /* rien ne va plus */ | 385 | /* rien ne va plus */ |
| 386 | if (!old_state || !old_state->crtc) | 386 | if (!old_state || !old_state->crtc) |
| 387 | return; | 387 | return; |
| 388 | 388 | ||
| 389 | dc = to_tegra_dc(old_state->crtc); | ||
| 390 | |||
| 389 | /* | 391 | /* |
| 390 | * XXX Legacy helpers seem to sometimes call ->atomic_disable() even | 392 | * XXX Legacy helpers seem to sometimes call ->atomic_disable() even |
| 391 | * on planes that are already disabled. Make sure we fallback to the | 393 | * on planes that are already disabled. Make sure we fallback to the |
diff --git a/drivers/gpu/drm/tegra/vic.c b/drivers/gpu/drm/tegra/vic.c index 39bfed9623de..982ce37ecde1 100644 --- a/drivers/gpu/drm/tegra/vic.c +++ b/drivers/gpu/drm/tegra/vic.c | |||
| @@ -106,6 +106,7 @@ static int vic_boot(struct vic *vic) | |||
| 106 | if (vic->booted) | 106 | if (vic->booted) |
| 107 | return 0; | 107 | return 0; |
| 108 | 108 | ||
| 109 | #ifdef CONFIG_IOMMU_API | ||
| 109 | if (vic->config->supports_sid) { | 110 | if (vic->config->supports_sid) { |
| 110 | struct iommu_fwspec *spec = dev_iommu_fwspec_get(vic->dev); | 111 | struct iommu_fwspec *spec = dev_iommu_fwspec_get(vic->dev); |
| 111 | u32 value; | 112 | u32 value; |
| @@ -121,6 +122,7 @@ static int vic_boot(struct vic *vic) | |||
| 121 | vic_writel(vic, value, VIC_THI_STREAMID1); | 122 | vic_writel(vic, value, VIC_THI_STREAMID1); |
| 122 | } | 123 | } |
| 123 | } | 124 | } |
| 125 | #endif | ||
| 124 | 126 | ||
| 125 | /* setup clockgating registers */ | 127 | /* setup clockgating registers */ |
| 126 | vic_writel(vic, CG_IDLE_CG_DLY_CNT(4) | | 128 | vic_writel(vic, CG_IDLE_CG_DLY_CNT(4) | |
diff --git a/drivers/gpu/drm/udl/udl_connector.c b/drivers/gpu/drm/udl/udl_connector.c index 66885c24590f..c1bd5e3d9e4a 100644 --- a/drivers/gpu/drm/udl/udl_connector.c +++ b/drivers/gpu/drm/udl/udl_connector.c | |||
| @@ -18,18 +18,19 @@ | |||
| 18 | #include "udl_connector.h" | 18 | #include "udl_connector.h" |
| 19 | #include "udl_drv.h" | 19 | #include "udl_drv.h" |
| 20 | 20 | ||
| 21 | static bool udl_get_edid_block(struct udl_device *udl, int block_idx, | 21 | static int udl_get_edid_block(void *data, u8 *buf, unsigned int block, |
| 22 | u8 *buff) | 22 | size_t len) |
| 23 | { | 23 | { |
| 24 | int ret, i; | 24 | int ret, i; |
| 25 | u8 *read_buff; | 25 | u8 *read_buff; |
| 26 | struct udl_device *udl = data; | ||
| 26 | 27 | ||
| 27 | read_buff = kmalloc(2, GFP_KERNEL); | 28 | read_buff = kmalloc(2, GFP_KERNEL); |
| 28 | if (!read_buff) | 29 | if (!read_buff) |
| 29 | return false; | 30 | return -1; |
| 30 | 31 | ||
| 31 | for (i = 0; i < EDID_LENGTH; i++) { | 32 | for (i = 0; i < len; i++) { |
| 32 | int bval = (i + block_idx * EDID_LENGTH) << 8; | 33 | int bval = (i + block * EDID_LENGTH) << 8; |
| 33 | ret = usb_control_msg(udl->udev, | 34 | ret = usb_control_msg(udl->udev, |
| 34 | usb_rcvctrlpipe(udl->udev, 0), | 35 | usb_rcvctrlpipe(udl->udev, 0), |
| 35 | (0x02), (0x80 | (0x02 << 5)), bval, | 36 | (0x02), (0x80 | (0x02 << 5)), bval, |
| @@ -37,60 +38,13 @@ static bool udl_get_edid_block(struct udl_device *udl, int block_idx, | |||
| 37 | if (ret < 1) { | 38 | if (ret < 1) { |
| 38 | DRM_ERROR("Read EDID byte %d failed err %x\n", i, ret); | 39 | DRM_ERROR("Read EDID byte %d failed err %x\n", i, ret); |
| 39 | kfree(read_buff); | 40 | kfree(read_buff); |
| 40 | return false; | 41 | return -1; |
| 41 | } | 42 | } |
| 42 | buff[i] = read_buff[1]; | 43 | buf[i] = read_buff[1]; |
| 43 | } | 44 | } |
| 44 | 45 | ||
| 45 | kfree(read_buff); | 46 | kfree(read_buff); |
| 46 | return true; | 47 | return 0; |
| 47 | } | ||
| 48 | |||
| 49 | static bool udl_get_edid(struct udl_device *udl, u8 **result_buff, | ||
| 50 | int *result_buff_size) | ||
| 51 | { | ||
| 52 | int i, extensions; | ||
| 53 | u8 *block_buff = NULL, *buff_ptr; | ||
| 54 | |||
| 55 | block_buff = kmalloc(EDID_LENGTH, GFP_KERNEL); | ||
| 56 | if (block_buff == NULL) | ||
| 57 | return false; | ||
| 58 | |||
| 59 | if (udl_get_edid_block(udl, 0, block_buff) && | ||
| 60 | memchr_inv(block_buff, 0, EDID_LENGTH)) { | ||
| 61 | extensions = ((struct edid *)block_buff)->extensions; | ||
| 62 | if (extensions > 0) { | ||
| 63 | /* we have to read all extensions one by one */ | ||
| 64 | *result_buff_size = EDID_LENGTH * (extensions + 1); | ||
| 65 | *result_buff = kmalloc(*result_buff_size, GFP_KERNEL); | ||
| 66 | buff_ptr = *result_buff; | ||
| 67 | if (buff_ptr == NULL) { | ||
| 68 | kfree(block_buff); | ||
| 69 | return false; | ||
| 70 | } | ||
| 71 | memcpy(buff_ptr, block_buff, EDID_LENGTH); | ||
| 72 | kfree(block_buff); | ||
| 73 | buff_ptr += EDID_LENGTH; | ||
| 74 | for (i = 1; i < extensions; ++i) { | ||
| 75 | if (udl_get_edid_block(udl, i, buff_ptr)) { | ||
| 76 | buff_ptr += EDID_LENGTH; | ||
| 77 | } else { | ||
| 78 | kfree(*result_buff); | ||
| 79 | *result_buff = NULL; | ||
| 80 | return false; | ||
| 81 | } | ||
| 82 | } | ||
| 83 | return true; | ||
| 84 | } | ||
| 85 | /* we have only base edid block */ | ||
| 86 | *result_buff = block_buff; | ||
| 87 | *result_buff_size = EDID_LENGTH; | ||
| 88 | return true; | ||
| 89 | } | ||
| 90 | |||
| 91 | kfree(block_buff); | ||
| 92 | |||
| 93 | return false; | ||
| 94 | } | 48 | } |
| 95 | 49 | ||
| 96 | static int udl_get_modes(struct drm_connector *connector) | 50 | static int udl_get_modes(struct drm_connector *connector) |
| @@ -122,8 +76,6 @@ static enum drm_mode_status udl_mode_valid(struct drm_connector *connector, | |||
| 122 | static enum drm_connector_status | 76 | static enum drm_connector_status |
| 123 | udl_detect(struct drm_connector *connector, bool force) | 77 | udl_detect(struct drm_connector *connector, bool force) |
| 124 | { | 78 | { |
| 125 | u8 *edid_buff = NULL; | ||
| 126 | int edid_buff_size = 0; | ||
| 127 | struct udl_device *udl = connector->dev->dev_private; | 79 | struct udl_device *udl = connector->dev->dev_private; |
| 128 | struct udl_drm_connector *udl_connector = | 80 | struct udl_drm_connector *udl_connector = |
| 129 | container_of(connector, | 81 | container_of(connector, |
| @@ -136,12 +88,10 @@ udl_detect(struct drm_connector *connector, bool force) | |||
| 136 | udl_connector->edid = NULL; | 88 | udl_connector->edid = NULL; |
| 137 | } | 89 | } |
| 138 | 90 | ||
| 139 | 91 | udl_connector->edid = drm_do_get_edid(connector, udl_get_edid_block, udl); | |
| 140 | if (!udl_get_edid(udl, &edid_buff, &edid_buff_size)) | 92 | if (!udl_connector->edid) |
| 141 | return connector_status_disconnected; | 93 | return connector_status_disconnected; |
| 142 | 94 | ||
| 143 | udl_connector->edid = (struct edid *)edid_buff; | ||
| 144 | |||
| 145 | return connector_status_connected; | 95 | return connector_status_connected; |
| 146 | } | 96 | } |
| 147 | 97 | ||
diff --git a/drivers/gpu/drm/udl/udl_gem.c b/drivers/gpu/drm/udl/udl_gem.c index d5a23295dd80..bb7b58407039 100644 --- a/drivers/gpu/drm/udl/udl_gem.c +++ b/drivers/gpu/drm/udl/udl_gem.c | |||
| @@ -224,7 +224,7 @@ int udl_gem_mmap(struct drm_file *file, struct drm_device *dev, | |||
| 224 | *offset = drm_vma_node_offset_addr(&gobj->base.vma_node); | 224 | *offset = drm_vma_node_offset_addr(&gobj->base.vma_node); |
| 225 | 225 | ||
| 226 | out: | 226 | out: |
| 227 | drm_gem_object_put(&gobj->base); | 227 | drm_gem_object_put_unlocked(&gobj->base); |
| 228 | unlock: | 228 | unlock: |
| 229 | mutex_unlock(&udl->gem_lock); | 229 | mutex_unlock(&udl->gem_lock); |
| 230 | return ret; | 230 | return ret; |
diff --git a/drivers/gpu/drm/vgem/vgem_drv.c b/drivers/gpu/drm/vgem/vgem_drv.c index 5930facd6d2d..11a8f99ba18c 100644 --- a/drivers/gpu/drm/vgem/vgem_drv.c +++ b/drivers/gpu/drm/vgem/vgem_drv.c | |||
| @@ -191,13 +191,9 @@ static struct drm_gem_object *vgem_gem_create(struct drm_device *dev, | |||
| 191 | ret = drm_gem_handle_create(file, &obj->base, handle); | 191 | ret = drm_gem_handle_create(file, &obj->base, handle); |
| 192 | drm_gem_object_put_unlocked(&obj->base); | 192 | drm_gem_object_put_unlocked(&obj->base); |
| 193 | if (ret) | 193 | if (ret) |
| 194 | goto err; | 194 | return ERR_PTR(ret); |
| 195 | 195 | ||
| 196 | return &obj->base; | 196 | return &obj->base; |
| 197 | |||
| 198 | err: | ||
| 199 | __vgem_gem_destroy(obj); | ||
| 200 | return ERR_PTR(ret); | ||
| 201 | } | 197 | } |
| 202 | 198 | ||
| 203 | static int vgem_gem_dumb_create(struct drm_file *file, struct drm_device *dev, | 199 | static int vgem_gem_dumb_create(struct drm_file *file, struct drm_device *dev, |
diff --git a/drivers/gpu/drm/vkms/vkms_gem.c b/drivers/gpu/drm/vkms/vkms_gem.c index 138b0bb325cf..69048e73377d 100644 --- a/drivers/gpu/drm/vkms/vkms_gem.c +++ b/drivers/gpu/drm/vkms/vkms_gem.c | |||
| @@ -111,11 +111,8 @@ struct drm_gem_object *vkms_gem_create(struct drm_device *dev, | |||
| 111 | 111 | ||
| 112 | ret = drm_gem_handle_create(file, &obj->gem, handle); | 112 | ret = drm_gem_handle_create(file, &obj->gem, handle); |
| 113 | drm_gem_object_put_unlocked(&obj->gem); | 113 | drm_gem_object_put_unlocked(&obj->gem); |
| 114 | if (ret) { | 114 | if (ret) |
| 115 | drm_gem_object_release(&obj->gem); | ||
| 116 | kfree(obj); | ||
| 117 | return ERR_PTR(ret); | 115 | return ERR_PTR(ret); |
| 118 | } | ||
| 119 | 116 | ||
| 120 | return &obj->gem; | 117 | return &obj->gem; |
| 121 | } | 118 | } |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c index b913a56f3426..2a9112515f46 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | |||
| @@ -564,11 +564,9 @@ static int vmw_fb_set_par(struct fb_info *info) | |||
| 564 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | 564 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| 565 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) | 565 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) |
| 566 | }; | 566 | }; |
| 567 | struct drm_display_mode *old_mode; | ||
| 568 | struct drm_display_mode *mode; | 567 | struct drm_display_mode *mode; |
| 569 | int ret; | 568 | int ret; |
| 570 | 569 | ||
| 571 | old_mode = par->set_mode; | ||
| 572 | mode = drm_mode_duplicate(vmw_priv->dev, &new_mode); | 570 | mode = drm_mode_duplicate(vmw_priv->dev, &new_mode); |
| 573 | if (!mode) { | 571 | if (!mode) { |
| 574 | DRM_ERROR("Could not create new fb mode.\n"); | 572 | DRM_ERROR("Could not create new fb mode.\n"); |
| @@ -579,11 +577,7 @@ static int vmw_fb_set_par(struct fb_info *info) | |||
| 579 | mode->vdisplay = var->yres; | 577 | mode->vdisplay = var->yres; |
| 580 | vmw_guess_mode_timing(mode); | 578 | vmw_guess_mode_timing(mode); |
| 581 | 579 | ||
| 582 | if (old_mode && drm_mode_equal(old_mode, mode)) { | 580 | if (!vmw_kms_validate_mode_vram(vmw_priv, |
| 583 | drm_mode_destroy(vmw_priv->dev, mode); | ||
| 584 | mode = old_mode; | ||
| 585 | old_mode = NULL; | ||
| 586 | } else if (!vmw_kms_validate_mode_vram(vmw_priv, | ||
| 587 | mode->hdisplay * | 581 | mode->hdisplay * |
| 588 | DIV_ROUND_UP(var->bits_per_pixel, 8), | 582 | DIV_ROUND_UP(var->bits_per_pixel, 8), |
| 589 | mode->vdisplay)) { | 583 | mode->vdisplay)) { |
| @@ -620,8 +614,8 @@ static int vmw_fb_set_par(struct fb_info *info) | |||
| 620 | schedule_delayed_work(&par->local_work, 0); | 614 | schedule_delayed_work(&par->local_work, 0); |
| 621 | 615 | ||
| 622 | out_unlock: | 616 | out_unlock: |
| 623 | if (old_mode) | 617 | if (par->set_mode) |
| 624 | drm_mode_destroy(vmw_priv->dev, old_mode); | 618 | drm_mode_destroy(vmw_priv->dev, par->set_mode); |
| 625 | par->set_mode = mode; | 619 | par->set_mode = mode; |
| 626 | 620 | ||
| 627 | mutex_unlock(&par->bo_mutex); | 621 | mutex_unlock(&par->bo_mutex); |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c b/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c index b93c558dd86e..7da752ca1c34 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c | |||
| @@ -57,7 +57,7 @@ static int vmw_gmrid_man_get_node(struct ttm_mem_type_manager *man, | |||
| 57 | 57 | ||
| 58 | id = ida_alloc_max(&gman->gmr_ida, gman->max_gmr_ids - 1, GFP_KERNEL); | 58 | id = ida_alloc_max(&gman->gmr_ida, gman->max_gmr_ids - 1, GFP_KERNEL); |
| 59 | if (id < 0) | 59 | if (id < 0) |
| 60 | return id; | 60 | return (id != -ENOMEM ? 0 : id); |
| 61 | 61 | ||
| 62 | spin_lock(&gman->lock); | 62 | spin_lock(&gman->lock); |
| 63 | 63 | ||
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index f2c681971201..f8979abb9a19 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig | |||
| @@ -131,6 +131,7 @@ config I2C_I801 | |||
| 131 | Cannon Lake (PCH) | 131 | Cannon Lake (PCH) |
| 132 | Cedar Fork (PCH) | 132 | Cedar Fork (PCH) |
| 133 | Ice Lake (PCH) | 133 | Ice Lake (PCH) |
| 134 | Comet Lake (PCH) | ||
| 134 | 135 | ||
| 135 | This driver can also be built as a module. If so, the module | 136 | This driver can also be built as a module. If so, the module |
| 136 | will be called i2c-i801. | 137 | will be called i2c-i801. |
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index c91e145ef5a5..679c6c41f64b 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c | |||
| @@ -71,6 +71,7 @@ | |||
| 71 | * Cannon Lake-LP (PCH) 0x9da3 32 hard yes yes yes | 71 | * Cannon Lake-LP (PCH) 0x9da3 32 hard yes yes yes |
| 72 | * Cedar Fork (PCH) 0x18df 32 hard yes yes yes | 72 | * Cedar Fork (PCH) 0x18df 32 hard yes yes yes |
| 73 | * Ice Lake-LP (PCH) 0x34a3 32 hard yes yes yes | 73 | * Ice Lake-LP (PCH) 0x34a3 32 hard yes yes yes |
| 74 | * Comet Lake (PCH) 0x02a3 32 hard yes yes yes | ||
| 74 | * | 75 | * |
| 75 | * Features supported by this driver: | 76 | * Features supported by this driver: |
| 76 | * Software PEC no | 77 | * Software PEC no |
| @@ -240,6 +241,7 @@ | |||
| 240 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS 0xa223 | 241 | #define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS 0xa223 |
| 241 | #define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS 0xa2a3 | 242 | #define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS 0xa2a3 |
| 242 | #define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323 | 243 | #define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323 |
| 244 | #define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3 | ||
| 243 | 245 | ||
| 244 | struct i801_mux_config { | 246 | struct i801_mux_config { |
| 245 | char *gpio_chip; | 247 | char *gpio_chip; |
| @@ -1038,6 +1040,7 @@ static const struct pci_device_id i801_ids[] = { | |||
| 1038 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) }, | 1040 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) }, |
| 1039 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) }, | 1041 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) }, |
| 1040 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) }, | 1042 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) }, |
| 1043 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) }, | ||
| 1041 | { 0, } | 1044 | { 0, } |
| 1042 | }; | 1045 | }; |
| 1043 | 1046 | ||
| @@ -1534,6 +1537,7 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) | |||
| 1534 | case PCI_DEVICE_ID_INTEL_DNV_SMBUS: | 1537 | case PCI_DEVICE_ID_INTEL_DNV_SMBUS: |
| 1535 | case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS: | 1538 | case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS: |
| 1536 | case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS: | 1539 | case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS: |
| 1540 | case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS: | ||
| 1537 | priv->features |= FEATURE_I2C_BLOCK_READ; | 1541 | priv->features |= FEATURE_I2C_BLOCK_READ; |
| 1538 | priv->features |= FEATURE_IRQ; | 1542 | priv->features |= FEATURE_IRQ; |
| 1539 | priv->features |= FEATURE_SMBUS_PEC; | 1543 | priv->features |= FEATURE_SMBUS_PEC; |
diff --git a/drivers/infiniband/hw/i40iw/i40iw_utils.c b/drivers/infiniband/hw/i40iw/i40iw_utils.c index c5a881172524..337410f40860 100644 --- a/drivers/infiniband/hw/i40iw/i40iw_utils.c +++ b/drivers/infiniband/hw/i40iw/i40iw_utils.c | |||
| @@ -173,7 +173,12 @@ int i40iw_inetaddr_event(struct notifier_block *notifier, | |||
| 173 | 173 | ||
| 174 | rcu_read_lock(); | 174 | rcu_read_lock(); |
| 175 | in = __in_dev_get_rcu(upper_dev); | 175 | in = __in_dev_get_rcu(upper_dev); |
| 176 | local_ipaddr = ntohl(in->ifa_list->ifa_address); | 176 | |
| 177 | if (!in->ifa_list) | ||
| 178 | local_ipaddr = 0; | ||
| 179 | else | ||
| 180 | local_ipaddr = ntohl(in->ifa_list->ifa_address); | ||
| 181 | |||
| 177 | rcu_read_unlock(); | 182 | rcu_read_unlock(); |
| 178 | } else { | 183 | } else { |
| 179 | local_ipaddr = ntohl(ifa->ifa_address); | 184 | local_ipaddr = ntohl(ifa->ifa_address); |
| @@ -185,6 +190,11 @@ int i40iw_inetaddr_event(struct notifier_block *notifier, | |||
| 185 | case NETDEV_UP: | 190 | case NETDEV_UP: |
| 186 | /* Fall through */ | 191 | /* Fall through */ |
| 187 | case NETDEV_CHANGEADDR: | 192 | case NETDEV_CHANGEADDR: |
| 193 | |||
| 194 | /* Just skip if no need to handle ARP cache */ | ||
| 195 | if (!local_ipaddr) | ||
| 196 | break; | ||
| 197 | |||
| 188 | i40iw_manage_arp_cache(iwdev, | 198 | i40iw_manage_arp_cache(iwdev, |
| 189 | netdev->dev_addr, | 199 | netdev->dev_addr, |
| 190 | &local_ipaddr, | 200 | &local_ipaddr, |
diff --git a/drivers/infiniband/hw/mlx4/alias_GUID.c b/drivers/infiniband/hw/mlx4/alias_GUID.c index 782499abcd98..2a0b59a4b6eb 100644 --- a/drivers/infiniband/hw/mlx4/alias_GUID.c +++ b/drivers/infiniband/hw/mlx4/alias_GUID.c | |||
| @@ -804,8 +804,8 @@ void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev) | |||
| 804 | unsigned long flags; | 804 | unsigned long flags; |
| 805 | 805 | ||
| 806 | for (i = 0 ; i < dev->num_ports; i++) { | 806 | for (i = 0 ; i < dev->num_ports; i++) { |
| 807 | cancel_delayed_work(&dev->sriov.alias_guid.ports_guid[i].alias_guid_work); | ||
| 808 | det = &sriov->alias_guid.ports_guid[i]; | 807 | det = &sriov->alias_guid.ports_guid[i]; |
| 808 | cancel_delayed_work_sync(&det->alias_guid_work); | ||
| 809 | spin_lock_irqsave(&sriov->alias_guid.ag_work_lock, flags); | 809 | spin_lock_irqsave(&sriov->alias_guid.ag_work_lock, flags); |
| 810 | while (!list_empty(&det->cb_list)) { | 810 | while (!list_empty(&det->cb_list)) { |
| 811 | cb_ctx = list_entry(det->cb_list.next, | 811 | cb_ctx = list_entry(det->cb_list.next, |
diff --git a/drivers/infiniband/hw/mlx5/devx.c b/drivers/infiniband/hw/mlx5/devx.c index eaa055007f28..9e08df7914aa 100644 --- a/drivers/infiniband/hw/mlx5/devx.c +++ b/drivers/infiniband/hw/mlx5/devx.c | |||
| @@ -20,6 +20,7 @@ | |||
| 20 | 20 | ||
| 21 | enum devx_obj_flags { | 21 | enum devx_obj_flags { |
| 22 | DEVX_OBJ_FLAGS_INDIRECT_MKEY = 1 << 0, | 22 | DEVX_OBJ_FLAGS_INDIRECT_MKEY = 1 << 0, |
| 23 | DEVX_OBJ_FLAGS_DCT = 1 << 1, | ||
| 23 | }; | 24 | }; |
| 24 | 25 | ||
| 25 | struct devx_async_data { | 26 | struct devx_async_data { |
| @@ -39,7 +40,10 @@ struct devx_obj { | |||
| 39 | u32 dinlen; /* destroy inbox length */ | 40 | u32 dinlen; /* destroy inbox length */ |
| 40 | u32 dinbox[MLX5_MAX_DESTROY_INBOX_SIZE_DW]; | 41 | u32 dinbox[MLX5_MAX_DESTROY_INBOX_SIZE_DW]; |
| 41 | u32 flags; | 42 | u32 flags; |
| 42 | struct mlx5_ib_devx_mr devx_mr; | 43 | union { |
| 44 | struct mlx5_ib_devx_mr devx_mr; | ||
| 45 | struct mlx5_core_dct core_dct; | ||
| 46 | }; | ||
| 43 | }; | 47 | }; |
| 44 | 48 | ||
| 45 | struct devx_umem { | 49 | struct devx_umem { |
| @@ -347,7 +351,6 @@ static u64 devx_get_obj_id(const void *in) | |||
| 347 | obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ, | 351 | obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ, |
| 348 | MLX5_GET(arm_rq_in, in, srq_number)); | 352 | MLX5_GET(arm_rq_in, in, srq_number)); |
| 349 | break; | 353 | break; |
| 350 | case MLX5_CMD_OP_DRAIN_DCT: | ||
| 351 | case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION: | 354 | case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION: |
| 352 | obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT, | 355 | obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT, |
| 353 | MLX5_GET(drain_dct_in, in, dctn)); | 356 | MLX5_GET(drain_dct_in, in, dctn)); |
| @@ -618,7 +621,6 @@ static bool devx_is_obj_modify_cmd(const void *in) | |||
| 618 | case MLX5_CMD_OP_2RST_QP: | 621 | case MLX5_CMD_OP_2RST_QP: |
| 619 | case MLX5_CMD_OP_ARM_XRC_SRQ: | 622 | case MLX5_CMD_OP_ARM_XRC_SRQ: |
| 620 | case MLX5_CMD_OP_ARM_RQ: | 623 | case MLX5_CMD_OP_ARM_RQ: |
| 621 | case MLX5_CMD_OP_DRAIN_DCT: | ||
| 622 | case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION: | 624 | case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION: |
| 623 | case MLX5_CMD_OP_ARM_XRQ: | 625 | case MLX5_CMD_OP_ARM_XRQ: |
| 624 | case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY: | 626 | case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY: |
| @@ -1124,7 +1126,11 @@ static int devx_obj_cleanup(struct ib_uobject *uobject, | |||
| 1124 | if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) | 1126 | if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) |
| 1125 | devx_cleanup_mkey(obj); | 1127 | devx_cleanup_mkey(obj); |
| 1126 | 1128 | ||
| 1127 | ret = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out)); | 1129 | if (obj->flags & DEVX_OBJ_FLAGS_DCT) |
| 1130 | ret = mlx5_core_destroy_dct(obj->mdev, &obj->core_dct); | ||
| 1131 | else | ||
| 1132 | ret = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, | ||
| 1133 | sizeof(out)); | ||
| 1128 | if (ib_is_destroy_retryable(ret, why, uobject)) | 1134 | if (ib_is_destroy_retryable(ret, why, uobject)) |
| 1129 | return ret; | 1135 | return ret; |
| 1130 | 1136 | ||
| @@ -1185,9 +1191,17 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)( | |||
| 1185 | devx_set_umem_valid(cmd_in); | 1191 | devx_set_umem_valid(cmd_in); |
| 1186 | } | 1192 | } |
| 1187 | 1193 | ||
| 1188 | err = mlx5_cmd_exec(dev->mdev, cmd_in, | 1194 | if (opcode == MLX5_CMD_OP_CREATE_DCT) { |
| 1189 | cmd_in_len, | 1195 | obj->flags |= DEVX_OBJ_FLAGS_DCT; |
| 1190 | cmd_out, cmd_out_len); | 1196 | err = mlx5_core_create_dct(dev->mdev, &obj->core_dct, |
| 1197 | cmd_in, cmd_in_len, | ||
| 1198 | cmd_out, cmd_out_len); | ||
| 1199 | } else { | ||
| 1200 | err = mlx5_cmd_exec(dev->mdev, cmd_in, | ||
| 1201 | cmd_in_len, | ||
| 1202 | cmd_out, cmd_out_len); | ||
| 1203 | } | ||
| 1204 | |||
| 1191 | if (err) | 1205 | if (err) |
| 1192 | goto obj_free; | 1206 | goto obj_free; |
| 1193 | 1207 | ||
| @@ -1214,7 +1228,11 @@ err_copy: | |||
| 1214 | if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) | 1228 | if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) |
| 1215 | devx_cleanup_mkey(obj); | 1229 | devx_cleanup_mkey(obj); |
| 1216 | obj_destroy: | 1230 | obj_destroy: |
| 1217 | mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out)); | 1231 | if (obj->flags & DEVX_OBJ_FLAGS_DCT) |
| 1232 | mlx5_core_destroy_dct(obj->mdev, &obj->core_dct); | ||
| 1233 | else | ||
| 1234 | mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, | ||
| 1235 | sizeof(out)); | ||
| 1218 | obj_free: | 1236 | obj_free: |
| 1219 | kfree(obj); | 1237 | kfree(obj); |
| 1220 | return err; | 1238 | return err; |
diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c index 994c19d01211..531ff20b32ad 100644 --- a/drivers/infiniband/hw/mlx5/main.c +++ b/drivers/infiniband/hw/mlx5/main.c | |||
| @@ -415,10 +415,17 @@ static int translate_eth_ext_proto_oper(u32 eth_proto_oper, u8 *active_speed, | |||
| 415 | *active_speed = IB_SPEED_EDR; | 415 | *active_speed = IB_SPEED_EDR; |
| 416 | break; | 416 | break; |
| 417 | case MLX5E_PROT_MASK(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2): | 417 | case MLX5E_PROT_MASK(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2): |
| 418 | *active_width = IB_WIDTH_2X; | ||
| 419 | *active_speed = IB_SPEED_EDR; | ||
| 420 | break; | ||
| 418 | case MLX5E_PROT_MASK(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR): | 421 | case MLX5E_PROT_MASK(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR): |
| 419 | *active_width = IB_WIDTH_1X; | 422 | *active_width = IB_WIDTH_1X; |
| 420 | *active_speed = IB_SPEED_HDR; | 423 | *active_speed = IB_SPEED_HDR; |
| 421 | break; | 424 | break; |
| 425 | case MLX5E_PROT_MASK(MLX5E_CAUI_4_100GBASE_CR4_KR4): | ||
| 426 | *active_width = IB_WIDTH_4X; | ||
| 427 | *active_speed = IB_SPEED_EDR; | ||
| 428 | break; | ||
| 422 | case MLX5E_PROT_MASK(MLX5E_100GAUI_2_100GBASE_CR2_KR2): | 429 | case MLX5E_PROT_MASK(MLX5E_100GAUI_2_100GBASE_CR2_KR2): |
| 423 | *active_width = IB_WIDTH_2X; | 430 | *active_width = IB_WIDTH_2X; |
| 424 | *active_speed = IB_SPEED_HDR; | 431 | *active_speed = IB_SPEED_HDR; |
diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c index 6b1f0e76900b..7cd006da1dae 100644 --- a/drivers/infiniband/hw/mlx5/qp.c +++ b/drivers/infiniband/hw/mlx5/qp.c | |||
| @@ -3729,6 +3729,7 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, | |||
| 3729 | 3729 | ||
| 3730 | } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { | 3730 | } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { |
| 3731 | struct mlx5_ib_modify_qp_resp resp = {}; | 3731 | struct mlx5_ib_modify_qp_resp resp = {}; |
| 3732 | u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0}; | ||
| 3732 | u32 min_resp_len = offsetof(typeof(resp), dctn) + | 3733 | u32 min_resp_len = offsetof(typeof(resp), dctn) + |
| 3733 | sizeof(resp.dctn); | 3734 | sizeof(resp.dctn); |
| 3734 | 3735 | ||
| @@ -3747,7 +3748,8 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, | |||
| 3747 | MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); | 3748 | MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit); |
| 3748 | 3749 | ||
| 3749 | err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, | 3750 | err = mlx5_core_create_dct(dev->mdev, &qp->dct.mdct, qp->dct.in, |
| 3750 | MLX5_ST_SZ_BYTES(create_dct_in)); | 3751 | MLX5_ST_SZ_BYTES(create_dct_in), out, |
| 3752 | sizeof(out)); | ||
| 3751 | if (err) | 3753 | if (err) |
| 3752 | return err; | 3754 | return err; |
| 3753 | resp.dctn = qp->dct.mdct.mqp.qpn; | 3755 | resp.dctn = qp->dct.mdct.mqp.qpn; |
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index b319e51c379b..f7cdd2ab7f11 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c | |||
| @@ -2608,7 +2608,12 @@ static int map_sg(struct device *dev, struct scatterlist *sglist, | |||
| 2608 | 2608 | ||
| 2609 | /* Everything is mapped - write the right values into s->dma_address */ | 2609 | /* Everything is mapped - write the right values into s->dma_address */ |
| 2610 | for_each_sg(sglist, s, nelems, i) { | 2610 | for_each_sg(sglist, s, nelems, i) { |
| 2611 | s->dma_address += address + s->offset; | 2611 | /* |
| 2612 | * Add in the remaining piece of the scatter-gather offset that | ||
| 2613 | * was masked out when we were determining the physical address | ||
| 2614 | * via (sg_phys(s) & PAGE_MASK) earlier. | ||
| 2615 | */ | ||
| 2616 | s->dma_address += address + (s->offset & ~PAGE_MASK); | ||
| 2612 | s->dma_length = s->length; | 2617 | s->dma_length = s->length; |
| 2613 | } | 2618 | } |
| 2614 | 2619 | ||
| @@ -3164,21 +3169,24 @@ static void amd_iommu_get_resv_regions(struct device *dev, | |||
| 3164 | return; | 3169 | return; |
| 3165 | 3170 | ||
| 3166 | list_for_each_entry(entry, &amd_iommu_unity_map, list) { | 3171 | list_for_each_entry(entry, &amd_iommu_unity_map, list) { |
| 3172 | int type, prot = 0; | ||
| 3167 | size_t length; | 3173 | size_t length; |
| 3168 | int prot = 0; | ||
| 3169 | 3174 | ||
| 3170 | if (devid < entry->devid_start || devid > entry->devid_end) | 3175 | if (devid < entry->devid_start || devid > entry->devid_end) |
| 3171 | continue; | 3176 | continue; |
| 3172 | 3177 | ||
| 3178 | type = IOMMU_RESV_DIRECT; | ||
| 3173 | length = entry->address_end - entry->address_start; | 3179 | length = entry->address_end - entry->address_start; |
| 3174 | if (entry->prot & IOMMU_PROT_IR) | 3180 | if (entry->prot & IOMMU_PROT_IR) |
| 3175 | prot |= IOMMU_READ; | 3181 | prot |= IOMMU_READ; |
| 3176 | if (entry->prot & IOMMU_PROT_IW) | 3182 | if (entry->prot & IOMMU_PROT_IW) |
| 3177 | prot |= IOMMU_WRITE; | 3183 | prot |= IOMMU_WRITE; |
| 3184 | if (entry->prot & IOMMU_UNITY_MAP_FLAG_EXCL_RANGE) | ||
| 3185 | /* Exclusion range */ | ||
| 3186 | type = IOMMU_RESV_RESERVED; | ||
| 3178 | 3187 | ||
| 3179 | region = iommu_alloc_resv_region(entry->address_start, | 3188 | region = iommu_alloc_resv_region(entry->address_start, |
| 3180 | length, prot, | 3189 | length, prot, type); |
| 3181 | IOMMU_RESV_DIRECT); | ||
| 3182 | if (!region) { | 3190 | if (!region) { |
| 3183 | dev_err(dev, "Out of memory allocating dm-regions\n"); | 3191 | dev_err(dev, "Out of memory allocating dm-regions\n"); |
| 3184 | return; | 3192 | return; |
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index f773792d77fd..1b1378619fc9 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c | |||
| @@ -2013,6 +2013,9 @@ static int __init init_unity_map_range(struct ivmd_header *m) | |||
| 2013 | if (e == NULL) | 2013 | if (e == NULL) |
| 2014 | return -ENOMEM; | 2014 | return -ENOMEM; |
| 2015 | 2015 | ||
| 2016 | if (m->flags & IVMD_FLAG_EXCL_RANGE) | ||
| 2017 | init_exclusion_range(m); | ||
| 2018 | |||
| 2016 | switch (m->type) { | 2019 | switch (m->type) { |
| 2017 | default: | 2020 | default: |
| 2018 | kfree(e); | 2021 | kfree(e); |
| @@ -2059,9 +2062,7 @@ static int __init init_memory_definitions(struct acpi_table_header *table) | |||
| 2059 | 2062 | ||
| 2060 | while (p < end) { | 2063 | while (p < end) { |
| 2061 | m = (struct ivmd_header *)p; | 2064 | m = (struct ivmd_header *)p; |
| 2062 | if (m->flags & IVMD_FLAG_EXCL_RANGE) | 2065 | if (m->flags & (IVMD_FLAG_UNITY_MAP | IVMD_FLAG_EXCL_RANGE)) |
| 2063 | init_exclusion_range(m); | ||
| 2064 | else if (m->flags & IVMD_FLAG_UNITY_MAP) | ||
| 2065 | init_unity_map_range(m); | 2066 | init_unity_map_range(m); |
| 2066 | 2067 | ||
| 2067 | p += m->length; | 2068 | p += m->length; |
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h index eae0741f72dc..87965e4d9647 100644 --- a/drivers/iommu/amd_iommu_types.h +++ b/drivers/iommu/amd_iommu_types.h | |||
| @@ -374,6 +374,8 @@ | |||
| 374 | #define IOMMU_PROT_IR 0x01 | 374 | #define IOMMU_PROT_IR 0x01 |
| 375 | #define IOMMU_PROT_IW 0x02 | 375 | #define IOMMU_PROT_IW 0x02 |
| 376 | 376 | ||
| 377 | #define IOMMU_UNITY_MAP_FLAG_EXCL_RANGE (1 << 2) | ||
| 378 | |||
| 377 | /* IOMMU capabilities */ | 379 | /* IOMMU capabilities */ |
| 378 | #define IOMMU_CAP_IOTLB 24 | 380 | #define IOMMU_CAP_IOTLB 24 |
| 379 | #define IOMMU_CAP_NPCACHE 26 | 381 | #define IOMMU_CAP_NPCACHE 26 |
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 87274b54febd..28cb713d728c 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c | |||
| @@ -1538,6 +1538,9 @@ static void iommu_disable_protect_mem_regions(struct intel_iommu *iommu) | |||
| 1538 | u32 pmen; | 1538 | u32 pmen; |
| 1539 | unsigned long flags; | 1539 | unsigned long flags; |
| 1540 | 1540 | ||
| 1541 | if (!cap_plmr(iommu->cap) && !cap_phmr(iommu->cap)) | ||
| 1542 | return; | ||
| 1543 | |||
| 1541 | raw_spin_lock_irqsave(&iommu->register_lock, flags); | 1544 | raw_spin_lock_irqsave(&iommu->register_lock, flags); |
| 1542 | pmen = readl(iommu->reg + DMAR_PMEN_REG); | 1545 | pmen = readl(iommu->reg + DMAR_PMEN_REG); |
| 1543 | pmen &= ~DMA_PMEN_EPM; | 1546 | pmen &= ~DMA_PMEN_EPM; |
| @@ -5332,7 +5335,7 @@ int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct intel_svm_dev *sd | |||
| 5332 | 5335 | ||
| 5333 | ctx_lo = context[0].lo; | 5336 | ctx_lo = context[0].lo; |
| 5334 | 5337 | ||
| 5335 | sdev->did = domain->iommu_did[iommu->seq_id]; | 5338 | sdev->did = FLPT_DEFAULT_DID; |
| 5336 | sdev->sid = PCI_DEVID(info->bus, info->devfn); | 5339 | sdev->sid = PCI_DEVID(info->bus, info->devfn); |
| 5337 | 5340 | ||
| 5338 | if (!(ctx_lo & CONTEXT_PASIDE)) { | 5341 | if (!(ctx_lo & CONTEXT_PASIDE)) { |
diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c index f101afc315ab..9a8a8870e267 100644 --- a/drivers/iommu/io-pgtable-arm-v7s.c +++ b/drivers/iommu/io-pgtable-arm-v7s.c | |||
| @@ -160,6 +160,14 @@ | |||
| 160 | 160 | ||
| 161 | #define ARM_V7S_TCR_PD1 BIT(5) | 161 | #define ARM_V7S_TCR_PD1 BIT(5) |
| 162 | 162 | ||
| 163 | #ifdef CONFIG_ZONE_DMA32 | ||
| 164 | #define ARM_V7S_TABLE_GFP_DMA GFP_DMA32 | ||
| 165 | #define ARM_V7S_TABLE_SLAB_FLAGS SLAB_CACHE_DMA32 | ||
| 166 | #else | ||
| 167 | #define ARM_V7S_TABLE_GFP_DMA GFP_DMA | ||
| 168 | #define ARM_V7S_TABLE_SLAB_FLAGS SLAB_CACHE_DMA | ||
| 169 | #endif | ||
| 170 | |||
| 163 | typedef u32 arm_v7s_iopte; | 171 | typedef u32 arm_v7s_iopte; |
| 164 | 172 | ||
| 165 | static bool selftest_running; | 173 | static bool selftest_running; |
| @@ -197,13 +205,16 @@ static void *__arm_v7s_alloc_table(int lvl, gfp_t gfp, | |||
| 197 | void *table = NULL; | 205 | void *table = NULL; |
| 198 | 206 | ||
| 199 | if (lvl == 1) | 207 | if (lvl == 1) |
| 200 | table = (void *)__get_dma_pages(__GFP_ZERO, get_order(size)); | 208 | table = (void *)__get_free_pages( |
| 209 | __GFP_ZERO | ARM_V7S_TABLE_GFP_DMA, get_order(size)); | ||
| 201 | else if (lvl == 2) | 210 | else if (lvl == 2) |
| 202 | table = kmem_cache_zalloc(data->l2_tables, gfp | GFP_DMA); | 211 | table = kmem_cache_zalloc(data->l2_tables, gfp); |
| 203 | phys = virt_to_phys(table); | 212 | phys = virt_to_phys(table); |
| 204 | if (phys != (arm_v7s_iopte)phys) | 213 | if (phys != (arm_v7s_iopte)phys) { |
| 205 | /* Doesn't fit in PTE */ | 214 | /* Doesn't fit in PTE */ |
| 215 | dev_err(dev, "Page table does not fit in PTE: %pa", &phys); | ||
| 206 | goto out_free; | 216 | goto out_free; |
| 217 | } | ||
| 207 | if (table && !(cfg->quirks & IO_PGTABLE_QUIRK_NO_DMA)) { | 218 | if (table && !(cfg->quirks & IO_PGTABLE_QUIRK_NO_DMA)) { |
| 208 | dma = dma_map_single(dev, table, size, DMA_TO_DEVICE); | 219 | dma = dma_map_single(dev, table, size, DMA_TO_DEVICE); |
| 209 | if (dma_mapping_error(dev, dma)) | 220 | if (dma_mapping_error(dev, dma)) |
| @@ -733,7 +744,7 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg, | |||
| 733 | data->l2_tables = kmem_cache_create("io-pgtable_armv7s_l2", | 744 | data->l2_tables = kmem_cache_create("io-pgtable_armv7s_l2", |
| 734 | ARM_V7S_TABLE_SIZE(2), | 745 | ARM_V7S_TABLE_SIZE(2), |
| 735 | ARM_V7S_TABLE_SIZE(2), | 746 | ARM_V7S_TABLE_SIZE(2), |
| 736 | SLAB_CACHE_DMA, NULL); | 747 | ARM_V7S_TABLE_SLAB_FLAGS, NULL); |
| 737 | if (!data->l2_tables) | 748 | if (!data->l2_tables) |
| 738 | goto out_free_data; | 749 | goto out_free_data; |
| 739 | 750 | ||
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 33a982e33716..109de67d5d72 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c | |||
| @@ -1105,10 +1105,12 @@ struct iommu_group *iommu_group_get_for_dev(struct device *dev) | |||
| 1105 | 1105 | ||
| 1106 | dom = __iommu_domain_alloc(dev->bus, iommu_def_domain_type); | 1106 | dom = __iommu_domain_alloc(dev->bus, iommu_def_domain_type); |
| 1107 | if (!dom && iommu_def_domain_type != IOMMU_DOMAIN_DMA) { | 1107 | if (!dom && iommu_def_domain_type != IOMMU_DOMAIN_DMA) { |
| 1108 | dev_warn(dev, | ||
| 1109 | "failed to allocate default IOMMU domain of type %u; falling back to IOMMU_DOMAIN_DMA", | ||
| 1110 | iommu_def_domain_type); | ||
| 1111 | dom = __iommu_domain_alloc(dev->bus, IOMMU_DOMAIN_DMA); | 1108 | dom = __iommu_domain_alloc(dev->bus, IOMMU_DOMAIN_DMA); |
| 1109 | if (dom) { | ||
| 1110 | dev_warn(dev, | ||
| 1111 | "failed to allocate default IOMMU domain of type %u; falling back to IOMMU_DOMAIN_DMA", | ||
| 1112 | iommu_def_domain_type); | ||
| 1113 | } | ||
| 1112 | } | 1114 | } |
| 1113 | 1115 | ||
| 1114 | group->default_domain = dom; | 1116 | group->default_domain = dom; |
diff --git a/drivers/iommu/iova.c b/drivers/iommu/iova.c index f8d3ba247523..2de8122e218f 100644 --- a/drivers/iommu/iova.c +++ b/drivers/iommu/iova.c | |||
| @@ -207,8 +207,10 @@ static int __alloc_and_insert_iova_range(struct iova_domain *iovad, | |||
| 207 | curr_iova = rb_entry(curr, struct iova, node); | 207 | curr_iova = rb_entry(curr, struct iova, node); |
| 208 | } while (curr && new_pfn <= curr_iova->pfn_hi); | 208 | } while (curr && new_pfn <= curr_iova->pfn_hi); |
| 209 | 209 | ||
| 210 | if (limit_pfn < size || new_pfn < iovad->start_pfn) | 210 | if (limit_pfn < size || new_pfn < iovad->start_pfn) { |
| 211 | iovad->max32_alloc_size = size; | ||
| 211 | goto iova32_full; | 212 | goto iova32_full; |
| 213 | } | ||
| 212 | 214 | ||
| 213 | /* pfn_lo will point to size aligned address if size_aligned is set */ | 215 | /* pfn_lo will point to size aligned address if size_aligned is set */ |
| 214 | new->pfn_lo = new_pfn; | 216 | new->pfn_lo = new_pfn; |
| @@ -222,7 +224,6 @@ static int __alloc_and_insert_iova_range(struct iova_domain *iovad, | |||
| 222 | return 0; | 224 | return 0; |
| 223 | 225 | ||
| 224 | iova32_full: | 226 | iova32_full: |
| 225 | iovad->max32_alloc_size = size; | ||
| 226 | spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags); | 227 | spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags); |
| 227 | return -ENOMEM; | 228 | return -ENOMEM; |
| 228 | } | 229 | } |
diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c index 83364fedbf0a..5e4ca139e4ea 100644 --- a/drivers/irqchip/irq-brcmstb-l2.c +++ b/drivers/irqchip/irq-brcmstb-l2.c | |||
| @@ -275,14 +275,14 @@ out_free: | |||
| 275 | return ret; | 275 | return ret; |
| 276 | } | 276 | } |
| 277 | 277 | ||
| 278 | int __init brcmstb_l2_edge_intc_of_init(struct device_node *np, | 278 | static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np, |
| 279 | struct device_node *parent) | 279 | struct device_node *parent) |
| 280 | { | 280 | { |
| 281 | return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init); | 281 | return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init); |
| 282 | } | 282 | } |
| 283 | IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init); | 283 | IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init); |
| 284 | 284 | ||
| 285 | int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np, | 285 | static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np, |
| 286 | struct device_node *parent) | 286 | struct device_node *parent) |
| 287 | { | 287 | { |
| 288 | return brcmstb_l2_intc_of_init(np, parent, &l2_lvl_intc_init); | 288 | return brcmstb_l2_intc_of_init(np, parent, &l2_lvl_intc_init); |
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 2dd1ff0cf558..7577755bdcf4 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c | |||
| @@ -1482,7 +1482,7 @@ static int lpi_range_cmp(void *priv, struct list_head *a, struct list_head *b) | |||
| 1482 | ra = container_of(a, struct lpi_range, entry); | 1482 | ra = container_of(a, struct lpi_range, entry); |
| 1483 | rb = container_of(b, struct lpi_range, entry); | 1483 | rb = container_of(b, struct lpi_range, entry); |
| 1484 | 1484 | ||
| 1485 | return rb->base_id - ra->base_id; | 1485 | return ra->base_id - rb->base_id; |
| 1486 | } | 1486 | } |
| 1487 | 1487 | ||
| 1488 | static void merge_lpi_ranges(void) | 1488 | static void merge_lpi_ranges(void) |
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index ba2a37a27a54..fd3110c171ba 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c | |||
| @@ -1089,11 +1089,10 @@ static void gic_init_chip(struct gic_chip_data *gic, struct device *dev, | |||
| 1089 | #endif | 1089 | #endif |
| 1090 | } | 1090 | } |
| 1091 | 1091 | ||
| 1092 | static int gic_init_bases(struct gic_chip_data *gic, int irq_start, | 1092 | static int gic_init_bases(struct gic_chip_data *gic, |
| 1093 | struct fwnode_handle *handle) | 1093 | struct fwnode_handle *handle) |
| 1094 | { | 1094 | { |
| 1095 | irq_hw_number_t hwirq_base; | 1095 | int gic_irqs, ret; |
| 1096 | int gic_irqs, irq_base, ret; | ||
| 1097 | 1096 | ||
| 1098 | if (IS_ENABLED(CONFIG_GIC_NON_BANKED) && gic->percpu_offset) { | 1097 | if (IS_ENABLED(CONFIG_GIC_NON_BANKED) && gic->percpu_offset) { |
| 1099 | /* Frankein-GIC without banked registers... */ | 1098 | /* Frankein-GIC without banked registers... */ |
| @@ -1145,28 +1144,21 @@ static int gic_init_bases(struct gic_chip_data *gic, int irq_start, | |||
| 1145 | } else { /* Legacy support */ | 1144 | } else { /* Legacy support */ |
| 1146 | /* | 1145 | /* |
| 1147 | * For primary GICs, skip over SGIs. | 1146 | * For primary GICs, skip over SGIs. |
| 1148 | * For secondary GICs, skip over PPIs, too. | 1147 | * No secondary GIC support whatsoever. |
| 1149 | */ | 1148 | */ |
| 1150 | if (gic == &gic_data[0] && (irq_start & 31) > 0) { | 1149 | int irq_base; |
| 1151 | hwirq_base = 16; | ||
| 1152 | if (irq_start != -1) | ||
| 1153 | irq_start = (irq_start & ~31) + 16; | ||
| 1154 | } else { | ||
| 1155 | hwirq_base = 32; | ||
| 1156 | } | ||
| 1157 | 1150 | ||
| 1158 | gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */ | 1151 | gic_irqs -= 16; /* calculate # of irqs to allocate */ |
| 1159 | 1152 | ||
| 1160 | irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, | 1153 | irq_base = irq_alloc_descs(16, 16, gic_irqs, |
| 1161 | numa_node_id()); | 1154 | numa_node_id()); |
| 1162 | if (irq_base < 0) { | 1155 | if (irq_base < 0) { |
| 1163 | WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", | 1156 | WARN(1, "Cannot allocate irq_descs @ IRQ16, assuming pre-allocated\n"); |
| 1164 | irq_start); | 1157 | irq_base = 16; |
| 1165 | irq_base = irq_start; | ||
| 1166 | } | 1158 | } |
| 1167 | 1159 | ||
| 1168 | gic->domain = irq_domain_add_legacy(NULL, gic_irqs, irq_base, | 1160 | gic->domain = irq_domain_add_legacy(NULL, gic_irqs, irq_base, |
| 1169 | hwirq_base, &gic_irq_domain_ops, gic); | 1161 | 16, &gic_irq_domain_ops, gic); |
| 1170 | } | 1162 | } |
| 1171 | 1163 | ||
| 1172 | if (WARN_ON(!gic->domain)) { | 1164 | if (WARN_ON(!gic->domain)) { |
| @@ -1195,7 +1187,6 @@ error: | |||
| 1195 | } | 1187 | } |
| 1196 | 1188 | ||
| 1197 | static int __init __gic_init_bases(struct gic_chip_data *gic, | 1189 | static int __init __gic_init_bases(struct gic_chip_data *gic, |
| 1198 | int irq_start, | ||
| 1199 | struct fwnode_handle *handle) | 1190 | struct fwnode_handle *handle) |
| 1200 | { | 1191 | { |
| 1201 | char *name; | 1192 | char *name; |
| @@ -1231,32 +1222,28 @@ static int __init __gic_init_bases(struct gic_chip_data *gic, | |||
| 1231 | gic_init_chip(gic, NULL, name, false); | 1222 | gic_init_chip(gic, NULL, name, false); |
| 1232 | } | 1223 | } |
| 1233 | 1224 | ||
| 1234 | ret = gic_init_bases(gic, irq_start, handle); | 1225 | ret = gic_init_bases(gic, handle); |
| 1235 | if (ret) | 1226 | if (ret) |
| 1236 | kfree(name); | 1227 | kfree(name); |
| 1237 | 1228 | ||
| 1238 | return ret; | 1229 | return ret; |
| 1239 | } | 1230 | } |
| 1240 | 1231 | ||
| 1241 | void __init gic_init(unsigned int gic_nr, int irq_start, | 1232 | void __init gic_init(void __iomem *dist_base, void __iomem *cpu_base) |
| 1242 | void __iomem *dist_base, void __iomem *cpu_base) | ||
| 1243 | { | 1233 | { |
| 1244 | struct gic_chip_data *gic; | 1234 | struct gic_chip_data *gic; |
| 1245 | 1235 | ||
| 1246 | if (WARN_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR)) | ||
| 1247 | return; | ||
| 1248 | |||
| 1249 | /* | 1236 | /* |
| 1250 | * Non-DT/ACPI systems won't run a hypervisor, so let's not | 1237 | * Non-DT/ACPI systems won't run a hypervisor, so let's not |
| 1251 | * bother with these... | 1238 | * bother with these... |
| 1252 | */ | 1239 | */ |
| 1253 | static_branch_disable(&supports_deactivate_key); | 1240 | static_branch_disable(&supports_deactivate_key); |
| 1254 | 1241 | ||
| 1255 | gic = &gic_data[gic_nr]; | 1242 | gic = &gic_data[0]; |
| 1256 | gic->raw_dist_base = dist_base; | 1243 | gic->raw_dist_base = dist_base; |
| 1257 | gic->raw_cpu_base = cpu_base; | 1244 | gic->raw_cpu_base = cpu_base; |
| 1258 | 1245 | ||
| 1259 | __gic_init_bases(gic, irq_start, NULL); | 1246 | __gic_init_bases(gic, NULL); |
| 1260 | } | 1247 | } |
| 1261 | 1248 | ||
| 1262 | static void gic_teardown(struct gic_chip_data *gic) | 1249 | static void gic_teardown(struct gic_chip_data *gic) |
| @@ -1399,7 +1386,7 @@ int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq) | |||
| 1399 | if (ret) | 1386 | if (ret) |
| 1400 | return ret; | 1387 | return ret; |
| 1401 | 1388 | ||
| 1402 | ret = gic_init_bases(*gic, -1, &dev->of_node->fwnode); | 1389 | ret = gic_init_bases(*gic, &dev->of_node->fwnode); |
| 1403 | if (ret) { | 1390 | if (ret) { |
| 1404 | gic_teardown(*gic); | 1391 | gic_teardown(*gic); |
| 1405 | return ret; | 1392 | return ret; |
| @@ -1459,7 +1446,7 @@ gic_of_init(struct device_node *node, struct device_node *parent) | |||
| 1459 | if (gic_cnt == 0 && !gic_check_eoimode(node, &gic->raw_cpu_base)) | 1446 | if (gic_cnt == 0 && !gic_check_eoimode(node, &gic->raw_cpu_base)) |
| 1460 | static_branch_disable(&supports_deactivate_key); | 1447 | static_branch_disable(&supports_deactivate_key); |
| 1461 | 1448 | ||
| 1462 | ret = __gic_init_bases(gic, -1, &node->fwnode); | 1449 | ret = __gic_init_bases(gic, &node->fwnode); |
| 1463 | if (ret) { | 1450 | if (ret) { |
| 1464 | gic_teardown(gic); | 1451 | gic_teardown(gic); |
| 1465 | return ret; | 1452 | return ret; |
| @@ -1650,7 +1637,7 @@ static int __init gic_v2_acpi_init(struct acpi_subtable_header *header, | |||
| 1650 | return -ENOMEM; | 1637 | return -ENOMEM; |
| 1651 | } | 1638 | } |
| 1652 | 1639 | ||
| 1653 | ret = __gic_init_bases(gic, -1, domain_handle); | 1640 | ret = __gic_init_bases(gic, domain_handle); |
| 1654 | if (ret) { | 1641 | if (ret) { |
| 1655 | pr_err("Failed to initialise GIC\n"); | 1642 | pr_err("Failed to initialise GIC\n"); |
| 1656 | irq_domain_free_fwnode(domain_handle); | 1643 | irq_domain_free_fwnode(domain_handle); |
diff --git a/drivers/irqchip/irq-imx-irqsteer.c b/drivers/irqchip/irq-imx-irqsteer.c index d1098f4da6a4..88df3d00052c 100644 --- a/drivers/irqchip/irq-imx-irqsteer.c +++ b/drivers/irqchip/irq-imx-irqsteer.c | |||
| @@ -169,8 +169,12 @@ static int imx_irqsteer_probe(struct platform_device *pdev) | |||
| 169 | 169 | ||
| 170 | raw_spin_lock_init(&data->lock); | 170 | raw_spin_lock_init(&data->lock); |
| 171 | 171 | ||
| 172 | of_property_read_u32(np, "fsl,num-irqs", &irqs_num); | 172 | ret = of_property_read_u32(np, "fsl,num-irqs", &irqs_num); |
| 173 | of_property_read_u32(np, "fsl,channel", &data->channel); | 173 | if (ret) |
| 174 | return ret; | ||
| 175 | ret = of_property_read_u32(np, "fsl,channel", &data->channel); | ||
| 176 | if (ret) | ||
| 177 | return ret; | ||
| 174 | 178 | ||
| 175 | /* | 179 | /* |
| 176 | * There is one output irq for each group of 64 inputs. | 180 | * There is one output irq for each group of 64 inputs. |
diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c index 567b29c47608..98b6e1d4b1a6 100644 --- a/drivers/irqchip/irq-mbigen.c +++ b/drivers/irqchip/irq-mbigen.c | |||
| @@ -161,6 +161,9 @@ static void mbigen_write_msg(struct msi_desc *desc, struct msi_msg *msg) | |||
| 161 | void __iomem *base = d->chip_data; | 161 | void __iomem *base = d->chip_data; |
| 162 | u32 val; | 162 | u32 val; |
| 163 | 163 | ||
| 164 | if (!msg->address_lo && !msg->address_hi) | ||
| 165 | return; | ||
| 166 | |||
| 164 | base += get_mbigen_vec_reg(d->hwirq); | 167 | base += get_mbigen_vec_reg(d->hwirq); |
| 165 | val = readl_relaxed(base); | 168 | val = readl_relaxed(base); |
| 166 | 169 | ||
diff --git a/drivers/irqchip/irq-mmp.c b/drivers/irqchip/irq-mmp.c index 3496b61a312a..8eed478f3b7e 100644 --- a/drivers/irqchip/irq-mmp.c +++ b/drivers/irqchip/irq-mmp.c | |||
| @@ -179,7 +179,7 @@ static int mmp_irq_domain_xlate(struct irq_domain *d, struct device_node *node, | |||
| 179 | return 0; | 179 | return 0; |
| 180 | } | 180 | } |
| 181 | 181 | ||
| 182 | const struct irq_domain_ops mmp_irq_domain_ops = { | 182 | static const struct irq_domain_ops mmp_irq_domain_ops = { |
| 183 | .map = mmp_irq_domain_map, | 183 | .map = mmp_irq_domain_map, |
| 184 | .xlate = mmp_irq_domain_xlate, | 184 | .xlate = mmp_irq_domain_xlate, |
| 185 | }; | 185 | }; |
diff --git a/drivers/irqchip/irq-mvebu-sei.c b/drivers/irqchip/irq-mvebu-sei.c index add4c9c934c8..18832ccc8ff8 100644 --- a/drivers/irqchip/irq-mvebu-sei.c +++ b/drivers/irqchip/irq-mvebu-sei.c | |||
| @@ -478,7 +478,7 @@ dispose_irq: | |||
| 478 | return ret; | 478 | return ret; |
| 479 | } | 479 | } |
| 480 | 480 | ||
| 481 | struct mvebu_sei_caps mvebu_sei_ap806_caps = { | 481 | static struct mvebu_sei_caps mvebu_sei_ap806_caps = { |
| 482 | .ap_range = { | 482 | .ap_range = { |
| 483 | .first = 0, | 483 | .first = 0, |
| 484 | .size = 21, | 484 | .size = 21, |
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c index a93296b9b45d..7bd1d4cb2e19 100644 --- a/drivers/irqchip/irq-stm32-exti.c +++ b/drivers/irqchip/irq-stm32-exti.c | |||
| @@ -716,7 +716,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data, | |||
| 716 | const struct stm32_exti_bank *stm32_bank; | 716 | const struct stm32_exti_bank *stm32_bank; |
| 717 | struct stm32_exti_chip_data *chip_data; | 717 | struct stm32_exti_chip_data *chip_data; |
| 718 | void __iomem *base = h_data->base; | 718 | void __iomem *base = h_data->base; |
| 719 | u32 irqs_mask; | ||
| 720 | 719 | ||
| 721 | stm32_bank = h_data->drv_data->exti_banks[bank_idx]; | 720 | stm32_bank = h_data->drv_data->exti_banks[bank_idx]; |
| 722 | chip_data = &h_data->chips_data[bank_idx]; | 721 | chip_data = &h_data->chips_data[bank_idx]; |
| @@ -725,21 +724,12 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data, | |||
| 725 | 724 | ||
| 726 | raw_spin_lock_init(&chip_data->rlock); | 725 | raw_spin_lock_init(&chip_data->rlock); |
| 727 | 726 | ||
| 728 | /* Determine number of irqs supported */ | ||
| 729 | writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst); | ||
| 730 | irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst); | ||
| 731 | |||
| 732 | /* | 727 | /* |
| 733 | * This IP has no reset, so after hot reboot we should | 728 | * This IP has no reset, so after hot reboot we should |
| 734 | * clear registers to avoid residue | 729 | * clear registers to avoid residue |
| 735 | */ | 730 | */ |
| 736 | writel_relaxed(0, base + stm32_bank->imr_ofst); | 731 | writel_relaxed(0, base + stm32_bank->imr_ofst); |
| 737 | writel_relaxed(0, base + stm32_bank->emr_ofst); | 732 | writel_relaxed(0, base + stm32_bank->emr_ofst); |
| 738 | writel_relaxed(0, base + stm32_bank->rtsr_ofst); | ||
| 739 | writel_relaxed(0, base + stm32_bank->ftsr_ofst); | ||
| 740 | writel_relaxed(~0UL, base + stm32_bank->rpr_ofst); | ||
| 741 | if (stm32_bank->fpr_ofst != UNDEF_REG) | ||
| 742 | writel_relaxed(~0UL, base + stm32_bank->fpr_ofst); | ||
| 743 | 733 | ||
| 744 | pr_info("%pOF: bank%d\n", h_data->node, bank_idx); | 734 | pr_info("%pOF: bank%d\n", h_data->node, bank_idx); |
| 745 | 735 | ||
diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c index 4d85645c87f7..0928fd1f0e0c 100644 --- a/drivers/isdn/hardware/mISDN/hfcmulti.c +++ b/drivers/isdn/hardware/mISDN/hfcmulti.c | |||
| @@ -4365,7 +4365,8 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev, | |||
| 4365 | if (m->clock2) | 4365 | if (m->clock2) |
| 4366 | test_and_set_bit(HFC_CHIP_CLOCK2, &hc->chip); | 4366 | test_and_set_bit(HFC_CHIP_CLOCK2, &hc->chip); |
| 4367 | 4367 | ||
| 4368 | if (ent->device == 0xB410) { | 4368 | if (ent->vendor == PCI_VENDOR_ID_DIGIUM && |
| 4369 | ent->device == PCI_DEVICE_ID_DIGIUM_HFC4S) { | ||
| 4369 | test_and_set_bit(HFC_CHIP_B410P, &hc->chip); | 4370 | test_and_set_bit(HFC_CHIP_B410P, &hc->chip); |
| 4370 | test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); | 4371 | test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); |
| 4371 | test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); | 4372 | test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); |
diff --git a/drivers/leds/leds-pca9532.c b/drivers/leds/leds-pca9532.c index 7fea18b0c15d..7cb4d685a1f1 100644 --- a/drivers/leds/leds-pca9532.c +++ b/drivers/leds/leds-pca9532.c | |||
| @@ -513,6 +513,7 @@ static int pca9532_probe(struct i2c_client *client, | |||
| 513 | const struct i2c_device_id *id) | 513 | const struct i2c_device_id *id) |
| 514 | { | 514 | { |
| 515 | int devid; | 515 | int devid; |
| 516 | const struct of_device_id *of_id; | ||
| 516 | struct pca9532_data *data = i2c_get_clientdata(client); | 517 | struct pca9532_data *data = i2c_get_clientdata(client); |
| 517 | struct pca9532_platform_data *pca9532_pdata = | 518 | struct pca9532_platform_data *pca9532_pdata = |
| 518 | dev_get_platdata(&client->dev); | 519 | dev_get_platdata(&client->dev); |
| @@ -528,8 +529,11 @@ static int pca9532_probe(struct i2c_client *client, | |||
| 528 | dev_err(&client->dev, "no platform data\n"); | 529 | dev_err(&client->dev, "no platform data\n"); |
| 529 | return -EINVAL; | 530 | return -EINVAL; |
| 530 | } | 531 | } |
| 531 | devid = (int)(uintptr_t)of_match_device( | 532 | of_id = of_match_device(of_pca9532_leds_match, |
| 532 | of_pca9532_leds_match, &client->dev)->data; | 533 | &client->dev); |
| 534 | if (unlikely(!of_id)) | ||
| 535 | return -EINVAL; | ||
| 536 | devid = (int)(uintptr_t) of_id->data; | ||
| 533 | } else { | 537 | } else { |
| 534 | devid = id->driver_data; | 538 | devid = id->driver_data; |
| 535 | } | 539 | } |
diff --git a/drivers/leds/trigger/ledtrig-netdev.c b/drivers/leds/trigger/ledtrig-netdev.c index 3dd3ed46d473..136f86a1627d 100644 --- a/drivers/leds/trigger/ledtrig-netdev.c +++ b/drivers/leds/trigger/ledtrig-netdev.c | |||
| @@ -122,7 +122,8 @@ static ssize_t device_name_store(struct device *dev, | |||
| 122 | trigger_data->net_dev = NULL; | 122 | trigger_data->net_dev = NULL; |
| 123 | } | 123 | } |
| 124 | 124 | ||
| 125 | strncpy(trigger_data->device_name, buf, size); | 125 | memcpy(trigger_data->device_name, buf, size); |
| 126 | trigger_data->device_name[size] = 0; | ||
| 126 | if (size > 0 && trigger_data->device_name[size - 1] == '\n') | 127 | if (size > 0 && trigger_data->device_name[size - 1] == '\n') |
| 127 | trigger_data->device_name[size - 1] = 0; | 128 | trigger_data->device_name[size - 1] = 0; |
| 128 | 129 | ||
| @@ -301,11 +302,11 @@ static int netdev_trig_notify(struct notifier_block *nb, | |||
| 301 | container_of(nb, struct led_netdev_data, notifier); | 302 | container_of(nb, struct led_netdev_data, notifier); |
| 302 | 303 | ||
| 303 | if (evt != NETDEV_UP && evt != NETDEV_DOWN && evt != NETDEV_CHANGE | 304 | if (evt != NETDEV_UP && evt != NETDEV_DOWN && evt != NETDEV_CHANGE |
| 304 | && evt != NETDEV_REGISTER && evt != NETDEV_UNREGISTER | 305 | && evt != NETDEV_REGISTER && evt != NETDEV_UNREGISTER) |
| 305 | && evt != NETDEV_CHANGENAME) | ||
| 306 | return NOTIFY_DONE; | 306 | return NOTIFY_DONE; |
| 307 | 307 | ||
| 308 | if (strcmp(dev->name, trigger_data->device_name)) | 308 | if (!(dev == trigger_data->net_dev || |
| 309 | (evt == NETDEV_REGISTER && !strcmp(dev->name, trigger_data->device_name)))) | ||
| 309 | return NOTIFY_DONE; | 310 | return NOTIFY_DONE; |
| 310 | 311 | ||
| 311 | cancel_delayed_work_sync(&trigger_data->work); | 312 | cancel_delayed_work_sync(&trigger_data->work); |
| @@ -320,12 +321,9 @@ static int netdev_trig_notify(struct notifier_block *nb, | |||
| 320 | dev_hold(dev); | 321 | dev_hold(dev); |
| 321 | trigger_data->net_dev = dev; | 322 | trigger_data->net_dev = dev; |
| 322 | break; | 323 | break; |
| 323 | case NETDEV_CHANGENAME: | ||
| 324 | case NETDEV_UNREGISTER: | 324 | case NETDEV_UNREGISTER: |
| 325 | if (trigger_data->net_dev) { | 325 | dev_put(trigger_data->net_dev); |
| 326 | dev_put(trigger_data->net_dev); | 326 | trigger_data->net_dev = NULL; |
| 327 | trigger_data->net_dev = NULL; | ||
| 328 | } | ||
| 329 | break; | 327 | break; |
| 330 | case NETDEV_UP: | 328 | case NETDEV_UP: |
| 331 | case NETDEV_CHANGE: | 329 | case NETDEV_CHANGE: |
diff --git a/drivers/memory/emif.h b/drivers/memory/emif.h index 9e9f8037955d..6b71fadb3cfa 100644 --- a/drivers/memory/emif.h +++ b/drivers/memory/emif.h | |||
| @@ -537,6 +537,9 @@ | |||
| 537 | #define MCONNID_SHIFT 0 | 537 | #define MCONNID_SHIFT 0 |
| 538 | #define MCONNID_MASK (0xff << 0) | 538 | #define MCONNID_MASK (0xff << 0) |
| 539 | 539 | ||
| 540 | /* READ_WRITE_LEVELING_CONTROL */ | ||
| 541 | #define RDWRLVLFULL_START 0x80000000 | ||
| 542 | |||
| 540 | /* DDR_PHY_CTRL_1 - EMIF4D */ | 543 | /* DDR_PHY_CTRL_1 - EMIF4D */ |
| 541 | #define DLL_SLAVE_DLY_CTRL_SHIFT_4D 4 | 544 | #define DLL_SLAVE_DLY_CTRL_SHIFT_4D 4 |
| 542 | #define DLL_SLAVE_DLY_CTRL_MASK_4D (0xFF << 4) | 545 | #define DLL_SLAVE_DLY_CTRL_MASK_4D (0xFF << 4) |
| @@ -598,6 +601,7 @@ extern struct emif_regs_amx3 ti_emif_regs_amx3; | |||
| 598 | 601 | ||
| 599 | void ti_emif_save_context(void); | 602 | void ti_emif_save_context(void); |
| 600 | void ti_emif_restore_context(void); | 603 | void ti_emif_restore_context(void); |
| 604 | void ti_emif_run_hw_leveling(void); | ||
| 601 | void ti_emif_enter_sr(void); | 605 | void ti_emif_enter_sr(void); |
| 602 | void ti_emif_exit_sr(void); | 606 | void ti_emif_exit_sr(void); |
| 603 | void ti_emif_abort_sr(void); | 607 | void ti_emif_abort_sr(void); |
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index 0a53598d982f..163b6c69e651 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c | |||
| @@ -51,6 +51,9 @@ | |||
| 51 | #define MC_EMEM_ADR_CFG 0x54 | 51 | #define MC_EMEM_ADR_CFG 0x54 |
| 52 | #define MC_EMEM_ADR_CFG_EMEM_NUMDEV BIT(0) | 52 | #define MC_EMEM_ADR_CFG_EMEM_NUMDEV BIT(0) |
| 53 | 53 | ||
| 54 | #define MC_TIMING_CONTROL 0xfc | ||
| 55 | #define MC_TIMING_UPDATE BIT(0) | ||
| 56 | |||
| 54 | static const struct of_device_id tegra_mc_of_match[] = { | 57 | static const struct of_device_id tegra_mc_of_match[] = { |
| 55 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC | 58 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC |
| 56 | { .compatible = "nvidia,tegra20-mc-gart", .data = &tegra20_mc_soc }, | 59 | { .compatible = "nvidia,tegra20-mc-gart", .data = &tegra20_mc_soc }, |
| @@ -74,7 +77,7 @@ static const struct of_device_id tegra_mc_of_match[] = { | |||
| 74 | }; | 77 | }; |
| 75 | MODULE_DEVICE_TABLE(of, tegra_mc_of_match); | 78 | MODULE_DEVICE_TABLE(of, tegra_mc_of_match); |
| 76 | 79 | ||
| 77 | static int terga_mc_block_dma_common(struct tegra_mc *mc, | 80 | static int tegra_mc_block_dma_common(struct tegra_mc *mc, |
| 78 | const struct tegra_mc_reset *rst) | 81 | const struct tegra_mc_reset *rst) |
| 79 | { | 82 | { |
| 80 | unsigned long flags; | 83 | unsigned long flags; |
| @@ -90,13 +93,13 @@ static int terga_mc_block_dma_common(struct tegra_mc *mc, | |||
| 90 | return 0; | 93 | return 0; |
| 91 | } | 94 | } |
| 92 | 95 | ||
| 93 | static bool terga_mc_dma_idling_common(struct tegra_mc *mc, | 96 | static bool tegra_mc_dma_idling_common(struct tegra_mc *mc, |
| 94 | const struct tegra_mc_reset *rst) | 97 | const struct tegra_mc_reset *rst) |
| 95 | { | 98 | { |
| 96 | return (mc_readl(mc, rst->status) & BIT(rst->bit)) != 0; | 99 | return (mc_readl(mc, rst->status) & BIT(rst->bit)) != 0; |
| 97 | } | 100 | } |
| 98 | 101 | ||
| 99 | static int terga_mc_unblock_dma_common(struct tegra_mc *mc, | 102 | static int tegra_mc_unblock_dma_common(struct tegra_mc *mc, |
| 100 | const struct tegra_mc_reset *rst) | 103 | const struct tegra_mc_reset *rst) |
| 101 | { | 104 | { |
| 102 | unsigned long flags; | 105 | unsigned long flags; |
| @@ -112,17 +115,17 @@ static int terga_mc_unblock_dma_common(struct tegra_mc *mc, | |||
| 112 | return 0; | 115 | return 0; |
| 113 | } | 116 | } |
| 114 | 117 | ||
| 115 | static int terga_mc_reset_status_common(struct tegra_mc *mc, | 118 | static int tegra_mc_reset_status_common(struct tegra_mc *mc, |
| 116 | const struct tegra_mc_reset *rst) | 119 | const struct tegra_mc_reset *rst) |
| 117 | { | 120 | { |
| 118 | return (mc_readl(mc, rst->control) & BIT(rst->bit)) != 0; | 121 | return (mc_readl(mc, rst->control) & BIT(rst->bit)) != 0; |
| 119 | } | 122 | } |
| 120 | 123 | ||
| 121 | const struct tegra_mc_reset_ops terga_mc_reset_ops_common = { | 124 | const struct tegra_mc_reset_ops tegra_mc_reset_ops_common = { |
| 122 | .block_dma = terga_mc_block_dma_common, | 125 | .block_dma = tegra_mc_block_dma_common, |
| 123 | .dma_idling = terga_mc_dma_idling_common, | 126 | .dma_idling = tegra_mc_dma_idling_common, |
| 124 | .unblock_dma = terga_mc_unblock_dma_common, | 127 | .unblock_dma = tegra_mc_unblock_dma_common, |
| 125 | .reset_status = terga_mc_reset_status_common, | 128 | .reset_status = tegra_mc_reset_status_common, |
| 126 | }; | 129 | }; |
| 127 | 130 | ||
| 128 | static inline struct tegra_mc *reset_to_mc(struct reset_controller_dev *rcdev) | 131 | static inline struct tegra_mc *reset_to_mc(struct reset_controller_dev *rcdev) |
| @@ -282,25 +285,28 @@ static int tegra_mc_setup_latency_allowance(struct tegra_mc *mc) | |||
| 282 | u32 value; | 285 | u32 value; |
| 283 | 286 | ||
| 284 | /* compute the number of MC clock cycles per tick */ | 287 | /* compute the number of MC clock cycles per tick */ |
| 285 | tick = mc->tick * clk_get_rate(mc->clk); | 288 | tick = (unsigned long long)mc->tick * clk_get_rate(mc->clk); |
| 286 | do_div(tick, NSEC_PER_SEC); | 289 | do_div(tick, NSEC_PER_SEC); |
| 287 | 290 | ||
| 288 | value = readl(mc->regs + MC_EMEM_ARB_CFG); | 291 | value = mc_readl(mc, MC_EMEM_ARB_CFG); |
| 289 | value &= ~MC_EMEM_ARB_CFG_CYCLES_PER_UPDATE_MASK; | 292 | value &= ~MC_EMEM_ARB_CFG_CYCLES_PER_UPDATE_MASK; |
| 290 | value |= MC_EMEM_ARB_CFG_CYCLES_PER_UPDATE(tick); | 293 | value |= MC_EMEM_ARB_CFG_CYCLES_PER_UPDATE(tick); |
| 291 | writel(value, mc->regs + MC_EMEM_ARB_CFG); | 294 | mc_writel(mc, value, MC_EMEM_ARB_CFG); |
| 292 | 295 | ||
| 293 | /* write latency allowance defaults */ | 296 | /* write latency allowance defaults */ |
| 294 | for (i = 0; i < mc->soc->num_clients; i++) { | 297 | for (i = 0; i < mc->soc->num_clients; i++) { |
| 295 | const struct tegra_mc_la *la = &mc->soc->clients[i].la; | 298 | const struct tegra_mc_la *la = &mc->soc->clients[i].la; |
| 296 | u32 value; | 299 | u32 value; |
| 297 | 300 | ||
| 298 | value = readl(mc->regs + la->reg); | 301 | value = mc_readl(mc, la->reg); |
| 299 | value &= ~(la->mask << la->shift); | 302 | value &= ~(la->mask << la->shift); |
| 300 | value |= (la->def & la->mask) << la->shift; | 303 | value |= (la->def & la->mask) << la->shift; |
| 301 | writel(value, mc->regs + la->reg); | 304 | mc_writel(mc, value, la->reg); |
| 302 | } | 305 | } |
| 303 | 306 | ||
| 307 | /* latch new values */ | ||
| 308 | mc_writel(mc, MC_TIMING_UPDATE, MC_TIMING_CONTROL); | ||
| 309 | |||
| 304 | return 0; | 310 | return 0; |
| 305 | } | 311 | } |
| 306 | 312 | ||
diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index 887a3b07334f..392993955c93 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h | |||
| @@ -35,7 +35,7 @@ static inline void mc_writel(struct tegra_mc *mc, u32 value, | |||
| 35 | writel_relaxed(value, mc->regs + offset); | 35 | writel_relaxed(value, mc->regs + offset); |
| 36 | } | 36 | } |
| 37 | 37 | ||
| 38 | extern const struct tegra_mc_reset_ops terga_mc_reset_ops_common; | 38 | extern const struct tegra_mc_reset_ops tegra_mc_reset_ops_common; |
| 39 | 39 | ||
| 40 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC | 40 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC |
| 41 | extern const struct tegra_mc_soc tegra20_mc_soc; | 41 | extern const struct tegra_mc_soc tegra20_mc_soc; |
diff --git a/drivers/memory/tegra/tegra114.c b/drivers/memory/tegra/tegra114.c index 6560a5101322..62305fafd641 100644 --- a/drivers/memory/tegra/tegra114.c +++ b/drivers/memory/tegra/tegra114.c | |||
| @@ -572,7 +572,7 @@ static const struct tegra_mc_client tegra114_mc_clients[] = { | |||
| 572 | }, | 572 | }, |
| 573 | }, { | 573 | }, { |
| 574 | .id = 0x34, | 574 | .id = 0x34, |
| 575 | .name = "fdcwr2", | 575 | .name = "fdcdwr2", |
| 576 | .swgroup = TEGRA_SWGROUP_NV, | 576 | .swgroup = TEGRA_SWGROUP_NV, |
| 577 | .smmu = { | 577 | .smmu = { |
| 578 | .reg = 0x22c, | 578 | .reg = 0x22c, |
| @@ -975,7 +975,7 @@ const struct tegra_mc_soc tegra114_mc_soc = { | |||
| 975 | .smmu = &tegra114_smmu_soc, | 975 | .smmu = &tegra114_smmu_soc, |
| 976 | .intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION | | 976 | .intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION | |
| 977 | MC_INT_DECERR_EMEM, | 977 | MC_INT_DECERR_EMEM, |
| 978 | .reset_ops = &terga_mc_reset_ops_common, | 978 | .reset_ops = &tegra_mc_reset_ops_common, |
| 979 | .resets = tegra114_mc_resets, | 979 | .resets = tegra114_mc_resets, |
| 980 | .num_resets = ARRAY_SIZE(tegra114_mc_resets), | 980 | .num_resets = ARRAY_SIZE(tegra114_mc_resets), |
| 981 | }; | 981 | }; |
diff --git a/drivers/memory/tegra/tegra124.c b/drivers/memory/tegra/tegra124.c index b561a1fe7f46..8f8487bda642 100644 --- a/drivers/memory/tegra/tegra124.c +++ b/drivers/memory/tegra/tegra124.c | |||
| @@ -1074,7 +1074,7 @@ const struct tegra_mc_soc tegra124_mc_soc = { | |||
| 1074 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | | 1074 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | |
| 1075 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | | 1075 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | |
| 1076 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, | 1076 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, |
| 1077 | .reset_ops = &terga_mc_reset_ops_common, | 1077 | .reset_ops = &tegra_mc_reset_ops_common, |
| 1078 | .resets = tegra124_mc_resets, | 1078 | .resets = tegra124_mc_resets, |
| 1079 | .num_resets = ARRAY_SIZE(tegra124_mc_resets), | 1079 | .num_resets = ARRAY_SIZE(tegra124_mc_resets), |
| 1080 | }; | 1080 | }; |
| @@ -1104,7 +1104,7 @@ const struct tegra_mc_soc tegra132_mc_soc = { | |||
| 1104 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | | 1104 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | |
| 1105 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | | 1105 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | |
| 1106 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, | 1106 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, |
| 1107 | .reset_ops = &terga_mc_reset_ops_common, | 1107 | .reset_ops = &tegra_mc_reset_ops_common, |
| 1108 | .resets = tegra124_mc_resets, | 1108 | .resets = tegra124_mc_resets, |
| 1109 | .num_resets = ARRAY_SIZE(tegra124_mc_resets), | 1109 | .num_resets = ARRAY_SIZE(tegra124_mc_resets), |
| 1110 | }; | 1110 | }; |
diff --git a/drivers/memory/tegra/tegra20.c b/drivers/memory/tegra/tegra20.c index 7119e532471c..121237b16add 100644 --- a/drivers/memory/tegra/tegra20.c +++ b/drivers/memory/tegra/tegra20.c | |||
| @@ -198,7 +198,7 @@ static const struct tegra_mc_reset tegra20_mc_resets[] = { | |||
| 198 | TEGRA20_MC_RESET(VI, 0x100, 0x178, 0x104, 14), | 198 | TEGRA20_MC_RESET(VI, 0x100, 0x178, 0x104, 14), |
| 199 | }; | 199 | }; |
| 200 | 200 | ||
| 201 | static int terga20_mc_hotreset_assert(struct tegra_mc *mc, | 201 | static int tegra20_mc_hotreset_assert(struct tegra_mc *mc, |
| 202 | const struct tegra_mc_reset *rst) | 202 | const struct tegra_mc_reset *rst) |
| 203 | { | 203 | { |
| 204 | unsigned long flags; | 204 | unsigned long flags; |
| @@ -214,7 +214,7 @@ static int terga20_mc_hotreset_assert(struct tegra_mc *mc, | |||
| 214 | return 0; | 214 | return 0; |
| 215 | } | 215 | } |
| 216 | 216 | ||
| 217 | static int terga20_mc_hotreset_deassert(struct tegra_mc *mc, | 217 | static int tegra20_mc_hotreset_deassert(struct tegra_mc *mc, |
| 218 | const struct tegra_mc_reset *rst) | 218 | const struct tegra_mc_reset *rst) |
| 219 | { | 219 | { |
| 220 | unsigned long flags; | 220 | unsigned long flags; |
| @@ -230,7 +230,7 @@ static int terga20_mc_hotreset_deassert(struct tegra_mc *mc, | |||
| 230 | return 0; | 230 | return 0; |
| 231 | } | 231 | } |
| 232 | 232 | ||
| 233 | static int terga20_mc_block_dma(struct tegra_mc *mc, | 233 | static int tegra20_mc_block_dma(struct tegra_mc *mc, |
| 234 | const struct tegra_mc_reset *rst) | 234 | const struct tegra_mc_reset *rst) |
| 235 | { | 235 | { |
| 236 | unsigned long flags; | 236 | unsigned long flags; |
| @@ -246,19 +246,19 @@ static int terga20_mc_block_dma(struct tegra_mc *mc, | |||
| 246 | return 0; | 246 | return 0; |
| 247 | } | 247 | } |
| 248 | 248 | ||
| 249 | static bool terga20_mc_dma_idling(struct tegra_mc *mc, | 249 | static bool tegra20_mc_dma_idling(struct tegra_mc *mc, |
| 250 | const struct tegra_mc_reset *rst) | 250 | const struct tegra_mc_reset *rst) |
| 251 | { | 251 | { |
| 252 | return mc_readl(mc, rst->status) == 0; | 252 | return mc_readl(mc, rst->status) == 0; |
| 253 | } | 253 | } |
| 254 | 254 | ||
| 255 | static int terga20_mc_reset_status(struct tegra_mc *mc, | 255 | static int tegra20_mc_reset_status(struct tegra_mc *mc, |
| 256 | const struct tegra_mc_reset *rst) | 256 | const struct tegra_mc_reset *rst) |
| 257 | { | 257 | { |
| 258 | return (mc_readl(mc, rst->reset) & BIT(rst->bit)) == 0; | 258 | return (mc_readl(mc, rst->reset) & BIT(rst->bit)) == 0; |
| 259 | } | 259 | } |
| 260 | 260 | ||
| 261 | static int terga20_mc_unblock_dma(struct tegra_mc *mc, | 261 | static int tegra20_mc_unblock_dma(struct tegra_mc *mc, |
| 262 | const struct tegra_mc_reset *rst) | 262 | const struct tegra_mc_reset *rst) |
| 263 | { | 263 | { |
| 264 | unsigned long flags; | 264 | unsigned long flags; |
| @@ -274,13 +274,13 @@ static int terga20_mc_unblock_dma(struct tegra_mc *mc, | |||
| 274 | return 0; | 274 | return 0; |
| 275 | } | 275 | } |
| 276 | 276 | ||
| 277 | const struct tegra_mc_reset_ops terga20_mc_reset_ops = { | 277 | static const struct tegra_mc_reset_ops tegra20_mc_reset_ops = { |
| 278 | .hotreset_assert = terga20_mc_hotreset_assert, | 278 | .hotreset_assert = tegra20_mc_hotreset_assert, |
| 279 | .hotreset_deassert = terga20_mc_hotreset_deassert, | 279 | .hotreset_deassert = tegra20_mc_hotreset_deassert, |
| 280 | .block_dma = terga20_mc_block_dma, | 280 | .block_dma = tegra20_mc_block_dma, |
| 281 | .dma_idling = terga20_mc_dma_idling, | 281 | .dma_idling = tegra20_mc_dma_idling, |
| 282 | .unblock_dma = terga20_mc_unblock_dma, | 282 | .unblock_dma = tegra20_mc_unblock_dma, |
| 283 | .reset_status = terga20_mc_reset_status, | 283 | .reset_status = tegra20_mc_reset_status, |
| 284 | }; | 284 | }; |
| 285 | 285 | ||
| 286 | const struct tegra_mc_soc tegra20_mc_soc = { | 286 | const struct tegra_mc_soc tegra20_mc_soc = { |
| @@ -290,7 +290,7 @@ const struct tegra_mc_soc tegra20_mc_soc = { | |||
| 290 | .client_id_mask = 0x3f, | 290 | .client_id_mask = 0x3f, |
| 291 | .intmask = MC_INT_SECURITY_VIOLATION | MC_INT_INVALID_GART_PAGE | | 291 | .intmask = MC_INT_SECURITY_VIOLATION | MC_INT_INVALID_GART_PAGE | |
| 292 | MC_INT_DECERR_EMEM, | 292 | MC_INT_DECERR_EMEM, |
| 293 | .reset_ops = &terga20_mc_reset_ops, | 293 | .reset_ops = &tegra20_mc_reset_ops, |
| 294 | .resets = tegra20_mc_resets, | 294 | .resets = tegra20_mc_resets, |
| 295 | .num_resets = ARRAY_SIZE(tegra20_mc_resets), | 295 | .num_resets = ARRAY_SIZE(tegra20_mc_resets), |
| 296 | }; | 296 | }; |
diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c index d00a77160407..aa22cda637eb 100644 --- a/drivers/memory/tegra/tegra210.c +++ b/drivers/memory/tegra/tegra210.c | |||
| @@ -1132,7 +1132,7 @@ const struct tegra_mc_soc tegra210_mc_soc = { | |||
| 1132 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | | 1132 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | |
| 1133 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | | 1133 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | |
| 1134 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, | 1134 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, |
| 1135 | .reset_ops = &terga_mc_reset_ops_common, | 1135 | .reset_ops = &tegra_mc_reset_ops_common, |
| 1136 | .resets = tegra210_mc_resets, | 1136 | .resets = tegra210_mc_resets, |
| 1137 | .num_resets = ARRAY_SIZE(tegra210_mc_resets), | 1137 | .num_resets = ARRAY_SIZE(tegra210_mc_resets), |
| 1138 | }; | 1138 | }; |
diff --git a/drivers/memory/tegra/tegra30.c b/drivers/memory/tegra/tegra30.c index bee5314ed404..c9af0f682ead 100644 --- a/drivers/memory/tegra/tegra30.c +++ b/drivers/memory/tegra/tegra30.c | |||
| @@ -726,7 +726,7 @@ static const struct tegra_mc_client tegra30_mc_clients[] = { | |||
| 726 | }, | 726 | }, |
| 727 | }, { | 727 | }, { |
| 728 | .id = 0x34, | 728 | .id = 0x34, |
| 729 | .name = "fdcwr2", | 729 | .name = "fdcdwr2", |
| 730 | .swgroup = TEGRA_SWGROUP_NV2, | 730 | .swgroup = TEGRA_SWGROUP_NV2, |
| 731 | .smmu = { | 731 | .smmu = { |
| 732 | .reg = 0x22c, | 732 | .reg = 0x22c, |
| @@ -999,7 +999,7 @@ const struct tegra_mc_soc tegra30_mc_soc = { | |||
| 999 | .smmu = &tegra30_smmu_soc, | 999 | .smmu = &tegra30_smmu_soc, |
| 1000 | .intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION | | 1000 | .intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION | |
| 1001 | MC_INT_DECERR_EMEM, | 1001 | MC_INT_DECERR_EMEM, |
| 1002 | .reset_ops = &terga_mc_reset_ops_common, | 1002 | .reset_ops = &tegra_mc_reset_ops_common, |
| 1003 | .resets = tegra30_mc_resets, | 1003 | .resets = tegra30_mc_resets, |
| 1004 | .num_resets = ARRAY_SIZE(tegra30_mc_resets), | 1004 | .num_resets = ARRAY_SIZE(tegra30_mc_resets), |
| 1005 | }; | 1005 | }; |
diff --git a/drivers/memory/ti-emif-pm.c b/drivers/memory/ti-emif-pm.c index 2250d03ea17f..ab07aa163138 100644 --- a/drivers/memory/ti-emif-pm.c +++ b/drivers/memory/ti-emif-pm.c | |||
| @@ -138,6 +138,9 @@ static int ti_emif_alloc_sram(struct device *dev, | |||
| 138 | emif_data->pm_functions.exit_sr = | 138 | emif_data->pm_functions.exit_sr = |
| 139 | sram_resume_address(emif_data, | 139 | sram_resume_address(emif_data, |
| 140 | (unsigned long)ti_emif_exit_sr); | 140 | (unsigned long)ti_emif_exit_sr); |
| 141 | emif_data->pm_functions.run_hw_leveling = | ||
| 142 | sram_resume_address(emif_data, | ||
| 143 | (unsigned long)ti_emif_run_hw_leveling); | ||
| 141 | 144 | ||
| 142 | emif_data->pm_data.regs_virt = | 145 | emif_data->pm_data.regs_virt = |
| 143 | (struct emif_regs_amx3 *)emif_data->ti_emif_sram_data_virt; | 146 | (struct emif_regs_amx3 *)emif_data->ti_emif_sram_data_virt; |
diff --git a/drivers/memory/ti-emif-sram-pm.S b/drivers/memory/ti-emif-sram-pm.S index a5369181e5c2..d75ae18efa7d 100644 --- a/drivers/memory/ti-emif-sram-pm.S +++ b/drivers/memory/ti-emif-sram-pm.S | |||
| @@ -27,6 +27,7 @@ | |||
| 27 | #define EMIF_POWER_MGMT_SELF_REFRESH_MODE_MASK 0x0700 | 27 | #define EMIF_POWER_MGMT_SELF_REFRESH_MODE_MASK 0x0700 |
| 28 | 28 | ||
| 29 | #define EMIF_SDCFG_TYPE_DDR2 0x2 << SDRAM_TYPE_SHIFT | 29 | #define EMIF_SDCFG_TYPE_DDR2 0x2 << SDRAM_TYPE_SHIFT |
| 30 | #define EMIF_SDCFG_TYPE_DDR3 0x3 << SDRAM_TYPE_SHIFT | ||
| 30 | #define EMIF_STATUS_READY 0x4 | 31 | #define EMIF_STATUS_READY 0x4 |
| 31 | 32 | ||
| 32 | #define AM43XX_EMIF_PHY_CTRL_REG_COUNT 0x120 | 33 | #define AM43XX_EMIF_PHY_CTRL_REG_COUNT 0x120 |
| @@ -245,6 +246,46 @@ emif_skip_restore_extra_regs: | |||
| 245 | ENDPROC(ti_emif_restore_context) | 246 | ENDPROC(ti_emif_restore_context) |
| 246 | 247 | ||
| 247 | /* | 248 | /* |
| 249 | * void ti_emif_run_hw_leveling(void) | ||
| 250 | * | ||
| 251 | * Used during resume to run hardware leveling again and restore the | ||
| 252 | * configuration of the EMIF PHY, only for DDR3. | ||
| 253 | */ | ||
| 254 | ENTRY(ti_emif_run_hw_leveling) | ||
| 255 | adr r4, ti_emif_pm_sram_data | ||
| 256 | ldr r0, [r4, #EMIF_PM_BASE_ADDR_PHYS_OFFSET] | ||
| 257 | |||
| 258 | ldr r3, [r0, #EMIF_READ_WRITE_LEVELING_CONTROL] | ||
| 259 | orr r3, r3, #RDWRLVLFULL_START | ||
| 260 | ldr r2, [r0, #EMIF_SDRAM_CONFIG] | ||
| 261 | and r2, r2, #SDRAM_TYPE_MASK | ||
| 262 | cmp r2, #EMIF_SDCFG_TYPE_DDR3 | ||
| 263 | bne skip_hwlvl | ||
| 264 | |||
| 265 | str r3, [r0, #EMIF_READ_WRITE_LEVELING_CONTROL] | ||
| 266 | |||
| 267 | /* | ||
| 268 | * If EMIF registers are touched during initial stage of HW | ||
| 269 | * leveling sequence there will be an L3 NOC timeout error issued | ||
| 270 | * as the EMIF will not respond, which is not fatal, but it is | ||
| 271 | * avoidable. This small wait loop is enough time for this condition | ||
| 272 | * to clear, even at worst case of CPU running at max speed of 1Ghz. | ||
| 273 | */ | ||
| 274 | mov r2, #0x2000 | ||
| 275 | 1: | ||
| 276 | subs r2, r2, #0x1 | ||
| 277 | bne 1b | ||
| 278 | |||
| 279 | /* Bit clears when operation is complete */ | ||
| 280 | 2: ldr r1, [r0, #EMIF_READ_WRITE_LEVELING_CONTROL] | ||
| 281 | tst r1, #RDWRLVLFULL_START | ||
| 282 | bne 2b | ||
| 283 | |||
| 284 | skip_hwlvl: | ||
| 285 | mov pc, lr | ||
| 286 | ENDPROC(ti_emif_run_hw_leveling) | ||
| 287 | |||
| 288 | /* | ||
| 248 | * void ti_emif_enter_sr(void) | 289 | * void ti_emif_enter_sr(void) |
| 249 | * | 290 | * |
| 250 | * Programs the EMIF to tell the SDRAM to enter into self-refresh | 291 | * Programs the EMIF to tell the SDRAM to enter into self-refresh |
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 42ab8ec92a04..b80cb6af0cb4 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig | |||
| @@ -496,22 +496,6 @@ config VEXPRESS_SYSCFG | |||
| 496 | bus. System Configuration interface is one of the possible means | 496 | bus. System Configuration interface is one of the possible means |
| 497 | of generating transactions on this bus. | 497 | of generating transactions on this bus. |
| 498 | 498 | ||
| 499 | config ASPEED_LPC_CTRL | ||
| 500 | depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON | ||
| 501 | tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" | ||
| 502 | ---help--- | ||
| 503 | Control Aspeed ast2400/2500 HOST LPC to BMC mappings through | ||
| 504 | ioctl()s, the driver also provides a read/write interface to a BMC ram | ||
| 505 | region where the host LPC read/write region can be buffered. | ||
| 506 | |||
| 507 | config ASPEED_LPC_SNOOP | ||
| 508 | tristate "Aspeed ast2500 HOST LPC snoop support" | ||
| 509 | depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON | ||
| 510 | help | ||
| 511 | Provides a driver to control the LPC snoop interface which | ||
| 512 | allows the BMC to listen on and save the data written by | ||
| 513 | the host to an arbitrary LPC I/O port. | ||
| 514 | |||
| 515 | config PCI_ENDPOINT_TEST | 499 | config PCI_ENDPOINT_TEST |
| 516 | depends on PCI | 500 | depends on PCI |
| 517 | select CRC32 | 501 | select CRC32 |
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d5b7d3404dc7..b9affcdaa3d6 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile | |||
| @@ -54,8 +54,6 @@ obj-$(CONFIG_GENWQE) += genwqe/ | |||
| 54 | obj-$(CONFIG_ECHO) += echo/ | 54 | obj-$(CONFIG_ECHO) += echo/ |
| 55 | obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o | 55 | obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o |
| 56 | obj-$(CONFIG_CXL_BASE) += cxl/ | 56 | obj-$(CONFIG_CXL_BASE) += cxl/ |
| 57 | obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o | ||
| 58 | obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o | ||
| 59 | obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o | 57 | obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o |
| 60 | obj-$(CONFIG_OCXL) += ocxl/ | 58 | obj-$(CONFIG_OCXL) += ocxl/ |
| 61 | obj-y += cardreader/ | 59 | obj-y += cardreader/ |
diff --git a/drivers/misc/habanalabs/command_submission.c b/drivers/misc/habanalabs/command_submission.c index 3525236ed8d9..19c84214a7ea 100644 --- a/drivers/misc/habanalabs/command_submission.c +++ b/drivers/misc/habanalabs/command_submission.c | |||
| @@ -179,6 +179,12 @@ static void cs_do_release(struct kref *ref) | |||
| 179 | 179 | ||
| 180 | /* We also need to update CI for internal queues */ | 180 | /* We also need to update CI for internal queues */ |
| 181 | if (cs->submitted) { | 181 | if (cs->submitted) { |
| 182 | int cs_cnt = atomic_dec_return(&hdev->cs_active_cnt); | ||
| 183 | |||
| 184 | WARN_ONCE((cs_cnt < 0), | ||
| 185 | "hl%d: error in CS active cnt %d\n", | ||
| 186 | hdev->id, cs_cnt); | ||
| 187 | |||
| 182 | hl_int_hw_queue_update_ci(cs); | 188 | hl_int_hw_queue_update_ci(cs); |
| 183 | 189 | ||
| 184 | spin_lock(&hdev->hw_queues_mirror_lock); | 190 | spin_lock(&hdev->hw_queues_mirror_lock); |
diff --git a/drivers/misc/habanalabs/debugfs.c b/drivers/misc/habanalabs/debugfs.c index a53c12aff6ad..974a87789bd8 100644 --- a/drivers/misc/habanalabs/debugfs.c +++ b/drivers/misc/habanalabs/debugfs.c | |||
| @@ -232,6 +232,7 @@ static int vm_show(struct seq_file *s, void *data) | |||
| 232 | struct hl_vm_phys_pg_pack *phys_pg_pack = NULL; | 232 | struct hl_vm_phys_pg_pack *phys_pg_pack = NULL; |
| 233 | enum vm_type_t *vm_type; | 233 | enum vm_type_t *vm_type; |
| 234 | bool once = true; | 234 | bool once = true; |
| 235 | u64 j; | ||
| 235 | int i; | 236 | int i; |
| 236 | 237 | ||
| 237 | if (!dev_entry->hdev->mmu_enable) | 238 | if (!dev_entry->hdev->mmu_enable) |
| @@ -260,7 +261,7 @@ static int vm_show(struct seq_file *s, void *data) | |||
| 260 | } else { | 261 | } else { |
| 261 | phys_pg_pack = hnode->ptr; | 262 | phys_pg_pack = hnode->ptr; |
| 262 | seq_printf(s, | 263 | seq_printf(s, |
| 263 | " 0x%-14llx %-10u %-4u\n", | 264 | " 0x%-14llx %-10llu %-4u\n", |
| 264 | hnode->vaddr, phys_pg_pack->total_size, | 265 | hnode->vaddr, phys_pg_pack->total_size, |
| 265 | phys_pg_pack->handle); | 266 | phys_pg_pack->handle); |
| 266 | } | 267 | } |
| @@ -282,9 +283,9 @@ static int vm_show(struct seq_file *s, void *data) | |||
| 282 | phys_pg_pack->page_size); | 283 | phys_pg_pack->page_size); |
| 283 | seq_puts(s, " physical address\n"); | 284 | seq_puts(s, " physical address\n"); |
| 284 | seq_puts(s, "---------------------\n"); | 285 | seq_puts(s, "---------------------\n"); |
| 285 | for (i = 0 ; i < phys_pg_pack->npages ; i++) { | 286 | for (j = 0 ; j < phys_pg_pack->npages ; j++) { |
| 286 | seq_printf(s, " 0x%-14llx\n", | 287 | seq_printf(s, " 0x%-14llx\n", |
| 287 | phys_pg_pack->pages[i]); | 288 | phys_pg_pack->pages[j]); |
| 288 | } | 289 | } |
| 289 | } | 290 | } |
| 290 | spin_unlock(&vm->idr_lock); | 291 | spin_unlock(&vm->idr_lock); |
diff --git a/drivers/misc/habanalabs/device.c b/drivers/misc/habanalabs/device.c index de46aa6ed154..77d51be66c7e 100644 --- a/drivers/misc/habanalabs/device.c +++ b/drivers/misc/habanalabs/device.c | |||
| @@ -11,6 +11,8 @@ | |||
| 11 | #include <linux/sched/signal.h> | 11 | #include <linux/sched/signal.h> |
| 12 | #include <linux/hwmon.h> | 12 | #include <linux/hwmon.h> |
| 13 | 13 | ||
| 14 | #define HL_PLDM_PENDING_RESET_PER_SEC (HL_PENDING_RESET_PER_SEC * 10) | ||
| 15 | |||
| 14 | bool hl_device_disabled_or_in_reset(struct hl_device *hdev) | 16 | bool hl_device_disabled_or_in_reset(struct hl_device *hdev) |
| 15 | { | 17 | { |
| 16 | if ((hdev->disabled) || (atomic_read(&hdev->in_reset))) | 18 | if ((hdev->disabled) || (atomic_read(&hdev->in_reset))) |
| @@ -216,6 +218,7 @@ static int device_early_init(struct hl_device *hdev) | |||
| 216 | spin_lock_init(&hdev->hw_queues_mirror_lock); | 218 | spin_lock_init(&hdev->hw_queues_mirror_lock); |
| 217 | atomic_set(&hdev->in_reset, 0); | 219 | atomic_set(&hdev->in_reset, 0); |
| 218 | atomic_set(&hdev->fd_open_cnt, 0); | 220 | atomic_set(&hdev->fd_open_cnt, 0); |
| 221 | atomic_set(&hdev->cs_active_cnt, 0); | ||
| 219 | 222 | ||
| 220 | return 0; | 223 | return 0; |
| 221 | 224 | ||
| @@ -413,6 +416,27 @@ int hl_device_suspend(struct hl_device *hdev) | |||
| 413 | 416 | ||
| 414 | pci_save_state(hdev->pdev); | 417 | pci_save_state(hdev->pdev); |
| 415 | 418 | ||
| 419 | /* Block future CS/VM/JOB completion operations */ | ||
| 420 | rc = atomic_cmpxchg(&hdev->in_reset, 0, 1); | ||
| 421 | if (rc) { | ||
| 422 | dev_err(hdev->dev, "Can't suspend while in reset\n"); | ||
| 423 | return -EIO; | ||
| 424 | } | ||
| 425 | |||
| 426 | /* This blocks all other stuff that is not blocked by in_reset */ | ||
| 427 | hdev->disabled = true; | ||
| 428 | |||
| 429 | /* | ||
| 430 | * Flush anyone that is inside the critical section of enqueue | ||
| 431 | * jobs to the H/W | ||
| 432 | */ | ||
| 433 | hdev->asic_funcs->hw_queues_lock(hdev); | ||
| 434 | hdev->asic_funcs->hw_queues_unlock(hdev); | ||
| 435 | |||
| 436 | /* Flush processes that are sending message to CPU */ | ||
| 437 | mutex_lock(&hdev->send_cpu_message_lock); | ||
| 438 | mutex_unlock(&hdev->send_cpu_message_lock); | ||
| 439 | |||
| 416 | rc = hdev->asic_funcs->suspend(hdev); | 440 | rc = hdev->asic_funcs->suspend(hdev); |
| 417 | if (rc) | 441 | if (rc) |
| 418 | dev_err(hdev->dev, | 442 | dev_err(hdev->dev, |
| @@ -440,21 +464,38 @@ int hl_device_resume(struct hl_device *hdev) | |||
| 440 | 464 | ||
| 441 | pci_set_power_state(hdev->pdev, PCI_D0); | 465 | pci_set_power_state(hdev->pdev, PCI_D0); |
| 442 | pci_restore_state(hdev->pdev); | 466 | pci_restore_state(hdev->pdev); |
| 443 | rc = pci_enable_device(hdev->pdev); | 467 | rc = pci_enable_device_mem(hdev->pdev); |
| 444 | if (rc) { | 468 | if (rc) { |
| 445 | dev_err(hdev->dev, | 469 | dev_err(hdev->dev, |
| 446 | "Failed to enable PCI device in resume\n"); | 470 | "Failed to enable PCI device in resume\n"); |
| 447 | return rc; | 471 | return rc; |
| 448 | } | 472 | } |
| 449 | 473 | ||
| 474 | pci_set_master(hdev->pdev); | ||
| 475 | |||
| 450 | rc = hdev->asic_funcs->resume(hdev); | 476 | rc = hdev->asic_funcs->resume(hdev); |
| 451 | if (rc) { | 477 | if (rc) { |
| 452 | dev_err(hdev->dev, | 478 | dev_err(hdev->dev, "Failed to resume device after suspend\n"); |
| 453 | "Failed to enable PCI access from device CPU\n"); | 479 | goto disable_device; |
| 454 | return rc; | 480 | } |
| 481 | |||
| 482 | |||
| 483 | hdev->disabled = false; | ||
| 484 | atomic_set(&hdev->in_reset, 0); | ||
| 485 | |||
| 486 | rc = hl_device_reset(hdev, true, false); | ||
| 487 | if (rc) { | ||
| 488 | dev_err(hdev->dev, "Failed to reset device during resume\n"); | ||
| 489 | goto disable_device; | ||
| 455 | } | 490 | } |
| 456 | 491 | ||
| 457 | return 0; | 492 | return 0; |
| 493 | |||
| 494 | disable_device: | ||
| 495 | pci_clear_master(hdev->pdev); | ||
| 496 | pci_disable_device(hdev->pdev); | ||
| 497 | |||
| 498 | return rc; | ||
| 458 | } | 499 | } |
| 459 | 500 | ||
| 460 | static void hl_device_hard_reset_pending(struct work_struct *work) | 501 | static void hl_device_hard_reset_pending(struct work_struct *work) |
| @@ -462,9 +503,16 @@ static void hl_device_hard_reset_pending(struct work_struct *work) | |||
| 462 | struct hl_device_reset_work *device_reset_work = | 503 | struct hl_device_reset_work *device_reset_work = |
| 463 | container_of(work, struct hl_device_reset_work, reset_work); | 504 | container_of(work, struct hl_device_reset_work, reset_work); |
| 464 | struct hl_device *hdev = device_reset_work->hdev; | 505 | struct hl_device *hdev = device_reset_work->hdev; |
| 465 | u16 pending_cnt = HL_PENDING_RESET_PER_SEC; | 506 | u16 pending_total, pending_cnt; |
| 466 | struct task_struct *task = NULL; | 507 | struct task_struct *task = NULL; |
| 467 | 508 | ||
| 509 | if (hdev->pldm) | ||
| 510 | pending_total = HL_PLDM_PENDING_RESET_PER_SEC; | ||
| 511 | else | ||
| 512 | pending_total = HL_PENDING_RESET_PER_SEC; | ||
| 513 | |||
| 514 | pending_cnt = pending_total; | ||
| 515 | |||
| 468 | /* Flush all processes that are inside hl_open */ | 516 | /* Flush all processes that are inside hl_open */ |
| 469 | mutex_lock(&hdev->fd_open_cnt_lock); | 517 | mutex_lock(&hdev->fd_open_cnt_lock); |
| 470 | 518 | ||
| @@ -489,6 +537,19 @@ static void hl_device_hard_reset_pending(struct work_struct *work) | |||
| 489 | } | 537 | } |
| 490 | } | 538 | } |
| 491 | 539 | ||
| 540 | pending_cnt = pending_total; | ||
| 541 | |||
| 542 | while ((atomic_read(&hdev->fd_open_cnt)) && (pending_cnt)) { | ||
| 543 | |||
| 544 | pending_cnt--; | ||
| 545 | |||
| 546 | ssleep(1); | ||
| 547 | } | ||
| 548 | |||
| 549 | if (atomic_read(&hdev->fd_open_cnt)) | ||
| 550 | dev_crit(hdev->dev, | ||
| 551 | "Going to hard reset with open user contexts\n"); | ||
| 552 | |||
| 492 | mutex_unlock(&hdev->fd_open_cnt_lock); | 553 | mutex_unlock(&hdev->fd_open_cnt_lock); |
| 493 | 554 | ||
| 494 | hl_device_reset(hdev, true, true); | 555 | hl_device_reset(hdev, true, true); |
diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c index 238dd57c541b..ea979ebd62fb 100644 --- a/drivers/misc/habanalabs/goya/goya.c +++ b/drivers/misc/habanalabs/goya/goya.c | |||
| @@ -1201,15 +1201,6 @@ static int goya_stop_external_queues(struct hl_device *hdev) | |||
| 1201 | return retval; | 1201 | return retval; |
| 1202 | } | 1202 | } |
| 1203 | 1203 | ||
| 1204 | static void goya_resume_external_queues(struct hl_device *hdev) | ||
| 1205 | { | ||
| 1206 | WREG32(mmDMA_QM_0_GLBL_CFG1, 0); | ||
| 1207 | WREG32(mmDMA_QM_1_GLBL_CFG1, 0); | ||
| 1208 | WREG32(mmDMA_QM_2_GLBL_CFG1, 0); | ||
| 1209 | WREG32(mmDMA_QM_3_GLBL_CFG1, 0); | ||
| 1210 | WREG32(mmDMA_QM_4_GLBL_CFG1, 0); | ||
| 1211 | } | ||
| 1212 | |||
| 1213 | /* | 1204 | /* |
| 1214 | * goya_init_cpu_queues - Initialize PQ/CQ/EQ of CPU | 1205 | * goya_init_cpu_queues - Initialize PQ/CQ/EQ of CPU |
| 1215 | * | 1206 | * |
| @@ -2178,36 +2169,6 @@ static int goya_stop_internal_queues(struct hl_device *hdev) | |||
| 2178 | return retval; | 2169 | return retval; |
| 2179 | } | 2170 | } |
| 2180 | 2171 | ||
| 2181 | static void goya_resume_internal_queues(struct hl_device *hdev) | ||
| 2182 | { | ||
| 2183 | WREG32(mmMME_QM_GLBL_CFG1, 0); | ||
| 2184 | WREG32(mmMME_CMDQ_GLBL_CFG1, 0); | ||
| 2185 | |||
| 2186 | WREG32(mmTPC0_QM_GLBL_CFG1, 0); | ||
| 2187 | WREG32(mmTPC0_CMDQ_GLBL_CFG1, 0); | ||
| 2188 | |||
| 2189 | WREG32(mmTPC1_QM_GLBL_CFG1, 0); | ||
| 2190 | WREG32(mmTPC1_CMDQ_GLBL_CFG1, 0); | ||
| 2191 | |||
| 2192 | WREG32(mmTPC2_QM_GLBL_CFG1, 0); | ||
| 2193 | WREG32(mmTPC2_CMDQ_GLBL_CFG1, 0); | ||
| 2194 | |||
| 2195 | WREG32(mmTPC3_QM_GLBL_CFG1, 0); | ||
| 2196 | WREG32(mmTPC3_CMDQ_GLBL_CFG1, 0); | ||
| 2197 | |||
| 2198 | WREG32(mmTPC4_QM_GLBL_CFG1, 0); | ||
| 2199 | WREG32(mmTPC4_CMDQ_GLBL_CFG1, 0); | ||
| 2200 | |||
| 2201 | WREG32(mmTPC5_QM_GLBL_CFG1, 0); | ||
| 2202 | WREG32(mmTPC5_CMDQ_GLBL_CFG1, 0); | ||
| 2203 | |||
| 2204 | WREG32(mmTPC6_QM_GLBL_CFG1, 0); | ||
| 2205 | WREG32(mmTPC6_CMDQ_GLBL_CFG1, 0); | ||
| 2206 | |||
| 2207 | WREG32(mmTPC7_QM_GLBL_CFG1, 0); | ||
| 2208 | WREG32(mmTPC7_CMDQ_GLBL_CFG1, 0); | ||
| 2209 | } | ||
| 2210 | |||
| 2211 | static void goya_dma_stall(struct hl_device *hdev) | 2172 | static void goya_dma_stall(struct hl_device *hdev) |
| 2212 | { | 2173 | { |
| 2213 | WREG32(mmDMA_QM_0_GLBL_CFG1, 1 << DMA_QM_0_GLBL_CFG1_DMA_STOP_SHIFT); | 2174 | WREG32(mmDMA_QM_0_GLBL_CFG1, 1 << DMA_QM_0_GLBL_CFG1_DMA_STOP_SHIFT); |
| @@ -2905,20 +2866,6 @@ int goya_suspend(struct hl_device *hdev) | |||
| 2905 | { | 2866 | { |
| 2906 | int rc; | 2867 | int rc; |
| 2907 | 2868 | ||
| 2908 | rc = goya_stop_internal_queues(hdev); | ||
| 2909 | |||
| 2910 | if (rc) { | ||
| 2911 | dev_err(hdev->dev, "failed to stop internal queues\n"); | ||
| 2912 | return rc; | ||
| 2913 | } | ||
| 2914 | |||
| 2915 | rc = goya_stop_external_queues(hdev); | ||
| 2916 | |||
| 2917 | if (rc) { | ||
| 2918 | dev_err(hdev->dev, "failed to stop external queues\n"); | ||
| 2919 | return rc; | ||
| 2920 | } | ||
| 2921 | |||
| 2922 | rc = goya_send_pci_access_msg(hdev, ARMCP_PACKET_DISABLE_PCI_ACCESS); | 2869 | rc = goya_send_pci_access_msg(hdev, ARMCP_PACKET_DISABLE_PCI_ACCESS); |
| 2923 | if (rc) | 2870 | if (rc) |
| 2924 | dev_err(hdev->dev, "Failed to disable PCI access from CPU\n"); | 2871 | dev_err(hdev->dev, "Failed to disable PCI access from CPU\n"); |
| @@ -2928,15 +2875,7 @@ int goya_suspend(struct hl_device *hdev) | |||
| 2928 | 2875 | ||
| 2929 | int goya_resume(struct hl_device *hdev) | 2876 | int goya_resume(struct hl_device *hdev) |
| 2930 | { | 2877 | { |
| 2931 | int rc; | 2878 | return goya_init_iatu(hdev); |
| 2932 | |||
| 2933 | goya_resume_external_queues(hdev); | ||
| 2934 | goya_resume_internal_queues(hdev); | ||
| 2935 | |||
| 2936 | rc = goya_send_pci_access_msg(hdev, ARMCP_PACKET_ENABLE_PCI_ACCESS); | ||
| 2937 | if (rc) | ||
| 2938 | dev_err(hdev->dev, "Failed to enable PCI access from CPU\n"); | ||
| 2939 | return rc; | ||
| 2940 | } | 2879 | } |
| 2941 | 2880 | ||
| 2942 | static int goya_cb_mmap(struct hl_device *hdev, struct vm_area_struct *vma, | 2881 | static int goya_cb_mmap(struct hl_device *hdev, struct vm_area_struct *vma, |
| @@ -3070,7 +3009,7 @@ void *goya_get_int_queue_base(struct hl_device *hdev, u32 queue_id, | |||
| 3070 | 3009 | ||
| 3071 | *dma_handle = hdev->asic_prop.sram_base_address; | 3010 | *dma_handle = hdev->asic_prop.sram_base_address; |
| 3072 | 3011 | ||
| 3073 | base = hdev->pcie_bar[SRAM_CFG_BAR_ID]; | 3012 | base = (void *) hdev->pcie_bar[SRAM_CFG_BAR_ID]; |
| 3074 | 3013 | ||
| 3075 | switch (queue_id) { | 3014 | switch (queue_id) { |
| 3076 | case GOYA_QUEUE_ID_MME: | 3015 | case GOYA_QUEUE_ID_MME: |
diff --git a/drivers/misc/habanalabs/habanalabs.h b/drivers/misc/habanalabs/habanalabs.h index a7c95e9f9b9a..a8ee52c880cd 100644 --- a/drivers/misc/habanalabs/habanalabs.h +++ b/drivers/misc/habanalabs/habanalabs.h | |||
| @@ -793,11 +793,11 @@ struct hl_vm_hash_node { | |||
| 793 | * struct hl_vm_phys_pg_pack - physical page pack. | 793 | * struct hl_vm_phys_pg_pack - physical page pack. |
| 794 | * @vm_type: describes the type of the virtual area descriptor. | 794 | * @vm_type: describes the type of the virtual area descriptor. |
| 795 | * @pages: the physical page array. | 795 | * @pages: the physical page array. |
| 796 | * @npages: num physical pages in the pack. | ||
| 797 | * @total_size: total size of all the pages in this list. | ||
| 796 | * @mapping_cnt: number of shared mappings. | 798 | * @mapping_cnt: number of shared mappings. |
| 797 | * @asid: the context related to this list. | 799 | * @asid: the context related to this list. |
| 798 | * @npages: num physical pages in the pack. | ||
| 799 | * @page_size: size of each page in the pack. | 800 | * @page_size: size of each page in the pack. |
| 800 | * @total_size: total size of all the pages in this list. | ||
| 801 | * @flags: HL_MEM_* flags related to this list. | 801 | * @flags: HL_MEM_* flags related to this list. |
| 802 | * @handle: the provided handle related to this list. | 802 | * @handle: the provided handle related to this list. |
| 803 | * @offset: offset from the first page. | 803 | * @offset: offset from the first page. |
| @@ -807,11 +807,11 @@ struct hl_vm_hash_node { | |||
| 807 | struct hl_vm_phys_pg_pack { | 807 | struct hl_vm_phys_pg_pack { |
| 808 | enum vm_type_t vm_type; /* must be first */ | 808 | enum vm_type_t vm_type; /* must be first */ |
| 809 | u64 *pages; | 809 | u64 *pages; |
| 810 | u64 npages; | ||
| 811 | u64 total_size; | ||
| 810 | atomic_t mapping_cnt; | 812 | atomic_t mapping_cnt; |
| 811 | u32 asid; | 813 | u32 asid; |
| 812 | u32 npages; | ||
| 813 | u32 page_size; | 814 | u32 page_size; |
| 814 | u32 total_size; | ||
| 815 | u32 flags; | 815 | u32 flags; |
| 816 | u32 handle; | 816 | u32 handle; |
| 817 | u32 offset; | 817 | u32 offset; |
| @@ -1056,13 +1056,15 @@ struct hl_device_reset_work { | |||
| 1056 | * @cb_pool_lock: protects the CB pool. | 1056 | * @cb_pool_lock: protects the CB pool. |
| 1057 | * @user_ctx: current user context executing. | 1057 | * @user_ctx: current user context executing. |
| 1058 | * @dram_used_mem: current DRAM memory consumption. | 1058 | * @dram_used_mem: current DRAM memory consumption. |
| 1059 | * @in_reset: is device in reset flow. | ||
| 1060 | * @curr_pll_profile: current PLL profile. | ||
| 1061 | * @fd_open_cnt: number of open user processes. | ||
| 1062 | * @timeout_jiffies: device CS timeout value. | 1059 | * @timeout_jiffies: device CS timeout value. |
| 1063 | * @max_power: the max power of the device, as configured by the sysadmin. This | 1060 | * @max_power: the max power of the device, as configured by the sysadmin. This |
| 1064 | * value is saved so in case of hard-reset, KMD will restore this | 1061 | * value is saved so in case of hard-reset, KMD will restore this |
| 1065 | * value and update the F/W after the re-initialization | 1062 | * value and update the F/W after the re-initialization |
| 1063 | * @in_reset: is device in reset flow. | ||
| 1064 | * @curr_pll_profile: current PLL profile. | ||
| 1065 | * @fd_open_cnt: number of open user processes. | ||
| 1066 | * @cs_active_cnt: number of active command submissions on this device (active | ||
| 1067 | * means already in H/W queues) | ||
| 1066 | * @major: habanalabs KMD major. | 1068 | * @major: habanalabs KMD major. |
| 1067 | * @high_pll: high PLL profile frequency. | 1069 | * @high_pll: high PLL profile frequency. |
| 1068 | * @soft_reset_cnt: number of soft reset since KMD loading. | 1070 | * @soft_reset_cnt: number of soft reset since KMD loading. |
| @@ -1128,11 +1130,12 @@ struct hl_device { | |||
| 1128 | struct hl_ctx *user_ctx; | 1130 | struct hl_ctx *user_ctx; |
| 1129 | 1131 | ||
| 1130 | atomic64_t dram_used_mem; | 1132 | atomic64_t dram_used_mem; |
| 1133 | u64 timeout_jiffies; | ||
| 1134 | u64 max_power; | ||
| 1131 | atomic_t in_reset; | 1135 | atomic_t in_reset; |
| 1132 | atomic_t curr_pll_profile; | 1136 | atomic_t curr_pll_profile; |
| 1133 | atomic_t fd_open_cnt; | 1137 | atomic_t fd_open_cnt; |
| 1134 | u64 timeout_jiffies; | 1138 | atomic_t cs_active_cnt; |
| 1135 | u64 max_power; | ||
| 1136 | u32 major; | 1139 | u32 major; |
| 1137 | u32 high_pll; | 1140 | u32 high_pll; |
| 1138 | u32 soft_reset_cnt; | 1141 | u32 soft_reset_cnt; |
diff --git a/drivers/misc/habanalabs/hw_queue.c b/drivers/misc/habanalabs/hw_queue.c index 67bece26417c..ef3bb6951360 100644 --- a/drivers/misc/habanalabs/hw_queue.c +++ b/drivers/misc/habanalabs/hw_queue.c | |||
| @@ -370,12 +370,13 @@ int hl_hw_queue_schedule_cs(struct hl_cs *cs) | |||
| 370 | spin_unlock(&hdev->hw_queues_mirror_lock); | 370 | spin_unlock(&hdev->hw_queues_mirror_lock); |
| 371 | } | 371 | } |
| 372 | 372 | ||
| 373 | list_for_each_entry_safe(job, tmp, &cs->job_list, cs_node) { | 373 | atomic_inc(&hdev->cs_active_cnt); |
| 374 | |||
| 375 | list_for_each_entry_safe(job, tmp, &cs->job_list, cs_node) | ||
| 374 | if (job->ext_queue) | 376 | if (job->ext_queue) |
| 375 | ext_hw_queue_schedule_job(job); | 377 | ext_hw_queue_schedule_job(job); |
| 376 | else | 378 | else |
| 377 | int_hw_queue_schedule_job(job); | 379 | int_hw_queue_schedule_job(job); |
| 378 | } | ||
| 379 | 380 | ||
| 380 | cs->submitted = true; | 381 | cs->submitted = true; |
| 381 | 382 | ||
diff --git a/drivers/misc/habanalabs/memory.c b/drivers/misc/habanalabs/memory.c index 3a12fd1a5274..ce1fda40a8b8 100644 --- a/drivers/misc/habanalabs/memory.c +++ b/drivers/misc/habanalabs/memory.c | |||
| @@ -56,9 +56,9 @@ static int alloc_device_memory(struct hl_ctx *ctx, struct hl_mem_in *args, | |||
| 56 | struct hl_device *hdev = ctx->hdev; | 56 | struct hl_device *hdev = ctx->hdev; |
| 57 | struct hl_vm *vm = &hdev->vm; | 57 | struct hl_vm *vm = &hdev->vm; |
| 58 | struct hl_vm_phys_pg_pack *phys_pg_pack; | 58 | struct hl_vm_phys_pg_pack *phys_pg_pack; |
| 59 | u64 paddr = 0; | 59 | u64 paddr = 0, total_size, num_pgs, i; |
| 60 | u32 total_size, num_pgs, num_curr_pgs, page_size, page_shift; | 60 | u32 num_curr_pgs, page_size, page_shift; |
| 61 | int handle, rc, i; | 61 | int handle, rc; |
| 62 | bool contiguous; | 62 | bool contiguous; |
| 63 | 63 | ||
| 64 | num_curr_pgs = 0; | 64 | num_curr_pgs = 0; |
| @@ -73,7 +73,7 @@ static int alloc_device_memory(struct hl_ctx *ctx, struct hl_mem_in *args, | |||
| 73 | paddr = (u64) gen_pool_alloc(vm->dram_pg_pool, total_size); | 73 | paddr = (u64) gen_pool_alloc(vm->dram_pg_pool, total_size); |
| 74 | if (!paddr) { | 74 | if (!paddr) { |
| 75 | dev_err(hdev->dev, | 75 | dev_err(hdev->dev, |
| 76 | "failed to allocate %u huge contiguous pages\n", | 76 | "failed to allocate %llu huge contiguous pages\n", |
| 77 | num_pgs); | 77 | num_pgs); |
| 78 | return -ENOMEM; | 78 | return -ENOMEM; |
| 79 | } | 79 | } |
| @@ -93,7 +93,7 @@ static int alloc_device_memory(struct hl_ctx *ctx, struct hl_mem_in *args, | |||
| 93 | phys_pg_pack->flags = args->flags; | 93 | phys_pg_pack->flags = args->flags; |
| 94 | phys_pg_pack->contiguous = contiguous; | 94 | phys_pg_pack->contiguous = contiguous; |
| 95 | 95 | ||
| 96 | phys_pg_pack->pages = kcalloc(num_pgs, sizeof(u64), GFP_KERNEL); | 96 | phys_pg_pack->pages = kvmalloc_array(num_pgs, sizeof(u64), GFP_KERNEL); |
| 97 | if (!phys_pg_pack->pages) { | 97 | if (!phys_pg_pack->pages) { |
| 98 | rc = -ENOMEM; | 98 | rc = -ENOMEM; |
| 99 | goto pages_arr_err; | 99 | goto pages_arr_err; |
| @@ -148,7 +148,7 @@ page_err: | |||
| 148 | gen_pool_free(vm->dram_pg_pool, phys_pg_pack->pages[i], | 148 | gen_pool_free(vm->dram_pg_pool, phys_pg_pack->pages[i], |
| 149 | page_size); | 149 | page_size); |
| 150 | 150 | ||
| 151 | kfree(phys_pg_pack->pages); | 151 | kvfree(phys_pg_pack->pages); |
| 152 | pages_arr_err: | 152 | pages_arr_err: |
| 153 | kfree(phys_pg_pack); | 153 | kfree(phys_pg_pack); |
| 154 | pages_pack_err: | 154 | pages_pack_err: |
| @@ -267,7 +267,7 @@ static void free_phys_pg_pack(struct hl_device *hdev, | |||
| 267 | struct hl_vm_phys_pg_pack *phys_pg_pack) | 267 | struct hl_vm_phys_pg_pack *phys_pg_pack) |
| 268 | { | 268 | { |
| 269 | struct hl_vm *vm = &hdev->vm; | 269 | struct hl_vm *vm = &hdev->vm; |
| 270 | int i; | 270 | u64 i; |
| 271 | 271 | ||
| 272 | if (!phys_pg_pack->created_from_userptr) { | 272 | if (!phys_pg_pack->created_from_userptr) { |
| 273 | if (phys_pg_pack->contiguous) { | 273 | if (phys_pg_pack->contiguous) { |
| @@ -288,7 +288,7 @@ static void free_phys_pg_pack(struct hl_device *hdev, | |||
| 288 | } | 288 | } |
| 289 | } | 289 | } |
| 290 | 290 | ||
| 291 | kfree(phys_pg_pack->pages); | 291 | kvfree(phys_pg_pack->pages); |
| 292 | kfree(phys_pg_pack); | 292 | kfree(phys_pg_pack); |
| 293 | } | 293 | } |
| 294 | 294 | ||
| @@ -519,7 +519,7 @@ static inline int add_va_block(struct hl_device *hdev, | |||
| 519 | * - Return the start address of the virtual block | 519 | * - Return the start address of the virtual block |
| 520 | */ | 520 | */ |
| 521 | static u64 get_va_block(struct hl_device *hdev, | 521 | static u64 get_va_block(struct hl_device *hdev, |
| 522 | struct hl_va_range *va_range, u32 size, u64 hint_addr, | 522 | struct hl_va_range *va_range, u64 size, u64 hint_addr, |
| 523 | bool is_userptr) | 523 | bool is_userptr) |
| 524 | { | 524 | { |
| 525 | struct hl_vm_va_block *va_block, *new_va_block = NULL; | 525 | struct hl_vm_va_block *va_block, *new_va_block = NULL; |
| @@ -577,7 +577,8 @@ static u64 get_va_block(struct hl_device *hdev, | |||
| 577 | } | 577 | } |
| 578 | 578 | ||
| 579 | if (!new_va_block) { | 579 | if (!new_va_block) { |
| 580 | dev_err(hdev->dev, "no available va block for size %u\n", size); | 580 | dev_err(hdev->dev, "no available va block for size %llu\n", |
| 581 | size); | ||
| 581 | goto out; | 582 | goto out; |
| 582 | } | 583 | } |
| 583 | 584 | ||
| @@ -648,8 +649,8 @@ static int init_phys_pg_pack_from_userptr(struct hl_ctx *ctx, | |||
| 648 | struct hl_vm_phys_pg_pack *phys_pg_pack; | 649 | struct hl_vm_phys_pg_pack *phys_pg_pack; |
| 649 | struct scatterlist *sg; | 650 | struct scatterlist *sg; |
| 650 | dma_addr_t dma_addr; | 651 | dma_addr_t dma_addr; |
| 651 | u64 page_mask; | 652 | u64 page_mask, total_npages; |
| 652 | u32 npages, total_npages, page_size = PAGE_SIZE; | 653 | u32 npages, page_size = PAGE_SIZE; |
| 653 | bool first = true, is_huge_page_opt = true; | 654 | bool first = true, is_huge_page_opt = true; |
| 654 | int rc, i, j; | 655 | int rc, i, j; |
| 655 | 656 | ||
| @@ -691,7 +692,8 @@ static int init_phys_pg_pack_from_userptr(struct hl_ctx *ctx, | |||
| 691 | 692 | ||
| 692 | page_mask = ~(((u64) page_size) - 1); | 693 | page_mask = ~(((u64) page_size) - 1); |
| 693 | 694 | ||
| 694 | phys_pg_pack->pages = kcalloc(total_npages, sizeof(u64), GFP_KERNEL); | 695 | phys_pg_pack->pages = kvmalloc_array(total_npages, sizeof(u64), |
| 696 | GFP_KERNEL); | ||
| 695 | if (!phys_pg_pack->pages) { | 697 | if (!phys_pg_pack->pages) { |
| 696 | rc = -ENOMEM; | 698 | rc = -ENOMEM; |
| 697 | goto page_pack_arr_mem_err; | 699 | goto page_pack_arr_mem_err; |
| @@ -750,9 +752,9 @@ static int map_phys_page_pack(struct hl_ctx *ctx, u64 vaddr, | |||
| 750 | struct hl_vm_phys_pg_pack *phys_pg_pack) | 752 | struct hl_vm_phys_pg_pack *phys_pg_pack) |
| 751 | { | 753 | { |
| 752 | struct hl_device *hdev = ctx->hdev; | 754 | struct hl_device *hdev = ctx->hdev; |
| 753 | u64 next_vaddr = vaddr, paddr; | 755 | u64 next_vaddr = vaddr, paddr, mapped_pg_cnt = 0, i; |
| 754 | u32 page_size = phys_pg_pack->page_size; | 756 | u32 page_size = phys_pg_pack->page_size; |
| 755 | int i, rc = 0, mapped_pg_cnt = 0; | 757 | int rc = 0; |
| 756 | 758 | ||
| 757 | for (i = 0 ; i < phys_pg_pack->npages ; i++) { | 759 | for (i = 0 ; i < phys_pg_pack->npages ; i++) { |
| 758 | paddr = phys_pg_pack->pages[i]; | 760 | paddr = phys_pg_pack->pages[i]; |
| @@ -764,7 +766,7 @@ static int map_phys_page_pack(struct hl_ctx *ctx, u64 vaddr, | |||
| 764 | rc = hl_mmu_map(ctx, next_vaddr, paddr, page_size); | 766 | rc = hl_mmu_map(ctx, next_vaddr, paddr, page_size); |
| 765 | if (rc) { | 767 | if (rc) { |
| 766 | dev_err(hdev->dev, | 768 | dev_err(hdev->dev, |
| 767 | "map failed for handle %u, npages: %d, mapped: %d", | 769 | "map failed for handle %u, npages: %llu, mapped: %llu", |
| 768 | phys_pg_pack->handle, phys_pg_pack->npages, | 770 | phys_pg_pack->handle, phys_pg_pack->npages, |
| 769 | mapped_pg_cnt); | 771 | mapped_pg_cnt); |
| 770 | goto err; | 772 | goto err; |
| @@ -985,10 +987,10 @@ static int unmap_device_va(struct hl_ctx *ctx, u64 vaddr) | |||
| 985 | struct hl_vm_hash_node *hnode = NULL; | 987 | struct hl_vm_hash_node *hnode = NULL; |
| 986 | struct hl_userptr *userptr = NULL; | 988 | struct hl_userptr *userptr = NULL; |
| 987 | enum vm_type_t *vm_type; | 989 | enum vm_type_t *vm_type; |
| 988 | u64 next_vaddr; | 990 | u64 next_vaddr, i; |
| 989 | u32 page_size; | 991 | u32 page_size; |
| 990 | bool is_userptr; | 992 | bool is_userptr; |
| 991 | int i, rc; | 993 | int rc; |
| 992 | 994 | ||
| 993 | /* protect from double entrance */ | 995 | /* protect from double entrance */ |
| 994 | mutex_lock(&ctx->mem_hash_lock); | 996 | mutex_lock(&ctx->mem_hash_lock); |
diff --git a/drivers/misc/habanalabs/mmu.c b/drivers/misc/habanalabs/mmu.c index 2f2e99cb2743..3a5a2cec8305 100644 --- a/drivers/misc/habanalabs/mmu.c +++ b/drivers/misc/habanalabs/mmu.c | |||
| @@ -832,7 +832,7 @@ err: | |||
| 832 | int hl_mmu_map(struct hl_ctx *ctx, u64 virt_addr, u64 phys_addr, u32 page_size) | 832 | int hl_mmu_map(struct hl_ctx *ctx, u64 virt_addr, u64 phys_addr, u32 page_size) |
| 833 | { | 833 | { |
| 834 | struct hl_device *hdev = ctx->hdev; | 834 | struct hl_device *hdev = ctx->hdev; |
| 835 | u64 real_virt_addr; | 835 | u64 real_virt_addr, real_phys_addr; |
| 836 | u32 real_page_size, npages; | 836 | u32 real_page_size, npages; |
| 837 | int i, rc, mapped_cnt = 0; | 837 | int i, rc, mapped_cnt = 0; |
| 838 | 838 | ||
| @@ -857,14 +857,16 @@ int hl_mmu_map(struct hl_ctx *ctx, u64 virt_addr, u64 phys_addr, u32 page_size) | |||
| 857 | 857 | ||
| 858 | npages = page_size / real_page_size; | 858 | npages = page_size / real_page_size; |
| 859 | real_virt_addr = virt_addr; | 859 | real_virt_addr = virt_addr; |
| 860 | real_phys_addr = phys_addr; | ||
| 860 | 861 | ||
| 861 | for (i = 0 ; i < npages ; i++) { | 862 | for (i = 0 ; i < npages ; i++) { |
| 862 | rc = _hl_mmu_map(ctx, real_virt_addr, phys_addr, | 863 | rc = _hl_mmu_map(ctx, real_virt_addr, real_phys_addr, |
| 863 | real_page_size); | 864 | real_page_size); |
| 864 | if (rc) | 865 | if (rc) |
| 865 | goto err; | 866 | goto err; |
| 866 | 867 | ||
| 867 | real_virt_addr += real_page_size; | 868 | real_virt_addr += real_page_size; |
| 869 | real_phys_addr += real_page_size; | ||
| 868 | mapped_cnt++; | 870 | mapped_cnt++; |
| 869 | } | 871 | } |
| 870 | 872 | ||
diff --git a/drivers/mmc/host/alcor.c b/drivers/mmc/host/alcor.c index c712b7deb3a9..82a97866e0cf 100644 --- a/drivers/mmc/host/alcor.c +++ b/drivers/mmc/host/alcor.c | |||
| @@ -1044,14 +1044,27 @@ static void alcor_init_mmc(struct alcor_sdmmc_host *host) | |||
| 1044 | mmc->caps2 = MMC_CAP2_NO_SDIO; | 1044 | mmc->caps2 = MMC_CAP2_NO_SDIO; |
| 1045 | mmc->ops = &alcor_sdc_ops; | 1045 | mmc->ops = &alcor_sdc_ops; |
| 1046 | 1046 | ||
| 1047 | /* Hardware cannot do scatter lists */ | 1047 | /* The hardware does DMA data transfer of 4096 bytes to/from a single |
| 1048 | * buffer address. Scatterlists are not supported, but upon DMA | ||
| 1049 | * completion (signalled via IRQ), the original vendor driver does | ||
| 1050 | * then immediately set up another DMA transfer of the next 4096 | ||
| 1051 | * bytes. | ||
| 1052 | * | ||
| 1053 | * This means that we need to handle the I/O in 4096 byte chunks. | ||
| 1054 | * Lacking a way to limit the sglist entries to 4096 bytes, we instead | ||
| 1055 | * impose that only one segment is provided, with maximum size 4096, | ||
| 1056 | * which also happens to be the minimum size. This means that the | ||
| 1057 | * single-entry sglist handled by this driver can be handed directly | ||
| 1058 | * to the hardware, nice and simple. | ||
| 1059 | * | ||
| 1060 | * Unfortunately though, that means we only do 4096 bytes I/O per | ||
| 1061 | * MMC command. A future improvement would be to make the driver | ||
| 1062 | * accept sg lists and entries of any size, and simply iterate | ||
| 1063 | * through them 4096 bytes at a time. | ||
| 1064 | */ | ||
| 1048 | mmc->max_segs = AU6601_MAX_DMA_SEGMENTS; | 1065 | mmc->max_segs = AU6601_MAX_DMA_SEGMENTS; |
| 1049 | mmc->max_seg_size = AU6601_MAX_DMA_BLOCK_SIZE; | 1066 | mmc->max_seg_size = AU6601_MAX_DMA_BLOCK_SIZE; |
| 1050 | 1067 | mmc->max_req_size = mmc->max_seg_size; | |
| 1051 | mmc->max_blk_size = mmc->max_seg_size; | ||
| 1052 | mmc->max_blk_count = mmc->max_segs; | ||
| 1053 | |||
| 1054 | mmc->max_req_size = mmc->max_seg_size * mmc->max_segs; | ||
| 1055 | } | 1068 | } |
| 1056 | 1069 | ||
| 1057 | static int alcor_pci_sdmmc_drv_probe(struct platform_device *pdev) | 1070 | static int alcor_pci_sdmmc_drv_probe(struct platform_device *pdev) |
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c index 49e0daf2ef5e..f37003df1e01 100644 --- a/drivers/mmc/host/davinci_mmc.c +++ b/drivers/mmc/host/davinci_mmc.c | |||
| @@ -1117,7 +1117,7 @@ static inline void mmc_davinci_cpufreq_deregister(struct mmc_davinci_host *host) | |||
| 1117 | { | 1117 | { |
| 1118 | } | 1118 | } |
| 1119 | #endif | 1119 | #endif |
| 1120 | static void __init init_mmcsd_host(struct mmc_davinci_host *host) | 1120 | static void init_mmcsd_host(struct mmc_davinci_host *host) |
| 1121 | { | 1121 | { |
| 1122 | 1122 | ||
| 1123 | mmc_davinci_reset_ctrl(host, 1); | 1123 | mmc_davinci_reset_ctrl(host, 1); |
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index d54612257b06..45f7b9b53d48 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c | |||
| @@ -290,11 +290,8 @@ static void mxcmci_swap_buffers(struct mmc_data *data) | |||
| 290 | struct scatterlist *sg; | 290 | struct scatterlist *sg; |
| 291 | int i; | 291 | int i; |
| 292 | 292 | ||
| 293 | for_each_sg(data->sg, sg, data->sg_len, i) { | 293 | for_each_sg(data->sg, sg, data->sg_len, i) |
| 294 | void *buf = kmap_atomic(sg_page(sg) + sg->offset); | 294 | buffer_swap32(sg_virt(sg), sg->length); |
| 295 | buffer_swap32(buf, sg->length); | ||
| 296 | kunmap_atomic(buf); | ||
| 297 | } | ||
| 298 | } | 295 | } |
| 299 | #else | 296 | #else |
| 300 | static inline void mxcmci_swap_buffers(struct mmc_data *data) {} | 297 | static inline void mxcmci_swap_buffers(struct mmc_data *data) {} |
| @@ -611,7 +608,6 @@ static int mxcmci_transfer_data(struct mxcmci_host *host) | |||
| 611 | { | 608 | { |
| 612 | struct mmc_data *data = host->req->data; | 609 | struct mmc_data *data = host->req->data; |
| 613 | struct scatterlist *sg; | 610 | struct scatterlist *sg; |
| 614 | void *buf; | ||
| 615 | int stat, i; | 611 | int stat, i; |
| 616 | 612 | ||
| 617 | host->data = data; | 613 | host->data = data; |
| @@ -619,18 +615,14 @@ static int mxcmci_transfer_data(struct mxcmci_host *host) | |||
| 619 | 615 | ||
| 620 | if (data->flags & MMC_DATA_READ) { | 616 | if (data->flags & MMC_DATA_READ) { |
| 621 | for_each_sg(data->sg, sg, data->sg_len, i) { | 617 | for_each_sg(data->sg, sg, data->sg_len, i) { |
| 622 | buf = kmap_atomic(sg_page(sg) + sg->offset); | 618 | stat = mxcmci_pull(host, sg_virt(sg), sg->length); |
| 623 | stat = mxcmci_pull(host, buf, sg->length); | ||
| 624 | kunmap(buf); | ||
| 625 | if (stat) | 619 | if (stat) |
| 626 | return stat; | 620 | return stat; |
| 627 | host->datasize += sg->length; | 621 | host->datasize += sg->length; |
| 628 | } | 622 | } |
| 629 | } else { | 623 | } else { |
| 630 | for_each_sg(data->sg, sg, data->sg_len, i) { | 624 | for_each_sg(data->sg, sg, data->sg_len, i) { |
| 631 | buf = kmap_atomic(sg_page(sg) + sg->offset); | 625 | stat = mxcmci_push(host, sg_virt(sg), sg->length); |
| 632 | stat = mxcmci_push(host, buf, sg->length); | ||
| 633 | kunmap(buf); | ||
| 634 | if (stat) | 626 | if (stat) |
| 635 | return stat; | 627 | return stat; |
| 636 | host->datasize += sg->length; | 628 | host->datasize += sg->length; |
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index c907bf502a12..c1d3f0e38921 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c | |||
| @@ -162,7 +162,7 @@ static void pxamci_dma_irq(void *param); | |||
| 162 | static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data) | 162 | static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data) |
| 163 | { | 163 | { |
| 164 | struct dma_async_tx_descriptor *tx; | 164 | struct dma_async_tx_descriptor *tx; |
| 165 | enum dma_data_direction direction; | 165 | enum dma_transfer_direction direction; |
| 166 | struct dma_slave_config config; | 166 | struct dma_slave_config config; |
| 167 | struct dma_chan *chan; | 167 | struct dma_chan *chan; |
| 168 | unsigned int nob = data->blocks; | 168 | unsigned int nob = data->blocks; |
diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index 71e13844df6c..8742e27e4e8b 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c | |||
| @@ -641,6 +641,7 @@ int renesas_sdhi_probe(struct platform_device *pdev, | |||
| 641 | struct renesas_sdhi *priv; | 641 | struct renesas_sdhi *priv; |
| 642 | struct resource *res; | 642 | struct resource *res; |
| 643 | int irq, ret, i; | 643 | int irq, ret, i; |
| 644 | u16 ver; | ||
| 644 | 645 | ||
| 645 | of_data = of_device_get_match_data(&pdev->dev); | 646 | of_data = of_device_get_match_data(&pdev->dev); |
| 646 | 647 | ||
| @@ -773,12 +774,17 @@ int renesas_sdhi_probe(struct platform_device *pdev, | |||
| 773 | if (ret) | 774 | if (ret) |
| 774 | goto efree; | 775 | goto efree; |
| 775 | 776 | ||
| 777 | ver = sd_ctrl_read16(host, CTL_VERSION); | ||
| 778 | /* GEN2_SDR104 is first known SDHI to use 32bit block count */ | ||
| 779 | if (ver < SDHI_VER_GEN2_SDR104 && mmc_data->max_blk_count > U16_MAX) | ||
| 780 | mmc_data->max_blk_count = U16_MAX; | ||
| 781 | |||
| 776 | ret = tmio_mmc_host_probe(host); | 782 | ret = tmio_mmc_host_probe(host); |
| 777 | if (ret < 0) | 783 | if (ret < 0) |
| 778 | goto edisclk; | 784 | goto edisclk; |
| 779 | 785 | ||
| 780 | /* One Gen2 SDHI incarnation does NOT have a CBSY bit */ | 786 | /* One Gen2 SDHI incarnation does NOT have a CBSY bit */ |
| 781 | if (sd_ctrl_read16(host, CTL_VERSION) == SDHI_VER_GEN2_SDR50) | 787 | if (ver == SDHI_VER_GEN2_SDR50) |
| 782 | mmc_data->flags &= ~TMIO_MMC_HAVE_CBSY; | 788 | mmc_data->flags &= ~TMIO_MMC_HAVE_CBSY; |
| 783 | 789 | ||
| 784 | /* Enable tuning iff we have an SCC and a supported mode */ | 790 | /* Enable tuning iff we have an SCC and a supported mode */ |
diff --git a/drivers/mmc/host/sdhci-omap.c b/drivers/mmc/host/sdhci-omap.c index b1a66ca3821a..5bbed477c9b1 100644 --- a/drivers/mmc/host/sdhci-omap.c +++ b/drivers/mmc/host/sdhci-omap.c | |||
| @@ -1056,6 +1056,9 @@ static int sdhci_omap_probe(struct platform_device *pdev) | |||
| 1056 | mmc->f_max = 48000000; | 1056 | mmc->f_max = 48000000; |
| 1057 | } | 1057 | } |
| 1058 | 1058 | ||
| 1059 | if (!mmc_can_gpio_ro(mmc)) | ||
| 1060 | mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; | ||
| 1061 | |||
| 1059 | pltfm_host->clk = devm_clk_get(dev, "fck"); | 1062 | pltfm_host->clk = devm_clk_get(dev, "fck"); |
| 1060 | if (IS_ERR(pltfm_host->clk)) { | 1063 | if (IS_ERR(pltfm_host->clk)) { |
| 1061 | ret = PTR_ERR(pltfm_host->clk); | 1064 | ret = PTR_ERR(pltfm_host->clk); |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5e4ca082cfcd..7a96d168efc4 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
| @@ -216,8 +216,8 @@ config GENEVE | |||
| 216 | 216 | ||
| 217 | config GTP | 217 | config GTP |
| 218 | tristate "GPRS Tunneling Protocol datapath (GTP-U)" | 218 | tristate "GPRS Tunneling Protocol datapath (GTP-U)" |
| 219 | depends on INET && NET_UDP_TUNNEL | 219 | depends on INET |
| 220 | select NET_IP_TUNNEL | 220 | select NET_UDP_TUNNEL |
| 221 | ---help--- | 221 | ---help--- |
| 222 | This allows one to create gtp virtual interfaces that provide | 222 | This allows one to create gtp virtual interfaces that provide |
| 223 | the GPRS Tunneling Protocol datapath (GTP-U). This tunneling protocol | 223 | the GPRS Tunneling Protocol datapath (GTP-U). This tunneling protocol |
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 576b37d12a63..c4fa400efdcc 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c | |||
| @@ -481,6 +481,155 @@ qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable) | |||
| 481 | qca8k_reg_clear(priv, QCA8K_REG_PORT_STATUS(port), mask); | 481 | qca8k_reg_clear(priv, QCA8K_REG_PORT_STATUS(port), mask); |
| 482 | } | 482 | } |
| 483 | 483 | ||
| 484 | static u32 | ||
| 485 | qca8k_port_to_phy(int port) | ||
| 486 | { | ||
| 487 | /* From Andrew Lunn: | ||
| 488 | * Port 0 has no internal phy. | ||
| 489 | * Port 1 has an internal PHY at MDIO address 0. | ||
| 490 | * Port 2 has an internal PHY at MDIO address 1. | ||
| 491 | * ... | ||
| 492 | * Port 5 has an internal PHY at MDIO address 4. | ||
| 493 | * Port 6 has no internal PHY. | ||
| 494 | */ | ||
| 495 | |||
| 496 | return port - 1; | ||
| 497 | } | ||
| 498 | |||
| 499 | static int | ||
| 500 | qca8k_mdio_write(struct qca8k_priv *priv, int port, u32 regnum, u16 data) | ||
| 501 | { | ||
| 502 | u32 phy, val; | ||
| 503 | |||
| 504 | if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) | ||
| 505 | return -EINVAL; | ||
| 506 | |||
| 507 | /* callee is responsible for not passing bad ports, | ||
| 508 | * but we still would like to make spills impossible. | ||
| 509 | */ | ||
| 510 | phy = qca8k_port_to_phy(port) % PHY_MAX_ADDR; | ||
| 511 | val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | | ||
| 512 | QCA8K_MDIO_MASTER_WRITE | QCA8K_MDIO_MASTER_PHY_ADDR(phy) | | ||
| 513 | QCA8K_MDIO_MASTER_REG_ADDR(regnum) | | ||
| 514 | QCA8K_MDIO_MASTER_DATA(data); | ||
| 515 | |||
| 516 | qca8k_write(priv, QCA8K_MDIO_MASTER_CTRL, val); | ||
| 517 | |||
| 518 | return qca8k_busy_wait(priv, QCA8K_MDIO_MASTER_CTRL, | ||
| 519 | QCA8K_MDIO_MASTER_BUSY); | ||
| 520 | } | ||
| 521 | |||
| 522 | static int | ||
| 523 | qca8k_mdio_read(struct qca8k_priv *priv, int port, u32 regnum) | ||
| 524 | { | ||
| 525 | u32 phy, val; | ||
| 526 | |||
| 527 | if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) | ||
| 528 | return -EINVAL; | ||
| 529 | |||
| 530 | /* callee is responsible for not passing bad ports, | ||
| 531 | * but we still would like to make spills impossible. | ||
| 532 | */ | ||
| 533 | phy = qca8k_port_to_phy(port) % PHY_MAX_ADDR; | ||
| 534 | val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | | ||
| 535 | QCA8K_MDIO_MASTER_READ | QCA8K_MDIO_MASTER_PHY_ADDR(phy) | | ||
| 536 | QCA8K_MDIO_MASTER_REG_ADDR(regnum); | ||
| 537 | |||
| 538 | qca8k_write(priv, QCA8K_MDIO_MASTER_CTRL, val); | ||
| 539 | |||
| 540 | if (qca8k_busy_wait(priv, QCA8K_MDIO_MASTER_CTRL, | ||
| 541 | QCA8K_MDIO_MASTER_BUSY)) | ||
| 542 | return -ETIMEDOUT; | ||
| 543 | |||
| 544 | val = (qca8k_read(priv, QCA8K_MDIO_MASTER_CTRL) & | ||
| 545 | QCA8K_MDIO_MASTER_DATA_MASK); | ||
| 546 | |||
| 547 | return val; | ||
| 548 | } | ||
| 549 | |||
| 550 | static int | ||
| 551 | qca8k_phy_write(struct dsa_switch *ds, int port, int regnum, u16 data) | ||
| 552 | { | ||
| 553 | struct qca8k_priv *priv = ds->priv; | ||
| 554 | |||
| 555 | return qca8k_mdio_write(priv, port, regnum, data); | ||
| 556 | } | ||
| 557 | |||
| 558 | static int | ||
| 559 | qca8k_phy_read(struct dsa_switch *ds, int port, int regnum) | ||
| 560 | { | ||
| 561 | struct qca8k_priv *priv = ds->priv; | ||
| 562 | int ret; | ||
| 563 | |||
| 564 | ret = qca8k_mdio_read(priv, port, regnum); | ||
| 565 | |||
| 566 | if (ret < 0) | ||
| 567 | return 0xffff; | ||
| 568 | |||
| 569 | return ret; | ||
| 570 | } | ||
| 571 | |||
| 572 | static int | ||
| 573 | qca8k_setup_mdio_bus(struct qca8k_priv *priv) | ||
| 574 | { | ||
| 575 | u32 internal_mdio_mask = 0, external_mdio_mask = 0, reg; | ||
| 576 | struct device_node *ports, *port; | ||
| 577 | int err; | ||
| 578 | |||
| 579 | ports = of_get_child_by_name(priv->dev->of_node, "ports"); | ||
| 580 | if (!ports) | ||
| 581 | return -EINVAL; | ||
| 582 | |||
| 583 | for_each_available_child_of_node(ports, port) { | ||
| 584 | err = of_property_read_u32(port, "reg", ®); | ||
| 585 | if (err) | ||
| 586 | return err; | ||
| 587 | |||
| 588 | if (!dsa_is_user_port(priv->ds, reg)) | ||
| 589 | continue; | ||
| 590 | |||
| 591 | if (of_property_read_bool(port, "phy-handle")) | ||
| 592 | external_mdio_mask |= BIT(reg); | ||
| 593 | else | ||
| 594 | internal_mdio_mask |= BIT(reg); | ||
| 595 | } | ||
| 596 | |||
| 597 | if (!external_mdio_mask && !internal_mdio_mask) { | ||
| 598 | dev_err(priv->dev, "no PHYs are defined.\n"); | ||
| 599 | return -EINVAL; | ||
| 600 | } | ||
| 601 | |||
| 602 | /* The QCA8K_MDIO_MASTER_EN Bit, which grants access to PHYs through | ||
| 603 | * the MDIO_MASTER register also _disconnects_ the external MDC | ||
| 604 | * passthrough to the internal PHYs. It's not possible to use both | ||
| 605 | * configurations at the same time! | ||
| 606 | * | ||
| 607 | * Because this came up during the review process: | ||
| 608 | * If the external mdio-bus driver is capable magically disabling | ||
| 609 | * the QCA8K_MDIO_MASTER_EN and mutex/spin-locking out the qca8k's | ||
| 610 | * accessors for the time being, it would be possible to pull this | ||
| 611 | * off. | ||
| 612 | */ | ||
| 613 | if (!!external_mdio_mask && !!internal_mdio_mask) { | ||
| 614 | dev_err(priv->dev, "either internal or external mdio bus configuration is supported.\n"); | ||
| 615 | return -EINVAL; | ||
| 616 | } | ||
| 617 | |||
| 618 | if (external_mdio_mask) { | ||
| 619 | /* Make sure to disable the internal mdio bus in cases | ||
| 620 | * a dt-overlay and driver reload changed the configuration | ||
| 621 | */ | ||
| 622 | |||
| 623 | qca8k_reg_clear(priv, QCA8K_MDIO_MASTER_CTRL, | ||
| 624 | QCA8K_MDIO_MASTER_EN); | ||
| 625 | return 0; | ||
| 626 | } | ||
| 627 | |||
| 628 | priv->ops.phy_read = qca8k_phy_read; | ||
| 629 | priv->ops.phy_write = qca8k_phy_write; | ||
| 630 | return 0; | ||
| 631 | } | ||
| 632 | |||
| 484 | static int | 633 | static int |
| 485 | qca8k_setup(struct dsa_switch *ds) | 634 | qca8k_setup(struct dsa_switch *ds) |
| 486 | { | 635 | { |
| @@ -502,6 +651,10 @@ qca8k_setup(struct dsa_switch *ds) | |||
| 502 | if (IS_ERR(priv->regmap)) | 651 | if (IS_ERR(priv->regmap)) |
| 503 | pr_warn("regmap initialization failed"); | 652 | pr_warn("regmap initialization failed"); |
| 504 | 653 | ||
| 654 | ret = qca8k_setup_mdio_bus(priv); | ||
| 655 | if (ret) | ||
| 656 | return ret; | ||
| 657 | |||
| 505 | /* Initialize CPU port pad mode (xMII type, delays...) */ | 658 | /* Initialize CPU port pad mode (xMII type, delays...) */ |
| 506 | phy_mode = of_get_phy_mode(ds->ports[QCA8K_CPU_PORT].dn); | 659 | phy_mode = of_get_phy_mode(ds->ports[QCA8K_CPU_PORT].dn); |
| 507 | if (phy_mode < 0) { | 660 | if (phy_mode < 0) { |
| @@ -624,22 +777,6 @@ qca8k_adjust_link(struct dsa_switch *ds, int port, struct phy_device *phy) | |||
| 624 | qca8k_port_set_status(priv, port, 1); | 777 | qca8k_port_set_status(priv, port, 1); |
| 625 | } | 778 | } |
| 626 | 779 | ||
| 627 | static int | ||
| 628 | qca8k_phy_read(struct dsa_switch *ds, int phy, int regnum) | ||
| 629 | { | ||
| 630 | struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; | ||
| 631 | |||
| 632 | return mdiobus_read(priv->bus, phy, regnum); | ||
| 633 | } | ||
| 634 | |||
| 635 | static int | ||
| 636 | qca8k_phy_write(struct dsa_switch *ds, int phy, int regnum, u16 val) | ||
| 637 | { | ||
| 638 | struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; | ||
| 639 | |||
| 640 | return mdiobus_write(priv->bus, phy, regnum, val); | ||
| 641 | } | ||
| 642 | |||
| 643 | static void | 780 | static void |
| 644 | qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data) | 781 | qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data) |
| 645 | { | 782 | { |
| @@ -879,8 +1016,6 @@ static const struct dsa_switch_ops qca8k_switch_ops = { | |||
| 879 | .setup = qca8k_setup, | 1016 | .setup = qca8k_setup, |
| 880 | .adjust_link = qca8k_adjust_link, | 1017 | .adjust_link = qca8k_adjust_link, |
| 881 | .get_strings = qca8k_get_strings, | 1018 | .get_strings = qca8k_get_strings, |
| 882 | .phy_read = qca8k_phy_read, | ||
| 883 | .phy_write = qca8k_phy_write, | ||
| 884 | .get_ethtool_stats = qca8k_get_ethtool_stats, | 1019 | .get_ethtool_stats = qca8k_get_ethtool_stats, |
| 885 | .get_sset_count = qca8k_get_sset_count, | 1020 | .get_sset_count = qca8k_get_sset_count, |
| 886 | .get_mac_eee = qca8k_get_mac_eee, | 1021 | .get_mac_eee = qca8k_get_mac_eee, |
| @@ -923,7 +1058,8 @@ qca8k_sw_probe(struct mdio_device *mdiodev) | |||
| 923 | return -ENOMEM; | 1058 | return -ENOMEM; |
| 924 | 1059 | ||
| 925 | priv->ds->priv = priv; | 1060 | priv->ds->priv = priv; |
| 926 | priv->ds->ops = &qca8k_switch_ops; | 1061 | priv->ops = qca8k_switch_ops; |
| 1062 | priv->ds->ops = &priv->ops; | ||
| 927 | mutex_init(&priv->reg_mutex); | 1063 | mutex_init(&priv->reg_mutex); |
| 928 | dev_set_drvdata(&mdiodev->dev, priv); | 1064 | dev_set_drvdata(&mdiodev->dev, priv); |
| 929 | 1065 | ||
diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index d146e54c8a6c..249fd62268e5 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h | |||
| @@ -49,6 +49,18 @@ | |||
| 49 | #define QCA8K_MIB_FLUSH BIT(24) | 49 | #define QCA8K_MIB_FLUSH BIT(24) |
| 50 | #define QCA8K_MIB_CPU_KEEP BIT(20) | 50 | #define QCA8K_MIB_CPU_KEEP BIT(20) |
| 51 | #define QCA8K_MIB_BUSY BIT(17) | 51 | #define QCA8K_MIB_BUSY BIT(17) |
| 52 | #define QCA8K_MDIO_MASTER_CTRL 0x3c | ||
| 53 | #define QCA8K_MDIO_MASTER_BUSY BIT(31) | ||
| 54 | #define QCA8K_MDIO_MASTER_EN BIT(30) | ||
| 55 | #define QCA8K_MDIO_MASTER_READ BIT(27) | ||
| 56 | #define QCA8K_MDIO_MASTER_WRITE 0 | ||
| 57 | #define QCA8K_MDIO_MASTER_SUP_PRE BIT(26) | ||
| 58 | #define QCA8K_MDIO_MASTER_PHY_ADDR(x) ((x) << 21) | ||
| 59 | #define QCA8K_MDIO_MASTER_REG_ADDR(x) ((x) << 16) | ||
| 60 | #define QCA8K_MDIO_MASTER_DATA(x) (x) | ||
| 61 | #define QCA8K_MDIO_MASTER_DATA_MASK GENMASK(15, 0) | ||
| 62 | #define QCA8K_MDIO_MASTER_MAX_PORTS 5 | ||
| 63 | #define QCA8K_MDIO_MASTER_MAX_REG 32 | ||
| 52 | #define QCA8K_GOL_MAC_ADDR0 0x60 | 64 | #define QCA8K_GOL_MAC_ADDR0 0x60 |
| 53 | #define QCA8K_GOL_MAC_ADDR1 0x64 | 65 | #define QCA8K_GOL_MAC_ADDR1 0x64 |
| 54 | #define QCA8K_REG_PORT_STATUS(_i) (0x07c + (_i) * 4) | 66 | #define QCA8K_REG_PORT_STATUS(_i) (0x07c + (_i) * 4) |
| @@ -169,6 +181,7 @@ struct qca8k_priv { | |||
| 169 | struct dsa_switch *ds; | 181 | struct dsa_switch *ds; |
| 170 | struct mutex reg_mutex; | 182 | struct mutex reg_mutex; |
| 171 | struct device *dev; | 183 | struct device *dev; |
| 184 | struct dsa_switch_ops ops; | ||
| 172 | }; | 185 | }; |
| 173 | 186 | ||
| 174 | struct qca8k_mib_desc { | 187 | struct qca8k_mib_desc { |
diff --git a/drivers/net/ethernet/3com/3c515.c b/drivers/net/ethernet/3com/3c515.c index 808abb6b3671..b15752267c8d 100644 --- a/drivers/net/ethernet/3com/3c515.c +++ b/drivers/net/ethernet/3com/3c515.c | |||
| @@ -1521,7 +1521,7 @@ static void update_stats(int ioaddr, struct net_device *dev) | |||
| 1521 | static void set_rx_mode(struct net_device *dev) | 1521 | static void set_rx_mode(struct net_device *dev) |
| 1522 | { | 1522 | { |
| 1523 | int ioaddr = dev->base_addr; | 1523 | int ioaddr = dev->base_addr; |
| 1524 | short new_mode; | 1524 | unsigned short new_mode; |
| 1525 | 1525 | ||
| 1526 | if (dev->flags & IFF_PROMISC) { | 1526 | if (dev->flags & IFF_PROMISC) { |
| 1527 | if (corkscrew_debug > 3) | 1527 | if (corkscrew_debug > 3) |
diff --git a/drivers/net/ethernet/8390/mac8390.c b/drivers/net/ethernet/8390/mac8390.c index 342ae08ec3c2..d60a86aa8aa8 100644 --- a/drivers/net/ethernet/8390/mac8390.c +++ b/drivers/net/ethernet/8390/mac8390.c | |||
| @@ -153,8 +153,6 @@ static void dayna_block_input(struct net_device *dev, int count, | |||
| 153 | static void dayna_block_output(struct net_device *dev, int count, | 153 | static void dayna_block_output(struct net_device *dev, int count, |
| 154 | const unsigned char *buf, int start_page); | 154 | const unsigned char *buf, int start_page); |
| 155 | 155 | ||
| 156 | #define memcmp_withio(a, b, c) memcmp((a), (void *)(b), (c)) | ||
| 157 | |||
| 158 | /* Slow Sane (16-bit chunk memory read/write) Cabletron uses this */ | 156 | /* Slow Sane (16-bit chunk memory read/write) Cabletron uses this */ |
| 159 | static void slow_sane_get_8390_hdr(struct net_device *dev, | 157 | static void slow_sane_get_8390_hdr(struct net_device *dev, |
| 160 | struct e8390_pkt_hdr *hdr, int ring_page); | 158 | struct e8390_pkt_hdr *hdr, int ring_page); |
| @@ -233,19 +231,26 @@ static enum mac8390_type mac8390_ident(struct nubus_rsrc *fres) | |||
| 233 | 231 | ||
| 234 | static enum mac8390_access mac8390_testio(unsigned long membase) | 232 | static enum mac8390_access mac8390_testio(unsigned long membase) |
| 235 | { | 233 | { |
| 236 | unsigned long outdata = 0xA5A0B5B0; | 234 | u32 outdata = 0xA5A0B5B0; |
| 237 | unsigned long indata = 0x00000000; | 235 | u32 indata = 0; |
| 236 | |||
| 238 | /* Try writing 32 bits */ | 237 | /* Try writing 32 bits */ |
| 239 | memcpy_toio((void __iomem *)membase, &outdata, 4); | 238 | nubus_writel(outdata, membase); |
| 240 | /* Now compare them */ | 239 | /* Now read it back */ |
| 241 | if (memcmp_withio(&outdata, membase, 4) == 0) | 240 | indata = nubus_readl(membase); |
| 241 | if (outdata == indata) | ||
| 242 | return ACCESS_32; | 242 | return ACCESS_32; |
| 243 | |||
| 244 | outdata = 0xC5C0D5D0; | ||
| 245 | indata = 0; | ||
| 246 | |||
| 243 | /* Write 16 bit output */ | 247 | /* Write 16 bit output */ |
| 244 | word_memcpy_tocard(membase, &outdata, 4); | 248 | word_memcpy_tocard(membase, &outdata, 4); |
| 245 | /* Now read it back */ | 249 | /* Now read it back */ |
| 246 | word_memcpy_fromcard(&indata, membase, 4); | 250 | word_memcpy_fromcard(&indata, membase, 4); |
| 247 | if (outdata == indata) | 251 | if (outdata == indata) |
| 248 | return ACCESS_16; | 252 | return ACCESS_16; |
| 253 | |||
| 249 | return ACCESS_UNKNOWN; | 254 | return ACCESS_UNKNOWN; |
| 250 | } | 255 | } |
| 251 | 256 | ||
diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ring.c b/drivers/net/ethernet/aquantia/atlantic/aq_ring.c index 74550ccc7a20..e2ffb159cbe2 100644 --- a/drivers/net/ethernet/aquantia/atlantic/aq_ring.c +++ b/drivers/net/ethernet/aquantia/atlantic/aq_ring.c | |||
| @@ -186,11 +186,12 @@ static void aq_rx_checksum(struct aq_ring_s *self, | |||
| 186 | } | 186 | } |
| 187 | if (buff->is_ip_cso) { | 187 | if (buff->is_ip_cso) { |
| 188 | __skb_incr_checksum_unnecessary(skb); | 188 | __skb_incr_checksum_unnecessary(skb); |
| 189 | if (buff->is_udp_cso || buff->is_tcp_cso) | ||
| 190 | __skb_incr_checksum_unnecessary(skb); | ||
| 191 | } else { | 189 | } else { |
| 192 | skb->ip_summed = CHECKSUM_NONE; | 190 | skb->ip_summed = CHECKSUM_NONE; |
| 193 | } | 191 | } |
| 192 | |||
| 193 | if (buff->is_udp_cso || buff->is_tcp_cso) | ||
| 194 | __skb_incr_checksum_unnecessary(skb); | ||
| 194 | } | 195 | } |
| 195 | 196 | ||
| 196 | #define AQ_SKB_ALIGN SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) | 197 | #define AQ_SKB_ALIGN SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) |
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index ad099fd01b45..1522aee81884 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c | |||
| @@ -3370,14 +3370,20 @@ static int macb_clk_init(struct platform_device *pdev, struct clk **pclk, | |||
| 3370 | *hclk = devm_clk_get(&pdev->dev, "hclk"); | 3370 | *hclk = devm_clk_get(&pdev->dev, "hclk"); |
| 3371 | } | 3371 | } |
| 3372 | 3372 | ||
| 3373 | if (IS_ERR(*pclk)) { | 3373 | if (IS_ERR_OR_NULL(*pclk)) { |
| 3374 | err = PTR_ERR(*pclk); | 3374 | err = PTR_ERR(*pclk); |
| 3375 | if (!err) | ||
| 3376 | err = -ENODEV; | ||
| 3377 | |||
| 3375 | dev_err(&pdev->dev, "failed to get macb_clk (%u)\n", err); | 3378 | dev_err(&pdev->dev, "failed to get macb_clk (%u)\n", err); |
| 3376 | return err; | 3379 | return err; |
| 3377 | } | 3380 | } |
| 3378 | 3381 | ||
| 3379 | if (IS_ERR(*hclk)) { | 3382 | if (IS_ERR_OR_NULL(*hclk)) { |
| 3380 | err = PTR_ERR(*hclk); | 3383 | err = PTR_ERR(*hclk); |
| 3384 | if (!err) | ||
| 3385 | err = -ENODEV; | ||
| 3386 | |||
| 3381 | dev_err(&pdev->dev, "failed to get hclk (%u)\n", err); | 3387 | dev_err(&pdev->dev, "failed to get hclk (%u)\n", err); |
| 3382 | return err; | 3388 | return err; |
| 3383 | } | 3389 | } |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c index 3130b43bba52..02959035ed3f 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c | |||
| @@ -2620,7 +2620,7 @@ static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset) | |||
| 2620 | } | 2620 | } |
| 2621 | 2621 | ||
| 2622 | /* should never happen! */ | 2622 | /* should never happen! */ |
| 2623 | BUG_ON(1); | 2623 | BUG(); |
| 2624 | return NULL; | 2624 | return NULL; |
| 2625 | } | 2625 | } |
| 2626 | 2626 | ||
diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c index 88773ca58e6b..b3da81e90132 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/sge.c +++ b/drivers/net/ethernet/chelsio/cxgb4/sge.c | |||
| @@ -476,7 +476,7 @@ static inline int get_buf_size(struct adapter *adapter, | |||
| 476 | break; | 476 | break; |
| 477 | 477 | ||
| 478 | default: | 478 | default: |
| 479 | BUG_ON(1); | 479 | BUG(); |
| 480 | } | 480 | } |
| 481 | 481 | ||
| 482 | return buf_size; | 482 | return buf_size; |
diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c index 2ba49e959c3f..dc339dc1adb2 100644 --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c | |||
| @@ -815,6 +815,14 @@ static netdev_tx_t dpaa2_eth_tx(struct sk_buff *skb, struct net_device *net_dev) | |||
| 815 | */ | 815 | */ |
| 816 | queue_mapping = skb_get_queue_mapping(skb); | 816 | queue_mapping = skb_get_queue_mapping(skb); |
| 817 | fq = &priv->fq[queue_mapping]; | 817 | fq = &priv->fq[queue_mapping]; |
| 818 | |||
| 819 | fd_len = dpaa2_fd_get_len(&fd); | ||
| 820 | nq = netdev_get_tx_queue(net_dev, queue_mapping); | ||
| 821 | netdev_tx_sent_queue(nq, fd_len); | ||
| 822 | |||
| 823 | /* Everything that happens after this enqueues might race with | ||
| 824 | * the Tx confirmation callback for this frame | ||
| 825 | */ | ||
| 818 | for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) { | 826 | for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) { |
| 819 | err = priv->enqueue(priv, fq, &fd, 0); | 827 | err = priv->enqueue(priv, fq, &fd, 0); |
| 820 | if (err != -EBUSY) | 828 | if (err != -EBUSY) |
| @@ -825,13 +833,10 @@ static netdev_tx_t dpaa2_eth_tx(struct sk_buff *skb, struct net_device *net_dev) | |||
| 825 | percpu_stats->tx_errors++; | 833 | percpu_stats->tx_errors++; |
| 826 | /* Clean up everything, including freeing the skb */ | 834 | /* Clean up everything, including freeing the skb */ |
| 827 | free_tx_fd(priv, fq, &fd, false); | 835 | free_tx_fd(priv, fq, &fd, false); |
| 836 | netdev_tx_completed_queue(nq, 1, fd_len); | ||
| 828 | } else { | 837 | } else { |
| 829 | fd_len = dpaa2_fd_get_len(&fd); | ||
| 830 | percpu_stats->tx_packets++; | 838 | percpu_stats->tx_packets++; |
| 831 | percpu_stats->tx_bytes += fd_len; | 839 | percpu_stats->tx_bytes += fd_len; |
| 832 | |||
| 833 | nq = netdev_get_tx_queue(net_dev, queue_mapping); | ||
| 834 | netdev_tx_sent_queue(nq, fd_len); | ||
| 835 | } | 840 | } |
| 836 | 841 | ||
| 837 | return NETDEV_TX_OK; | 842 | return NETDEV_TX_OK; |
| @@ -1817,7 +1822,7 @@ static int dpaa2_eth_xdp_xmit_frame(struct net_device *net_dev, | |||
| 1817 | dpaa2_fd_set_format(&fd, dpaa2_fd_single); | 1822 | dpaa2_fd_set_format(&fd, dpaa2_fd_single); |
| 1818 | dpaa2_fd_set_ctrl(&fd, FD_CTRL_PTA); | 1823 | dpaa2_fd_set_ctrl(&fd, FD_CTRL_PTA); |
| 1819 | 1824 | ||
| 1820 | fq = &priv->fq[smp_processor_id()]; | 1825 | fq = &priv->fq[smp_processor_id() % dpaa2_eth_queue_count(priv)]; |
| 1821 | for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) { | 1826 | for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) { |
| 1822 | err = priv->enqueue(priv, fq, &fd, 0); | 1827 | err = priv->enqueue(priv, fq, &fd, 0); |
| 1823 | if (err != -EBUSY) | 1828 | if (err != -EBUSY) |
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index 1c1f17ec6be2..162cb9afa0e7 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include "hns3_enet.h" | 22 | #include "hns3_enet.h" |
| 23 | 23 | ||
| 24 | #define hns3_set_field(origin, shift, val) ((origin) |= ((val) << (shift))) | 24 | #define hns3_set_field(origin, shift, val) ((origin) |= ((val) << (shift))) |
| 25 | #define hns3_tx_bd_count(S) DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE) | ||
| 25 | 26 | ||
| 26 | static void hns3_clear_all_ring(struct hnae3_handle *h); | 27 | static void hns3_clear_all_ring(struct hnae3_handle *h); |
| 27 | static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h); | 28 | static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h); |
| @@ -1079,7 +1080,7 @@ static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv, | |||
| 1079 | 1080 | ||
| 1080 | desc_cb->length = size; | 1081 | desc_cb->length = size; |
| 1081 | 1082 | ||
| 1082 | frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) >> HNS3_MAX_BD_SIZE_OFFSET; | 1083 | frag_buf_num = hns3_tx_bd_count(size); |
| 1083 | sizeoflast = size & HNS3_TX_LAST_SIZE_M; | 1084 | sizeoflast = size & HNS3_TX_LAST_SIZE_M; |
| 1084 | sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE; | 1085 | sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE; |
| 1085 | 1086 | ||
| @@ -1124,14 +1125,13 @@ static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum, | |||
| 1124 | int i; | 1125 | int i; |
| 1125 | 1126 | ||
| 1126 | size = skb_headlen(skb); | 1127 | size = skb_headlen(skb); |
| 1127 | buf_num = (size + HNS3_MAX_BD_SIZE - 1) >> HNS3_MAX_BD_SIZE_OFFSET; | 1128 | buf_num = hns3_tx_bd_count(size); |
| 1128 | 1129 | ||
| 1129 | frag_num = skb_shinfo(skb)->nr_frags; | 1130 | frag_num = skb_shinfo(skb)->nr_frags; |
| 1130 | for (i = 0; i < frag_num; i++) { | 1131 | for (i = 0; i < frag_num; i++) { |
| 1131 | frag = &skb_shinfo(skb)->frags[i]; | 1132 | frag = &skb_shinfo(skb)->frags[i]; |
| 1132 | size = skb_frag_size(frag); | 1133 | size = skb_frag_size(frag); |
| 1133 | bdnum_for_frag = (size + HNS3_MAX_BD_SIZE - 1) >> | 1134 | bdnum_for_frag = hns3_tx_bd_count(size); |
| 1134 | HNS3_MAX_BD_SIZE_OFFSET; | ||
| 1135 | if (unlikely(bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)) | 1135 | if (unlikely(bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)) |
| 1136 | return -ENOMEM; | 1136 | return -ENOMEM; |
| 1137 | 1137 | ||
| @@ -1139,8 +1139,7 @@ static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum, | |||
| 1139 | } | 1139 | } |
| 1140 | 1140 | ||
| 1141 | if (unlikely(buf_num > HNS3_MAX_BD_PER_FRAG)) { | 1141 | if (unlikely(buf_num > HNS3_MAX_BD_PER_FRAG)) { |
| 1142 | buf_num = (skb->len + HNS3_MAX_BD_SIZE - 1) >> | 1142 | buf_num = hns3_tx_bd_count(skb->len); |
| 1143 | HNS3_MAX_BD_SIZE_OFFSET; | ||
| 1144 | if (ring_space(ring) < buf_num) | 1143 | if (ring_space(ring) < buf_num) |
| 1145 | return -EBUSY; | 1144 | return -EBUSY; |
| 1146 | /* manual split the send packet */ | 1145 | /* manual split the send packet */ |
| @@ -1169,7 +1168,7 @@ static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum, | |||
| 1169 | buf_num = skb_shinfo(skb)->nr_frags + 1; | 1168 | buf_num = skb_shinfo(skb)->nr_frags + 1; |
| 1170 | 1169 | ||
| 1171 | if (unlikely(buf_num > HNS3_MAX_BD_PER_FRAG)) { | 1170 | if (unlikely(buf_num > HNS3_MAX_BD_PER_FRAG)) { |
| 1172 | buf_num = (skb->len + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE; | 1171 | buf_num = hns3_tx_bd_count(skb->len); |
| 1173 | if (ring_space(ring) < buf_num) | 1172 | if (ring_space(ring) < buf_num) |
| 1174 | return -EBUSY; | 1173 | return -EBUSY; |
| 1175 | /* manual split the send packet */ | 1174 | /* manual split the send packet */ |
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h index 1db0bd41d209..75669cd0c311 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | |||
| @@ -193,7 +193,6 @@ enum hns3_nic_state { | |||
| 193 | #define HNS3_VECTOR_INITED 1 | 193 | #define HNS3_VECTOR_INITED 1 |
| 194 | 194 | ||
| 195 | #define HNS3_MAX_BD_SIZE 65535 | 195 | #define HNS3_MAX_BD_SIZE 65535 |
| 196 | #define HNS3_MAX_BD_SIZE_OFFSET 16 | ||
| 197 | #define HNS3_MAX_BD_PER_FRAG 8 | 196 | #define HNS3_MAX_BD_PER_FRAG 8 |
| 198 | #define HNS3_MAX_BD_PER_PKT MAX_SKB_FRAGS | 197 | #define HNS3_MAX_BD_PER_PKT MAX_SKB_FRAGS |
| 199 | 198 | ||
diff --git a/drivers/net/ethernet/ibm/ehea/ehea_main.c b/drivers/net/ethernet/ibm/ehea/ehea_main.c index 3baabdc89726..90b62c1412c8 100644 --- a/drivers/net/ethernet/ibm/ehea/ehea_main.c +++ b/drivers/net/ethernet/ibm/ehea/ehea_main.c | |||
| @@ -3160,6 +3160,7 @@ static ssize_t ehea_probe_port(struct device *dev, | |||
| 3160 | 3160 | ||
| 3161 | if (ehea_add_adapter_mr(adapter)) { | 3161 | if (ehea_add_adapter_mr(adapter)) { |
| 3162 | pr_err("creating MR failed\n"); | 3162 | pr_err("creating MR failed\n"); |
| 3163 | of_node_put(eth_dn); | ||
| 3163 | return -EIO; | 3164 | return -EIO; |
| 3164 | } | 3165 | } |
| 3165 | 3166 | ||
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/qp.c b/drivers/net/ethernet/mellanox/mlx5/core/qp.c index 370ca94b6775..b8ba74de9555 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/qp.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/qp.c | |||
| @@ -40,6 +40,9 @@ | |||
| 40 | #include "mlx5_core.h" | 40 | #include "mlx5_core.h" |
| 41 | #include "lib/eq.h" | 41 | #include "lib/eq.h" |
| 42 | 42 | ||
| 43 | static int mlx5_core_drain_dct(struct mlx5_core_dev *dev, | ||
| 44 | struct mlx5_core_dct *dct); | ||
| 45 | |||
| 43 | static struct mlx5_core_rsc_common * | 46 | static struct mlx5_core_rsc_common * |
| 44 | mlx5_get_rsc(struct mlx5_qp_table *table, u32 rsn) | 47 | mlx5_get_rsc(struct mlx5_qp_table *table, u32 rsn) |
| 45 | { | 48 | { |
| @@ -227,20 +230,49 @@ static void destroy_resource_common(struct mlx5_core_dev *dev, | |||
| 227 | wait_for_completion(&qp->common.free); | 230 | wait_for_completion(&qp->common.free); |
| 228 | } | 231 | } |
| 229 | 232 | ||
| 233 | static int _mlx5_core_destroy_dct(struct mlx5_core_dev *dev, | ||
| 234 | struct mlx5_core_dct *dct, bool need_cleanup) | ||
| 235 | { | ||
| 236 | u32 out[MLX5_ST_SZ_DW(destroy_dct_out)] = {0}; | ||
| 237 | u32 in[MLX5_ST_SZ_DW(destroy_dct_in)] = {0}; | ||
| 238 | struct mlx5_core_qp *qp = &dct->mqp; | ||
| 239 | int err; | ||
| 240 | |||
| 241 | err = mlx5_core_drain_dct(dev, dct); | ||
| 242 | if (err) { | ||
| 243 | if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { | ||
| 244 | goto destroy; | ||
| 245 | } else { | ||
| 246 | mlx5_core_warn( | ||
| 247 | dev, "failed drain DCT 0x%x with error 0x%x\n", | ||
| 248 | qp->qpn, err); | ||
| 249 | return err; | ||
| 250 | } | ||
| 251 | } | ||
| 252 | wait_for_completion(&dct->drained); | ||
| 253 | destroy: | ||
| 254 | if (need_cleanup) | ||
| 255 | destroy_resource_common(dev, &dct->mqp); | ||
| 256 | MLX5_SET(destroy_dct_in, in, opcode, MLX5_CMD_OP_DESTROY_DCT); | ||
| 257 | MLX5_SET(destroy_dct_in, in, dctn, qp->qpn); | ||
| 258 | MLX5_SET(destroy_dct_in, in, uid, qp->uid); | ||
| 259 | err = mlx5_cmd_exec(dev, (void *)&in, sizeof(in), | ||
| 260 | (void *)&out, sizeof(out)); | ||
| 261 | return err; | ||
| 262 | } | ||
| 263 | |||
| 230 | int mlx5_core_create_dct(struct mlx5_core_dev *dev, | 264 | int mlx5_core_create_dct(struct mlx5_core_dev *dev, |
| 231 | struct mlx5_core_dct *dct, | 265 | struct mlx5_core_dct *dct, |
| 232 | u32 *in, int inlen) | 266 | u32 *in, int inlen, |
| 267 | u32 *out, int outlen) | ||
| 233 | { | 268 | { |
| 234 | u32 out[MLX5_ST_SZ_DW(create_dct_out)] = {0}; | ||
| 235 | u32 din[MLX5_ST_SZ_DW(destroy_dct_in)] = {0}; | ||
| 236 | u32 dout[MLX5_ST_SZ_DW(destroy_dct_out)] = {0}; | ||
| 237 | struct mlx5_core_qp *qp = &dct->mqp; | 269 | struct mlx5_core_qp *qp = &dct->mqp; |
| 238 | int err; | 270 | int err; |
| 239 | 271 | ||
| 240 | init_completion(&dct->drained); | 272 | init_completion(&dct->drained); |
| 241 | MLX5_SET(create_dct_in, in, opcode, MLX5_CMD_OP_CREATE_DCT); | 273 | MLX5_SET(create_dct_in, in, opcode, MLX5_CMD_OP_CREATE_DCT); |
| 242 | 274 | ||
| 243 | err = mlx5_cmd_exec(dev, in, inlen, &out, sizeof(out)); | 275 | err = mlx5_cmd_exec(dev, in, inlen, out, outlen); |
| 244 | if (err) { | 276 | if (err) { |
| 245 | mlx5_core_warn(dev, "create DCT failed, ret %d\n", err); | 277 | mlx5_core_warn(dev, "create DCT failed, ret %d\n", err); |
| 246 | return err; | 278 | return err; |
| @@ -254,11 +286,7 @@ int mlx5_core_create_dct(struct mlx5_core_dev *dev, | |||
| 254 | 286 | ||
| 255 | return 0; | 287 | return 0; |
| 256 | err_cmd: | 288 | err_cmd: |
| 257 | MLX5_SET(destroy_dct_in, din, opcode, MLX5_CMD_OP_DESTROY_DCT); | 289 | _mlx5_core_destroy_dct(dev, dct, false); |
| 258 | MLX5_SET(destroy_dct_in, din, dctn, qp->qpn); | ||
| 259 | MLX5_SET(destroy_dct_in, din, uid, qp->uid); | ||
| 260 | mlx5_cmd_exec(dev, (void *)&in, sizeof(din), | ||
| 261 | (void *)&out, sizeof(dout)); | ||
| 262 | return err; | 290 | return err; |
| 263 | } | 291 | } |
| 264 | EXPORT_SYMBOL_GPL(mlx5_core_create_dct); | 292 | EXPORT_SYMBOL_GPL(mlx5_core_create_dct); |
| @@ -323,29 +351,7 @@ static int mlx5_core_drain_dct(struct mlx5_core_dev *dev, | |||
| 323 | int mlx5_core_destroy_dct(struct mlx5_core_dev *dev, | 351 | int mlx5_core_destroy_dct(struct mlx5_core_dev *dev, |
| 324 | struct mlx5_core_dct *dct) | 352 | struct mlx5_core_dct *dct) |
| 325 | { | 353 | { |
| 326 | u32 out[MLX5_ST_SZ_DW(destroy_dct_out)] = {0}; | 354 | return _mlx5_core_destroy_dct(dev, dct, true); |
| 327 | u32 in[MLX5_ST_SZ_DW(destroy_dct_in)] = {0}; | ||
| 328 | struct mlx5_core_qp *qp = &dct->mqp; | ||
| 329 | int err; | ||
| 330 | |||
| 331 | err = mlx5_core_drain_dct(dev, dct); | ||
| 332 | if (err) { | ||
| 333 | if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { | ||
| 334 | goto destroy; | ||
| 335 | } else { | ||
| 336 | mlx5_core_warn(dev, "failed drain DCT 0x%x with error 0x%x\n", qp->qpn, err); | ||
| 337 | return err; | ||
| 338 | } | ||
| 339 | } | ||
| 340 | wait_for_completion(&dct->drained); | ||
| 341 | destroy: | ||
| 342 | destroy_resource_common(dev, &dct->mqp); | ||
| 343 | MLX5_SET(destroy_dct_in, in, opcode, MLX5_CMD_OP_DESTROY_DCT); | ||
| 344 | MLX5_SET(destroy_dct_in, in, dctn, qp->qpn); | ||
| 345 | MLX5_SET(destroy_dct_in, in, uid, qp->uid); | ||
| 346 | err = mlx5_cmd_exec(dev, (void *)&in, sizeof(in), | ||
| 347 | (void *)&out, sizeof(out)); | ||
| 348 | return err; | ||
| 349 | } | 355 | } |
| 350 | EXPORT_SYMBOL_GPL(mlx5_core_destroy_dct); | 356 | EXPORT_SYMBOL_GPL(mlx5_core_destroy_dct); |
| 351 | 357 | ||
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c index 7a15e932ed2f..c1c1965d7acc 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c +++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c | |||
| @@ -113,7 +113,7 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module, | |||
| 113 | return 0; | 113 | return 0; |
| 114 | default: | 114 | default: |
| 115 | /* Do not consider thresholds for zero temperature. */ | 115 | /* Do not consider thresholds for zero temperature. */ |
| 116 | if (!MLXSW_REG_MTMP_TEMP_TO_MC(module_temp)) { | 116 | if (MLXSW_REG_MTMP_TEMP_TO_MC(module_temp) == 0) { |
| 117 | *temp = 0; | 117 | *temp = 0; |
| 118 | return 0; | 118 | return 0; |
| 119 | } | 119 | } |
diff --git a/drivers/net/ethernet/micrel/ks8851.c b/drivers/net/ethernet/micrel/ks8851.c index bd6e9014bc74..7849119d407a 100644 --- a/drivers/net/ethernet/micrel/ks8851.c +++ b/drivers/net/ethernet/micrel/ks8851.c | |||
| @@ -142,6 +142,12 @@ struct ks8851_net { | |||
| 142 | 142 | ||
| 143 | static int msg_enable; | 143 | static int msg_enable; |
| 144 | 144 | ||
| 145 | /* SPI frame opcodes */ | ||
| 146 | #define KS_SPIOP_RD (0x00) | ||
| 147 | #define KS_SPIOP_WR (0x40) | ||
| 148 | #define KS_SPIOP_RXFIFO (0x80) | ||
| 149 | #define KS_SPIOP_TXFIFO (0xC0) | ||
| 150 | |||
| 145 | /* shift for byte-enable data */ | 151 | /* shift for byte-enable data */ |
| 146 | #define BYTE_EN(_x) ((_x) << 2) | 152 | #define BYTE_EN(_x) ((_x) << 2) |
| 147 | 153 | ||
| @@ -535,9 +541,8 @@ static void ks8851_rx_pkts(struct ks8851_net *ks) | |||
| 535 | /* set dma read address */ | 541 | /* set dma read address */ |
| 536 | ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00); | 542 | ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00); |
| 537 | 543 | ||
| 538 | /* start the packet dma process, and set auto-dequeue rx */ | 544 | /* start DMA access */ |
| 539 | ks8851_wrreg16(ks, KS_RXQCR, | 545 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA); |
| 540 | ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE); | ||
| 541 | 546 | ||
| 542 | if (rxlen > 4) { | 547 | if (rxlen > 4) { |
| 543 | unsigned int rxalign; | 548 | unsigned int rxalign; |
| @@ -568,7 +573,8 @@ static void ks8851_rx_pkts(struct ks8851_net *ks) | |||
| 568 | } | 573 | } |
| 569 | } | 574 | } |
| 570 | 575 | ||
| 571 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); | 576 | /* end DMA access and dequeue packet */ |
| 577 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_RRXEF); | ||
| 572 | } | 578 | } |
| 573 | } | 579 | } |
| 574 | 580 | ||
| @@ -785,6 +791,15 @@ static void ks8851_tx_work(struct work_struct *work) | |||
| 785 | static int ks8851_net_open(struct net_device *dev) | 791 | static int ks8851_net_open(struct net_device *dev) |
| 786 | { | 792 | { |
| 787 | struct ks8851_net *ks = netdev_priv(dev); | 793 | struct ks8851_net *ks = netdev_priv(dev); |
| 794 | int ret; | ||
| 795 | |||
| 796 | ret = request_threaded_irq(dev->irq, NULL, ks8851_irq, | ||
| 797 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | ||
| 798 | dev->name, ks); | ||
| 799 | if (ret < 0) { | ||
| 800 | netdev_err(dev, "failed to get irq\n"); | ||
| 801 | return ret; | ||
| 802 | } | ||
| 788 | 803 | ||
| 789 | /* lock the card, even if we may not actually be doing anything | 804 | /* lock the card, even if we may not actually be doing anything |
| 790 | * else at the moment */ | 805 | * else at the moment */ |
| @@ -849,6 +864,7 @@ static int ks8851_net_open(struct net_device *dev) | |||
| 849 | netif_dbg(ks, ifup, ks->netdev, "network device up\n"); | 864 | netif_dbg(ks, ifup, ks->netdev, "network device up\n"); |
| 850 | 865 | ||
| 851 | mutex_unlock(&ks->lock); | 866 | mutex_unlock(&ks->lock); |
| 867 | mii_check_link(&ks->mii); | ||
| 852 | return 0; | 868 | return 0; |
| 853 | } | 869 | } |
| 854 | 870 | ||
| @@ -899,6 +915,8 @@ static int ks8851_net_stop(struct net_device *dev) | |||
| 899 | dev_kfree_skb(txb); | 915 | dev_kfree_skb(txb); |
| 900 | } | 916 | } |
| 901 | 917 | ||
| 918 | free_irq(dev->irq, ks); | ||
| 919 | |||
| 902 | return 0; | 920 | return 0; |
| 903 | } | 921 | } |
| 904 | 922 | ||
| @@ -1508,6 +1526,7 @@ static int ks8851_probe(struct spi_device *spi) | |||
| 1508 | 1526 | ||
| 1509 | spi_set_drvdata(spi, ks); | 1527 | spi_set_drvdata(spi, ks); |
| 1510 | 1528 | ||
| 1529 | netif_carrier_off(ks->netdev); | ||
| 1511 | ndev->if_port = IF_PORT_100BASET; | 1530 | ndev->if_port = IF_PORT_100BASET; |
| 1512 | ndev->netdev_ops = &ks8851_netdev_ops; | 1531 | ndev->netdev_ops = &ks8851_netdev_ops; |
| 1513 | ndev->irq = spi->irq; | 1532 | ndev->irq = spi->irq; |
| @@ -1529,14 +1548,6 @@ static int ks8851_probe(struct spi_device *spi) | |||
| 1529 | ks8851_read_selftest(ks); | 1548 | ks8851_read_selftest(ks); |
| 1530 | ks8851_init_mac(ks); | 1549 | ks8851_init_mac(ks); |
| 1531 | 1550 | ||
| 1532 | ret = request_threaded_irq(spi->irq, NULL, ks8851_irq, | ||
| 1533 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | ||
| 1534 | ndev->name, ks); | ||
| 1535 | if (ret < 0) { | ||
| 1536 | dev_err(&spi->dev, "failed to get irq\n"); | ||
| 1537 | goto err_irq; | ||
| 1538 | } | ||
| 1539 | |||
| 1540 | ret = register_netdev(ndev); | 1551 | ret = register_netdev(ndev); |
| 1541 | if (ret) { | 1552 | if (ret) { |
| 1542 | dev_err(&spi->dev, "failed to register network device\n"); | 1553 | dev_err(&spi->dev, "failed to register network device\n"); |
| @@ -1549,14 +1560,10 @@ static int ks8851_probe(struct spi_device *spi) | |||
| 1549 | 1560 | ||
| 1550 | return 0; | 1561 | return 0; |
| 1551 | 1562 | ||
| 1552 | |||
| 1553 | err_netdev: | 1563 | err_netdev: |
| 1554 | free_irq(ndev->irq, ks); | 1564 | err_id: |
| 1555 | |||
| 1556 | err_irq: | ||
| 1557 | if (gpio_is_valid(gpio)) | 1565 | if (gpio_is_valid(gpio)) |
| 1558 | gpio_set_value(gpio, 0); | 1566 | gpio_set_value(gpio, 0); |
| 1559 | err_id: | ||
| 1560 | regulator_disable(ks->vdd_reg); | 1567 | regulator_disable(ks->vdd_reg); |
| 1561 | err_reg: | 1568 | err_reg: |
| 1562 | regulator_disable(ks->vdd_io); | 1569 | regulator_disable(ks->vdd_io); |
| @@ -1574,7 +1581,6 @@ static int ks8851_remove(struct spi_device *spi) | |||
| 1574 | dev_info(&spi->dev, "remove\n"); | 1581 | dev_info(&spi->dev, "remove\n"); |
| 1575 | 1582 | ||
| 1576 | unregister_netdev(priv->netdev); | 1583 | unregister_netdev(priv->netdev); |
| 1577 | free_irq(spi->irq, priv); | ||
| 1578 | if (gpio_is_valid(priv->gpio)) | 1584 | if (gpio_is_valid(priv->gpio)) |
| 1579 | gpio_set_value(priv->gpio, 0); | 1585 | gpio_set_value(priv->gpio, 0); |
| 1580 | regulator_disable(priv->vdd_reg); | 1586 | regulator_disable(priv->vdd_reg); |
diff --git a/drivers/net/ethernet/micrel/ks8851.h b/drivers/net/ethernet/micrel/ks8851.h index 852256ef1f22..23da1e3ee429 100644 --- a/drivers/net/ethernet/micrel/ks8851.h +++ b/drivers/net/ethernet/micrel/ks8851.h | |||
| @@ -11,9 +11,15 @@ | |||
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | #define KS_CCR 0x08 | 13 | #define KS_CCR 0x08 |
| 14 | #define CCR_LE (1 << 10) /* KSZ8851-16MLL */ | ||
| 14 | #define CCR_EEPROM (1 << 9) | 15 | #define CCR_EEPROM (1 << 9) |
| 15 | #define CCR_SPI (1 << 8) | 16 | #define CCR_SPI (1 << 8) /* KSZ8851SNL */ |
| 16 | #define CCR_32PIN (1 << 0) | 17 | #define CCR_8BIT (1 << 7) /* KSZ8851-16MLL */ |
| 18 | #define CCR_16BIT (1 << 6) /* KSZ8851-16MLL */ | ||
| 19 | #define CCR_32BIT (1 << 5) /* KSZ8851-16MLL */ | ||
| 20 | #define CCR_SHARED (1 << 4) /* KSZ8851-16MLL */ | ||
| 21 | #define CCR_48PIN (1 << 1) /* KSZ8851-16MLL */ | ||
| 22 | #define CCR_32PIN (1 << 0) /* KSZ8851SNL */ | ||
| 17 | 23 | ||
| 18 | /* MAC address registers */ | 24 | /* MAC address registers */ |
| 19 | #define KS_MAR(_m) (0x15 - (_m)) | 25 | #define KS_MAR(_m) (0x15 - (_m)) |
| @@ -112,13 +118,13 @@ | |||
| 112 | #define RXCR1_RXE (1 << 0) | 118 | #define RXCR1_RXE (1 << 0) |
| 113 | 119 | ||
| 114 | #define KS_RXCR2 0x76 | 120 | #define KS_RXCR2 0x76 |
| 115 | #define RXCR2_SRDBL_MASK (0x7 << 5) | 121 | #define RXCR2_SRDBL_MASK (0x7 << 5) /* KSZ8851SNL */ |
| 116 | #define RXCR2_SRDBL_SHIFT (5) | 122 | #define RXCR2_SRDBL_SHIFT (5) /* KSZ8851SNL */ |
| 117 | #define RXCR2_SRDBL_4B (0x0 << 5) | 123 | #define RXCR2_SRDBL_4B (0x0 << 5) /* KSZ8851SNL */ |
| 118 | #define RXCR2_SRDBL_8B (0x1 << 5) | 124 | #define RXCR2_SRDBL_8B (0x1 << 5) /* KSZ8851SNL */ |
| 119 | #define RXCR2_SRDBL_16B (0x2 << 5) | 125 | #define RXCR2_SRDBL_16B (0x2 << 5) /* KSZ8851SNL */ |
| 120 | #define RXCR2_SRDBL_32B (0x3 << 5) | 126 | #define RXCR2_SRDBL_32B (0x3 << 5) /* KSZ8851SNL */ |
| 121 | #define RXCR2_SRDBL_FRAME (0x4 << 5) | 127 | #define RXCR2_SRDBL_FRAME (0x4 << 5) /* KSZ8851SNL */ |
| 122 | #define RXCR2_IUFFP (1 << 4) | 128 | #define RXCR2_IUFFP (1 << 4) |
| 123 | #define RXCR2_RXIUFCEZ (1 << 3) | 129 | #define RXCR2_RXIUFCEZ (1 << 3) |
| 124 | #define RXCR2_UDPLFE (1 << 2) | 130 | #define RXCR2_UDPLFE (1 << 2) |
| @@ -143,8 +149,10 @@ | |||
| 143 | #define RXFSHR_RXCE (1 << 0) | 149 | #define RXFSHR_RXCE (1 << 0) |
| 144 | 150 | ||
| 145 | #define KS_RXFHBCR 0x7E | 151 | #define KS_RXFHBCR 0x7E |
| 152 | #define RXFHBCR_CNT_MASK (0xfff << 0) | ||
| 153 | |||
| 146 | #define KS_TXQCR 0x80 | 154 | #define KS_TXQCR 0x80 |
| 147 | #define TXQCR_AETFE (1 << 2) | 155 | #define TXQCR_AETFE (1 << 2) /* KSZ8851SNL */ |
| 148 | #define TXQCR_TXQMAM (1 << 1) | 156 | #define TXQCR_TXQMAM (1 << 1) |
| 149 | #define TXQCR_METFE (1 << 0) | 157 | #define TXQCR_METFE (1 << 0) |
| 150 | 158 | ||
| @@ -167,6 +175,10 @@ | |||
| 167 | 175 | ||
| 168 | #define KS_RXFDPR 0x86 | 176 | #define KS_RXFDPR 0x86 |
| 169 | #define RXFDPR_RXFPAI (1 << 14) | 177 | #define RXFDPR_RXFPAI (1 << 14) |
| 178 | #define RXFDPR_WST (1 << 12) /* KSZ8851-16MLL */ | ||
| 179 | #define RXFDPR_EMS (1 << 11) /* KSZ8851-16MLL */ | ||
| 180 | #define RXFDPR_RXFP_MASK (0x7ff << 0) | ||
| 181 | #define RXFDPR_RXFP_SHIFT (0) | ||
| 170 | 182 | ||
| 171 | #define KS_RXDTTR 0x8C | 183 | #define KS_RXDTTR 0x8C |
| 172 | #define KS_RXDBCTR 0x8E | 184 | #define KS_RXDBCTR 0x8E |
| @@ -184,7 +196,7 @@ | |||
| 184 | #define IRQ_RXMPDI (1 << 4) | 196 | #define IRQ_RXMPDI (1 << 4) |
| 185 | #define IRQ_LDI (1 << 3) | 197 | #define IRQ_LDI (1 << 3) |
| 186 | #define IRQ_EDI (1 << 2) | 198 | #define IRQ_EDI (1 << 2) |
| 187 | #define IRQ_SPIBEI (1 << 1) | 199 | #define IRQ_SPIBEI (1 << 1) /* KSZ8851SNL */ |
| 188 | #define IRQ_DEDI (1 << 0) | 200 | #define IRQ_DEDI (1 << 0) |
| 189 | 201 | ||
| 190 | #define KS_RXFCTR 0x9C | 202 | #define KS_RXFCTR 0x9C |
| @@ -257,42 +269,37 @@ | |||
| 257 | #define KS_P1ANLPR 0xEE | 269 | #define KS_P1ANLPR 0xEE |
| 258 | 270 | ||
| 259 | #define KS_P1SCLMD 0xF4 | 271 | #define KS_P1SCLMD 0xF4 |
| 260 | #define P1SCLMD_LEDOFF (1 << 15) | ||
| 261 | #define P1SCLMD_TXIDS (1 << 14) | ||
| 262 | #define P1SCLMD_RESTARTAN (1 << 13) | ||
| 263 | #define P1SCLMD_DISAUTOMDIX (1 << 10) | ||
| 264 | #define P1SCLMD_FORCEMDIX (1 << 9) | ||
| 265 | #define P1SCLMD_AUTONEGEN (1 << 7) | ||
| 266 | #define P1SCLMD_FORCE100 (1 << 6) | ||
| 267 | #define P1SCLMD_FORCEFDX (1 << 5) | ||
| 268 | #define P1SCLMD_ADV_FLOW (1 << 4) | ||
| 269 | #define P1SCLMD_ADV_100BT_FDX (1 << 3) | ||
| 270 | #define P1SCLMD_ADV_100BT_HDX (1 << 2) | ||
| 271 | #define P1SCLMD_ADV_10BT_FDX (1 << 1) | ||
| 272 | #define P1SCLMD_ADV_10BT_HDX (1 << 0) | ||
| 273 | 272 | ||
| 274 | #define KS_P1CR 0xF6 | 273 | #define KS_P1CR 0xF6 |
| 275 | #define P1CR_HP_MDIX (1 << 15) | 274 | #define P1CR_LEDOFF (1 << 15) |
| 276 | #define P1CR_REV_POL (1 << 13) | 275 | #define P1CR_TXIDS (1 << 14) |
| 277 | #define P1CR_OP_100M (1 << 10) | 276 | #define P1CR_RESTARTAN (1 << 13) |
| 278 | #define P1CR_OP_FDX (1 << 9) | 277 | #define P1CR_DISAUTOMDIX (1 << 10) |
| 279 | #define P1CR_OP_MDI (1 << 7) | 278 | #define P1CR_FORCEMDIX (1 << 9) |
| 280 | #define P1CR_AN_DONE (1 << 6) | 279 | #define P1CR_AUTONEGEN (1 << 7) |
| 281 | #define P1CR_LINK_GOOD (1 << 5) | 280 | #define P1CR_FORCE100 (1 << 6) |
| 282 | #define P1CR_PNTR_FLOW (1 << 4) | 281 | #define P1CR_FORCEFDX (1 << 5) |
| 283 | #define P1CR_PNTR_100BT_FDX (1 << 3) | 282 | #define P1CR_ADV_FLOW (1 << 4) |
| 284 | #define P1CR_PNTR_100BT_HDX (1 << 2) | 283 | #define P1CR_ADV_100BT_FDX (1 << 3) |
| 285 | #define P1CR_PNTR_10BT_FDX (1 << 1) | 284 | #define P1CR_ADV_100BT_HDX (1 << 2) |
| 286 | #define P1CR_PNTR_10BT_HDX (1 << 0) | 285 | #define P1CR_ADV_10BT_FDX (1 << 1) |
| 286 | #define P1CR_ADV_10BT_HDX (1 << 0) | ||
| 287 | |||
| 288 | #define KS_P1SR 0xF8 | ||
| 289 | #define P1SR_HP_MDIX (1 << 15) | ||
| 290 | #define P1SR_REV_POL (1 << 13) | ||
| 291 | #define P1SR_OP_100M (1 << 10) | ||
| 292 | #define P1SR_OP_FDX (1 << 9) | ||
| 293 | #define P1SR_OP_MDI (1 << 7) | ||
| 294 | #define P1SR_AN_DONE (1 << 6) | ||
| 295 | #define P1SR_LINK_GOOD (1 << 5) | ||
| 296 | #define P1SR_PNTR_FLOW (1 << 4) | ||
| 297 | #define P1SR_PNTR_100BT_FDX (1 << 3) | ||
| 298 | #define P1SR_PNTR_100BT_HDX (1 << 2) | ||
| 299 | #define P1SR_PNTR_10BT_FDX (1 << 1) | ||
| 300 | #define P1SR_PNTR_10BT_HDX (1 << 0) | ||
| 287 | 301 | ||
| 288 | /* TX Frame control */ | 302 | /* TX Frame control */ |
| 289 | |||
| 290 | #define TXFR_TXIC (1 << 15) | 303 | #define TXFR_TXIC (1 << 15) |
| 291 | #define TXFR_TXFID_MASK (0x3f << 0) | 304 | #define TXFR_TXFID_MASK (0x3f << 0) |
| 292 | #define TXFR_TXFID_SHIFT (0) | 305 | #define TXFR_TXFID_SHIFT (0) |
| 293 | |||
| 294 | /* SPI frame opcodes */ | ||
| 295 | #define KS_SPIOP_RD (0x00) | ||
| 296 | #define KS_SPIOP_WR (0x40) | ||
| 297 | #define KS_SPIOP_RXFIFO (0x80) | ||
| 298 | #define KS_SPIOP_TXFIFO (0xC0) | ||
diff --git a/drivers/net/ethernet/micrel/ks8851_mll.c b/drivers/net/ethernet/micrel/ks8851_mll.c index 35f8c9ef204d..c946841c0a06 100644 --- a/drivers/net/ethernet/micrel/ks8851_mll.c +++ b/drivers/net/ethernet/micrel/ks8851_mll.c | |||
| @@ -40,6 +40,8 @@ | |||
| 40 | #include <linux/of_device.h> | 40 | #include <linux/of_device.h> |
| 41 | #include <linux/of_net.h> | 41 | #include <linux/of_net.h> |
| 42 | 42 | ||
| 43 | #include "ks8851.h" | ||
| 44 | |||
| 43 | #define DRV_NAME "ks8851_mll" | 45 | #define DRV_NAME "ks8851_mll" |
| 44 | 46 | ||
| 45 | static u8 KS_DEFAULT_MAC_ADDRESS[] = { 0x00, 0x10, 0xA1, 0x86, 0x95, 0x11 }; | 47 | static u8 KS_DEFAULT_MAC_ADDRESS[] = { 0x00, 0x10, 0xA1, 0x86, 0x95, 0x11 }; |
| @@ -48,319 +50,10 @@ static u8 KS_DEFAULT_MAC_ADDRESS[] = { 0x00, 0x10, 0xA1, 0x86, 0x95, 0x11 }; | |||
| 48 | #define TX_BUF_SIZE 2000 | 50 | #define TX_BUF_SIZE 2000 |
| 49 | #define RX_BUF_SIZE 2000 | 51 | #define RX_BUF_SIZE 2000 |
| 50 | 52 | ||
| 51 | #define KS_CCR 0x08 | ||
| 52 | #define CCR_EEPROM (1 << 9) | ||
| 53 | #define CCR_SPI (1 << 8) | ||
| 54 | #define CCR_8BIT (1 << 7) | ||
| 55 | #define CCR_16BIT (1 << 6) | ||
| 56 | #define CCR_32BIT (1 << 5) | ||
| 57 | #define CCR_SHARED (1 << 4) | ||
| 58 | #define CCR_32PIN (1 << 0) | ||
| 59 | |||
| 60 | /* MAC address registers */ | ||
| 61 | #define KS_MARL 0x10 | ||
| 62 | #define KS_MARM 0x12 | ||
| 63 | #define KS_MARH 0x14 | ||
| 64 | |||
| 65 | #define KS_OBCR 0x20 | ||
| 66 | #define OBCR_ODS_16MA (1 << 6) | ||
| 67 | |||
| 68 | #define KS_EEPCR 0x22 | ||
| 69 | #define EEPCR_EESA (1 << 4) | ||
| 70 | #define EEPCR_EESB (1 << 3) | ||
| 71 | #define EEPCR_EEDO (1 << 2) | ||
| 72 | #define EEPCR_EESCK (1 << 1) | ||
| 73 | #define EEPCR_EECS (1 << 0) | ||
| 74 | |||
| 75 | #define KS_MBIR 0x24 | ||
| 76 | #define MBIR_TXMBF (1 << 12) | ||
| 77 | #define MBIR_TXMBFA (1 << 11) | ||
| 78 | #define MBIR_RXMBF (1 << 4) | ||
| 79 | #define MBIR_RXMBFA (1 << 3) | ||
| 80 | |||
| 81 | #define KS_GRR 0x26 | ||
| 82 | #define GRR_QMU (1 << 1) | ||
| 83 | #define GRR_GSR (1 << 0) | ||
| 84 | |||
| 85 | #define KS_WFCR 0x2A | ||
| 86 | #define WFCR_MPRXE (1 << 7) | ||
| 87 | #define WFCR_WF3E (1 << 3) | ||
| 88 | #define WFCR_WF2E (1 << 2) | ||
| 89 | #define WFCR_WF1E (1 << 1) | ||
| 90 | #define WFCR_WF0E (1 << 0) | ||
| 91 | |||
| 92 | #define KS_WF0CRC0 0x30 | ||
| 93 | #define KS_WF0CRC1 0x32 | ||
| 94 | #define KS_WF0BM0 0x34 | ||
| 95 | #define KS_WF0BM1 0x36 | ||
| 96 | #define KS_WF0BM2 0x38 | ||
| 97 | #define KS_WF0BM3 0x3A | ||
| 98 | |||
| 99 | #define KS_WF1CRC0 0x40 | ||
| 100 | #define KS_WF1CRC1 0x42 | ||
| 101 | #define KS_WF1BM0 0x44 | ||
| 102 | #define KS_WF1BM1 0x46 | ||
| 103 | #define KS_WF1BM2 0x48 | ||
| 104 | #define KS_WF1BM3 0x4A | ||
| 105 | |||
| 106 | #define KS_WF2CRC0 0x50 | ||
| 107 | #define KS_WF2CRC1 0x52 | ||
| 108 | #define KS_WF2BM0 0x54 | ||
| 109 | #define KS_WF2BM1 0x56 | ||
| 110 | #define KS_WF2BM2 0x58 | ||
| 111 | #define KS_WF2BM3 0x5A | ||
| 112 | |||
| 113 | #define KS_WF3CRC0 0x60 | ||
| 114 | #define KS_WF3CRC1 0x62 | ||
| 115 | #define KS_WF3BM0 0x64 | ||
| 116 | #define KS_WF3BM1 0x66 | ||
| 117 | #define KS_WF3BM2 0x68 | ||
| 118 | #define KS_WF3BM3 0x6A | ||
| 119 | |||
| 120 | #define KS_TXCR 0x70 | ||
| 121 | #define TXCR_TCGICMP (1 << 8) | ||
| 122 | #define TXCR_TCGUDP (1 << 7) | ||
| 123 | #define TXCR_TCGTCP (1 << 6) | ||
| 124 | #define TXCR_TCGIP (1 << 5) | ||
| 125 | #define TXCR_FTXQ (1 << 4) | ||
| 126 | #define TXCR_TXFCE (1 << 3) | ||
| 127 | #define TXCR_TXPE (1 << 2) | ||
| 128 | #define TXCR_TXCRC (1 << 1) | ||
| 129 | #define TXCR_TXE (1 << 0) | ||
| 130 | |||
| 131 | #define KS_TXSR 0x72 | ||
| 132 | #define TXSR_TXLC (1 << 13) | ||
| 133 | #define TXSR_TXMC (1 << 12) | ||
| 134 | #define TXSR_TXFID_MASK (0x3f << 0) | ||
| 135 | #define TXSR_TXFID_SHIFT (0) | ||
| 136 | #define TXSR_TXFID_GET(_v) (((_v) >> 0) & 0x3f) | ||
| 137 | |||
| 138 | |||
| 139 | #define KS_RXCR1 0x74 | ||
| 140 | #define RXCR1_FRXQ (1 << 15) | ||
| 141 | #define RXCR1_RXUDPFCC (1 << 14) | ||
| 142 | #define RXCR1_RXTCPFCC (1 << 13) | ||
| 143 | #define RXCR1_RXIPFCC (1 << 12) | ||
| 144 | #define RXCR1_RXPAFMA (1 << 11) | ||
| 145 | #define RXCR1_RXFCE (1 << 10) | ||
| 146 | #define RXCR1_RXEFE (1 << 9) | ||
| 147 | #define RXCR1_RXMAFMA (1 << 8) | ||
| 148 | #define RXCR1_RXBE (1 << 7) | ||
| 149 | #define RXCR1_RXME (1 << 6) | ||
| 150 | #define RXCR1_RXUE (1 << 5) | ||
| 151 | #define RXCR1_RXAE (1 << 4) | ||
| 152 | #define RXCR1_RXINVF (1 << 1) | ||
| 153 | #define RXCR1_RXE (1 << 0) | ||
| 154 | #define RXCR1_FILTER_MASK (RXCR1_RXINVF | RXCR1_RXAE | \ | 53 | #define RXCR1_FILTER_MASK (RXCR1_RXINVF | RXCR1_RXAE | \ |
| 155 | RXCR1_RXMAFMA | RXCR1_RXPAFMA) | 54 | RXCR1_RXMAFMA | RXCR1_RXPAFMA) |
| 156 | |||
| 157 | #define KS_RXCR2 0x76 | ||
| 158 | #define RXCR2_SRDBL_MASK (0x7 << 5) | ||
| 159 | #define RXCR2_SRDBL_SHIFT (5) | ||
| 160 | #define RXCR2_SRDBL_4B (0x0 << 5) | ||
| 161 | #define RXCR2_SRDBL_8B (0x1 << 5) | ||
| 162 | #define RXCR2_SRDBL_16B (0x2 << 5) | ||
| 163 | #define RXCR2_SRDBL_32B (0x3 << 5) | ||
| 164 | /* #define RXCR2_SRDBL_FRAME (0x4 << 5) */ | ||
| 165 | #define RXCR2_IUFFP (1 << 4) | ||
| 166 | #define RXCR2_RXIUFCEZ (1 << 3) | ||
| 167 | #define RXCR2_UDPLFE (1 << 2) | ||
| 168 | #define RXCR2_RXICMPFCC (1 << 1) | ||
| 169 | #define RXCR2_RXSAF (1 << 0) | ||
| 170 | |||
| 171 | #define KS_TXMIR 0x78 | ||
| 172 | |||
| 173 | #define KS_RXFHSR 0x7C | ||
| 174 | #define RXFSHR_RXFV (1 << 15) | ||
| 175 | #define RXFSHR_RXICMPFCS (1 << 13) | ||
| 176 | #define RXFSHR_RXIPFCS (1 << 12) | ||
| 177 | #define RXFSHR_RXTCPFCS (1 << 11) | ||
| 178 | #define RXFSHR_RXUDPFCS (1 << 10) | ||
| 179 | #define RXFSHR_RXBF (1 << 7) | ||
| 180 | #define RXFSHR_RXMF (1 << 6) | ||
| 181 | #define RXFSHR_RXUF (1 << 5) | ||
| 182 | #define RXFSHR_RXMR (1 << 4) | ||
| 183 | #define RXFSHR_RXFT (1 << 3) | ||
| 184 | #define RXFSHR_RXFTL (1 << 2) | ||
| 185 | #define RXFSHR_RXRF (1 << 1) | ||
| 186 | #define RXFSHR_RXCE (1 << 0) | ||
| 187 | #define RXFSHR_ERR (RXFSHR_RXCE | RXFSHR_RXRF |\ | ||
| 188 | RXFSHR_RXFTL | RXFSHR_RXMR |\ | ||
| 189 | RXFSHR_RXICMPFCS | RXFSHR_RXIPFCS |\ | ||
| 190 | RXFSHR_RXTCPFCS) | ||
| 191 | #define KS_RXFHBCR 0x7E | ||
| 192 | #define RXFHBCR_CNT_MASK 0x0FFF | ||
| 193 | |||
| 194 | #define KS_TXQCR 0x80 | ||
| 195 | #define TXQCR_AETFE (1 << 2) | ||
| 196 | #define TXQCR_TXQMAM (1 << 1) | ||
| 197 | #define TXQCR_METFE (1 << 0) | ||
| 198 | |||
| 199 | #define KS_RXQCR 0x82 | ||
| 200 | #define RXQCR_RXDTTS (1 << 12) | ||
| 201 | #define RXQCR_RXDBCTS (1 << 11) | ||
| 202 | #define RXQCR_RXFCTS (1 << 10) | ||
| 203 | #define RXQCR_RXIPHTOE (1 << 9) | ||
| 204 | #define RXQCR_RXDTTE (1 << 7) | ||
| 205 | #define RXQCR_RXDBCTE (1 << 6) | ||
| 206 | #define RXQCR_RXFCTE (1 << 5) | ||
| 207 | #define RXQCR_ADRFE (1 << 4) | ||
| 208 | #define RXQCR_SDA (1 << 3) | ||
| 209 | #define RXQCR_RRXEF (1 << 0) | ||
| 210 | #define RXQCR_CMD_CNTL (RXQCR_RXFCTE|RXQCR_ADRFE) | 55 | #define RXQCR_CMD_CNTL (RXQCR_RXFCTE|RXQCR_ADRFE) |
| 211 | 56 | ||
| 212 | #define KS_TXFDPR 0x84 | ||
| 213 | #define TXFDPR_TXFPAI (1 << 14) | ||
| 214 | #define TXFDPR_TXFP_MASK (0x7ff << 0) | ||
| 215 | #define TXFDPR_TXFP_SHIFT (0) | ||
| 216 | |||
| 217 | #define KS_RXFDPR 0x86 | ||
| 218 | #define RXFDPR_RXFPAI (1 << 14) | ||
| 219 | |||
| 220 | #define KS_RXDTTR 0x8C | ||
| 221 | #define KS_RXDBCTR 0x8E | ||
| 222 | |||
| 223 | #define KS_IER 0x90 | ||
| 224 | #define KS_ISR 0x92 | ||
| 225 | #define IRQ_LCI (1 << 15) | ||
| 226 | #define IRQ_TXI (1 << 14) | ||
| 227 | #define IRQ_RXI (1 << 13) | ||
| 228 | #define IRQ_RXOI (1 << 11) | ||
| 229 | #define IRQ_TXPSI (1 << 9) | ||
| 230 | #define IRQ_RXPSI (1 << 8) | ||
| 231 | #define IRQ_TXSAI (1 << 6) | ||
| 232 | #define IRQ_RXWFDI (1 << 5) | ||
| 233 | #define IRQ_RXMPDI (1 << 4) | ||
| 234 | #define IRQ_LDI (1 << 3) | ||
| 235 | #define IRQ_EDI (1 << 2) | ||
| 236 | #define IRQ_SPIBEI (1 << 1) | ||
| 237 | #define IRQ_DEDI (1 << 0) | ||
| 238 | |||
| 239 | #define KS_RXFCTR 0x9C | ||
| 240 | #define RXFCTR_THRESHOLD_MASK 0x00FF | ||
| 241 | |||
| 242 | #define KS_RXFC 0x9D | ||
| 243 | #define RXFCTR_RXFC_MASK (0xff << 8) | ||
| 244 | #define RXFCTR_RXFC_SHIFT (8) | ||
| 245 | #define RXFCTR_RXFC_GET(_v) (((_v) >> 8) & 0xff) | ||
| 246 | #define RXFCTR_RXFCT_MASK (0xff << 0) | ||
| 247 | #define RXFCTR_RXFCT_SHIFT (0) | ||
| 248 | |||
| 249 | #define KS_TXNTFSR 0x9E | ||
| 250 | |||
| 251 | #define KS_MAHTR0 0xA0 | ||
| 252 | #define KS_MAHTR1 0xA2 | ||
| 253 | #define KS_MAHTR2 0xA4 | ||
| 254 | #define KS_MAHTR3 0xA6 | ||
| 255 | |||
| 256 | #define KS_FCLWR 0xB0 | ||
| 257 | #define KS_FCHWR 0xB2 | ||
| 258 | #define KS_FCOWR 0xB4 | ||
| 259 | |||
| 260 | #define KS_CIDER 0xC0 | ||
| 261 | #define CIDER_ID 0x8870 | ||
| 262 | #define CIDER_REV_MASK (0x7 << 1) | ||
| 263 | #define CIDER_REV_SHIFT (1) | ||
| 264 | #define CIDER_REV_GET(_v) (((_v) >> 1) & 0x7) | ||
| 265 | |||
| 266 | #define KS_CGCR 0xC6 | ||
| 267 | #define KS_IACR 0xC8 | ||
| 268 | #define IACR_RDEN (1 << 12) | ||
| 269 | #define IACR_TSEL_MASK (0x3 << 10) | ||
| 270 | #define IACR_TSEL_SHIFT (10) | ||
| 271 | #define IACR_TSEL_MIB (0x3 << 10) | ||
| 272 | #define IACR_ADDR_MASK (0x1f << 0) | ||
| 273 | #define IACR_ADDR_SHIFT (0) | ||
| 274 | |||
| 275 | #define KS_IADLR 0xD0 | ||
| 276 | #define KS_IAHDR 0xD2 | ||
| 277 | |||
| 278 | #define KS_PMECR 0xD4 | ||
| 279 | #define PMECR_PME_DELAY (1 << 14) | ||
| 280 | #define PMECR_PME_POL (1 << 12) | ||
| 281 | #define PMECR_WOL_WAKEUP (1 << 11) | ||
| 282 | #define PMECR_WOL_MAGICPKT (1 << 10) | ||
| 283 | #define PMECR_WOL_LINKUP (1 << 9) | ||
| 284 | #define PMECR_WOL_ENERGY (1 << 8) | ||
| 285 | #define PMECR_AUTO_WAKE_EN (1 << 7) | ||
| 286 | #define PMECR_WAKEUP_NORMAL (1 << 6) | ||
| 287 | #define PMECR_WKEVT_MASK (0xf << 2) | ||
| 288 | #define PMECR_WKEVT_SHIFT (2) | ||
| 289 | #define PMECR_WKEVT_GET(_v) (((_v) >> 2) & 0xf) | ||
| 290 | #define PMECR_WKEVT_ENERGY (0x1 << 2) | ||
| 291 | #define PMECR_WKEVT_LINK (0x2 << 2) | ||
| 292 | #define PMECR_WKEVT_MAGICPKT (0x4 << 2) | ||
| 293 | #define PMECR_WKEVT_FRAME (0x8 << 2) | ||
| 294 | #define PMECR_PM_MASK (0x3 << 0) | ||
| 295 | #define PMECR_PM_SHIFT (0) | ||
| 296 | #define PMECR_PM_NORMAL (0x0 << 0) | ||
| 297 | #define PMECR_PM_ENERGY (0x1 << 0) | ||
| 298 | #define PMECR_PM_SOFTDOWN (0x2 << 0) | ||
| 299 | #define PMECR_PM_POWERSAVE (0x3 << 0) | ||
| 300 | |||
| 301 | /* Standard MII PHY data */ | ||
| 302 | #define KS_P1MBCR 0xE4 | ||
| 303 | #define P1MBCR_FORCE_FDX (1 << 8) | ||
| 304 | |||
| 305 | #define KS_P1MBSR 0xE6 | ||
| 306 | #define P1MBSR_AN_COMPLETE (1 << 5) | ||
| 307 | #define P1MBSR_AN_CAPABLE (1 << 3) | ||
| 308 | #define P1MBSR_LINK_UP (1 << 2) | ||
| 309 | |||
| 310 | #define KS_PHY1ILR 0xE8 | ||
| 311 | #define KS_PHY1IHR 0xEA | ||
| 312 | #define KS_P1ANAR 0xEC | ||
| 313 | #define KS_P1ANLPR 0xEE | ||
| 314 | |||
| 315 | #define KS_P1SCLMD 0xF4 | ||
| 316 | #define P1SCLMD_LEDOFF (1 << 15) | ||
| 317 | #define P1SCLMD_TXIDS (1 << 14) | ||
| 318 | #define P1SCLMD_RESTARTAN (1 << 13) | ||
| 319 | #define P1SCLMD_DISAUTOMDIX (1 << 10) | ||
| 320 | #define P1SCLMD_FORCEMDIX (1 << 9) | ||
| 321 | #define P1SCLMD_AUTONEGEN (1 << 7) | ||
| 322 | #define P1SCLMD_FORCE100 (1 << 6) | ||
| 323 | #define P1SCLMD_FORCEFDX (1 << 5) | ||
| 324 | #define P1SCLMD_ADV_FLOW (1 << 4) | ||
| 325 | #define P1SCLMD_ADV_100BT_FDX (1 << 3) | ||
| 326 | #define P1SCLMD_ADV_100BT_HDX (1 << 2) | ||
| 327 | #define P1SCLMD_ADV_10BT_FDX (1 << 1) | ||
| 328 | #define P1SCLMD_ADV_10BT_HDX (1 << 0) | ||
| 329 | |||
| 330 | #define KS_P1CR 0xF6 | ||
| 331 | #define P1CR_HP_MDIX (1 << 15) | ||
| 332 | #define P1CR_REV_POL (1 << 13) | ||
| 333 | #define P1CR_OP_100M (1 << 10) | ||
| 334 | #define P1CR_OP_FDX (1 << 9) | ||
| 335 | #define P1CR_OP_MDI (1 << 7) | ||
| 336 | #define P1CR_AN_DONE (1 << 6) | ||
| 337 | #define P1CR_LINK_GOOD (1 << 5) | ||
| 338 | #define P1CR_PNTR_FLOW (1 << 4) | ||
| 339 | #define P1CR_PNTR_100BT_FDX (1 << 3) | ||
| 340 | #define P1CR_PNTR_100BT_HDX (1 << 2) | ||
| 341 | #define P1CR_PNTR_10BT_FDX (1 << 1) | ||
| 342 | #define P1CR_PNTR_10BT_HDX (1 << 0) | ||
| 343 | |||
| 344 | /* TX Frame control */ | ||
| 345 | |||
| 346 | #define TXFR_TXIC (1 << 15) | ||
| 347 | #define TXFR_TXFID_MASK (0x3f << 0) | ||
| 348 | #define TXFR_TXFID_SHIFT (0) | ||
| 349 | |||
| 350 | #define KS_P1SR 0xF8 | ||
| 351 | #define P1SR_HP_MDIX (1 << 15) | ||
| 352 | #define P1SR_REV_POL (1 << 13) | ||
| 353 | #define P1SR_OP_100M (1 << 10) | ||
| 354 | #define P1SR_OP_FDX (1 << 9) | ||
| 355 | #define P1SR_OP_MDI (1 << 7) | ||
| 356 | #define P1SR_AN_DONE (1 << 6) | ||
| 357 | #define P1SR_LINK_GOOD (1 << 5) | ||
| 358 | #define P1SR_PNTR_FLOW (1 << 4) | ||
| 359 | #define P1SR_PNTR_100BT_FDX (1 << 3) | ||
| 360 | #define P1SR_PNTR_100BT_HDX (1 << 2) | ||
| 361 | #define P1SR_PNTR_10BT_FDX (1 << 1) | ||
| 362 | #define P1SR_PNTR_10BT_HDX (1 << 0) | ||
| 363 | |||
| 364 | #define ENUM_BUS_NONE 0 | 57 | #define ENUM_BUS_NONE 0 |
| 365 | #define ENUM_BUS_8BIT 1 | 58 | #define ENUM_BUS_8BIT 1 |
| 366 | #define ENUM_BUS_16BIT 2 | 59 | #define ENUM_BUS_16BIT 2 |
| @@ -1475,7 +1168,7 @@ static void ks_setup(struct ks_net *ks) | |||
| 1475 | ks_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI); | 1168 | ks_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI); |
| 1476 | 1169 | ||
| 1477 | /* Setup Receive Frame Threshold - 1 frame (RXFCTFC) */ | 1170 | /* Setup Receive Frame Threshold - 1 frame (RXFCTFC) */ |
| 1478 | ks_wrreg16(ks, KS_RXFCTR, 1 & RXFCTR_THRESHOLD_MASK); | 1171 | ks_wrreg16(ks, KS_RXFCTR, 1 & RXFCTR_RXFCT_MASK); |
| 1479 | 1172 | ||
| 1480 | /* Setup RxQ Command Control (RXQCR) */ | 1173 | /* Setup RxQ Command Control (RXQCR) */ |
| 1481 | ks->rc_rxqcr = RXQCR_CMD_CNTL; | 1174 | ks->rc_rxqcr = RXQCR_CMD_CNTL; |
| @@ -1488,7 +1181,7 @@ static void ks_setup(struct ks_net *ks) | |||
| 1488 | */ | 1181 | */ |
| 1489 | 1182 | ||
| 1490 | w = ks_rdreg16(ks, KS_P1MBCR); | 1183 | w = ks_rdreg16(ks, KS_P1MBCR); |
| 1491 | w &= ~P1MBCR_FORCE_FDX; | 1184 | w &= ~BMCR_FULLDPLX; |
| 1492 | ks_wrreg16(ks, KS_P1MBCR, w); | 1185 | ks_wrreg16(ks, KS_P1MBCR, w); |
| 1493 | 1186 | ||
| 1494 | w = TXCR_TXFCE | TXCR_TXPE | TXCR_TXCRC | TXCR_TCGIP; | 1187 | w = TXCR_TXFCE | TXCR_TXPE | TXCR_TXCRC | TXCR_TCGIP; |
| @@ -1629,7 +1322,7 @@ static int ks8851_probe(struct platform_device *pdev) | |||
| 1629 | ks_setup_int(ks); | 1322 | ks_setup_int(ks); |
| 1630 | 1323 | ||
| 1631 | data = ks_rdreg16(ks, KS_OBCR); | 1324 | data = ks_rdreg16(ks, KS_OBCR); |
| 1632 | ks_wrreg16(ks, KS_OBCR, data | OBCR_ODS_16MA); | 1325 | ks_wrreg16(ks, KS_OBCR, data | OBCR_ODS_16mA); |
| 1633 | 1326 | ||
| 1634 | /* overwriting the default MAC address */ | 1327 | /* overwriting the default MAC address */ |
| 1635 | if (pdev->dev.of_node) { | 1328 | if (pdev->dev.of_node) { |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c index 3b0adda7cc9c..a4cd6f2cfb86 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c | |||
| @@ -1048,6 +1048,8 @@ int qlcnic_do_lb_test(struct qlcnic_adapter *adapter, u8 mode) | |||
| 1048 | 1048 | ||
| 1049 | for (i = 0; i < QLCNIC_NUM_ILB_PKT; i++) { | 1049 | for (i = 0; i < QLCNIC_NUM_ILB_PKT; i++) { |
| 1050 | skb = netdev_alloc_skb(adapter->netdev, QLCNIC_ILB_PKT_SIZE); | 1050 | skb = netdev_alloc_skb(adapter->netdev, QLCNIC_ILB_PKT_SIZE); |
| 1051 | if (!skb) | ||
| 1052 | break; | ||
| 1051 | qlcnic_create_loopback_buff(skb->data, adapter->mac_addr); | 1053 | qlcnic_create_loopback_buff(skb->data, adapter->mac_addr); |
| 1052 | skb_put(skb, QLCNIC_ILB_PKT_SIZE); | 1054 | skb_put(skb, QLCNIC_ILB_PKT_SIZE); |
| 1053 | adapter->ahw->diag_cnt = 0; | 1055 | adapter->ahw->diag_cnt = 0; |
diff --git a/drivers/net/ethernet/realtek/atp.c b/drivers/net/ethernet/realtek/atp.c index cfb67b746595..58e0ca9093d3 100644 --- a/drivers/net/ethernet/realtek/atp.c +++ b/drivers/net/ethernet/realtek/atp.c | |||
| @@ -482,7 +482,7 @@ static void hardware_init(struct net_device *dev) | |||
| 482 | write_reg_high(ioaddr, IMR, ISRh_RxErr); | 482 | write_reg_high(ioaddr, IMR, ISRh_RxErr); |
| 483 | 483 | ||
| 484 | lp->tx_unit_busy = 0; | 484 | lp->tx_unit_busy = 0; |
| 485 | lp->pac_cnt_in_tx_buf = 0; | 485 | lp->pac_cnt_in_tx_buf = 0; |
| 486 | lp->saved_tx_size = 0; | 486 | lp->saved_tx_size = 0; |
| 487 | } | 487 | } |
| 488 | 488 | ||
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index c29dde064078..7562ccbbb39a 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c | |||
| @@ -678,6 +678,7 @@ struct rtl8169_private { | |||
| 678 | struct work_struct work; | 678 | struct work_struct work; |
| 679 | } wk; | 679 | } wk; |
| 680 | 680 | ||
| 681 | unsigned irq_enabled:1; | ||
| 681 | unsigned supports_gmii:1; | 682 | unsigned supports_gmii:1; |
| 682 | dma_addr_t counters_phys_addr; | 683 | dma_addr_t counters_phys_addr; |
| 683 | struct rtl8169_counters *counters; | 684 | struct rtl8169_counters *counters; |
| @@ -1293,6 +1294,7 @@ static void rtl_ack_events(struct rtl8169_private *tp, u16 bits) | |||
| 1293 | static void rtl_irq_disable(struct rtl8169_private *tp) | 1294 | static void rtl_irq_disable(struct rtl8169_private *tp) |
| 1294 | { | 1295 | { |
| 1295 | RTL_W16(tp, IntrMask, 0); | 1296 | RTL_W16(tp, IntrMask, 0); |
| 1297 | tp->irq_enabled = 0; | ||
| 1296 | } | 1298 | } |
| 1297 | 1299 | ||
| 1298 | #define RTL_EVENT_NAPI_RX (RxOK | RxErr) | 1300 | #define RTL_EVENT_NAPI_RX (RxOK | RxErr) |
| @@ -1301,6 +1303,7 @@ static void rtl_irq_disable(struct rtl8169_private *tp) | |||
| 1301 | 1303 | ||
| 1302 | static void rtl_irq_enable(struct rtl8169_private *tp) | 1304 | static void rtl_irq_enable(struct rtl8169_private *tp) |
| 1303 | { | 1305 | { |
| 1306 | tp->irq_enabled = 1; | ||
| 1304 | RTL_W16(tp, IntrMask, tp->irq_mask); | 1307 | RTL_W16(tp, IntrMask, tp->irq_mask); |
| 1305 | } | 1308 | } |
| 1306 | 1309 | ||
| @@ -6520,9 +6523,8 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance) | |||
| 6520 | { | 6523 | { |
| 6521 | struct rtl8169_private *tp = dev_instance; | 6524 | struct rtl8169_private *tp = dev_instance; |
| 6522 | u16 status = RTL_R16(tp, IntrStatus); | 6525 | u16 status = RTL_R16(tp, IntrStatus); |
| 6523 | u16 irq_mask = RTL_R16(tp, IntrMask); | ||
| 6524 | 6526 | ||
| 6525 | if (status == 0xffff || !(status & irq_mask)) | 6527 | if (!tp->irq_enabled || status == 0xffff || !(status & tp->irq_mask)) |
| 6526 | return IRQ_NONE; | 6528 | return IRQ_NONE; |
| 6527 | 6529 | ||
| 6528 | if (unlikely(status & SYSErr)) { | 6530 | if (unlikely(status & SYSErr)) { |
| @@ -6540,7 +6542,7 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance) | |||
| 6540 | set_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags); | 6542 | set_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags); |
| 6541 | } | 6543 | } |
| 6542 | 6544 | ||
| 6543 | if (status & RTL_EVENT_NAPI) { | 6545 | if (status & (RTL_EVENT_NAPI | LinkChg)) { |
| 6544 | rtl_irq_disable(tp); | 6546 | rtl_irq_disable(tp); |
| 6545 | napi_schedule_irqoff(&tp->napi); | 6547 | napi_schedule_irqoff(&tp->napi); |
| 6546 | } | 6548 | } |
diff --git a/drivers/net/ethernet/sis/sis900.c b/drivers/net/ethernet/sis/sis900.c index 6073387511f8..67f9bb6e941b 100644 --- a/drivers/net/ethernet/sis/sis900.c +++ b/drivers/net/ethernet/sis/sis900.c | |||
| @@ -730,10 +730,10 @@ static u16 sis900_default_phy(struct net_device * net_dev) | |||
| 730 | status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); | 730 | status = mdio_read(net_dev, phy->phy_addr, MII_STATUS); |
| 731 | 731 | ||
| 732 | /* Link ON & Not select default PHY & not ghost PHY */ | 732 | /* Link ON & Not select default PHY & not ghost PHY */ |
| 733 | if ((status & MII_STAT_LINK) && !default_phy && | 733 | if ((status & MII_STAT_LINK) && !default_phy && |
| 734 | (phy->phy_types != UNKNOWN)) | 734 | (phy->phy_types != UNKNOWN)) { |
| 735 | default_phy = phy; | 735 | default_phy = phy; |
| 736 | else { | 736 | } else { |
| 737 | status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); | 737 | status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL); |
| 738 | mdio_write(net_dev, phy->phy_addr, MII_CONTROL, | 738 | mdio_write(net_dev, phy->phy_addr, MII_CONTROL, |
| 739 | status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); | 739 | status | MII_CNTL_AUTO | MII_CNTL_ISOLATE); |
| @@ -741,7 +741,7 @@ static u16 sis900_default_phy(struct net_device * net_dev) | |||
| 741 | phy_home = phy; | 741 | phy_home = phy; |
| 742 | else if(phy->phy_types == LAN) | 742 | else if(phy->phy_types == LAN) |
| 743 | phy_lan = phy; | 743 | phy_lan = phy; |
| 744 | } | 744 | } |
| 745 | } | 745 | } |
| 746 | 746 | ||
| 747 | if (!default_phy && phy_home) | 747 | if (!default_phy && phy_home) |
diff --git a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c index d8c5bc412219..4d9bcb4d0378 100644 --- a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c +++ b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c | |||
| @@ -59,7 +59,7 @@ static int jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
| 59 | 59 | ||
| 60 | desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB); | 60 | desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB); |
| 61 | stmmac_prepare_tx_desc(priv, desc, 1, bmax, csum, | 61 | stmmac_prepare_tx_desc(priv, desc, 1, bmax, csum, |
| 62 | STMMAC_RING_MODE, 1, false, skb->len); | 62 | STMMAC_RING_MODE, 0, false, skb->len); |
| 63 | tx_q->tx_skbuff[entry] = NULL; | 63 | tx_q->tx_skbuff[entry] = NULL; |
| 64 | entry = STMMAC_GET_ENTRY(entry, DMA_TX_SIZE); | 64 | entry = STMMAC_GET_ENTRY(entry, DMA_TX_SIZE); |
| 65 | 65 | ||
| @@ -79,7 +79,8 @@ static int jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
| 79 | 79 | ||
| 80 | desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB); | 80 | desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB); |
| 81 | stmmac_prepare_tx_desc(priv, desc, 0, len, csum, | 81 | stmmac_prepare_tx_desc(priv, desc, 0, len, csum, |
| 82 | STMMAC_RING_MODE, 1, true, skb->len); | 82 | STMMAC_RING_MODE, 1, !skb_is_nonlinear(skb), |
| 83 | skb->len); | ||
| 83 | } else { | 84 | } else { |
| 84 | des2 = dma_map_single(priv->device, skb->data, | 85 | des2 = dma_map_single(priv->device, skb->data, |
| 85 | nopaged_len, DMA_TO_DEVICE); | 86 | nopaged_len, DMA_TO_DEVICE); |
| @@ -91,7 +92,8 @@ static int jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
| 91 | tx_q->tx_skbuff_dma[entry].is_jumbo = true; | 92 | tx_q->tx_skbuff_dma[entry].is_jumbo = true; |
| 92 | desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB); | 93 | desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB); |
| 93 | stmmac_prepare_tx_desc(priv, desc, 1, nopaged_len, csum, | 94 | stmmac_prepare_tx_desc(priv, desc, 1, nopaged_len, csum, |
| 94 | STMMAC_RING_MODE, 1, true, skb->len); | 95 | STMMAC_RING_MODE, 0, !skb_is_nonlinear(skb), |
| 96 | skb->len); | ||
| 95 | } | 97 | } |
| 96 | 98 | ||
| 97 | tx_q->cur_tx = entry; | 99 | tx_q->cur_tx = entry; |
| @@ -111,10 +113,11 @@ static unsigned int is_jumbo_frm(int len, int enh_desc) | |||
| 111 | 113 | ||
| 112 | static void refill_desc3(void *priv_ptr, struct dma_desc *p) | 114 | static void refill_desc3(void *priv_ptr, struct dma_desc *p) |
| 113 | { | 115 | { |
| 114 | struct stmmac_priv *priv = (struct stmmac_priv *)priv_ptr; | 116 | struct stmmac_rx_queue *rx_q = priv_ptr; |
| 117 | struct stmmac_priv *priv = rx_q->priv_data; | ||
| 115 | 118 | ||
| 116 | /* Fill DES3 in case of RING mode */ | 119 | /* Fill DES3 in case of RING mode */ |
| 117 | if (priv->dma_buf_sz >= BUF_SIZE_8KiB) | 120 | if (priv->dma_buf_sz == BUF_SIZE_16KiB) |
| 118 | p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB); | 121 | p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB); |
| 119 | } | 122 | } |
| 120 | 123 | ||
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 97c5e1aad88f..6a2e1031a62a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | |||
| @@ -3216,14 +3216,16 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) | |||
| 3216 | stmmac_prepare_tx_desc(priv, first, 1, nopaged_len, | 3216 | stmmac_prepare_tx_desc(priv, first, 1, nopaged_len, |
| 3217 | csum_insertion, priv->mode, 1, last_segment, | 3217 | csum_insertion, priv->mode, 1, last_segment, |
| 3218 | skb->len); | 3218 | skb->len); |
| 3219 | 3219 | } else { | |
| 3220 | /* The own bit must be the latest setting done when prepare the | 3220 | stmmac_set_tx_owner(priv, first); |
| 3221 | * descriptor and then barrier is needed to make sure that | ||
| 3222 | * all is coherent before granting the DMA engine. | ||
| 3223 | */ | ||
| 3224 | wmb(); | ||
| 3225 | } | 3221 | } |
| 3226 | 3222 | ||
| 3223 | /* The own bit must be the latest setting done when prepare the | ||
| 3224 | * descriptor and then barrier is needed to make sure that | ||
| 3225 | * all is coherent before granting the DMA engine. | ||
| 3226 | */ | ||
| 3227 | wmb(); | ||
| 3228 | |||
| 3227 | netdev_tx_sent_queue(netdev_get_tx_queue(dev, queue), skb->len); | 3229 | netdev_tx_sent_queue(netdev_get_tx_queue(dev, queue), skb->len); |
| 3228 | 3230 | ||
| 3229 | stmmac_enable_dma_transmission(priv, priv->ioaddr); | 3231 | stmmac_enable_dma_transmission(priv, priv->ioaddr); |
diff --git a/drivers/net/ethernet/ti/netcp_ethss.c b/drivers/net/ethernet/ti/netcp_ethss.c index 5174d318901e..0a920c5936b2 100644 --- a/drivers/net/ethernet/ti/netcp_ethss.c +++ b/drivers/net/ethernet/ti/netcp_ethss.c | |||
| @@ -3657,12 +3657,16 @@ static int gbe_probe(struct netcp_device *netcp_device, struct device *dev, | |||
| 3657 | 3657 | ||
| 3658 | ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device, | 3658 | ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device, |
| 3659 | gbe_dev->dma_chan_name, gbe_dev->tx_queue_id); | 3659 | gbe_dev->dma_chan_name, gbe_dev->tx_queue_id); |
| 3660 | if (ret) | 3660 | if (ret) { |
| 3661 | of_node_put(interfaces); | ||
| 3661 | return ret; | 3662 | return ret; |
| 3663 | } | ||
| 3662 | 3664 | ||
| 3663 | ret = netcp_txpipe_open(&gbe_dev->tx_pipe); | 3665 | ret = netcp_txpipe_open(&gbe_dev->tx_pipe); |
| 3664 | if (ret) | 3666 | if (ret) { |
| 3667 | of_node_put(interfaces); | ||
| 3665 | return ret; | 3668 | return ret; |
| 3669 | } | ||
| 3666 | 3670 | ||
| 3667 | /* Create network interfaces */ | 3671 | /* Create network interfaces */ |
| 3668 | INIT_LIST_HEAD(&gbe_dev->gbe_intf_head); | 3672 | INIT_LIST_HEAD(&gbe_dev->gbe_intf_head); |
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c index ec7e7ec24ff9..4041c75997ba 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c | |||
| @@ -1575,12 +1575,14 @@ static int axienet_probe(struct platform_device *pdev) | |||
| 1575 | ret = of_address_to_resource(np, 0, &dmares); | 1575 | ret = of_address_to_resource(np, 0, &dmares); |
| 1576 | if (ret) { | 1576 | if (ret) { |
| 1577 | dev_err(&pdev->dev, "unable to get DMA resource\n"); | 1577 | dev_err(&pdev->dev, "unable to get DMA resource\n"); |
| 1578 | of_node_put(np); | ||
| 1578 | goto free_netdev; | 1579 | goto free_netdev; |
| 1579 | } | 1580 | } |
| 1580 | lp->dma_regs = devm_ioremap_resource(&pdev->dev, &dmares); | 1581 | lp->dma_regs = devm_ioremap_resource(&pdev->dev, &dmares); |
| 1581 | if (IS_ERR(lp->dma_regs)) { | 1582 | if (IS_ERR(lp->dma_regs)) { |
| 1582 | dev_err(&pdev->dev, "could not map DMA regs\n"); | 1583 | dev_err(&pdev->dev, "could not map DMA regs\n"); |
| 1583 | ret = PTR_ERR(lp->dma_regs); | 1584 | ret = PTR_ERR(lp->dma_regs); |
| 1585 | of_node_put(np); | ||
| 1584 | goto free_netdev; | 1586 | goto free_netdev; |
| 1585 | } | 1587 | } |
| 1586 | lp->rx_irq = irq_of_parse_and_map(np, 1); | 1588 | lp->rx_irq = irq_of_parse_and_map(np, 1); |
diff --git a/drivers/net/ieee802154/adf7242.c b/drivers/net/ieee802154/adf7242.c index cd1d8faccca5..cd6b95e673a5 100644 --- a/drivers/net/ieee802154/adf7242.c +++ b/drivers/net/ieee802154/adf7242.c | |||
| @@ -1268,6 +1268,10 @@ static int adf7242_probe(struct spi_device *spi) | |||
| 1268 | INIT_DELAYED_WORK(&lp->work, adf7242_rx_cal_work); | 1268 | INIT_DELAYED_WORK(&lp->work, adf7242_rx_cal_work); |
| 1269 | lp->wqueue = alloc_ordered_workqueue(dev_name(&spi->dev), | 1269 | lp->wqueue = alloc_ordered_workqueue(dev_name(&spi->dev), |
| 1270 | WQ_MEM_RECLAIM); | 1270 | WQ_MEM_RECLAIM); |
| 1271 | if (unlikely(!lp->wqueue)) { | ||
| 1272 | ret = -ENOMEM; | ||
| 1273 | goto err_hw_init; | ||
| 1274 | } | ||
| 1271 | 1275 | ||
| 1272 | ret = adf7242_hw_init(lp); | 1276 | ret = adf7242_hw_init(lp); |
| 1273 | if (ret) | 1277 | if (ret) |
diff --git a/drivers/net/ieee802154/mac802154_hwsim.c b/drivers/net/ieee802154/mac802154_hwsim.c index b6743f03dce0..3b88846de31b 100644 --- a/drivers/net/ieee802154/mac802154_hwsim.c +++ b/drivers/net/ieee802154/mac802154_hwsim.c | |||
| @@ -324,7 +324,7 @@ static int hwsim_get_radio_nl(struct sk_buff *msg, struct genl_info *info) | |||
| 324 | goto out_err; | 324 | goto out_err; |
| 325 | } | 325 | } |
| 326 | 326 | ||
| 327 | genlmsg_reply(skb, info); | 327 | res = genlmsg_reply(skb, info); |
| 328 | break; | 328 | break; |
| 329 | } | 329 | } |
| 330 | 330 | ||
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 071869db44cf..520657945b82 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig | |||
| @@ -7,6 +7,8 @@ menuconfig MDIO_DEVICE | |||
| 7 | help | 7 | help |
| 8 | MDIO devices and driver infrastructure code. | 8 | MDIO devices and driver infrastructure code. |
| 9 | 9 | ||
| 10 | if MDIO_DEVICE | ||
| 11 | |||
| 10 | config MDIO_BUS | 12 | config MDIO_BUS |
| 11 | tristate | 13 | tristate |
| 12 | default m if PHYLIB=m | 14 | default m if PHYLIB=m |
| @@ -179,6 +181,7 @@ config MDIO_XGENE | |||
| 179 | APM X-Gene SoC's. | 181 | APM X-Gene SoC's. |
| 180 | 182 | ||
| 181 | endif | 183 | endif |
| 184 | endif | ||
| 182 | 185 | ||
| 183 | config PHYLINK | 186 | config PHYLINK |
| 184 | tristate | 187 | tristate |
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 9605d4fe540b..cb86a3e90c7d 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c | |||
| @@ -323,6 +323,19 @@ static int bcm54xx_config_init(struct phy_device *phydev) | |||
| 323 | 323 | ||
| 324 | bcm54xx_phydsp_config(phydev); | 324 | bcm54xx_phydsp_config(phydev); |
| 325 | 325 | ||
| 326 | /* Encode link speed into LED1 and LED3 pair (green/amber). | ||
| 327 | * Also flash these two LEDs on activity. This means configuring | ||
| 328 | * them for MULTICOLOR and encoding link/activity into them. | ||
| 329 | */ | ||
| 330 | val = BCM5482_SHD_LEDS1_LED1(BCM_LED_SRC_MULTICOLOR1) | | ||
| 331 | BCM5482_SHD_LEDS1_LED3(BCM_LED_SRC_MULTICOLOR1); | ||
| 332 | bcm_phy_write_shadow(phydev, BCM5482_SHD_LEDS1, val); | ||
| 333 | |||
| 334 | val = BCM_LED_MULTICOLOR_IN_PHASE | | ||
| 335 | BCM5482_SHD_LEDS1_LED1(BCM_LED_MULTICOLOR_LINK_ACT) | | ||
| 336 | BCM5482_SHD_LEDS1_LED3(BCM_LED_MULTICOLOR_LINK_ACT); | ||
| 337 | bcm_phy_write_exp(phydev, BCM_EXP_MULTICOLOR, val); | ||
| 338 | |||
| 326 | return 0; | 339 | return 0; |
| 327 | } | 340 | } |
| 328 | 341 | ||
diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c index bbd8c22067f3..97d45bd5b38e 100644 --- a/drivers/net/phy/dp83822.c +++ b/drivers/net/phy/dp83822.c | |||
| @@ -15,6 +15,8 @@ | |||
| 15 | #include <linux/netdevice.h> | 15 | #include <linux/netdevice.h> |
| 16 | 16 | ||
| 17 | #define DP83822_PHY_ID 0x2000a240 | 17 | #define DP83822_PHY_ID 0x2000a240 |
| 18 | #define DP83825I_PHY_ID 0x2000a150 | ||
| 19 | |||
| 18 | #define DP83822_DEVADDR 0x1f | 20 | #define DP83822_DEVADDR 0x1f |
| 19 | 21 | ||
| 20 | #define MII_DP83822_PHYSCR 0x11 | 22 | #define MII_DP83822_PHYSCR 0x11 |
| @@ -304,26 +306,30 @@ static int dp83822_resume(struct phy_device *phydev) | |||
| 304 | return 0; | 306 | return 0; |
| 305 | } | 307 | } |
| 306 | 308 | ||
| 309 | #define DP83822_PHY_DRIVER(_id, _name) \ | ||
| 310 | { \ | ||
| 311 | PHY_ID_MATCH_MODEL(_id), \ | ||
| 312 | .name = (_name), \ | ||
| 313 | .features = PHY_BASIC_FEATURES, \ | ||
| 314 | .soft_reset = dp83822_phy_reset, \ | ||
| 315 | .config_init = dp83822_config_init, \ | ||
| 316 | .get_wol = dp83822_get_wol, \ | ||
| 317 | .set_wol = dp83822_set_wol, \ | ||
| 318 | .ack_interrupt = dp83822_ack_interrupt, \ | ||
| 319 | .config_intr = dp83822_config_intr, \ | ||
| 320 | .suspend = dp83822_suspend, \ | ||
| 321 | .resume = dp83822_resume, \ | ||
| 322 | } | ||
| 323 | |||
| 307 | static struct phy_driver dp83822_driver[] = { | 324 | static struct phy_driver dp83822_driver[] = { |
| 308 | { | 325 | DP83822_PHY_DRIVER(DP83822_PHY_ID, "TI DP83822"), |
| 309 | .phy_id = DP83822_PHY_ID, | 326 | DP83822_PHY_DRIVER(DP83825I_PHY_ID, "TI DP83825I"), |
| 310 | .phy_id_mask = 0xfffffff0, | ||
| 311 | .name = "TI DP83822", | ||
| 312 | .features = PHY_BASIC_FEATURES, | ||
| 313 | .config_init = dp83822_config_init, | ||
| 314 | .soft_reset = dp83822_phy_reset, | ||
| 315 | .get_wol = dp83822_get_wol, | ||
| 316 | .set_wol = dp83822_set_wol, | ||
| 317 | .ack_interrupt = dp83822_ack_interrupt, | ||
| 318 | .config_intr = dp83822_config_intr, | ||
| 319 | .suspend = dp83822_suspend, | ||
| 320 | .resume = dp83822_resume, | ||
| 321 | }, | ||
| 322 | }; | 327 | }; |
| 323 | module_phy_driver(dp83822_driver); | 328 | module_phy_driver(dp83822_driver); |
| 324 | 329 | ||
| 325 | static struct mdio_device_id __maybe_unused dp83822_tbl[] = { | 330 | static struct mdio_device_id __maybe_unused dp83822_tbl[] = { |
| 326 | { DP83822_PHY_ID, 0xfffffff0 }, | 331 | { DP83822_PHY_ID, 0xfffffff0 }, |
| 332 | { DP83825I_PHY_ID, 0xfffffff0 }, | ||
| 327 | { }, | 333 | { }, |
| 328 | }; | 334 | }; |
| 329 | MODULE_DEVICE_TABLE(mdio, dp83822_tbl); | 335 | MODULE_DEVICE_TABLE(mdio, dp83822_tbl); |
diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c index a238388eb1a5..0eec2913c289 100644 --- a/drivers/net/phy/meson-gxl.c +++ b/drivers/net/phy/meson-gxl.c | |||
| @@ -201,6 +201,7 @@ static int meson_gxl_ack_interrupt(struct phy_device *phydev) | |||
| 201 | static int meson_gxl_config_intr(struct phy_device *phydev) | 201 | static int meson_gxl_config_intr(struct phy_device *phydev) |
| 202 | { | 202 | { |
| 203 | u16 val; | 203 | u16 val; |
| 204 | int ret; | ||
| 204 | 205 | ||
| 205 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { | 206 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { |
| 206 | val = INTSRC_ANEG_PR | 207 | val = INTSRC_ANEG_PR |
| @@ -213,6 +214,11 @@ static int meson_gxl_config_intr(struct phy_device *phydev) | |||
| 213 | val = 0; | 214 | val = 0; |
| 214 | } | 215 | } |
| 215 | 216 | ||
| 217 | /* Ack any pending IRQ */ | ||
| 218 | ret = meson_gxl_ack_interrupt(phydev); | ||
| 219 | if (ret) | ||
| 220 | return ret; | ||
| 221 | |||
| 216 | return phy_write(phydev, INTSRC_MASK, val); | 222 | return phy_write(phydev, INTSRC_MASK, val); |
| 217 | } | 223 | } |
| 218 | 224 | ||
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index 49fdd1ee798e..77068c545de0 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c | |||
| @@ -1831,7 +1831,7 @@ int genphy_soft_reset(struct phy_device *phydev) | |||
| 1831 | { | 1831 | { |
| 1832 | int ret; | 1832 | int ret; |
| 1833 | 1833 | ||
| 1834 | ret = phy_write(phydev, MII_BMCR, BMCR_RESET); | 1834 | ret = phy_set_bits(phydev, MII_BMCR, BMCR_RESET); |
| 1835 | if (ret < 0) | 1835 | if (ret < 0) |
| 1836 | return ret; | 1836 | return ret; |
| 1837 | 1837 | ||
diff --git a/drivers/net/tun.c b/drivers/net/tun.c index 1d68921723dc..e9ca1c088d0b 100644 --- a/drivers/net/tun.c +++ b/drivers/net/tun.c | |||
| @@ -1763,9 +1763,6 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile, | |||
| 1763 | int skb_xdp = 1; | 1763 | int skb_xdp = 1; |
| 1764 | bool frags = tun_napi_frags_enabled(tfile); | 1764 | bool frags = tun_napi_frags_enabled(tfile); |
| 1765 | 1765 | ||
| 1766 | if (!(tun->dev->flags & IFF_UP)) | ||
| 1767 | return -EIO; | ||
| 1768 | |||
| 1769 | if (!(tun->flags & IFF_NO_PI)) { | 1766 | if (!(tun->flags & IFF_NO_PI)) { |
| 1770 | if (len < sizeof(pi)) | 1767 | if (len < sizeof(pi)) |
| 1771 | return -EINVAL; | 1768 | return -EINVAL; |
| @@ -1867,6 +1864,8 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile, | |||
| 1867 | err = skb_copy_datagram_from_iter(skb, 0, from, len); | 1864 | err = skb_copy_datagram_from_iter(skb, 0, from, len); |
| 1868 | 1865 | ||
| 1869 | if (err) { | 1866 | if (err) { |
| 1867 | err = -EFAULT; | ||
| 1868 | drop: | ||
| 1870 | this_cpu_inc(tun->pcpu_stats->rx_dropped); | 1869 | this_cpu_inc(tun->pcpu_stats->rx_dropped); |
| 1871 | kfree_skb(skb); | 1870 | kfree_skb(skb); |
| 1872 | if (frags) { | 1871 | if (frags) { |
| @@ -1874,7 +1873,7 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile, | |||
| 1874 | mutex_unlock(&tfile->napi_mutex); | 1873 | mutex_unlock(&tfile->napi_mutex); |
| 1875 | } | 1874 | } |
| 1876 | 1875 | ||
| 1877 | return -EFAULT; | 1876 | return err; |
| 1878 | } | 1877 | } |
| 1879 | } | 1878 | } |
| 1880 | 1879 | ||
| @@ -1958,6 +1957,13 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile, | |||
| 1958 | !tfile->detached) | 1957 | !tfile->detached) |
| 1959 | rxhash = __skb_get_hash_symmetric(skb); | 1958 | rxhash = __skb_get_hash_symmetric(skb); |
| 1960 | 1959 | ||
| 1960 | rcu_read_lock(); | ||
| 1961 | if (unlikely(!(tun->dev->flags & IFF_UP))) { | ||
| 1962 | err = -EIO; | ||
| 1963 | rcu_read_unlock(); | ||
| 1964 | goto drop; | ||
| 1965 | } | ||
| 1966 | |||
| 1961 | if (frags) { | 1967 | if (frags) { |
| 1962 | /* Exercise flow dissector code path. */ | 1968 | /* Exercise flow dissector code path. */ |
| 1963 | u32 headlen = eth_get_headlen(skb->data, skb_headlen(skb)); | 1969 | u32 headlen = eth_get_headlen(skb->data, skb_headlen(skb)); |
| @@ -1965,6 +1971,7 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile, | |||
| 1965 | if (unlikely(headlen > skb_headlen(skb))) { | 1971 | if (unlikely(headlen > skb_headlen(skb))) { |
| 1966 | this_cpu_inc(tun->pcpu_stats->rx_dropped); | 1972 | this_cpu_inc(tun->pcpu_stats->rx_dropped); |
| 1967 | napi_free_frags(&tfile->napi); | 1973 | napi_free_frags(&tfile->napi); |
| 1974 | rcu_read_unlock(); | ||
| 1968 | mutex_unlock(&tfile->napi_mutex); | 1975 | mutex_unlock(&tfile->napi_mutex); |
| 1969 | WARN_ON(1); | 1976 | WARN_ON(1); |
| 1970 | return -ENOMEM; | 1977 | return -ENOMEM; |
| @@ -1992,6 +1999,7 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile, | |||
| 1992 | } else { | 1999 | } else { |
| 1993 | netif_rx_ni(skb); | 2000 | netif_rx_ni(skb); |
| 1994 | } | 2001 | } |
| 2002 | rcu_read_unlock(); | ||
| 1995 | 2003 | ||
| 1996 | stats = get_cpu_ptr(tun->pcpu_stats); | 2004 | stats = get_cpu_ptr(tun->pcpu_stats); |
| 1997 | u64_stats_update_begin(&stats->syncp); | 2005 | u64_stats_update_begin(&stats->syncp); |
diff --git a/drivers/net/usb/aqc111.c b/drivers/net/usb/aqc111.c index 820a2fe7d027..aff995be2a31 100644 --- a/drivers/net/usb/aqc111.c +++ b/drivers/net/usb/aqc111.c | |||
| @@ -1301,6 +1301,20 @@ static const struct driver_info trendnet_info = { | |||
| 1301 | .tx_fixup = aqc111_tx_fixup, | 1301 | .tx_fixup = aqc111_tx_fixup, |
| 1302 | }; | 1302 | }; |
| 1303 | 1303 | ||
| 1304 | static const struct driver_info qnap_info = { | ||
| 1305 | .description = "QNAP QNA-UC5G1T USB to 5GbE Adapter", | ||
| 1306 | .bind = aqc111_bind, | ||
| 1307 | .unbind = aqc111_unbind, | ||
| 1308 | .status = aqc111_status, | ||
| 1309 | .link_reset = aqc111_link_reset, | ||
| 1310 | .reset = aqc111_reset, | ||
| 1311 | .stop = aqc111_stop, | ||
| 1312 | .flags = FLAG_ETHER | FLAG_FRAMING_AX | | ||
| 1313 | FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET, | ||
| 1314 | .rx_fixup = aqc111_rx_fixup, | ||
| 1315 | .tx_fixup = aqc111_tx_fixup, | ||
| 1316 | }; | ||
| 1317 | |||
| 1304 | static int aqc111_suspend(struct usb_interface *intf, pm_message_t message) | 1318 | static int aqc111_suspend(struct usb_interface *intf, pm_message_t message) |
| 1305 | { | 1319 | { |
| 1306 | struct usbnet *dev = usb_get_intfdata(intf); | 1320 | struct usbnet *dev = usb_get_intfdata(intf); |
| @@ -1455,6 +1469,7 @@ static const struct usb_device_id products[] = { | |||
| 1455 | {AQC111_USB_ETH_DEV(0x0b95, 0x2790, asix111_info)}, | 1469 | {AQC111_USB_ETH_DEV(0x0b95, 0x2790, asix111_info)}, |
| 1456 | {AQC111_USB_ETH_DEV(0x0b95, 0x2791, asix112_info)}, | 1470 | {AQC111_USB_ETH_DEV(0x0b95, 0x2791, asix112_info)}, |
| 1457 | {AQC111_USB_ETH_DEV(0x20f4, 0xe05a, trendnet_info)}, | 1471 | {AQC111_USB_ETH_DEV(0x20f4, 0xe05a, trendnet_info)}, |
| 1472 | {AQC111_USB_ETH_DEV(0x1c04, 0x0015, qnap_info)}, | ||
| 1458 | { },/* END */ | 1473 | { },/* END */ |
| 1459 | }; | 1474 | }; |
| 1460 | MODULE_DEVICE_TABLE(usb, products); | 1475 | MODULE_DEVICE_TABLE(usb, products); |
diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c index 5512a1038721..3e9b2c319e45 100644 --- a/drivers/net/usb/cdc_ether.c +++ b/drivers/net/usb/cdc_ether.c | |||
| @@ -851,6 +851,14 @@ static const struct usb_device_id products[] = { | |||
| 851 | .driver_info = 0, | 851 | .driver_info = 0, |
| 852 | }, | 852 | }, |
| 853 | 853 | ||
| 854 | /* QNAP QNA-UC5G1T USB to 5GbE Adapter (based on AQC111U) */ | ||
| 855 | { | ||
| 856 | USB_DEVICE_AND_INTERFACE_INFO(0x1c04, 0x0015, USB_CLASS_COMM, | ||
| 857 | USB_CDC_SUBCLASS_ETHERNET, | ||
| 858 | USB_CDC_PROTO_NONE), | ||
| 859 | .driver_info = 0, | ||
| 860 | }, | ||
| 861 | |||
| 854 | /* WHITELIST!!! | 862 | /* WHITELIST!!! |
| 855 | * | 863 | * |
| 856 | * CDC Ether uses two interfaces, not necessarily consecutive. | 864 | * CDC Ether uses two interfaces, not necessarily consecutive. |
diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c index 077f1b9f2761..d76dfed8d9bb 100644 --- a/drivers/net/vxlan.c +++ b/drivers/net/vxlan.c | |||
| @@ -4335,10 +4335,8 @@ static void vxlan_destroy_tunnels(struct net *net, struct list_head *head) | |||
| 4335 | /* If vxlan->dev is in the same netns, it has already been added | 4335 | /* If vxlan->dev is in the same netns, it has already been added |
| 4336 | * to the list by the previous loop. | 4336 | * to the list by the previous loop. |
| 4337 | */ | 4337 | */ |
| 4338 | if (!net_eq(dev_net(vxlan->dev), net)) { | 4338 | if (!net_eq(dev_net(vxlan->dev), net)) |
| 4339 | gro_cells_destroy(&vxlan->gro_cells); | ||
| 4340 | unregister_netdevice_queue(vxlan->dev, head); | 4339 | unregister_netdevice_queue(vxlan->dev, head); |
| 4341 | } | ||
| 4342 | } | 4340 | } |
| 4343 | 4341 | ||
| 4344 | for (h = 0; h < PORT_HASH_SIZE; ++h) | 4342 | for (h = 0; h < PORT_HASH_SIZE; ++h) |
diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c b/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c index e9822a3ec373..94132cfd1f56 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c | |||
| @@ -460,9 +460,7 @@ static int iwl_mvm_ftm_range_resp_valid(struct iwl_mvm *mvm, u8 request_id, | |||
| 460 | static void iwl_mvm_debug_range_resp(struct iwl_mvm *mvm, u8 index, | 460 | static void iwl_mvm_debug_range_resp(struct iwl_mvm *mvm, u8 index, |
| 461 | struct cfg80211_pmsr_result *res) | 461 | struct cfg80211_pmsr_result *res) |
| 462 | { | 462 | { |
| 463 | s64 rtt_avg = res->ftm.rtt_avg * 100; | 463 | s64 rtt_avg = div_s64(res->ftm.rtt_avg * 100, 6666); |
| 464 | |||
| 465 | do_div(rtt_avg, 6666); | ||
| 466 | 464 | ||
| 467 | IWL_DEBUG_INFO(mvm, "entry %d\n", index); | 465 | IWL_DEBUG_INFO(mvm, "entry %d\n", index); |
| 468 | IWL_DEBUG_INFO(mvm, "\tstatus: %d\n", res->status); | 466 | IWL_DEBUG_INFO(mvm, "\tstatus: %d\n", res->status); |
diff --git a/drivers/net/wireless/mediatek/mt76/dma.c b/drivers/net/wireless/mediatek/mt76/dma.c index 6eedc0ec7661..76629b98c78d 100644 --- a/drivers/net/wireless/mediatek/mt76/dma.c +++ b/drivers/net/wireless/mediatek/mt76/dma.c | |||
| @@ -130,6 +130,8 @@ mt76_dma_tx_cleanup_idx(struct mt76_dev *dev, struct mt76_queue *q, int idx, | |||
| 130 | static void | 130 | static void |
| 131 | mt76_dma_sync_idx(struct mt76_dev *dev, struct mt76_queue *q) | 131 | mt76_dma_sync_idx(struct mt76_dev *dev, struct mt76_queue *q) |
| 132 | { | 132 | { |
| 133 | iowrite32(q->desc_dma, &q->regs->desc_base); | ||
| 134 | iowrite32(q->ndesc, &q->regs->ring_size); | ||
| 133 | q->head = ioread32(&q->regs->dma_idx); | 135 | q->head = ioread32(&q->regs->dma_idx); |
| 134 | q->tail = q->head; | 136 | q->tail = q->head; |
| 135 | iowrite32(q->head, &q->regs->cpu_idx); | 137 | iowrite32(q->head, &q->regs->cpu_idx); |
| @@ -180,7 +182,10 @@ mt76_dma_tx_cleanup(struct mt76_dev *dev, enum mt76_txq_id qid, bool flush) | |||
| 180 | else | 182 | else |
| 181 | mt76_dma_sync_idx(dev, q); | 183 | mt76_dma_sync_idx(dev, q); |
| 182 | 184 | ||
| 183 | wake = wake && qid < IEEE80211_NUM_ACS && q->queued < q->ndesc - 8; | 185 | wake = wake && q->stopped && |
| 186 | qid < IEEE80211_NUM_ACS && q->queued < q->ndesc - 8; | ||
| 187 | if (wake) | ||
| 188 | q->stopped = false; | ||
| 184 | 189 | ||
| 185 | if (!q->queued) | 190 | if (!q->queued) |
| 186 | wake_up(&dev->tx_wait); | 191 | wake_up(&dev->tx_wait); |
diff --git a/drivers/net/wireless/mediatek/mt76/mac80211.c b/drivers/net/wireless/mediatek/mt76/mac80211.c index a033745adb2f..316167404729 100644 --- a/drivers/net/wireless/mediatek/mt76/mac80211.c +++ b/drivers/net/wireless/mediatek/mt76/mac80211.c | |||
| @@ -679,19 +679,15 @@ out: | |||
| 679 | return ret; | 679 | return ret; |
| 680 | } | 680 | } |
| 681 | 681 | ||
| 682 | static void | 682 | void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif, |
| 683 | mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif, | 683 | struct ieee80211_sta *sta) |
| 684 | struct ieee80211_sta *sta) | ||
| 685 | { | 684 | { |
| 686 | struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; | 685 | struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; |
| 687 | int idx = wcid->idx; | 686 | int i, idx = wcid->idx; |
| 688 | int i; | ||
| 689 | 687 | ||
| 690 | rcu_assign_pointer(dev->wcid[idx], NULL); | 688 | rcu_assign_pointer(dev->wcid[idx], NULL); |
| 691 | synchronize_rcu(); | 689 | synchronize_rcu(); |
| 692 | 690 | ||
| 693 | mutex_lock(&dev->mutex); | ||
| 694 | |||
| 695 | if (dev->drv->sta_remove) | 691 | if (dev->drv->sta_remove) |
| 696 | dev->drv->sta_remove(dev, vif, sta); | 692 | dev->drv->sta_remove(dev, vif, sta); |
| 697 | 693 | ||
| @@ -699,7 +695,15 @@ mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif, | |||
| 699 | for (i = 0; i < ARRAY_SIZE(sta->txq); i++) | 695 | for (i = 0; i < ARRAY_SIZE(sta->txq); i++) |
| 700 | mt76_txq_remove(dev, sta->txq[i]); | 696 | mt76_txq_remove(dev, sta->txq[i]); |
| 701 | mt76_wcid_free(dev->wcid_mask, idx); | 697 | mt76_wcid_free(dev->wcid_mask, idx); |
| 698 | } | ||
| 699 | EXPORT_SYMBOL_GPL(__mt76_sta_remove); | ||
| 702 | 700 | ||
| 701 | static void | ||
| 702 | mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif, | ||
| 703 | struct ieee80211_sta *sta) | ||
| 704 | { | ||
| 705 | mutex_lock(&dev->mutex); | ||
| 706 | __mt76_sta_remove(dev, vif, sta); | ||
| 703 | mutex_unlock(&dev->mutex); | 707 | mutex_unlock(&dev->mutex); |
| 704 | } | 708 | } |
| 705 | 709 | ||
diff --git a/drivers/net/wireless/mediatek/mt76/mt76.h b/drivers/net/wireless/mediatek/mt76/mt76.h index 5dfb0601f101..bcbfd3c4a44b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76.h +++ b/drivers/net/wireless/mediatek/mt76/mt76.h | |||
| @@ -126,6 +126,7 @@ struct mt76_queue { | |||
| 126 | int ndesc; | 126 | int ndesc; |
| 127 | int queued; | 127 | int queued; |
| 128 | int buf_size; | 128 | int buf_size; |
| 129 | bool stopped; | ||
| 129 | 130 | ||
| 130 | u8 buf_offset; | 131 | u8 buf_offset; |
| 131 | u8 hw_idx; | 132 | u8 hw_idx; |
| @@ -143,6 +144,7 @@ struct mt76_mcu_ops { | |||
| 143 | const struct mt76_reg_pair *rp, int len); | 144 | const struct mt76_reg_pair *rp, int len); |
| 144 | int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base, | 145 | int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base, |
| 145 | struct mt76_reg_pair *rp, int len); | 146 | struct mt76_reg_pair *rp, int len); |
| 147 | int (*mcu_restart)(struct mt76_dev *dev); | ||
| 146 | }; | 148 | }; |
| 147 | 149 | ||
| 148 | struct mt76_queue_ops { | 150 | struct mt76_queue_ops { |
| @@ -693,6 +695,8 @@ int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |||
| 693 | struct ieee80211_sta *sta, | 695 | struct ieee80211_sta *sta, |
| 694 | enum ieee80211_sta_state old_state, | 696 | enum ieee80211_sta_state old_state, |
| 695 | enum ieee80211_sta_state new_state); | 697 | enum ieee80211_sta_state new_state); |
| 698 | void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif, | ||
| 699 | struct ieee80211_sta *sta); | ||
| 696 | 700 | ||
| 697 | struct ieee80211_sta *mt76_rx_convert(struct sk_buff *skb); | 701 | struct ieee80211_sta *mt76_rx_convert(struct sk_buff *skb); |
| 698 | 702 | ||
diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/beacon.c b/drivers/net/wireless/mediatek/mt76/mt7603/beacon.c index afcd86f735b4..4dcb465095d1 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/beacon.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/beacon.c | |||
| @@ -135,8 +135,7 @@ void mt7603_pre_tbtt_tasklet(unsigned long arg) | |||
| 135 | 135 | ||
| 136 | out: | 136 | out: |
| 137 | mt76_queue_tx_cleanup(dev, MT_TXQ_BEACON, false); | 137 | mt76_queue_tx_cleanup(dev, MT_TXQ_BEACON, false); |
| 138 | if (dev->mt76.q_tx[MT_TXQ_BEACON].queued > | 138 | if (dev->mt76.q_tx[MT_TXQ_BEACON].queued > hweight8(dev->beacon_mask)) |
| 139 | __sw_hweight8(dev->beacon_mask)) | ||
| 140 | dev->beacon_check++; | 139 | dev->beacon_check++; |
| 141 | } | 140 | } |
| 142 | 141 | ||
diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/dma.c b/drivers/net/wireless/mediatek/mt76/mt7603/dma.c index d69e82c66ab2..b3ae0aaea62a 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/dma.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/dma.c | |||
| @@ -27,12 +27,16 @@ static void | |||
| 27 | mt7603_rx_loopback_skb(struct mt7603_dev *dev, struct sk_buff *skb) | 27 | mt7603_rx_loopback_skb(struct mt7603_dev *dev, struct sk_buff *skb) |
| 28 | { | 28 | { |
| 29 | __le32 *txd = (__le32 *)skb->data; | 29 | __le32 *txd = (__le32 *)skb->data; |
| 30 | struct ieee80211_hdr *hdr; | ||
| 31 | struct ieee80211_sta *sta; | ||
| 30 | struct mt7603_sta *msta; | 32 | struct mt7603_sta *msta; |
| 31 | struct mt76_wcid *wcid; | 33 | struct mt76_wcid *wcid; |
| 34 | void *priv; | ||
| 32 | int idx; | 35 | int idx; |
| 33 | u32 val; | 36 | u32 val; |
| 37 | u8 tid; | ||
| 34 | 38 | ||
| 35 | if (skb->len < sizeof(MT_TXD_SIZE) + sizeof(struct ieee80211_hdr)) | 39 | if (skb->len < MT_TXD_SIZE + sizeof(struct ieee80211_hdr)) |
| 36 | goto free; | 40 | goto free; |
| 37 | 41 | ||
| 38 | val = le32_to_cpu(txd[1]); | 42 | val = le32_to_cpu(txd[1]); |
| @@ -46,10 +50,19 @@ mt7603_rx_loopback_skb(struct mt7603_dev *dev, struct sk_buff *skb) | |||
| 46 | if (!wcid) | 50 | if (!wcid) |
| 47 | goto free; | 51 | goto free; |
| 48 | 52 | ||
| 49 | msta = container_of(wcid, struct mt7603_sta, wcid); | 53 | priv = msta = container_of(wcid, struct mt7603_sta, wcid); |
| 50 | val = le32_to_cpu(txd[0]); | 54 | val = le32_to_cpu(txd[0]); |
| 51 | skb_set_queue_mapping(skb, FIELD_GET(MT_TXD0_Q_IDX, val)); | 55 | skb_set_queue_mapping(skb, FIELD_GET(MT_TXD0_Q_IDX, val)); |
| 52 | 56 | ||
| 57 | val &= ~(MT_TXD0_P_IDX | MT_TXD0_Q_IDX); | ||
| 58 | val |= FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_HW_QUEUE_MGMT); | ||
| 59 | txd[0] = cpu_to_le32(val); | ||
| 60 | |||
| 61 | sta = container_of(priv, struct ieee80211_sta, drv_priv); | ||
| 62 | hdr = (struct ieee80211_hdr *) &skb->data[MT_TXD_SIZE]; | ||
| 63 | tid = *ieee80211_get_qos_ctl(hdr) & IEEE80211_QOS_CTL_TID_MASK; | ||
| 64 | ieee80211_sta_set_buffered(sta, tid, true); | ||
| 65 | |||
| 53 | spin_lock_bh(&dev->ps_lock); | 66 | spin_lock_bh(&dev->ps_lock); |
| 54 | __skb_queue_tail(&msta->psq, skb); | 67 | __skb_queue_tail(&msta->psq, skb); |
| 55 | if (skb_queue_len(&msta->psq) >= 64) { | 68 | if (skb_queue_len(&msta->psq) >= 64) { |
diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/init.c b/drivers/net/wireless/mediatek/mt76/mt7603/init.c index 15cc8f33b34d..d54dda67d036 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/init.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/init.c | |||
| @@ -112,7 +112,7 @@ static void | |||
| 112 | mt7603_phy_init(struct mt7603_dev *dev) | 112 | mt7603_phy_init(struct mt7603_dev *dev) |
| 113 | { | 113 | { |
| 114 | int rx_chains = dev->mt76.antenna_mask; | 114 | int rx_chains = dev->mt76.antenna_mask; |
| 115 | int tx_chains = __sw_hweight8(rx_chains) - 1; | 115 | int tx_chains = hweight8(rx_chains) - 1; |
| 116 | 116 | ||
| 117 | mt76_rmw(dev, MT_WF_RMAC_RMCR, | 117 | mt76_rmw(dev, MT_WF_RMAC_RMCR, |
| 118 | (MT_WF_RMAC_RMCR_SMPS_MODE | | 118 | (MT_WF_RMAC_RMCR_SMPS_MODE | |
diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/mac.c b/drivers/net/wireless/mediatek/mt76/mt7603/mac.c index 0a0115861b51..5e31d7da96fc 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/mac.c | |||
| @@ -1072,7 +1072,7 @@ out: | |||
| 1072 | case MT_PHY_TYPE_HT: | 1072 | case MT_PHY_TYPE_HT: |
| 1073 | final_rate_flags |= IEEE80211_TX_RC_MCS; | 1073 | final_rate_flags |= IEEE80211_TX_RC_MCS; |
| 1074 | final_rate &= GENMASK(5, 0); | 1074 | final_rate &= GENMASK(5, 0); |
| 1075 | if (i > 15) | 1075 | if (final_rate > 15) |
| 1076 | return false; | 1076 | return false; |
| 1077 | break; | 1077 | break; |
| 1078 | default: | 1078 | default: |
diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/main.c b/drivers/net/wireless/mediatek/mt76/mt7603/main.c index b10775ed92e6..cc0fe0933b2d 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/main.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/main.c | |||
| @@ -5,6 +5,7 @@ | |||
| 5 | #include <linux/pci.h> | 5 | #include <linux/pci.h> |
| 6 | #include <linux/module.h> | 6 | #include <linux/module.h> |
| 7 | #include "mt7603.h" | 7 | #include "mt7603.h" |
| 8 | #include "mac.h" | ||
| 8 | #include "eeprom.h" | 9 | #include "eeprom.h" |
| 9 | 10 | ||
| 10 | static int | 11 | static int |
| @@ -386,6 +387,15 @@ mt7603_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps) | |||
| 386 | } | 387 | } |
| 387 | 388 | ||
| 388 | static void | 389 | static void |
| 390 | mt7603_ps_set_more_data(struct sk_buff *skb) | ||
| 391 | { | ||
| 392 | struct ieee80211_hdr *hdr; | ||
| 393 | |||
| 394 | hdr = (struct ieee80211_hdr *) &skb->data[MT_TXD_SIZE]; | ||
| 395 | hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA); | ||
| 396 | } | ||
| 397 | |||
| 398 | static void | ||
| 389 | mt7603_release_buffered_frames(struct ieee80211_hw *hw, | 399 | mt7603_release_buffered_frames(struct ieee80211_hw *hw, |
| 390 | struct ieee80211_sta *sta, | 400 | struct ieee80211_sta *sta, |
| 391 | u16 tids, int nframes, | 401 | u16 tids, int nframes, |
| @@ -399,6 +409,8 @@ mt7603_release_buffered_frames(struct ieee80211_hw *hw, | |||
| 399 | 409 | ||
| 400 | __skb_queue_head_init(&list); | 410 | __skb_queue_head_init(&list); |
| 401 | 411 | ||
| 412 | mt7603_wtbl_set_ps(dev, msta, false); | ||
| 413 | |||
| 402 | spin_lock_bh(&dev->ps_lock); | 414 | spin_lock_bh(&dev->ps_lock); |
| 403 | skb_queue_walk_safe(&msta->psq, skb, tmp) { | 415 | skb_queue_walk_safe(&msta->psq, skb, tmp) { |
| 404 | if (!nframes) | 416 | if (!nframes) |
| @@ -409,11 +421,15 @@ mt7603_release_buffered_frames(struct ieee80211_hw *hw, | |||
| 409 | 421 | ||
| 410 | skb_set_queue_mapping(skb, MT_TXQ_PSD); | 422 | skb_set_queue_mapping(skb, MT_TXQ_PSD); |
| 411 | __skb_unlink(skb, &msta->psq); | 423 | __skb_unlink(skb, &msta->psq); |
| 424 | mt7603_ps_set_more_data(skb); | ||
| 412 | __skb_queue_tail(&list, skb); | 425 | __skb_queue_tail(&list, skb); |
| 413 | nframes--; | 426 | nframes--; |
| 414 | } | 427 | } |
| 415 | spin_unlock_bh(&dev->ps_lock); | 428 | spin_unlock_bh(&dev->ps_lock); |
| 416 | 429 | ||
| 430 | if (!skb_queue_empty(&list)) | ||
| 431 | ieee80211_sta_eosp(sta); | ||
| 432 | |||
| 417 | mt7603_ps_tx_list(dev, &list); | 433 | mt7603_ps_tx_list(dev, &list); |
| 418 | 434 | ||
| 419 | if (nframes) | 435 | if (nframes) |
diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7603/mcu.c index 4b0713f1fd5e..d06905ea8cc6 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/mcu.c | |||
| @@ -433,7 +433,7 @@ int mt7603_mcu_set_channel(struct mt7603_dev *dev) | |||
| 433 | { | 433 | { |
| 434 | struct cfg80211_chan_def *chandef = &dev->mt76.chandef; | 434 | struct cfg80211_chan_def *chandef = &dev->mt76.chandef; |
| 435 | struct ieee80211_hw *hw = mt76_hw(dev); | 435 | struct ieee80211_hw *hw = mt76_hw(dev); |
| 436 | int n_chains = __sw_hweight8(dev->mt76.antenna_mask); | 436 | int n_chains = hweight8(dev->mt76.antenna_mask); |
| 437 | struct { | 437 | struct { |
| 438 | u8 control_chan; | 438 | u8 control_chan; |
| 439 | u8 center_chan; | 439 | u8 center_chan; |
diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/soc.c b/drivers/net/wireless/mediatek/mt76/mt7603/soc.c index e13fea80d970..b920be1f5718 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/soc.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/soc.c | |||
| @@ -23,9 +23,9 @@ mt76_wmac_probe(struct platform_device *pdev) | |||
| 23 | } | 23 | } |
| 24 | 24 | ||
| 25 | mem_base = devm_ioremap_resource(&pdev->dev, res); | 25 | mem_base = devm_ioremap_resource(&pdev->dev, res); |
| 26 | if (!mem_base) { | 26 | if (IS_ERR(mem_base)) { |
| 27 | dev_err(&pdev->dev, "Failed to get memory resource\n"); | 27 | dev_err(&pdev->dev, "Failed to get memory resource\n"); |
| 28 | return -EINVAL; | 28 | return PTR_ERR(mem_base); |
| 29 | } | 29 | } |
| 30 | 30 | ||
| 31 | mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt7603_ops, | 31 | mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt7603_ops, |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x0/initvals.h b/drivers/net/wireless/mediatek/mt76/mt76x0/initvals.h index 0290ba5869a5..736f81752b5b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x0/initvals.h +++ b/drivers/net/wireless/mediatek/mt76/mt76x0/initvals.h | |||
| @@ -46,7 +46,7 @@ static const struct mt76_reg_pair common_mac_reg_table[] = { | |||
| 46 | { MT_MM20_PROT_CFG, 0x01742004 }, | 46 | { MT_MM20_PROT_CFG, 0x01742004 }, |
| 47 | { MT_MM40_PROT_CFG, 0x03f42084 }, | 47 | { MT_MM40_PROT_CFG, 0x03f42084 }, |
| 48 | { MT_TXOP_CTRL_CFG, 0x0000583f }, | 48 | { MT_TXOP_CTRL_CFG, 0x0000583f }, |
| 49 | { MT_TX_RTS_CFG, 0x00092b20 }, | 49 | { MT_TX_RTS_CFG, 0x00ffff20 }, |
| 50 | { MT_EXP_ACK_TIME, 0x002400ca }, | 50 | { MT_EXP_ACK_TIME, 0x002400ca }, |
| 51 | { MT_TXOP_HLDR_ET, 0x00000002 }, | 51 | { MT_TXOP_HLDR_ET, 0x00000002 }, |
| 52 | { MT_XIFS_TIME_CFG, 0x33a41010 }, | 52 | { MT_XIFS_TIME_CFG, 0x33a41010 }, |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x0/usb.c b/drivers/net/wireless/mediatek/mt76/mt76x0/usb.c index 91718647da02..e5a06f74a6f7 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x0/usb.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x0/usb.c | |||
| @@ -229,7 +229,7 @@ static int mt76x0u_probe(struct usb_interface *usb_intf, | |||
| 229 | struct usb_device *usb_dev = interface_to_usbdev(usb_intf); | 229 | struct usb_device *usb_dev = interface_to_usbdev(usb_intf); |
| 230 | struct mt76x02_dev *dev; | 230 | struct mt76x02_dev *dev; |
| 231 | struct mt76_dev *mdev; | 231 | struct mt76_dev *mdev; |
| 232 | u32 asic_rev, mac_rev; | 232 | u32 mac_rev; |
| 233 | int ret; | 233 | int ret; |
| 234 | 234 | ||
| 235 | mdev = mt76_alloc_device(&usb_intf->dev, sizeof(*dev), &mt76x0u_ops, | 235 | mdev = mt76_alloc_device(&usb_intf->dev, sizeof(*dev), &mt76x0u_ops, |
| @@ -262,10 +262,14 @@ static int mt76x0u_probe(struct usb_interface *usb_intf, | |||
| 262 | goto err; | 262 | goto err; |
| 263 | } | 263 | } |
| 264 | 264 | ||
| 265 | asic_rev = mt76_rr(dev, MT_ASIC_VERSION); | 265 | mdev->rev = mt76_rr(dev, MT_ASIC_VERSION); |
| 266 | mac_rev = mt76_rr(dev, MT_MAC_CSR0); | 266 | mac_rev = mt76_rr(dev, MT_MAC_CSR0); |
| 267 | dev_info(mdev->dev, "ASIC revision: %08x MAC revision: %08x\n", | 267 | dev_info(mdev->dev, "ASIC revision: %08x MAC revision: %08x\n", |
| 268 | asic_rev, mac_rev); | 268 | mdev->rev, mac_rev); |
| 269 | if (!is_mt76x0(dev)) { | ||
| 270 | ret = -ENODEV; | ||
| 271 | goto err; | ||
| 272 | } | ||
| 269 | 273 | ||
| 270 | /* Note: vendor driver skips this check for MT76X0U */ | 274 | /* Note: vendor driver skips this check for MT76X0U */ |
| 271 | if (!(mt76_rr(dev, MT_EFUSE_CTRL) & MT_EFUSE_CTRL_SEL)) | 275 | if (!(mt76_rr(dev, MT_EFUSE_CTRL) & MT_EFUSE_CTRL_SEL)) |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02.h b/drivers/net/wireless/mediatek/mt76/mt76x02.h index 6915cce5def9..07061eb4d1e1 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02.h +++ b/drivers/net/wireless/mediatek/mt76/mt76x02.h | |||
| @@ -51,6 +51,7 @@ struct mt76x02_calibration { | |||
| 51 | u16 false_cca; | 51 | u16 false_cca; |
| 52 | s8 avg_rssi_all; | 52 | s8 avg_rssi_all; |
| 53 | s8 agc_gain_adjust; | 53 | s8 agc_gain_adjust; |
| 54 | s8 agc_lowest_gain; | ||
| 54 | s8 low_gain; | 55 | s8 low_gain; |
| 55 | 56 | ||
| 56 | s8 temp_vco; | 57 | s8 temp_vco; |
| @@ -114,8 +115,11 @@ struct mt76x02_dev { | |||
| 114 | struct mt76x02_dfs_pattern_detector dfs_pd; | 115 | struct mt76x02_dfs_pattern_detector dfs_pd; |
| 115 | 116 | ||
| 116 | /* edcca monitor */ | 117 | /* edcca monitor */ |
| 118 | unsigned long ed_trigger_timeout; | ||
| 117 | bool ed_tx_blocked; | 119 | bool ed_tx_blocked; |
| 118 | bool ed_monitor; | 120 | bool ed_monitor; |
| 121 | u8 ed_monitor_enabled; | ||
| 122 | u8 ed_monitor_learning; | ||
| 119 | u8 ed_trigger; | 123 | u8 ed_trigger; |
| 120 | u8 ed_silent; | 124 | u8 ed_silent; |
| 121 | ktime_t ed_time; | 125 | ktime_t ed_time; |
| @@ -188,6 +192,13 @@ void mt76x02_mac_start(struct mt76x02_dev *dev); | |||
| 188 | 192 | ||
| 189 | void mt76x02_init_debugfs(struct mt76x02_dev *dev); | 193 | void mt76x02_init_debugfs(struct mt76x02_dev *dev); |
| 190 | 194 | ||
| 195 | static inline bool is_mt76x0(struct mt76x02_dev *dev) | ||
| 196 | { | ||
| 197 | return mt76_chip(&dev->mt76) == 0x7610 || | ||
| 198 | mt76_chip(&dev->mt76) == 0x7630 || | ||
| 199 | mt76_chip(&dev->mt76) == 0x7650; | ||
| 200 | } | ||
| 201 | |||
| 191 | static inline bool is_mt76x2(struct mt76x02_dev *dev) | 202 | static inline bool is_mt76x2(struct mt76x02_dev *dev) |
| 192 | { | 203 | { |
| 193 | return mt76_chip(&dev->mt76) == 0x7612 || | 204 | return mt76_chip(&dev->mt76) == 0x7612 || |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_debugfs.c b/drivers/net/wireless/mediatek/mt76/mt76x02_debugfs.c index 7580c5c986ff..b1d6fd4861e3 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_debugfs.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_debugfs.c | |||
| @@ -116,6 +116,32 @@ static int read_agc(struct seq_file *file, void *data) | |||
| 116 | return 0; | 116 | return 0; |
| 117 | } | 117 | } |
| 118 | 118 | ||
| 119 | static int | ||
| 120 | mt76_edcca_set(void *data, u64 val) | ||
| 121 | { | ||
| 122 | struct mt76x02_dev *dev = data; | ||
| 123 | enum nl80211_dfs_regions region = dev->dfs_pd.region; | ||
| 124 | |||
| 125 | dev->ed_monitor_enabled = !!val; | ||
| 126 | dev->ed_monitor = dev->ed_monitor_enabled && | ||
| 127 | region == NL80211_DFS_ETSI; | ||
| 128 | mt76x02_edcca_init(dev, true); | ||
| 129 | |||
| 130 | return 0; | ||
| 131 | } | ||
| 132 | |||
| 133 | static int | ||
| 134 | mt76_edcca_get(void *data, u64 *val) | ||
| 135 | { | ||
| 136 | struct mt76x02_dev *dev = data; | ||
| 137 | |||
| 138 | *val = dev->ed_monitor_enabled; | ||
| 139 | return 0; | ||
| 140 | } | ||
| 141 | |||
| 142 | DEFINE_DEBUGFS_ATTRIBUTE(fops_edcca, mt76_edcca_get, mt76_edcca_set, | ||
| 143 | "%lld\n"); | ||
| 144 | |||
| 119 | void mt76x02_init_debugfs(struct mt76x02_dev *dev) | 145 | void mt76x02_init_debugfs(struct mt76x02_dev *dev) |
| 120 | { | 146 | { |
| 121 | struct dentry *dir; | 147 | struct dentry *dir; |
| @@ -127,6 +153,7 @@ void mt76x02_init_debugfs(struct mt76x02_dev *dev) | |||
| 127 | debugfs_create_u8("temperature", 0400, dir, &dev->cal.temp); | 153 | debugfs_create_u8("temperature", 0400, dir, &dev->cal.temp); |
| 128 | debugfs_create_bool("tpc", 0600, dir, &dev->enable_tpc); | 154 | debugfs_create_bool("tpc", 0600, dir, &dev->enable_tpc); |
| 129 | 155 | ||
| 156 | debugfs_create_file("edcca", 0400, dir, dev, &fops_edcca); | ||
| 130 | debugfs_create_file("ampdu_stat", 0400, dir, dev, &fops_ampdu_stat); | 157 | debugfs_create_file("ampdu_stat", 0400, dir, dev, &fops_ampdu_stat); |
| 131 | debugfs_create_file("dfs_stats", 0400, dir, dev, &fops_dfs_stat); | 158 | debugfs_create_file("dfs_stats", 0400, dir, dev, &fops_dfs_stat); |
| 132 | debugfs_create_devm_seqfile(dev->mt76.dev, "txpower", dir, | 159 | debugfs_create_devm_seqfile(dev->mt76.dev, "txpower", dir, |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c b/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c index e4649103efd4..17d12d212d1b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c | |||
| @@ -885,7 +885,8 @@ mt76x02_dfs_set_domain(struct mt76x02_dev *dev, | |||
| 885 | if (dfs_pd->region != region) { | 885 | if (dfs_pd->region != region) { |
| 886 | tasklet_disable(&dfs_pd->dfs_tasklet); | 886 | tasklet_disable(&dfs_pd->dfs_tasklet); |
| 887 | 887 | ||
| 888 | dev->ed_monitor = region == NL80211_DFS_ETSI; | 888 | dev->ed_monitor = dev->ed_monitor_enabled && |
| 889 | region == NL80211_DFS_ETSI; | ||
| 889 | mt76x02_edcca_init(dev, true); | 890 | mt76x02_edcca_init(dev, true); |
| 890 | 891 | ||
| 891 | dfs_pd->region = region; | 892 | dfs_pd->region = region; |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c b/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c index 91ff6598eccf..9ed231abe916 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c | |||
| @@ -67,12 +67,39 @@ int mt76x02_mac_shared_key_setup(struct mt76x02_dev *dev, u8 vif_idx, | |||
| 67 | } | 67 | } |
| 68 | EXPORT_SYMBOL_GPL(mt76x02_mac_shared_key_setup); | 68 | EXPORT_SYMBOL_GPL(mt76x02_mac_shared_key_setup); |
| 69 | 69 | ||
| 70 | void mt76x02_mac_wcid_sync_pn(struct mt76x02_dev *dev, u8 idx, | ||
| 71 | struct ieee80211_key_conf *key) | ||
| 72 | { | ||
| 73 | enum mt76x02_cipher_type cipher; | ||
| 74 | u8 key_data[32]; | ||
| 75 | u32 iv, eiv; | ||
| 76 | u64 pn; | ||
| 77 | |||
| 78 | cipher = mt76x02_mac_get_key_info(key, key_data); | ||
| 79 | iv = mt76_rr(dev, MT_WCID_IV(idx)); | ||
| 80 | eiv = mt76_rr(dev, MT_WCID_IV(idx) + 4); | ||
| 81 | |||
| 82 | pn = (u64)eiv << 16; | ||
| 83 | if (cipher == MT_CIPHER_TKIP) { | ||
| 84 | pn |= (iv >> 16) & 0xff; | ||
| 85 | pn |= (iv & 0xff) << 8; | ||
| 86 | } else if (cipher >= MT_CIPHER_AES_CCMP) { | ||
| 87 | pn |= iv & 0xffff; | ||
| 88 | } else { | ||
| 89 | return; | ||
| 90 | } | ||
| 91 | |||
| 92 | atomic64_set(&key->tx_pn, pn); | ||
| 93 | } | ||
| 94 | |||
| 95 | |||
| 70 | int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx, | 96 | int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx, |
| 71 | struct ieee80211_key_conf *key) | 97 | struct ieee80211_key_conf *key) |
| 72 | { | 98 | { |
| 73 | enum mt76x02_cipher_type cipher; | 99 | enum mt76x02_cipher_type cipher; |
| 74 | u8 key_data[32]; | 100 | u8 key_data[32]; |
| 75 | u8 iv_data[8]; | 101 | u8 iv_data[8]; |
| 102 | u64 pn; | ||
| 76 | 103 | ||
| 77 | cipher = mt76x02_mac_get_key_info(key, key_data); | 104 | cipher = mt76x02_mac_get_key_info(key, key_data); |
| 78 | if (cipher == MT_CIPHER_NONE && key) | 105 | if (cipher == MT_CIPHER_NONE && key) |
| @@ -85,9 +112,22 @@ int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx, | |||
| 85 | if (key) { | 112 | if (key) { |
| 86 | mt76_rmw_field(dev, MT_WCID_ATTR(idx), MT_WCID_ATTR_PAIRWISE, | 113 | mt76_rmw_field(dev, MT_WCID_ATTR(idx), MT_WCID_ATTR_PAIRWISE, |
| 87 | !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)); | 114 | !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)); |
| 115 | |||
| 116 | pn = atomic64_read(&key->tx_pn); | ||
| 117 | |||
| 88 | iv_data[3] = key->keyidx << 6; | 118 | iv_data[3] = key->keyidx << 6; |
| 89 | if (cipher >= MT_CIPHER_TKIP) | 119 | if (cipher >= MT_CIPHER_TKIP) { |
| 90 | iv_data[3] |= 0x20; | 120 | iv_data[3] |= 0x20; |
| 121 | put_unaligned_le32(pn >> 16, &iv_data[4]); | ||
| 122 | } | ||
| 123 | |||
| 124 | if (cipher == MT_CIPHER_TKIP) { | ||
| 125 | iv_data[0] = (pn >> 8) & 0xff; | ||
| 126 | iv_data[1] = (iv_data[0] | 0x20) & 0x7f; | ||
| 127 | iv_data[2] = pn & 0xff; | ||
| 128 | } else if (cipher >= MT_CIPHER_AES_CCMP) { | ||
| 129 | put_unaligned_le16((pn & 0xffff), &iv_data[0]); | ||
| 130 | } | ||
| 91 | } | 131 | } |
| 92 | 132 | ||
| 93 | mt76_wr_copy(dev, MT_WCID_IV(idx), iv_data, sizeof(iv_data)); | 133 | mt76_wr_copy(dev, MT_WCID_IV(idx), iv_data, sizeof(iv_data)); |
| @@ -920,6 +960,7 @@ void mt76x02_edcca_init(struct mt76x02_dev *dev, bool enable) | |||
| 920 | } | 960 | } |
| 921 | } | 961 | } |
| 922 | mt76x02_edcca_tx_enable(dev, true); | 962 | mt76x02_edcca_tx_enable(dev, true); |
| 963 | dev->ed_monitor_learning = true; | ||
| 923 | 964 | ||
| 924 | /* clear previous CCA timer value */ | 965 | /* clear previous CCA timer value */ |
| 925 | mt76_rr(dev, MT_ED_CCA_TIMER); | 966 | mt76_rr(dev, MT_ED_CCA_TIMER); |
| @@ -929,6 +970,10 @@ EXPORT_SYMBOL_GPL(mt76x02_edcca_init); | |||
| 929 | 970 | ||
| 930 | #define MT_EDCCA_TH 92 | 971 | #define MT_EDCCA_TH 92 |
| 931 | #define MT_EDCCA_BLOCK_TH 2 | 972 | #define MT_EDCCA_BLOCK_TH 2 |
| 973 | #define MT_EDCCA_LEARN_TH 50 | ||
| 974 | #define MT_EDCCA_LEARN_CCA 180 | ||
| 975 | #define MT_EDCCA_LEARN_TIMEOUT (20 * HZ) | ||
| 976 | |||
| 932 | static void mt76x02_edcca_check(struct mt76x02_dev *dev) | 977 | static void mt76x02_edcca_check(struct mt76x02_dev *dev) |
| 933 | { | 978 | { |
| 934 | ktime_t cur_time; | 979 | ktime_t cur_time; |
| @@ -951,11 +996,23 @@ static void mt76x02_edcca_check(struct mt76x02_dev *dev) | |||
| 951 | dev->ed_trigger = 0; | 996 | dev->ed_trigger = 0; |
| 952 | } | 997 | } |
| 953 | 998 | ||
| 954 | if (dev->ed_trigger > MT_EDCCA_BLOCK_TH && | 999 | if (dev->cal.agc_lowest_gain && |
| 955 | !dev->ed_tx_blocked) | 1000 | dev->cal.false_cca > MT_EDCCA_LEARN_CCA && |
| 1001 | dev->ed_trigger > MT_EDCCA_LEARN_TH) { | ||
| 1002 | dev->ed_monitor_learning = false; | ||
| 1003 | dev->ed_trigger_timeout = jiffies + 20 * HZ; | ||
| 1004 | } else if (!dev->ed_monitor_learning && | ||
| 1005 | time_is_after_jiffies(dev->ed_trigger_timeout)) { | ||
| 1006 | dev->ed_monitor_learning = true; | ||
| 1007 | mt76x02_edcca_tx_enable(dev, true); | ||
| 1008 | } | ||
| 1009 | |||
| 1010 | if (dev->ed_monitor_learning) | ||
| 1011 | return; | ||
| 1012 | |||
| 1013 | if (dev->ed_trigger > MT_EDCCA_BLOCK_TH && !dev->ed_tx_blocked) | ||
| 956 | mt76x02_edcca_tx_enable(dev, false); | 1014 | mt76x02_edcca_tx_enable(dev, false); |
| 957 | else if (dev->ed_silent > MT_EDCCA_BLOCK_TH && | 1015 | else if (dev->ed_silent > MT_EDCCA_BLOCK_TH && dev->ed_tx_blocked) |
| 958 | dev->ed_tx_blocked) | ||
| 959 | mt76x02_edcca_tx_enable(dev, true); | 1016 | mt76x02_edcca_tx_enable(dev, true); |
| 960 | } | 1017 | } |
| 961 | 1018 | ||
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_mac.h b/drivers/net/wireless/mediatek/mt76/mt76x02_mac.h index 6b1f25d2f64c..caeeef96c42f 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_mac.h +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_mac.h | |||
| @@ -177,6 +177,8 @@ int mt76x02_mac_shared_key_setup(struct mt76x02_dev *dev, u8 vif_idx, | |||
| 177 | u8 key_idx, struct ieee80211_key_conf *key); | 177 | u8 key_idx, struct ieee80211_key_conf *key); |
| 178 | int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx, | 178 | int mt76x02_mac_wcid_set_key(struct mt76x02_dev *dev, u8 idx, |
| 179 | struct ieee80211_key_conf *key); | 179 | struct ieee80211_key_conf *key); |
| 180 | void mt76x02_mac_wcid_sync_pn(struct mt76x02_dev *dev, u8 idx, | ||
| 181 | struct ieee80211_key_conf *key); | ||
| 180 | void mt76x02_mac_wcid_setup(struct mt76x02_dev *dev, u8 idx, u8 vif_idx, | 182 | void mt76x02_mac_wcid_setup(struct mt76x02_dev *dev, u8 idx, u8 vif_idx, |
| 181 | u8 *mac); | 183 | u8 *mac); |
| 182 | void mt76x02_mac_wcid_set_drop(struct mt76x02_dev *dev, u8 idx, bool drop); | 184 | void mt76x02_mac_wcid_set_drop(struct mt76x02_dev *dev, u8 idx, bool drop); |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c b/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c index 1229f19f2b02..daaed1220147 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | #include <linux/irq.h> | 19 | #include <linux/irq.h> |
| 20 | 20 | ||
| 21 | #include "mt76x02.h" | 21 | #include "mt76x02.h" |
| 22 | #include "mt76x02_mcu.h" | ||
| 22 | #include "mt76x02_trace.h" | 23 | #include "mt76x02_trace.h" |
| 23 | 24 | ||
| 24 | struct beacon_bc_data { | 25 | struct beacon_bc_data { |
| @@ -418,9 +419,66 @@ static bool mt76x02_tx_hang(struct mt76x02_dev *dev) | |||
| 418 | return i < 4; | 419 | return i < 4; |
| 419 | } | 420 | } |
| 420 | 421 | ||
| 422 | static void mt76x02_key_sync(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | ||
| 423 | struct ieee80211_sta *sta, | ||
| 424 | struct ieee80211_key_conf *key, void *data) | ||
| 425 | { | ||
| 426 | struct mt76x02_dev *dev = hw->priv; | ||
| 427 | struct mt76_wcid *wcid; | ||
| 428 | |||
| 429 | if (!sta) | ||
| 430 | return; | ||
| 431 | |||
| 432 | wcid = (struct mt76_wcid *) sta->drv_priv; | ||
| 433 | |||
| 434 | if (wcid->hw_key_idx != key->keyidx || wcid->sw_iv) | ||
| 435 | return; | ||
| 436 | |||
| 437 | mt76x02_mac_wcid_sync_pn(dev, wcid->idx, key); | ||
| 438 | } | ||
| 439 | |||
| 440 | static void mt76x02_reset_state(struct mt76x02_dev *dev) | ||
| 441 | { | ||
| 442 | int i; | ||
| 443 | |||
| 444 | lockdep_assert_held(&dev->mt76.mutex); | ||
| 445 | |||
| 446 | clear_bit(MT76_STATE_RUNNING, &dev->mt76.state); | ||
| 447 | |||
| 448 | rcu_read_lock(); | ||
| 449 | ieee80211_iter_keys_rcu(dev->mt76.hw, NULL, mt76x02_key_sync, NULL); | ||
| 450 | rcu_read_unlock(); | ||
| 451 | |||
| 452 | for (i = 0; i < ARRAY_SIZE(dev->mt76.wcid); i++) { | ||
| 453 | struct ieee80211_sta *sta; | ||
| 454 | struct ieee80211_vif *vif; | ||
| 455 | struct mt76x02_sta *msta; | ||
| 456 | struct mt76_wcid *wcid; | ||
| 457 | void *priv; | ||
| 458 | |||
| 459 | wcid = rcu_dereference_protected(dev->mt76.wcid[i], | ||
| 460 | lockdep_is_held(&dev->mt76.mutex)); | ||
| 461 | if (!wcid) | ||
| 462 | continue; | ||
| 463 | |||
| 464 | priv = msta = container_of(wcid, struct mt76x02_sta, wcid); | ||
| 465 | sta = container_of(priv, struct ieee80211_sta, drv_priv); | ||
| 466 | |||
| 467 | priv = msta->vif; | ||
| 468 | vif = container_of(priv, struct ieee80211_vif, drv_priv); | ||
| 469 | |||
| 470 | __mt76_sta_remove(&dev->mt76, vif, sta); | ||
| 471 | memset(msta, 0, sizeof(*msta)); | ||
| 472 | } | ||
| 473 | |||
| 474 | dev->vif_mask = 0; | ||
| 475 | dev->beacon_mask = 0; | ||
| 476 | } | ||
| 477 | |||
| 421 | static void mt76x02_watchdog_reset(struct mt76x02_dev *dev) | 478 | static void mt76x02_watchdog_reset(struct mt76x02_dev *dev) |
| 422 | { | 479 | { |
| 423 | u32 mask = dev->mt76.mmio.irqmask; | 480 | u32 mask = dev->mt76.mmio.irqmask; |
| 481 | bool restart = dev->mt76.mcu_ops->mcu_restart; | ||
| 424 | int i; | 482 | int i; |
| 425 | 483 | ||
| 426 | ieee80211_stop_queues(dev->mt76.hw); | 484 | ieee80211_stop_queues(dev->mt76.hw); |
| @@ -434,6 +492,9 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev) | |||
| 434 | 492 | ||
| 435 | mutex_lock(&dev->mt76.mutex); | 493 | mutex_lock(&dev->mt76.mutex); |
| 436 | 494 | ||
| 495 | if (restart) | ||
| 496 | mt76x02_reset_state(dev); | ||
| 497 | |||
| 437 | if (dev->beacon_mask) | 498 | if (dev->beacon_mask) |
| 438 | mt76_clear(dev, MT_BEACON_TIME_CFG, | 499 | mt76_clear(dev, MT_BEACON_TIME_CFG, |
| 439 | MT_BEACON_TIME_CFG_BEACON_TX | | 500 | MT_BEACON_TIME_CFG_BEACON_TX | |
| @@ -452,20 +513,21 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev) | |||
| 452 | /* let fw reset DMA */ | 513 | /* let fw reset DMA */ |
| 453 | mt76_set(dev, 0x734, 0x3); | 514 | mt76_set(dev, 0x734, 0x3); |
| 454 | 515 | ||
| 516 | if (restart) | ||
| 517 | dev->mt76.mcu_ops->mcu_restart(&dev->mt76); | ||
| 518 | |||
| 455 | for (i = 0; i < ARRAY_SIZE(dev->mt76.q_tx); i++) | 519 | for (i = 0; i < ARRAY_SIZE(dev->mt76.q_tx); i++) |
| 456 | mt76_queue_tx_cleanup(dev, i, true); | 520 | mt76_queue_tx_cleanup(dev, i, true); |
| 457 | 521 | ||
| 458 | for (i = 0; i < ARRAY_SIZE(dev->mt76.q_rx); i++) | 522 | for (i = 0; i < ARRAY_SIZE(dev->mt76.q_rx); i++) |
| 459 | mt76_queue_rx_reset(dev, i); | 523 | mt76_queue_rx_reset(dev, i); |
| 460 | 524 | ||
| 461 | mt76_wr(dev, MT_MAC_SYS_CTRL, | 525 | mt76x02_mac_start(dev); |
| 462 | MT_MAC_SYS_CTRL_ENABLE_TX | MT_MAC_SYS_CTRL_ENABLE_RX); | 526 | |
| 463 | mt76_set(dev, MT_WPDMA_GLO_CFG, | ||
| 464 | MT_WPDMA_GLO_CFG_TX_DMA_EN | MT_WPDMA_GLO_CFG_RX_DMA_EN); | ||
| 465 | if (dev->ed_monitor) | 527 | if (dev->ed_monitor) |
| 466 | mt76_set(dev, MT_TXOP_CTRL_CFG, MT_TXOP_ED_CCA_EN); | 528 | mt76_set(dev, MT_TXOP_CTRL_CFG, MT_TXOP_ED_CCA_EN); |
| 467 | 529 | ||
| 468 | if (dev->beacon_mask) | 530 | if (dev->beacon_mask && !restart) |
| 469 | mt76_set(dev, MT_BEACON_TIME_CFG, | 531 | mt76_set(dev, MT_BEACON_TIME_CFG, |
| 470 | MT_BEACON_TIME_CFG_BEACON_TX | | 532 | MT_BEACON_TIME_CFG_BEACON_TX | |
| 471 | MT_BEACON_TIME_CFG_TBTT_EN); | 533 | MT_BEACON_TIME_CFG_TBTT_EN); |
| @@ -486,9 +548,13 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev) | |||
| 486 | napi_schedule(&dev->mt76.napi[i]); | 548 | napi_schedule(&dev->mt76.napi[i]); |
| 487 | } | 549 | } |
| 488 | 550 | ||
| 489 | ieee80211_wake_queues(dev->mt76.hw); | 551 | if (restart) { |
| 490 | 552 | mt76x02_mcu_function_select(dev, Q_SELECT, 1); | |
| 491 | mt76_txq_schedule_all(&dev->mt76); | 553 | ieee80211_restart_hw(dev->mt76.hw); |
| 554 | } else { | ||
| 555 | ieee80211_wake_queues(dev->mt76.hw); | ||
| 556 | mt76_txq_schedule_all(&dev->mt76); | ||
| 557 | } | ||
| 492 | } | 558 | } |
| 493 | 559 | ||
| 494 | static void mt76x02_check_tx_hang(struct mt76x02_dev *dev) | 560 | static void mt76x02_check_tx_hang(struct mt76x02_dev *dev) |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_phy.c b/drivers/net/wireless/mediatek/mt76/mt76x02_phy.c index a020c757ba5c..a54b63a96eae 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_phy.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_phy.c | |||
| @@ -194,6 +194,8 @@ bool mt76x02_phy_adjust_vga_gain(struct mt76x02_dev *dev) | |||
| 194 | ret = true; | 194 | ret = true; |
| 195 | } | 195 | } |
| 196 | 196 | ||
| 197 | dev->cal.agc_lowest_gain = dev->cal.agc_gain_adjust >= limit; | ||
| 198 | |||
| 197 | return ret; | 199 | return ret; |
| 198 | } | 200 | } |
| 199 | EXPORT_SYMBOL_GPL(mt76x02_phy_adjust_vga_gain); | 201 | EXPORT_SYMBOL_GPL(mt76x02_phy_adjust_vga_gain); |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c b/drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c index 43f07461c8d3..6fb52b596d42 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c | |||
| @@ -85,8 +85,9 @@ int mt76x02u_tx_prepare_skb(struct mt76_dev *mdev, void *data, | |||
| 85 | 85 | ||
| 86 | mt76x02_insert_hdr_pad(skb); | 86 | mt76x02_insert_hdr_pad(skb); |
| 87 | 87 | ||
| 88 | txwi = skb_push(skb, sizeof(struct mt76x02_txwi)); | 88 | txwi = (struct mt76x02_txwi *)(skb->data - sizeof(struct mt76x02_txwi)); |
| 89 | mt76x02_mac_write_txwi(dev, txwi, skb, wcid, sta, len); | 89 | mt76x02_mac_write_txwi(dev, txwi, skb, wcid, sta, len); |
| 90 | skb_push(skb, sizeof(struct mt76x02_txwi)); | ||
| 90 | 91 | ||
| 91 | pid = mt76_tx_status_skb_add(mdev, wcid, skb); | 92 | pid = mt76_tx_status_skb_add(mdev, wcid, skb); |
| 92 | txwi->pktid = pid; | 93 | txwi->pktid = pid; |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_util.c b/drivers/net/wireless/mediatek/mt76/mt76x02_util.c index a48c261b0c63..cd072ac614f7 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_util.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_util.c | |||
| @@ -237,6 +237,8 @@ int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, | |||
| 237 | struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv; | 237 | struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv; |
| 238 | int idx = 0; | 238 | int idx = 0; |
| 239 | 239 | ||
| 240 | memset(msta, 0, sizeof(*msta)); | ||
| 241 | |||
| 240 | idx = mt76_wcid_alloc(dev->mt76.wcid_mask, ARRAY_SIZE(dev->mt76.wcid)); | 242 | idx = mt76_wcid_alloc(dev->mt76.wcid_mask, ARRAY_SIZE(dev->mt76.wcid)); |
| 241 | if (idx < 0) | 243 | if (idx < 0) |
| 242 | return -ENOSPC; | 244 | return -ENOSPC; |
| @@ -274,6 +276,8 @@ mt76x02_vif_init(struct mt76x02_dev *dev, struct ieee80211_vif *vif, | |||
| 274 | struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv; | 276 | struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv; |
| 275 | struct mt76_txq *mtxq; | 277 | struct mt76_txq *mtxq; |
| 276 | 278 | ||
| 279 | memset(mvif, 0, sizeof(*mvif)); | ||
| 280 | |||
| 277 | mvif->idx = idx; | 281 | mvif->idx = idx; |
| 278 | mvif->group_wcid.idx = MT_VIF_WCID(idx); | 282 | mvif->group_wcid.idx = MT_VIF_WCID(idx); |
| 279 | mvif->group_wcid.hw_key_idx = -1; | 283 | mvif->group_wcid.hw_key_idx = -1; |
| @@ -289,6 +293,12 @@ mt76x02_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) | |||
| 289 | struct mt76x02_dev *dev = hw->priv; | 293 | struct mt76x02_dev *dev = hw->priv; |
| 290 | unsigned int idx = 0; | 294 | unsigned int idx = 0; |
| 291 | 295 | ||
| 296 | /* Allow to change address in HW if we create first interface. */ | ||
| 297 | if (!dev->vif_mask && | ||
| 298 | (((vif->addr[0] ^ dev->mt76.macaddr[0]) & ~GENMASK(4, 1)) || | ||
| 299 | memcmp(vif->addr + 1, dev->mt76.macaddr + 1, ETH_ALEN - 1))) | ||
| 300 | mt76x02_mac_setaddr(dev, vif->addr); | ||
| 301 | |||
| 292 | if (vif->addr[0] & BIT(1)) | 302 | if (vif->addr[0] & BIT(1)) |
| 293 | idx = 1 + (((dev->mt76.macaddr[0] ^ vif->addr[0]) >> 2) & 7); | 303 | idx = 1 + (((dev->mt76.macaddr[0] ^ vif->addr[0]) >> 2) & 7); |
| 294 | 304 | ||
| @@ -311,10 +321,6 @@ mt76x02_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) | |||
| 311 | if (dev->vif_mask & BIT(idx)) | 321 | if (dev->vif_mask & BIT(idx)) |
| 312 | return -EBUSY; | 322 | return -EBUSY; |
| 313 | 323 | ||
| 314 | /* Allow to change address in HW if we create first interface. */ | ||
| 315 | if (!dev->vif_mask && !ether_addr_equal(dev->mt76.macaddr, vif->addr)) | ||
| 316 | mt76x02_mac_setaddr(dev, vif->addr); | ||
| 317 | |||
| 318 | dev->vif_mask |= BIT(idx); | 324 | dev->vif_mask |= BIT(idx); |
| 319 | 325 | ||
| 320 | mt76x02_vif_init(dev, vif, idx); | 326 | mt76x02_vif_init(dev, vif, idx); |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x2/init.c b/drivers/net/wireless/mediatek/mt76/mt76x2/init.c index f8534362e2c8..a30ef2c5a9db 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x2/init.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x2/init.c | |||
| @@ -106,7 +106,7 @@ void mt76_write_mac_initvals(struct mt76x02_dev *dev) | |||
| 106 | { MT_TX_SW_CFG1, 0x00010000 }, | 106 | { MT_TX_SW_CFG1, 0x00010000 }, |
| 107 | { MT_TX_SW_CFG2, 0x00000000 }, | 107 | { MT_TX_SW_CFG2, 0x00000000 }, |
| 108 | { MT_TXOP_CTRL_CFG, 0x0400583f }, | 108 | { MT_TXOP_CTRL_CFG, 0x0400583f }, |
| 109 | { MT_TX_RTS_CFG, 0x00100020 }, | 109 | { MT_TX_RTS_CFG, 0x00ffff20 }, |
| 110 | { MT_TX_TIMEOUT_CFG, 0x000a2290 }, | 110 | { MT_TX_TIMEOUT_CFG, 0x000a2290 }, |
| 111 | { MT_TX_RETRY_CFG, 0x47f01f0f }, | 111 | { MT_TX_RETRY_CFG, 0x47f01f0f }, |
| 112 | { MT_EXP_ACK_TIME, 0x002c00dc }, | 112 | { MT_EXP_ACK_TIME, 0x002c00dc }, |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2.h b/drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2.h index 6c619f1c65c9..d7abe3d73bad 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2.h +++ b/drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2.h | |||
| @@ -71,6 +71,7 @@ int mt76x2_mcu_load_cr(struct mt76x02_dev *dev, u8 type, u8 temp_level, | |||
| 71 | 71 | ||
| 72 | void mt76x2_cleanup(struct mt76x02_dev *dev); | 72 | void mt76x2_cleanup(struct mt76x02_dev *dev); |
| 73 | 73 | ||
| 74 | int mt76x2_mac_reset(struct mt76x02_dev *dev, bool hard); | ||
| 74 | void mt76x2_reset_wlan(struct mt76x02_dev *dev, bool enable); | 75 | void mt76x2_reset_wlan(struct mt76x02_dev *dev, bool enable); |
| 75 | void mt76x2_init_txpower(struct mt76x02_dev *dev, | 76 | void mt76x2_init_txpower(struct mt76x02_dev *dev, |
| 76 | struct ieee80211_supported_band *sband); | 77 | struct ieee80211_supported_band *sband); |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c b/drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c index 984d9c4c2e1a..d3927a13e92e 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c | |||
| @@ -77,7 +77,7 @@ mt76x2_fixup_xtal(struct mt76x02_dev *dev) | |||
| 77 | } | 77 | } |
| 78 | } | 78 | } |
| 79 | 79 | ||
| 80 | static int mt76x2_mac_reset(struct mt76x02_dev *dev, bool hard) | 80 | int mt76x2_mac_reset(struct mt76x02_dev *dev, bool hard) |
| 81 | { | 81 | { |
| 82 | const u8 *macaddr = dev->mt76.macaddr; | 82 | const u8 *macaddr = dev->mt76.macaddr; |
| 83 | u32 val; | 83 | u32 val; |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x2/pci_mcu.c b/drivers/net/wireless/mediatek/mt76/mt76x2/pci_mcu.c index 03e24ae7f66c..605dc66ae83b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x2/pci_mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x2/pci_mcu.c | |||
| @@ -165,9 +165,30 @@ error: | |||
| 165 | return -ENOENT; | 165 | return -ENOENT; |
| 166 | } | 166 | } |
| 167 | 167 | ||
| 168 | static int | ||
| 169 | mt76pci_mcu_restart(struct mt76_dev *mdev) | ||
| 170 | { | ||
| 171 | struct mt76x02_dev *dev; | ||
| 172 | int ret; | ||
| 173 | |||
| 174 | dev = container_of(mdev, struct mt76x02_dev, mt76); | ||
| 175 | |||
| 176 | mt76x02_mcu_cleanup(dev); | ||
| 177 | mt76x2_mac_reset(dev, true); | ||
| 178 | |||
| 179 | ret = mt76pci_load_firmware(dev); | ||
| 180 | if (ret) | ||
| 181 | return ret; | ||
| 182 | |||
| 183 | mt76_wr(dev, MT_WPDMA_RST_IDX, ~0); | ||
| 184 | |||
| 185 | return 0; | ||
| 186 | } | ||
| 187 | |||
| 168 | int mt76x2_mcu_init(struct mt76x02_dev *dev) | 188 | int mt76x2_mcu_init(struct mt76x02_dev *dev) |
| 169 | { | 189 | { |
| 170 | static const struct mt76_mcu_ops mt76x2_mcu_ops = { | 190 | static const struct mt76_mcu_ops mt76x2_mcu_ops = { |
| 191 | .mcu_restart = mt76pci_mcu_restart, | ||
| 171 | .mcu_send_msg = mt76x02_mcu_msg_send, | 192 | .mcu_send_msg = mt76x02_mcu_msg_send, |
| 172 | }; | 193 | }; |
| 173 | int ret; | 194 | int ret; |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x2/phy.c b/drivers/net/wireless/mediatek/mt76/mt76x2/phy.c index 1848e8ab2e21..769a9b972044 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x2/phy.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x2/phy.c | |||
| @@ -260,10 +260,15 @@ mt76x2_phy_set_gain_val(struct mt76x02_dev *dev) | |||
| 260 | gain_val[0] = dev->cal.agc_gain_cur[0] - dev->cal.agc_gain_adjust; | 260 | gain_val[0] = dev->cal.agc_gain_cur[0] - dev->cal.agc_gain_adjust; |
| 261 | gain_val[1] = dev->cal.agc_gain_cur[1] - dev->cal.agc_gain_adjust; | 261 | gain_val[1] = dev->cal.agc_gain_cur[1] - dev->cal.agc_gain_adjust; |
| 262 | 262 | ||
| 263 | if (dev->mt76.chandef.width >= NL80211_CHAN_WIDTH_40) | 263 | val = 0x1836 << 16; |
| 264 | if (!mt76x2_has_ext_lna(dev) && | ||
| 265 | dev->mt76.chandef.width >= NL80211_CHAN_WIDTH_40) | ||
| 264 | val = 0x1e42 << 16; | 266 | val = 0x1e42 << 16; |
| 265 | else | 267 | |
| 266 | val = 0x1836 << 16; | 268 | if (mt76x2_has_ext_lna(dev) && |
| 269 | dev->mt76.chandef.chan->band == NL80211_BAND_2GHZ && | ||
| 270 | dev->mt76.chandef.width < NL80211_CHAN_WIDTH_40) | ||
| 271 | val = 0x0f36 << 16; | ||
| 267 | 272 | ||
| 268 | val |= 0xf8; | 273 | val |= 0xf8; |
| 269 | 274 | ||
| @@ -280,6 +285,7 @@ void mt76x2_phy_update_channel_gain(struct mt76x02_dev *dev) | |||
| 280 | { | 285 | { |
| 281 | u8 *gain = dev->cal.agc_gain_init; | 286 | u8 *gain = dev->cal.agc_gain_init; |
| 282 | u8 low_gain_delta, gain_delta; | 287 | u8 low_gain_delta, gain_delta; |
| 288 | u32 agc_35, agc_37; | ||
| 283 | bool gain_change; | 289 | bool gain_change; |
| 284 | int low_gain; | 290 | int low_gain; |
| 285 | u32 val; | 291 | u32 val; |
| @@ -318,6 +324,16 @@ void mt76x2_phy_update_channel_gain(struct mt76x02_dev *dev) | |||
| 318 | else | 324 | else |
| 319 | low_gain_delta = 14; | 325 | low_gain_delta = 14; |
| 320 | 326 | ||
| 327 | agc_37 = 0x2121262c; | ||
| 328 | if (dev->mt76.chandef.chan->band == NL80211_BAND_2GHZ) | ||
| 329 | agc_35 = 0x11111516; | ||
| 330 | else if (low_gain == 2) | ||
| 331 | agc_35 = agc_37 = 0x08080808; | ||
| 332 | else if (dev->mt76.chandef.width == NL80211_CHAN_WIDTH_80) | ||
| 333 | agc_35 = 0x10101014; | ||
| 334 | else | ||
| 335 | agc_35 = 0x11111116; | ||
| 336 | |||
| 321 | if (low_gain == 2) { | 337 | if (low_gain == 2) { |
| 322 | mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a990); | 338 | mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a990); |
| 323 | mt76_wr(dev, MT_BBP(AGC, 35), 0x08080808); | 339 | mt76_wr(dev, MT_BBP(AGC, 35), 0x08080808); |
| @@ -326,15 +342,13 @@ void mt76x2_phy_update_channel_gain(struct mt76x02_dev *dev) | |||
| 326 | dev->cal.agc_gain_adjust = 0; | 342 | dev->cal.agc_gain_adjust = 0; |
| 327 | } else { | 343 | } else { |
| 328 | mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a991); | 344 | mt76_wr(dev, MT_BBP(RXO, 18), 0xf000a991); |
| 329 | if (dev->mt76.chandef.width == NL80211_CHAN_WIDTH_80) | ||
| 330 | mt76_wr(dev, MT_BBP(AGC, 35), 0x10101014); | ||
| 331 | else | ||
| 332 | mt76_wr(dev, MT_BBP(AGC, 35), 0x11111116); | ||
| 333 | mt76_wr(dev, MT_BBP(AGC, 37), 0x2121262C); | ||
| 334 | gain_delta = 0; | 345 | gain_delta = 0; |
| 335 | dev->cal.agc_gain_adjust = low_gain_delta; | 346 | dev->cal.agc_gain_adjust = low_gain_delta; |
| 336 | } | 347 | } |
| 337 | 348 | ||
| 349 | mt76_wr(dev, MT_BBP(AGC, 35), agc_35); | ||
| 350 | mt76_wr(dev, MT_BBP(AGC, 37), agc_37); | ||
| 351 | |||
| 338 | dev->cal.agc_gain_cur[0] = gain[0] - gain_delta; | 352 | dev->cal.agc_gain_cur[0] = gain[0] - gain_delta; |
| 339 | dev->cal.agc_gain_cur[1] = gain[1] - gain_delta; | 353 | dev->cal.agc_gain_cur[1] = gain[1] - gain_delta; |
| 340 | mt76x2_phy_set_gain_val(dev); | 354 | mt76x2_phy_set_gain_val(dev); |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c b/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c index ddb6b2c48e01..ac0f13d46299 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c | |||
| @@ -21,11 +21,10 @@ | |||
| 21 | #include "mt76x2u.h" | 21 | #include "mt76x2u.h" |
| 22 | 22 | ||
| 23 | static const struct usb_device_id mt76x2u_device_table[] = { | 23 | static const struct usb_device_id mt76x2u_device_table[] = { |
| 24 | { USB_DEVICE(0x0e8d, 0x7612) }, /* Alfa AWUS036ACM */ | ||
| 25 | { USB_DEVICE(0x0b05, 0x1833) }, /* Asus USB-AC54 */ | 24 | { USB_DEVICE(0x0b05, 0x1833) }, /* Asus USB-AC54 */ |
| 26 | { USB_DEVICE(0x0b05, 0x17eb) }, /* Asus USB-AC55 */ | 25 | { USB_DEVICE(0x0b05, 0x17eb) }, /* Asus USB-AC55 */ |
| 27 | { USB_DEVICE(0x0b05, 0x180b) }, /* Asus USB-N53 B1 */ | 26 | { USB_DEVICE(0x0b05, 0x180b) }, /* Asus USB-N53 B1 */ |
| 28 | { USB_DEVICE(0x0e8d, 0x7612) }, /* Aukey USB-AC1200 */ | 27 | { USB_DEVICE(0x0e8d, 0x7612) }, /* Aukey USBAC1200 - Alfa AWUS036ACM */ |
| 29 | { USB_DEVICE(0x057c, 0x8503) }, /* Avm FRITZ!WLAN AC860 */ | 28 | { USB_DEVICE(0x057c, 0x8503) }, /* Avm FRITZ!WLAN AC860 */ |
| 30 | { USB_DEVICE(0x7392, 0xb711) }, /* Edimax EW 7722 UAC */ | 29 | { USB_DEVICE(0x7392, 0xb711) }, /* Edimax EW 7722 UAC */ |
| 31 | { USB_DEVICE(0x0846, 0x9053) }, /* Netgear A6210 */ | 30 | { USB_DEVICE(0x0846, 0x9053) }, /* Netgear A6210 */ |
| @@ -66,6 +65,10 @@ static int mt76x2u_probe(struct usb_interface *intf, | |||
| 66 | 65 | ||
| 67 | mdev->rev = mt76_rr(dev, MT_ASIC_VERSION); | 66 | mdev->rev = mt76_rr(dev, MT_ASIC_VERSION); |
| 68 | dev_info(mdev->dev, "ASIC revision: %08x\n", mdev->rev); | 67 | dev_info(mdev->dev, "ASIC revision: %08x\n", mdev->rev); |
| 68 | if (!is_mt76x2(dev)) { | ||
| 69 | err = -ENODEV; | ||
| 70 | goto err; | ||
| 71 | } | ||
| 69 | 72 | ||
| 70 | err = mt76x2u_register_device(dev); | 73 | err = mt76x2u_register_device(dev); |
| 71 | if (err < 0) | 74 | if (err < 0) |
diff --git a/drivers/net/wireless/mediatek/mt76/mt76x2/usb_mac.c b/drivers/net/wireless/mediatek/mt76/mt76x2/usb_mac.c index 5e84b4535cb1..3b82345756ea 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x2/usb_mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x2/usb_mac.c | |||
| @@ -93,7 +93,6 @@ int mt76x2u_mac_reset(struct mt76x02_dev *dev) | |||
| 93 | mt76_wr(dev, MT_TX_LINK_CFG, 0x1020); | 93 | mt76_wr(dev, MT_TX_LINK_CFG, 0x1020); |
| 94 | mt76_wr(dev, MT_AUTO_RSP_CFG, 0x13); | 94 | mt76_wr(dev, MT_AUTO_RSP_CFG, 0x13); |
| 95 | mt76_wr(dev, MT_MAX_LEN_CFG, 0x2f00); | 95 | mt76_wr(dev, MT_MAX_LEN_CFG, 0x2f00); |
| 96 | mt76_wr(dev, MT_TX_RTS_CFG, 0x92b20); | ||
| 97 | 96 | ||
| 98 | mt76_wr(dev, MT_WMM_AIFSN, 0x2273); | 97 | mt76_wr(dev, MT_WMM_AIFSN, 0x2273); |
| 99 | mt76_wr(dev, MT_WMM_CWMIN, 0x2344); | 98 | mt76_wr(dev, MT_WMM_CWMIN, 0x2344); |
diff --git a/drivers/net/wireless/mediatek/mt76/tx.c b/drivers/net/wireless/mediatek/mt76/tx.c index 5a349fe3e576..2585df512335 100644 --- a/drivers/net/wireless/mediatek/mt76/tx.c +++ b/drivers/net/wireless/mediatek/mt76/tx.c | |||
| @@ -289,8 +289,11 @@ mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta, | |||
| 289 | dev->queue_ops->tx_queue_skb(dev, q, skb, wcid, sta); | 289 | dev->queue_ops->tx_queue_skb(dev, q, skb, wcid, sta); |
| 290 | dev->queue_ops->kick(dev, q); | 290 | dev->queue_ops->kick(dev, q); |
| 291 | 291 | ||
| 292 | if (q->queued > q->ndesc - 8) | 292 | if (q->queued > q->ndesc - 8 && !q->stopped) { |
| 293 | ieee80211_stop_queue(dev->hw, skb_get_queue_mapping(skb)); | 293 | ieee80211_stop_queue(dev->hw, skb_get_queue_mapping(skb)); |
| 294 | q->stopped = true; | ||
| 295 | } | ||
| 296 | |||
| 294 | spin_unlock_bh(&q->lock); | 297 | spin_unlock_bh(&q->lock); |
| 295 | } | 298 | } |
| 296 | EXPORT_SYMBOL_GPL(mt76_tx); | 299 | EXPORT_SYMBOL_GPL(mt76_tx); |
| @@ -374,7 +377,10 @@ mt76_release_buffered_frames(struct ieee80211_hw *hw, struct ieee80211_sta *sta, | |||
| 374 | if (last_skb) { | 377 | if (last_skb) { |
| 375 | mt76_queue_ps_skb(dev, sta, last_skb, true); | 378 | mt76_queue_ps_skb(dev, sta, last_skb, true); |
| 376 | dev->queue_ops->kick(dev, hwq); | 379 | dev->queue_ops->kick(dev, hwq); |
| 380 | } else { | ||
| 381 | ieee80211_sta_eosp(sta); | ||
| 377 | } | 382 | } |
| 383 | |||
| 378 | spin_unlock_bh(&hwq->lock); | 384 | spin_unlock_bh(&hwq->lock); |
| 379 | } | 385 | } |
| 380 | EXPORT_SYMBOL_GPL(mt76_release_buffered_frames); | 386 | EXPORT_SYMBOL_GPL(mt76_release_buffered_frames); |
| @@ -577,6 +583,9 @@ void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq) | |||
| 577 | struct mt76_txq *mtxq = (struct mt76_txq *) txq->drv_priv; | 583 | struct mt76_txq *mtxq = (struct mt76_txq *) txq->drv_priv; |
| 578 | struct mt76_queue *hwq = mtxq->hwq; | 584 | struct mt76_queue *hwq = mtxq->hwq; |
| 579 | 585 | ||
| 586 | if (!test_bit(MT76_STATE_RUNNING, &dev->state)) | ||
| 587 | return; | ||
| 588 | |||
| 580 | spin_lock_bh(&hwq->lock); | 589 | spin_lock_bh(&hwq->lock); |
| 581 | if (list_empty(&mtxq->list)) | 590 | if (list_empty(&mtxq->list)) |
| 582 | list_add_tail(&mtxq->list, &hwq->swq); | 591 | list_add_tail(&mtxq->list, &hwq->swq); |
diff --git a/drivers/net/wireless/mediatek/mt76/usb.c b/drivers/net/wireless/mediatek/mt76/usb.c index ae6ada370597..4c1abd492405 100644 --- a/drivers/net/wireless/mediatek/mt76/usb.c +++ b/drivers/net/wireless/mediatek/mt76/usb.c | |||
| @@ -655,7 +655,11 @@ static void mt76u_tx_tasklet(unsigned long data) | |||
| 655 | spin_lock_bh(&q->lock); | 655 | spin_lock_bh(&q->lock); |
| 656 | } | 656 | } |
| 657 | mt76_txq_schedule(dev, q); | 657 | mt76_txq_schedule(dev, q); |
| 658 | wake = i < IEEE80211_NUM_ACS && q->queued < q->ndesc - 8; | 658 | |
| 659 | wake = q->stopped && q->queued < q->ndesc - 8; | ||
| 660 | if (wake) | ||
| 661 | q->stopped = false; | ||
| 662 | |||
| 659 | if (!q->queued) | 663 | if (!q->queued) |
| 660 | wake_up(&dev->tx_wait); | 664 | wake_up(&dev->tx_wait); |
| 661 | 665 | ||
diff --git a/drivers/net/wireless/mediatek/mt7601u/usb.c b/drivers/net/wireless/mediatek/mt7601u/usb.c index d8b7863f7926..6ae7f14dc9bf 100644 --- a/drivers/net/wireless/mediatek/mt7601u/usb.c +++ b/drivers/net/wireless/mediatek/mt7601u/usb.c | |||
| @@ -303,6 +303,10 @@ static int mt7601u_probe(struct usb_interface *usb_intf, | |||
| 303 | mac_rev = mt7601u_rr(dev, MT_MAC_CSR0); | 303 | mac_rev = mt7601u_rr(dev, MT_MAC_CSR0); |
| 304 | dev_info(dev->dev, "ASIC revision: %08x MAC revision: %08x\n", | 304 | dev_info(dev->dev, "ASIC revision: %08x MAC revision: %08x\n", |
| 305 | asic_rev, mac_rev); | 305 | asic_rev, mac_rev); |
| 306 | if ((asic_rev >> 16) != 0x7601) { | ||
| 307 | ret = -ENODEV; | ||
| 308 | goto err; | ||
| 309 | } | ||
| 306 | 310 | ||
| 307 | /* Note: vendor driver skips this check for MT7601U */ | 311 | /* Note: vendor driver skips this check for MT7601U */ |
| 308 | if (!(mt7601u_rr(dev, MT_EFUSE_CTRL) & MT_EFUSE_CTRL_SEL)) | 312 | if (!(mt7601u_rr(dev, MT_EFUSE_CTRL) & MT_EFUSE_CTRL_SEL)) |
diff --git a/drivers/nvme/host/multipath.c b/drivers/nvme/host/multipath.c index 2839bb70badf..f0716f6ce41f 100644 --- a/drivers/nvme/host/multipath.c +++ b/drivers/nvme/host/multipath.c | |||
| @@ -404,15 +404,12 @@ static inline bool nvme_state_is_live(enum nvme_ana_state state) | |||
| 404 | static void nvme_update_ns_ana_state(struct nvme_ana_group_desc *desc, | 404 | static void nvme_update_ns_ana_state(struct nvme_ana_group_desc *desc, |
| 405 | struct nvme_ns *ns) | 405 | struct nvme_ns *ns) |
| 406 | { | 406 | { |
| 407 | enum nvme_ana_state old; | ||
| 408 | |||
| 409 | mutex_lock(&ns->head->lock); | 407 | mutex_lock(&ns->head->lock); |
| 410 | old = ns->ana_state; | ||
| 411 | ns->ana_grpid = le32_to_cpu(desc->grpid); | 408 | ns->ana_grpid = le32_to_cpu(desc->grpid); |
| 412 | ns->ana_state = desc->state; | 409 | ns->ana_state = desc->state; |
| 413 | clear_bit(NVME_NS_ANA_PENDING, &ns->flags); | 410 | clear_bit(NVME_NS_ANA_PENDING, &ns->flags); |
| 414 | 411 | ||
| 415 | if (nvme_state_is_live(ns->ana_state) && !nvme_state_is_live(old)) | 412 | if (nvme_state_is_live(ns->ana_state)) |
| 416 | nvme_mpath_set_live(ns); | 413 | nvme_mpath_set_live(ns); |
| 417 | mutex_unlock(&ns->head->lock); | 414 | mutex_unlock(&ns->head->lock); |
| 418 | } | 415 | } |
diff --git a/drivers/nvme/host/tcp.c b/drivers/nvme/host/tcp.c index e7e08889865e..68c49dd67210 100644 --- a/drivers/nvme/host/tcp.c +++ b/drivers/nvme/host/tcp.c | |||
| @@ -627,7 +627,7 @@ static int nvme_tcp_recv_pdu(struct nvme_tcp_queue *queue, struct sk_buff *skb, | |||
| 627 | return ret; | 627 | return ret; |
| 628 | } | 628 | } |
| 629 | 629 | ||
| 630 | static inline void nvme_tcp_end_request(struct request *rq, __le16 status) | 630 | static inline void nvme_tcp_end_request(struct request *rq, u16 status) |
| 631 | { | 631 | { |
| 632 | union nvme_result res = {}; | 632 | union nvme_result res = {}; |
| 633 | 633 | ||
diff --git a/drivers/nvme/target/core.c b/drivers/nvme/target/core.c index 2d73b66e3686..b3e765a95af8 100644 --- a/drivers/nvme/target/core.c +++ b/drivers/nvme/target/core.c | |||
| @@ -509,7 +509,7 @@ int nvmet_ns_enable(struct nvmet_ns *ns) | |||
| 509 | 509 | ||
| 510 | ret = nvmet_p2pmem_ns_enable(ns); | 510 | ret = nvmet_p2pmem_ns_enable(ns); |
| 511 | if (ret) | 511 | if (ret) |
| 512 | goto out_unlock; | 512 | goto out_dev_disable; |
| 513 | 513 | ||
| 514 | list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) | 514 | list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) |
| 515 | nvmet_p2pmem_ns_add_p2p(ctrl, ns); | 515 | nvmet_p2pmem_ns_add_p2p(ctrl, ns); |
| @@ -550,7 +550,7 @@ out_unlock: | |||
| 550 | out_dev_put: | 550 | out_dev_put: |
| 551 | list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) | 551 | list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) |
| 552 | pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid)); | 552 | pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid)); |
| 553 | 553 | out_dev_disable: | |
| 554 | nvmet_ns_dev_disable(ns); | 554 | nvmet_ns_dev_disable(ns); |
| 555 | goto out_unlock; | 555 | goto out_unlock; |
| 556 | } | 556 | } |
diff --git a/drivers/nvme/target/io-cmd-file.c b/drivers/nvme/target/io-cmd-file.c index 3e43212d3c1c..bc6ebb51b0bf 100644 --- a/drivers/nvme/target/io-cmd-file.c +++ b/drivers/nvme/target/io-cmd-file.c | |||
| @@ -75,11 +75,11 @@ err: | |||
| 75 | return ret; | 75 | return ret; |
| 76 | } | 76 | } |
| 77 | 77 | ||
| 78 | static void nvmet_file_init_bvec(struct bio_vec *bv, struct sg_page_iter *iter) | 78 | static void nvmet_file_init_bvec(struct bio_vec *bv, struct scatterlist *sg) |
| 79 | { | 79 | { |
| 80 | bv->bv_page = sg_page_iter_page(iter); | 80 | bv->bv_page = sg_page(sg); |
| 81 | bv->bv_offset = iter->sg->offset; | 81 | bv->bv_offset = sg->offset; |
| 82 | bv->bv_len = PAGE_SIZE - iter->sg->offset; | 82 | bv->bv_len = sg->length; |
| 83 | } | 83 | } |
| 84 | 84 | ||
| 85 | static ssize_t nvmet_file_submit_bvec(struct nvmet_req *req, loff_t pos, | 85 | static ssize_t nvmet_file_submit_bvec(struct nvmet_req *req, loff_t pos, |
| @@ -128,14 +128,14 @@ static void nvmet_file_io_done(struct kiocb *iocb, long ret, long ret2) | |||
| 128 | 128 | ||
| 129 | static bool nvmet_file_execute_io(struct nvmet_req *req, int ki_flags) | 129 | static bool nvmet_file_execute_io(struct nvmet_req *req, int ki_flags) |
| 130 | { | 130 | { |
| 131 | ssize_t nr_bvec = DIV_ROUND_UP(req->data_len, PAGE_SIZE); | 131 | ssize_t nr_bvec = req->sg_cnt; |
| 132 | struct sg_page_iter sg_pg_iter; | ||
| 133 | unsigned long bv_cnt = 0; | 132 | unsigned long bv_cnt = 0; |
| 134 | bool is_sync = false; | 133 | bool is_sync = false; |
| 135 | size_t len = 0, total_len = 0; | 134 | size_t len = 0, total_len = 0; |
| 136 | ssize_t ret = 0; | 135 | ssize_t ret = 0; |
| 137 | loff_t pos; | 136 | loff_t pos; |
| 138 | 137 | int i; | |
| 138 | struct scatterlist *sg; | ||
| 139 | 139 | ||
| 140 | if (req->f.mpool_alloc && nr_bvec > NVMET_MAX_MPOOL_BVEC) | 140 | if (req->f.mpool_alloc && nr_bvec > NVMET_MAX_MPOOL_BVEC) |
| 141 | is_sync = true; | 141 | is_sync = true; |
| @@ -147,8 +147,8 @@ static bool nvmet_file_execute_io(struct nvmet_req *req, int ki_flags) | |||
| 147 | } | 147 | } |
| 148 | 148 | ||
| 149 | memset(&req->f.iocb, 0, sizeof(struct kiocb)); | 149 | memset(&req->f.iocb, 0, sizeof(struct kiocb)); |
| 150 | for_each_sg_page(req->sg, &sg_pg_iter, req->sg_cnt, 0) { | 150 | for_each_sg(req->sg, sg, req->sg_cnt, i) { |
| 151 | nvmet_file_init_bvec(&req->f.bvec[bv_cnt], &sg_pg_iter); | 151 | nvmet_file_init_bvec(&req->f.bvec[bv_cnt], sg); |
| 152 | len += req->f.bvec[bv_cnt].bv_len; | 152 | len += req->f.bvec[bv_cnt].bv_len; |
| 153 | total_len += req->f.bvec[bv_cnt].bv_len; | 153 | total_len += req->f.bvec[bv_cnt].bv_len; |
| 154 | bv_cnt++; | 154 | bv_cnt++; |
| @@ -225,7 +225,7 @@ static void nvmet_file_submit_buffered_io(struct nvmet_req *req) | |||
| 225 | 225 | ||
| 226 | static void nvmet_file_execute_rw(struct nvmet_req *req) | 226 | static void nvmet_file_execute_rw(struct nvmet_req *req) |
| 227 | { | 227 | { |
| 228 | ssize_t nr_bvec = DIV_ROUND_UP(req->data_len, PAGE_SIZE); | 228 | ssize_t nr_bvec = req->sg_cnt; |
| 229 | 229 | ||
| 230 | if (!req->sg_cnt || !nr_bvec) { | 230 | if (!req->sg_cnt || !nr_bvec) { |
| 231 | nvmet_req_complete(req, 0); | 231 | nvmet_req_complete(req, 0); |
diff --git a/drivers/nvmem/zynqmp_nvmem.c b/drivers/nvmem/zynqmp_nvmem.c index 490c8fcaec80..5893543918c8 100644 --- a/drivers/nvmem/zynqmp_nvmem.c +++ b/drivers/nvmem/zynqmp_nvmem.c | |||
| @@ -16,6 +16,8 @@ struct zynqmp_nvmem_data { | |||
| 16 | struct nvmem_device *nvmem; | 16 | struct nvmem_device *nvmem; |
| 17 | }; | 17 | }; |
| 18 | 18 | ||
| 19 | static const struct zynqmp_eemi_ops *eemi_ops; | ||
| 20 | |||
| 19 | static int zynqmp_nvmem_read(void *context, unsigned int offset, | 21 | static int zynqmp_nvmem_read(void *context, unsigned int offset, |
| 20 | void *val, size_t bytes) | 22 | void *val, size_t bytes) |
| 21 | { | 23 | { |
| @@ -23,9 +25,7 @@ static int zynqmp_nvmem_read(void *context, unsigned int offset, | |||
| 23 | int idcode, version; | 25 | int idcode, version; |
| 24 | struct zynqmp_nvmem_data *priv = context; | 26 | struct zynqmp_nvmem_data *priv = context; |
| 25 | 27 | ||
| 26 | const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); | 28 | if (!eemi_ops->get_chipid) |
| 27 | |||
| 28 | if (!eemi_ops || !eemi_ops->get_chipid) | ||
| 29 | return -ENXIO; | 29 | return -ENXIO; |
| 30 | 30 | ||
| 31 | ret = eemi_ops->get_chipid(&idcode, &version); | 31 | ret = eemi_ops->get_chipid(&idcode, &version); |
| @@ -61,6 +61,10 @@ static int zynqmp_nvmem_probe(struct platform_device *pdev) | |||
| 61 | if (!priv) | 61 | if (!priv) |
| 62 | return -ENOMEM; | 62 | return -ENOMEM; |
| 63 | 63 | ||
| 64 | eemi_ops = zynqmp_pm_get_eemi_ops(); | ||
| 65 | if (IS_ERR(eemi_ops)) | ||
| 66 | return PTR_ERR(eemi_ops); | ||
| 67 | |||
| 64 | priv->dev = dev; | 68 | priv->dev = dev; |
| 65 | econfig.dev = dev; | 69 | econfig.dev = dev; |
| 66 | econfig.reg_read = zynqmp_nvmem_read; | 70 | econfig.reg_read = zynqmp_nvmem_read; |
diff --git a/drivers/parport/daisy.c b/drivers/parport/daisy.c index 56dd83a45e55..5484a46dafda 100644 --- a/drivers/parport/daisy.c +++ b/drivers/parport/daisy.c | |||
| @@ -213,12 +213,10 @@ void parport_daisy_fini(struct parport *port) | |||
| 213 | struct pardevice *parport_open(int devnum, const char *name) | 213 | struct pardevice *parport_open(int devnum, const char *name) |
| 214 | { | 214 | { |
| 215 | struct daisydev *p = topology; | 215 | struct daisydev *p = topology; |
| 216 | struct pardev_cb par_cb; | ||
| 217 | struct parport *port; | 216 | struct parport *port; |
| 218 | struct pardevice *dev; | 217 | struct pardevice *dev; |
| 219 | int daisy; | 218 | int daisy; |
| 220 | 219 | ||
| 221 | memset(&par_cb, 0, sizeof(par_cb)); | ||
| 222 | spin_lock(&topology_lock); | 220 | spin_lock(&topology_lock); |
| 223 | while (p && p->devnum != devnum) | 221 | while (p && p->devnum != devnum) |
| 224 | p = p->next; | 222 | p = p->next; |
| @@ -232,7 +230,7 @@ struct pardevice *parport_open(int devnum, const char *name) | |||
| 232 | port = parport_get_port(p->port); | 230 | port = parport_get_port(p->port); |
| 233 | spin_unlock(&topology_lock); | 231 | spin_unlock(&topology_lock); |
| 234 | 232 | ||
| 235 | dev = parport_register_dev_model(port, name, &par_cb, devnum); | 233 | dev = parport_register_device(port, name, NULL, NULL, NULL, 0, NULL); |
| 236 | parport_put_port(port); | 234 | parport_put_port(port); |
| 237 | if (!dev) | 235 | if (!dev) |
| 238 | return NULL; | 236 | return NULL; |
| @@ -482,31 +480,3 @@ static int assign_addrs(struct parport *port) | |||
| 482 | kfree(deviceid); | 480 | kfree(deviceid); |
| 483 | return detected; | 481 | return detected; |
| 484 | } | 482 | } |
| 485 | |||
| 486 | static int daisy_drv_probe(struct pardevice *par_dev) | ||
| 487 | { | ||
| 488 | struct device_driver *drv = par_dev->dev.driver; | ||
| 489 | |||
| 490 | if (strcmp(drv->name, "daisy_drv")) | ||
| 491 | return -ENODEV; | ||
| 492 | if (strcmp(par_dev->name, daisy_dev_name)) | ||
| 493 | return -ENODEV; | ||
| 494 | |||
| 495 | return 0; | ||
| 496 | } | ||
| 497 | |||
| 498 | static struct parport_driver daisy_driver = { | ||
| 499 | .name = "daisy_drv", | ||
| 500 | .probe = daisy_drv_probe, | ||
| 501 | .devmodel = true, | ||
| 502 | }; | ||
| 503 | |||
| 504 | int daisy_drv_init(void) | ||
| 505 | { | ||
| 506 | return parport_register_driver(&daisy_driver); | ||
| 507 | } | ||
| 508 | |||
| 509 | void daisy_drv_exit(void) | ||
| 510 | { | ||
| 511 | parport_unregister_driver(&daisy_driver); | ||
| 512 | } | ||
diff --git a/drivers/parport/probe.c b/drivers/parport/probe.c index e5e6a463a941..e035174ba205 100644 --- a/drivers/parport/probe.c +++ b/drivers/parport/probe.c | |||
| @@ -257,7 +257,7 @@ static ssize_t parport_read_device_id (struct parport *port, char *buffer, | |||
| 257 | ssize_t parport_device_id (int devnum, char *buffer, size_t count) | 257 | ssize_t parport_device_id (int devnum, char *buffer, size_t count) |
| 258 | { | 258 | { |
| 259 | ssize_t retval = -ENXIO; | 259 | ssize_t retval = -ENXIO; |
| 260 | struct pardevice *dev = parport_open(devnum, daisy_dev_name); | 260 | struct pardevice *dev = parport_open (devnum, "Device ID probe"); |
| 261 | if (!dev) | 261 | if (!dev) |
| 262 | return -ENXIO; | 262 | return -ENXIO; |
| 263 | 263 | ||
diff --git a/drivers/parport/share.c b/drivers/parport/share.c index 0171b8dbcdcd..5dc53d420ca8 100644 --- a/drivers/parport/share.c +++ b/drivers/parport/share.c | |||
| @@ -137,19 +137,11 @@ static struct bus_type parport_bus_type = { | |||
| 137 | 137 | ||
| 138 | int parport_bus_init(void) | 138 | int parport_bus_init(void) |
| 139 | { | 139 | { |
| 140 | int retval; | 140 | return bus_register(&parport_bus_type); |
| 141 | |||
| 142 | retval = bus_register(&parport_bus_type); | ||
| 143 | if (retval) | ||
| 144 | return retval; | ||
| 145 | daisy_drv_init(); | ||
| 146 | |||
| 147 | return 0; | ||
| 148 | } | 141 | } |
| 149 | 142 | ||
| 150 | void parport_bus_exit(void) | 143 | void parport_bus_exit(void) |
| 151 | { | 144 | { |
| 152 | daisy_drv_exit(); | ||
| 153 | bus_unregister(&parport_bus_type); | 145 | bus_unregister(&parport_bus_type); |
| 154 | } | 146 | } |
| 155 | 147 | ||
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 224d88634115..d994839a3e24 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h | |||
| @@ -273,6 +273,7 @@ enum pcie_link_width pcie_get_width_cap(struct pci_dev *dev); | |||
| 273 | u32 pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed, | 273 | u32 pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed, |
| 274 | enum pcie_link_width *width); | 274 | enum pcie_link_width *width); |
| 275 | void __pcie_print_link_status(struct pci_dev *dev, bool verbose); | 275 | void __pcie_print_link_status(struct pci_dev *dev, bool verbose); |
| 276 | void pcie_report_downtraining(struct pci_dev *dev); | ||
| 276 | 277 | ||
| 277 | /* Single Root I/O Virtualization */ | 278 | /* Single Root I/O Virtualization */ |
| 278 | struct pci_sriov { | 279 | struct pci_sriov { |
diff --git a/drivers/pci/pcie/bw_notification.c b/drivers/pci/pcie/bw_notification.c index d2eae3b7cc0f..4fa9e3523ee1 100644 --- a/drivers/pci/pcie/bw_notification.c +++ b/drivers/pci/pcie/bw_notification.c | |||
| @@ -30,6 +30,8 @@ static void pcie_enable_link_bandwidth_notification(struct pci_dev *dev) | |||
| 30 | { | 30 | { |
| 31 | u16 lnk_ctl; | 31 | u16 lnk_ctl; |
| 32 | 32 | ||
| 33 | pcie_capability_write_word(dev, PCI_EXP_LNKSTA, PCI_EXP_LNKSTA_LBMS); | ||
| 34 | |||
| 33 | pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &lnk_ctl); | 35 | pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &lnk_ctl); |
| 34 | lnk_ctl |= PCI_EXP_LNKCTL_LBMIE; | 36 | lnk_ctl |= PCI_EXP_LNKCTL_LBMIE; |
| 35 | pcie_capability_write_word(dev, PCI_EXP_LNKCTL, lnk_ctl); | 37 | pcie_capability_write_word(dev, PCI_EXP_LNKCTL, lnk_ctl); |
| @@ -44,11 +46,10 @@ static void pcie_disable_link_bandwidth_notification(struct pci_dev *dev) | |||
| 44 | pcie_capability_write_word(dev, PCI_EXP_LNKCTL, lnk_ctl); | 46 | pcie_capability_write_word(dev, PCI_EXP_LNKCTL, lnk_ctl); |
| 45 | } | 47 | } |
| 46 | 48 | ||
| 47 | static irqreturn_t pcie_bw_notification_handler(int irq, void *context) | 49 | static irqreturn_t pcie_bw_notification_irq(int irq, void *context) |
| 48 | { | 50 | { |
| 49 | struct pcie_device *srv = context; | 51 | struct pcie_device *srv = context; |
| 50 | struct pci_dev *port = srv->port; | 52 | struct pci_dev *port = srv->port; |
| 51 | struct pci_dev *dev; | ||
| 52 | u16 link_status, events; | 53 | u16 link_status, events; |
| 53 | int ret; | 54 | int ret; |
| 54 | 55 | ||
| @@ -58,17 +59,26 @@ static irqreturn_t pcie_bw_notification_handler(int irq, void *context) | |||
| 58 | if (ret != PCIBIOS_SUCCESSFUL || !events) | 59 | if (ret != PCIBIOS_SUCCESSFUL || !events) |
| 59 | return IRQ_NONE; | 60 | return IRQ_NONE; |
| 60 | 61 | ||
| 62 | pcie_capability_write_word(port, PCI_EXP_LNKSTA, events); | ||
| 63 | pcie_update_link_speed(port->subordinate, link_status); | ||
| 64 | return IRQ_WAKE_THREAD; | ||
| 65 | } | ||
| 66 | |||
| 67 | static irqreturn_t pcie_bw_notification_handler(int irq, void *context) | ||
| 68 | { | ||
| 69 | struct pcie_device *srv = context; | ||
| 70 | struct pci_dev *port = srv->port; | ||
| 71 | struct pci_dev *dev; | ||
| 72 | |||
| 61 | /* | 73 | /* |
| 62 | * Print status from downstream devices, not this root port or | 74 | * Print status from downstream devices, not this root port or |
| 63 | * downstream switch port. | 75 | * downstream switch port. |
| 64 | */ | 76 | */ |
| 65 | down_read(&pci_bus_sem); | 77 | down_read(&pci_bus_sem); |
| 66 | list_for_each_entry(dev, &port->subordinate->devices, bus_list) | 78 | list_for_each_entry(dev, &port->subordinate->devices, bus_list) |
| 67 | __pcie_print_link_status(dev, false); | 79 | pcie_report_downtraining(dev); |
| 68 | up_read(&pci_bus_sem); | 80 | up_read(&pci_bus_sem); |
| 69 | 81 | ||
| 70 | pcie_update_link_speed(port->subordinate, link_status); | ||
| 71 | pcie_capability_write_word(port, PCI_EXP_LNKSTA, events); | ||
| 72 | return IRQ_HANDLED; | 82 | return IRQ_HANDLED; |
| 73 | } | 83 | } |
| 74 | 84 | ||
| @@ -80,7 +90,8 @@ static int pcie_bandwidth_notification_probe(struct pcie_device *srv) | |||
| 80 | if (!pcie_link_bandwidth_notification_supported(srv->port)) | 90 | if (!pcie_link_bandwidth_notification_supported(srv->port)) |
| 81 | return -ENODEV; | 91 | return -ENODEV; |
| 82 | 92 | ||
| 83 | ret = request_threaded_irq(srv->irq, NULL, pcie_bw_notification_handler, | 93 | ret = request_threaded_irq(srv->irq, pcie_bw_notification_irq, |
| 94 | pcie_bw_notification_handler, | ||
| 84 | IRQF_SHARED, "PCIe BW notif", srv); | 95 | IRQF_SHARED, "PCIe BW notif", srv); |
| 85 | if (ret) | 96 | if (ret) |
| 86 | return ret; | 97 | return ret; |
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 2ec0df04e0dc..7e12d0163863 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c | |||
| @@ -2388,7 +2388,7 @@ static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn) | |||
| 2388 | return dev; | 2388 | return dev; |
| 2389 | } | 2389 | } |
| 2390 | 2390 | ||
| 2391 | static void pcie_report_downtraining(struct pci_dev *dev) | 2391 | void pcie_report_downtraining(struct pci_dev *dev) |
| 2392 | { | 2392 | { |
| 2393 | if (!pci_is_pcie(dev)) | 2393 | if (!pci_is_pcie(dev)) |
| 2394 | return; | 2394 | return; |
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index 5163097b43df..4bbd9ede38c8 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c | |||
| @@ -485,8 +485,11 @@ static int sun4i_usb_phy_set_mode(struct phy *_phy, | |||
| 485 | struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); | 485 | struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); |
| 486 | int new_mode; | 486 | int new_mode; |
| 487 | 487 | ||
| 488 | if (phy->index != 0) | 488 | if (phy->index != 0) { |
| 489 | if (mode == PHY_MODE_USB_HOST) | ||
| 490 | return 0; | ||
| 489 | return -EINVAL; | 491 | return -EINVAL; |
| 492 | } | ||
| 490 | 493 | ||
| 491 | switch (mode) { | 494 | switch (mode) { |
| 492 | case PHY_MODE_USB_HOST: | 495 | case PHY_MODE_USB_HOST: |
diff --git a/drivers/platform/chrome/cros_ec_debugfs.c b/drivers/platform/chrome/cros_ec_debugfs.c index 900c7073c46f..71308766e891 100644 --- a/drivers/platform/chrome/cros_ec_debugfs.c +++ b/drivers/platform/chrome/cros_ec_debugfs.c | |||
| @@ -440,7 +440,7 @@ static int cros_ec_debugfs_probe(struct platform_device *pd) | |||
| 440 | 440 | ||
| 441 | ret = cros_ec_create_pdinfo(debug_info); | 441 | ret = cros_ec_create_pdinfo(debug_info); |
| 442 | if (ret) | 442 | if (ret) |
| 443 | goto remove_debugfs; | 443 | goto remove_log; |
| 444 | 444 | ||
| 445 | ec->debug_info = debug_info; | 445 | ec->debug_info = debug_info; |
| 446 | 446 | ||
| @@ -448,6 +448,8 @@ static int cros_ec_debugfs_probe(struct platform_device *pd) | |||
| 448 | 448 | ||
| 449 | return 0; | 449 | return 0; |
| 450 | 450 | ||
| 451 | remove_log: | ||
| 452 | cros_ec_cleanup_console_log(debug_info); | ||
| 451 | remove_debugfs: | 453 | remove_debugfs: |
| 452 | debugfs_remove_recursive(debug_info->dir); | 454 | debugfs_remove_recursive(debug_info->dir); |
| 453 | return ret; | 455 | return ret; |
| @@ -467,7 +469,8 @@ static int __maybe_unused cros_ec_debugfs_suspend(struct device *dev) | |||
| 467 | { | 469 | { |
| 468 | struct cros_ec_dev *ec = dev_get_drvdata(dev); | 470 | struct cros_ec_dev *ec = dev_get_drvdata(dev); |
| 469 | 471 | ||
| 470 | cancel_delayed_work_sync(&ec->debug_info->log_poll_work); | 472 | if (ec->debug_info->log_buffer.buf) |
| 473 | cancel_delayed_work_sync(&ec->debug_info->log_poll_work); | ||
| 471 | 474 | ||
| 472 | return 0; | 475 | return 0; |
| 473 | } | 476 | } |
| @@ -476,7 +479,8 @@ static int __maybe_unused cros_ec_debugfs_resume(struct device *dev) | |||
| 476 | { | 479 | { |
| 477 | struct cros_ec_dev *ec = dev_get_drvdata(dev); | 480 | struct cros_ec_dev *ec = dev_get_drvdata(dev); |
| 478 | 481 | ||
| 479 | schedule_delayed_work(&ec->debug_info->log_poll_work, 0); | 482 | if (ec->debug_info->log_buffer.buf) |
| 483 | schedule_delayed_work(&ec->debug_info->log_poll_work, 0); | ||
| 480 | 484 | ||
| 481 | return 0; | 485 | return 0; |
| 482 | } | 486 | } |
diff --git a/drivers/platform/chrome/wilco_ec/mailbox.c b/drivers/platform/chrome/wilco_ec/mailbox.c index f6ff29a11f1a..14355668ddfa 100644 --- a/drivers/platform/chrome/wilco_ec/mailbox.c +++ b/drivers/platform/chrome/wilco_ec/mailbox.c | |||
| @@ -223,11 +223,11 @@ int wilco_ec_mailbox(struct wilco_ec_device *ec, struct wilco_ec_message *msg) | |||
| 223 | msg->command, msg->type, msg->flags, msg->response_size, | 223 | msg->command, msg->type, msg->flags, msg->response_size, |
| 224 | msg->request_size); | 224 | msg->request_size); |
| 225 | 225 | ||
| 226 | mutex_lock(&ec->mailbox_lock); | ||
| 226 | /* Prepare request packet */ | 227 | /* Prepare request packet */ |
| 227 | rq = ec->data_buffer; | 228 | rq = ec->data_buffer; |
| 228 | wilco_ec_prepare(msg, rq); | 229 | wilco_ec_prepare(msg, rq); |
| 229 | 230 | ||
| 230 | mutex_lock(&ec->mailbox_lock); | ||
| 231 | ret = wilco_ec_transfer(ec, msg, rq); | 231 | ret = wilco_ec_transfer(ec, msg, rq); |
| 232 | mutex_unlock(&ec->mailbox_lock); | 232 | mutex_unlock(&ec->mailbox_lock); |
| 233 | 233 | ||
diff --git a/drivers/reset/reset-zynqmp.c b/drivers/reset/reset-zynqmp.c index 2ef1f13aa47b..99e75d92dada 100644 --- a/drivers/reset/reset-zynqmp.c +++ b/drivers/reset/reset-zynqmp.c | |||
| @@ -79,11 +79,11 @@ static int zynqmp_reset_probe(struct platform_device *pdev) | |||
| 79 | if (!priv) | 79 | if (!priv) |
| 80 | return -ENOMEM; | 80 | return -ENOMEM; |
| 81 | 81 | ||
| 82 | platform_set_drvdata(pdev, priv); | ||
| 83 | |||
| 84 | priv->eemi_ops = zynqmp_pm_get_eemi_ops(); | 82 | priv->eemi_ops = zynqmp_pm_get_eemi_ops(); |
| 85 | if (!priv->eemi_ops) | 83 | if (IS_ERR(priv->eemi_ops)) |
| 86 | return -ENXIO; | 84 | return PTR_ERR(priv->eemi_ops); |
| 85 | |||
| 86 | platform_set_drvdata(pdev, priv); | ||
| 87 | 87 | ||
| 88 | priv->rcdev.ops = &zynqmp_reset_ops; | 88 | priv->rcdev.ops = &zynqmp_reset_ops; |
| 89 | priv->rcdev.owner = THIS_MODULE; | 89 | priv->rcdev.owner = THIS_MODULE; |
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index bbff0e2deb84..19b11b824d9c 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c | |||
| @@ -415,15 +415,12 @@ static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) | |||
| 415 | 415 | ||
| 416 | static struct omap_rtc *omap_rtc_power_off_rtc; | 416 | static struct omap_rtc *omap_rtc_power_off_rtc; |
| 417 | 417 | ||
| 418 | /* | 418 | /** |
| 419 | * omap_rtc_poweroff: RTC-controlled power off | 419 | * omap_rtc_power_off_program: Set the pmic power off sequence. The RTC |
| 420 | * | 420 | * generates pmic_pwr_enable control, which can be used to control an external |
| 421 | * The RTC can be used to control an external PMIC via the pmic_power_en pin, | 421 | * PMIC. |
| 422 | * which can be configured to transition to OFF on ALARM2 events. | ||
| 423 | * | ||
| 424 | * Called with local interrupts disabled. | ||
| 425 | */ | 422 | */ |
| 426 | static void omap_rtc_power_off(void) | 423 | int omap_rtc_power_off_program(struct device *dev) |
| 427 | { | 424 | { |
| 428 | struct omap_rtc *rtc = omap_rtc_power_off_rtc; | 425 | struct omap_rtc *rtc = omap_rtc_power_off_rtc; |
| 429 | struct rtc_time tm; | 426 | struct rtc_time tm; |
| @@ -437,6 +434,9 @@ static void omap_rtc_power_off(void) | |||
| 437 | rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN); | 434 | rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN); |
| 438 | 435 | ||
| 439 | again: | 436 | again: |
| 437 | /* Clear any existing ALARM2 event */ | ||
| 438 | rtc_writel(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM2); | ||
| 439 | |||
| 440 | /* set alarm one second from now */ | 440 | /* set alarm one second from now */ |
| 441 | omap_rtc_read_time_raw(rtc, &tm); | 441 | omap_rtc_read_time_raw(rtc, &tm); |
| 442 | seconds = tm.tm_sec; | 442 | seconds = tm.tm_sec; |
| @@ -447,7 +447,7 @@ again: | |||
| 447 | if (tm2bcd(&tm) < 0) { | 447 | if (tm2bcd(&tm) < 0) { |
| 448 | dev_err(&rtc->rtc->dev, "power off failed\n"); | 448 | dev_err(&rtc->rtc->dev, "power off failed\n"); |
| 449 | rtc->type->lock(rtc); | 449 | rtc->type->lock(rtc); |
| 450 | return; | 450 | return -EINVAL; |
| 451 | } | 451 | } |
| 452 | 452 | ||
| 453 | rtc_wait_not_busy(rtc); | 453 | rtc_wait_not_busy(rtc); |
| @@ -477,6 +477,39 @@ again: | |||
| 477 | 477 | ||
| 478 | rtc->type->lock(rtc); | 478 | rtc->type->lock(rtc); |
| 479 | 479 | ||
| 480 | return 0; | ||
| 481 | } | ||
| 482 | EXPORT_SYMBOL(omap_rtc_power_off_program); | ||
| 483 | |||
| 484 | /* | ||
| 485 | * omap_rtc_poweroff: RTC-controlled power off | ||
| 486 | * | ||
| 487 | * The RTC can be used to control an external PMIC via the pmic_power_en pin, | ||
| 488 | * which can be configured to transition to OFF on ALARM2 events. | ||
| 489 | * | ||
| 490 | * Notes: | ||
| 491 | * The one-second alarm offset is the shortest offset possible as the alarm | ||
| 492 | * registers must be set before the next timer update and the offset | ||
| 493 | * calculation is too heavy for everything to be done within a single access | ||
| 494 | * period (~15 us). | ||
| 495 | * | ||
| 496 | * Called with local interrupts disabled. | ||
| 497 | */ | ||
| 498 | static void omap_rtc_power_off(void) | ||
| 499 | { | ||
| 500 | struct rtc_device *rtc = omap_rtc_power_off_rtc->rtc; | ||
| 501 | u32 val; | ||
| 502 | |||
| 503 | omap_rtc_power_off_program(rtc->dev.parent); | ||
| 504 | |||
| 505 | /* Set PMIC power enable and EXT_WAKEUP in case PB power on is used */ | ||
| 506 | omap_rtc_power_off_rtc->type->unlock(omap_rtc_power_off_rtc); | ||
| 507 | val = rtc_readl(omap_rtc_power_off_rtc, OMAP_RTC_PMIC_REG); | ||
| 508 | val |= OMAP_RTC_PMIC_POWER_EN_EN | OMAP_RTC_PMIC_EXT_WKUP_POL(0) | | ||
| 509 | OMAP_RTC_PMIC_EXT_WKUP_EN(0); | ||
| 510 | rtc_writel(omap_rtc_power_off_rtc, OMAP_RTC_PMIC_REG, val); | ||
| 511 | omap_rtc_power_off_rtc->type->lock(omap_rtc_power_off_rtc); | ||
| 512 | |||
| 480 | /* | 513 | /* |
| 481 | * Wait for alarm to trigger (within one second) and external PMIC to | 514 | * Wait for alarm to trigger (within one second) and external PMIC to |
| 482 | * power off the system. Add a 500 ms margin for external latencies | 515 | * power off the system. Add a 500 ms margin for external latencies |
diff --git a/drivers/s390/cio/chsc.c b/drivers/s390/cio/chsc.c index 4159c63a5fd2..a835b31aad99 100644 --- a/drivers/s390/cio/chsc.c +++ b/drivers/s390/cio/chsc.c | |||
| @@ -24,6 +24,7 @@ | |||
| 24 | #include <asm/crw.h> | 24 | #include <asm/crw.h> |
| 25 | #include <asm/isc.h> | 25 | #include <asm/isc.h> |
| 26 | #include <asm/ebcdic.h> | 26 | #include <asm/ebcdic.h> |
| 27 | #include <asm/ap.h> | ||
| 27 | 28 | ||
| 28 | #include "css.h" | 29 | #include "css.h" |
| 29 | #include "cio.h" | 30 | #include "cio.h" |
| @@ -586,6 +587,15 @@ static void chsc_process_sei_scm_avail(struct chsc_sei_nt0_area *sei_area) | |||
| 586 | " failed (rc=%d).\n", ret); | 587 | " failed (rc=%d).\n", ret); |
| 587 | } | 588 | } |
| 588 | 589 | ||
| 590 | static void chsc_process_sei_ap_cfg_chg(struct chsc_sei_nt0_area *sei_area) | ||
| 591 | { | ||
| 592 | CIO_CRW_EVENT(3, "chsc: ap config changed\n"); | ||
| 593 | if (sei_area->rs != 5) | ||
| 594 | return; | ||
| 595 | |||
| 596 | ap_bus_cfg_chg(); | ||
| 597 | } | ||
| 598 | |||
| 589 | static void chsc_process_sei_nt2(struct chsc_sei_nt2_area *sei_area) | 599 | static void chsc_process_sei_nt2(struct chsc_sei_nt2_area *sei_area) |
| 590 | { | 600 | { |
| 591 | switch (sei_area->cc) { | 601 | switch (sei_area->cc) { |
| @@ -612,6 +622,9 @@ static void chsc_process_sei_nt0(struct chsc_sei_nt0_area *sei_area) | |||
| 612 | case 2: /* i/o resource accessibility */ | 622 | case 2: /* i/o resource accessibility */ |
| 613 | chsc_process_sei_res_acc(sei_area); | 623 | chsc_process_sei_res_acc(sei_area); |
| 614 | break; | 624 | break; |
| 625 | case 3: /* ap config changed */ | ||
| 626 | chsc_process_sei_ap_cfg_chg(sei_area); | ||
| 627 | break; | ||
| 615 | case 7: /* channel-path-availability information */ | 628 | case 7: /* channel-path-availability information */ |
| 616 | chsc_process_sei_chp_avail(sei_area); | 629 | chsc_process_sei_chp_avail(sei_area); |
| 617 | break; | 630 | break; |
diff --git a/drivers/s390/cio/vfio_ccw_drv.c b/drivers/s390/cio/vfio_ccw_drv.c index a10cec0e86eb..0b3b9de45c60 100644 --- a/drivers/s390/cio/vfio_ccw_drv.c +++ b/drivers/s390/cio/vfio_ccw_drv.c | |||
| @@ -72,20 +72,24 @@ static void vfio_ccw_sch_io_todo(struct work_struct *work) | |||
| 72 | { | 72 | { |
| 73 | struct vfio_ccw_private *private; | 73 | struct vfio_ccw_private *private; |
| 74 | struct irb *irb; | 74 | struct irb *irb; |
| 75 | bool is_final; | ||
| 75 | 76 | ||
| 76 | private = container_of(work, struct vfio_ccw_private, io_work); | 77 | private = container_of(work, struct vfio_ccw_private, io_work); |
| 77 | irb = &private->irb; | 78 | irb = &private->irb; |
| 78 | 79 | ||
| 80 | is_final = !(scsw_actl(&irb->scsw) & | ||
| 81 | (SCSW_ACTL_DEVACT | SCSW_ACTL_SCHACT)); | ||
| 79 | if (scsw_is_solicited(&irb->scsw)) { | 82 | if (scsw_is_solicited(&irb->scsw)) { |
| 80 | cp_update_scsw(&private->cp, &irb->scsw); | 83 | cp_update_scsw(&private->cp, &irb->scsw); |
| 81 | cp_free(&private->cp); | 84 | if (is_final) |
| 85 | cp_free(&private->cp); | ||
| 82 | } | 86 | } |
| 83 | memcpy(private->io_region->irb_area, irb, sizeof(*irb)); | 87 | memcpy(private->io_region->irb_area, irb, sizeof(*irb)); |
| 84 | 88 | ||
| 85 | if (private->io_trigger) | 89 | if (private->io_trigger) |
| 86 | eventfd_signal(private->io_trigger, 1); | 90 | eventfd_signal(private->io_trigger, 1); |
| 87 | 91 | ||
| 88 | if (private->mdev) | 92 | if (private->mdev && is_final) |
| 89 | private->state = VFIO_CCW_STATE_IDLE; | 93 | private->state = VFIO_CCW_STATE_IDLE; |
| 90 | } | 94 | } |
| 91 | 95 | ||
diff --git a/drivers/s390/crypto/ap_bus.c b/drivers/s390/crypto/ap_bus.c index e15816ff1265..1546389d71db 100644 --- a/drivers/s390/crypto/ap_bus.c +++ b/drivers/s390/crypto/ap_bus.c | |||
| @@ -810,11 +810,18 @@ static int ap_device_remove(struct device *dev) | |||
| 810 | struct ap_device *ap_dev = to_ap_dev(dev); | 810 | struct ap_device *ap_dev = to_ap_dev(dev); |
| 811 | struct ap_driver *ap_drv = ap_dev->drv; | 811 | struct ap_driver *ap_drv = ap_dev->drv; |
| 812 | 812 | ||
| 813 | /* prepare ap queue device removal */ | ||
| 813 | if (is_queue_dev(dev)) | 814 | if (is_queue_dev(dev)) |
| 814 | ap_queue_remove(to_ap_queue(dev)); | 815 | ap_queue_prepare_remove(to_ap_queue(dev)); |
| 816 | |||
| 817 | /* driver's chance to clean up gracefully */ | ||
| 815 | if (ap_drv->remove) | 818 | if (ap_drv->remove) |
| 816 | ap_drv->remove(ap_dev); | 819 | ap_drv->remove(ap_dev); |
| 817 | 820 | ||
| 821 | /* now do the ap queue device remove */ | ||
| 822 | if (is_queue_dev(dev)) | ||
| 823 | ap_queue_remove(to_ap_queue(dev)); | ||
| 824 | |||
| 818 | /* Remove queue/card from list of active queues/cards */ | 825 | /* Remove queue/card from list of active queues/cards */ |
| 819 | spin_lock_bh(&ap_list_lock); | 826 | spin_lock_bh(&ap_list_lock); |
| 820 | if (is_card_dev(dev)) | 827 | if (is_card_dev(dev)) |
| @@ -861,6 +868,16 @@ void ap_bus_force_rescan(void) | |||
| 861 | EXPORT_SYMBOL(ap_bus_force_rescan); | 868 | EXPORT_SYMBOL(ap_bus_force_rescan); |
| 862 | 869 | ||
| 863 | /* | 870 | /* |
| 871 | * A config change has happened, force an ap bus rescan. | ||
| 872 | */ | ||
| 873 | void ap_bus_cfg_chg(void) | ||
| 874 | { | ||
| 875 | AP_DBF(DBF_INFO, "%s config change, forcing bus rescan\n", __func__); | ||
| 876 | |||
| 877 | ap_bus_force_rescan(); | ||
| 878 | } | ||
| 879 | |||
| 880 | /* | ||
| 864 | * hex2bitmap() - parse hex mask string and set bitmap. | 881 | * hex2bitmap() - parse hex mask string and set bitmap. |
| 865 | * Valid strings are "0x012345678" with at least one valid hex number. | 882 | * Valid strings are "0x012345678" with at least one valid hex number. |
| 866 | * Rest of the bitmap to the right is padded with 0. No spaces allowed | 883 | * Rest of the bitmap to the right is padded with 0. No spaces allowed |
diff --git a/drivers/s390/crypto/ap_bus.h b/drivers/s390/crypto/ap_bus.h index d0059eae5d94..15a98a673c5c 100644 --- a/drivers/s390/crypto/ap_bus.h +++ b/drivers/s390/crypto/ap_bus.h | |||
| @@ -91,6 +91,7 @@ enum ap_state { | |||
| 91 | AP_STATE_WORKING, | 91 | AP_STATE_WORKING, |
| 92 | AP_STATE_QUEUE_FULL, | 92 | AP_STATE_QUEUE_FULL, |
| 93 | AP_STATE_SUSPEND_WAIT, | 93 | AP_STATE_SUSPEND_WAIT, |
| 94 | AP_STATE_REMOVE, /* about to be removed from driver */ | ||
| 94 | AP_STATE_UNBOUND, /* momentary not bound to a driver */ | 95 | AP_STATE_UNBOUND, /* momentary not bound to a driver */ |
| 95 | AP_STATE_BORKED, /* broken */ | 96 | AP_STATE_BORKED, /* broken */ |
| 96 | NR_AP_STATES | 97 | NR_AP_STATES |
| @@ -252,6 +253,7 @@ void ap_bus_force_rescan(void); | |||
| 252 | 253 | ||
| 253 | void ap_queue_init_reply(struct ap_queue *aq, struct ap_message *ap_msg); | 254 | void ap_queue_init_reply(struct ap_queue *aq, struct ap_message *ap_msg); |
| 254 | struct ap_queue *ap_queue_create(ap_qid_t qid, int device_type); | 255 | struct ap_queue *ap_queue_create(ap_qid_t qid, int device_type); |
| 256 | void ap_queue_prepare_remove(struct ap_queue *aq); | ||
| 255 | void ap_queue_remove(struct ap_queue *aq); | 257 | void ap_queue_remove(struct ap_queue *aq); |
| 256 | void ap_queue_suspend(struct ap_device *ap_dev); | 258 | void ap_queue_suspend(struct ap_device *ap_dev); |
| 257 | void ap_queue_resume(struct ap_device *ap_dev); | 259 | void ap_queue_resume(struct ap_device *ap_dev); |
diff --git a/drivers/s390/crypto/ap_queue.c b/drivers/s390/crypto/ap_queue.c index ba261210c6da..6a340f2c3556 100644 --- a/drivers/s390/crypto/ap_queue.c +++ b/drivers/s390/crypto/ap_queue.c | |||
| @@ -420,6 +420,10 @@ static ap_func_t *ap_jumptable[NR_AP_STATES][NR_AP_EVENTS] = { | |||
| 420 | [AP_EVENT_POLL] = ap_sm_suspend_read, | 420 | [AP_EVENT_POLL] = ap_sm_suspend_read, |
| 421 | [AP_EVENT_TIMEOUT] = ap_sm_nop, | 421 | [AP_EVENT_TIMEOUT] = ap_sm_nop, |
| 422 | }, | 422 | }, |
| 423 | [AP_STATE_REMOVE] = { | ||
| 424 | [AP_EVENT_POLL] = ap_sm_nop, | ||
| 425 | [AP_EVENT_TIMEOUT] = ap_sm_nop, | ||
| 426 | }, | ||
| 423 | [AP_STATE_UNBOUND] = { | 427 | [AP_STATE_UNBOUND] = { |
| 424 | [AP_EVENT_POLL] = ap_sm_nop, | 428 | [AP_EVENT_POLL] = ap_sm_nop, |
| 425 | [AP_EVENT_TIMEOUT] = ap_sm_nop, | 429 | [AP_EVENT_TIMEOUT] = ap_sm_nop, |
| @@ -740,18 +744,31 @@ void ap_flush_queue(struct ap_queue *aq) | |||
| 740 | } | 744 | } |
| 741 | EXPORT_SYMBOL(ap_flush_queue); | 745 | EXPORT_SYMBOL(ap_flush_queue); |
| 742 | 746 | ||
| 743 | void ap_queue_remove(struct ap_queue *aq) | 747 | void ap_queue_prepare_remove(struct ap_queue *aq) |
| 744 | { | 748 | { |
| 745 | ap_flush_queue(aq); | 749 | spin_lock_bh(&aq->lock); |
| 750 | /* flush queue */ | ||
| 751 | __ap_flush_queue(aq); | ||
| 752 | /* set REMOVE state to prevent new messages are queued in */ | ||
| 753 | aq->state = AP_STATE_REMOVE; | ||
| 746 | del_timer_sync(&aq->timeout); | 754 | del_timer_sync(&aq->timeout); |
| 755 | spin_unlock_bh(&aq->lock); | ||
| 756 | } | ||
| 747 | 757 | ||
| 748 | /* reset with zero, also clears irq registration */ | 758 | void ap_queue_remove(struct ap_queue *aq) |
| 759 | { | ||
| 760 | /* | ||
| 761 | * all messages have been flushed and the state is | ||
| 762 | * AP_STATE_REMOVE. Now reset with zero which also | ||
| 763 | * clears the irq registration and move the state | ||
| 764 | * to AP_STATE_UNBOUND to signal that this queue | ||
| 765 | * is not used by any driver currently. | ||
| 766 | */ | ||
| 749 | spin_lock_bh(&aq->lock); | 767 | spin_lock_bh(&aq->lock); |
| 750 | ap_zapq(aq->qid); | 768 | ap_zapq(aq->qid); |
| 751 | aq->state = AP_STATE_UNBOUND; | 769 | aq->state = AP_STATE_UNBOUND; |
| 752 | spin_unlock_bh(&aq->lock); | 770 | spin_unlock_bh(&aq->lock); |
| 753 | } | 771 | } |
| 754 | EXPORT_SYMBOL(ap_queue_remove); | ||
| 755 | 772 | ||
| 756 | void ap_queue_reinit_state(struct ap_queue *aq) | 773 | void ap_queue_reinit_state(struct ap_queue *aq) |
| 757 | { | 774 | { |
| @@ -760,4 +777,3 @@ void ap_queue_reinit_state(struct ap_queue *aq) | |||
| 760 | ap_wait(ap_sm_event(aq, AP_EVENT_POLL)); | 777 | ap_wait(ap_sm_event(aq, AP_EVENT_POLL)); |
| 761 | spin_unlock_bh(&aq->lock); | 778 | spin_unlock_bh(&aq->lock); |
| 762 | } | 779 | } |
| 763 | EXPORT_SYMBOL(ap_queue_reinit_state); | ||
diff --git a/drivers/s390/crypto/zcrypt_api.c b/drivers/s390/crypto/zcrypt_api.c index eb93c2d27d0a..689c2af7026a 100644 --- a/drivers/s390/crypto/zcrypt_api.c +++ b/drivers/s390/crypto/zcrypt_api.c | |||
| @@ -586,6 +586,7 @@ static inline bool zcrypt_check_queue(struct ap_perms *perms, int queue) | |||
| 586 | 586 | ||
| 587 | static inline struct zcrypt_queue *zcrypt_pick_queue(struct zcrypt_card *zc, | 587 | static inline struct zcrypt_queue *zcrypt_pick_queue(struct zcrypt_card *zc, |
| 588 | struct zcrypt_queue *zq, | 588 | struct zcrypt_queue *zq, |
| 589 | struct module **pmod, | ||
| 589 | unsigned int weight) | 590 | unsigned int weight) |
| 590 | { | 591 | { |
| 591 | if (!zq || !try_module_get(zq->queue->ap_dev.drv->driver.owner)) | 592 | if (!zq || !try_module_get(zq->queue->ap_dev.drv->driver.owner)) |
| @@ -595,15 +596,15 @@ static inline struct zcrypt_queue *zcrypt_pick_queue(struct zcrypt_card *zc, | |||
| 595 | atomic_add(weight, &zc->load); | 596 | atomic_add(weight, &zc->load); |
| 596 | atomic_add(weight, &zq->load); | 597 | atomic_add(weight, &zq->load); |
| 597 | zq->request_count++; | 598 | zq->request_count++; |
| 599 | *pmod = zq->queue->ap_dev.drv->driver.owner; | ||
| 598 | return zq; | 600 | return zq; |
| 599 | } | 601 | } |
| 600 | 602 | ||
| 601 | static inline void zcrypt_drop_queue(struct zcrypt_card *zc, | 603 | static inline void zcrypt_drop_queue(struct zcrypt_card *zc, |
| 602 | struct zcrypt_queue *zq, | 604 | struct zcrypt_queue *zq, |
| 605 | struct module *mod, | ||
| 603 | unsigned int weight) | 606 | unsigned int weight) |
| 604 | { | 607 | { |
| 605 | struct module *mod = zq->queue->ap_dev.drv->driver.owner; | ||
| 606 | |||
| 607 | zq->request_count--; | 608 | zq->request_count--; |
| 608 | atomic_sub(weight, &zc->load); | 609 | atomic_sub(weight, &zc->load); |
| 609 | atomic_sub(weight, &zq->load); | 610 | atomic_sub(weight, &zq->load); |
| @@ -653,6 +654,7 @@ static long zcrypt_rsa_modexpo(struct ap_perms *perms, | |||
| 653 | unsigned int weight, pref_weight; | 654 | unsigned int weight, pref_weight; |
| 654 | unsigned int func_code; | 655 | unsigned int func_code; |
| 655 | int qid = 0, rc = -ENODEV; | 656 | int qid = 0, rc = -ENODEV; |
| 657 | struct module *mod; | ||
| 656 | 658 | ||
| 657 | trace_s390_zcrypt_req(mex, TP_ICARSAMODEXPO); | 659 | trace_s390_zcrypt_req(mex, TP_ICARSAMODEXPO); |
| 658 | 660 | ||
| @@ -706,7 +708,7 @@ static long zcrypt_rsa_modexpo(struct ap_perms *perms, | |||
| 706 | pref_weight = weight; | 708 | pref_weight = weight; |
| 707 | } | 709 | } |
| 708 | } | 710 | } |
| 709 | pref_zq = zcrypt_pick_queue(pref_zc, pref_zq, weight); | 711 | pref_zq = zcrypt_pick_queue(pref_zc, pref_zq, &mod, weight); |
| 710 | spin_unlock(&zcrypt_list_lock); | 712 | spin_unlock(&zcrypt_list_lock); |
| 711 | 713 | ||
| 712 | if (!pref_zq) { | 714 | if (!pref_zq) { |
| @@ -718,7 +720,7 @@ static long zcrypt_rsa_modexpo(struct ap_perms *perms, | |||
| 718 | rc = pref_zq->ops->rsa_modexpo(pref_zq, mex); | 720 | rc = pref_zq->ops->rsa_modexpo(pref_zq, mex); |
| 719 | 721 | ||
| 720 | spin_lock(&zcrypt_list_lock); | 722 | spin_lock(&zcrypt_list_lock); |
| 721 | zcrypt_drop_queue(pref_zc, pref_zq, weight); | 723 | zcrypt_drop_queue(pref_zc, pref_zq, mod, weight); |
| 722 | spin_unlock(&zcrypt_list_lock); | 724 | spin_unlock(&zcrypt_list_lock); |
| 723 | 725 | ||
| 724 | out: | 726 | out: |
| @@ -735,6 +737,7 @@ static long zcrypt_rsa_crt(struct ap_perms *perms, | |||
| 735 | unsigned int weight, pref_weight; | 737 | unsigned int weight, pref_weight; |
| 736 | unsigned int func_code; | 738 | unsigned int func_code; |
| 737 | int qid = 0, rc = -ENODEV; | 739 | int qid = 0, rc = -ENODEV; |
| 740 | struct module *mod; | ||
| 738 | 741 | ||
| 739 | trace_s390_zcrypt_req(crt, TP_ICARSACRT); | 742 | trace_s390_zcrypt_req(crt, TP_ICARSACRT); |
| 740 | 743 | ||
| @@ -788,7 +791,7 @@ static long zcrypt_rsa_crt(struct ap_perms *perms, | |||
| 788 | pref_weight = weight; | 791 | pref_weight = weight; |
| 789 | } | 792 | } |
| 790 | } | 793 | } |
| 791 | pref_zq = zcrypt_pick_queue(pref_zc, pref_zq, weight); | 794 | pref_zq = zcrypt_pick_queue(pref_zc, pref_zq, &mod, weight); |
| 792 | spin_unlock(&zcrypt_list_lock); | 795 | spin_unlock(&zcrypt_list_lock); |
| 793 | 796 | ||
| 794 | if (!pref_zq) { | 797 | if (!pref_zq) { |
| @@ -800,7 +803,7 @@ static long zcrypt_rsa_crt(struct ap_perms *perms, | |||
| 800 | rc = pref_zq->ops->rsa_modexpo_crt(pref_zq, crt); | 803 | rc = pref_zq->ops->rsa_modexpo_crt(pref_zq, crt); |
| 801 | 804 | ||
| 802 | spin_lock(&zcrypt_list_lock); | 805 | spin_lock(&zcrypt_list_lock); |
| 803 | zcrypt_drop_queue(pref_zc, pref_zq, weight); | 806 | zcrypt_drop_queue(pref_zc, pref_zq, mod, weight); |
| 804 | spin_unlock(&zcrypt_list_lock); | 807 | spin_unlock(&zcrypt_list_lock); |
| 805 | 808 | ||
| 806 | out: | 809 | out: |
| @@ -819,6 +822,7 @@ static long _zcrypt_send_cprb(struct ap_perms *perms, | |||
| 819 | unsigned int func_code; | 822 | unsigned int func_code; |
| 820 | unsigned short *domain; | 823 | unsigned short *domain; |
| 821 | int qid = 0, rc = -ENODEV; | 824 | int qid = 0, rc = -ENODEV; |
| 825 | struct module *mod; | ||
| 822 | 826 | ||
| 823 | trace_s390_zcrypt_req(xcRB, TB_ZSECSENDCPRB); | 827 | trace_s390_zcrypt_req(xcRB, TB_ZSECSENDCPRB); |
| 824 | 828 | ||
| @@ -865,7 +869,7 @@ static long _zcrypt_send_cprb(struct ap_perms *perms, | |||
| 865 | pref_weight = weight; | 869 | pref_weight = weight; |
| 866 | } | 870 | } |
| 867 | } | 871 | } |
| 868 | pref_zq = zcrypt_pick_queue(pref_zc, pref_zq, weight); | 872 | pref_zq = zcrypt_pick_queue(pref_zc, pref_zq, &mod, weight); |
| 869 | spin_unlock(&zcrypt_list_lock); | 873 | spin_unlock(&zcrypt_list_lock); |
| 870 | 874 | ||
| 871 | if (!pref_zq) { | 875 | if (!pref_zq) { |
| @@ -881,7 +885,7 @@ static long _zcrypt_send_cprb(struct ap_perms *perms, | |||
| 881 | rc = pref_zq->ops->send_cprb(pref_zq, xcRB, &ap_msg); | 885 | rc = pref_zq->ops->send_cprb(pref_zq, xcRB, &ap_msg); |
| 882 | 886 | ||
| 883 | spin_lock(&zcrypt_list_lock); | 887 | spin_lock(&zcrypt_list_lock); |
| 884 | zcrypt_drop_queue(pref_zc, pref_zq, weight); | 888 | zcrypt_drop_queue(pref_zc, pref_zq, mod, weight); |
| 885 | spin_unlock(&zcrypt_list_lock); | 889 | spin_unlock(&zcrypt_list_lock); |
| 886 | 890 | ||
| 887 | out: | 891 | out: |
| @@ -932,6 +936,7 @@ static long zcrypt_send_ep11_cprb(struct ap_perms *perms, | |||
| 932 | unsigned int func_code; | 936 | unsigned int func_code; |
| 933 | struct ap_message ap_msg; | 937 | struct ap_message ap_msg; |
| 934 | int qid = 0, rc = -ENODEV; | 938 | int qid = 0, rc = -ENODEV; |
| 939 | struct module *mod; | ||
| 935 | 940 | ||
| 936 | trace_s390_zcrypt_req(xcrb, TP_ZSENDEP11CPRB); | 941 | trace_s390_zcrypt_req(xcrb, TP_ZSENDEP11CPRB); |
| 937 | 942 | ||
| @@ -1000,7 +1005,7 @@ static long zcrypt_send_ep11_cprb(struct ap_perms *perms, | |||
| 1000 | pref_weight = weight; | 1005 | pref_weight = weight; |
| 1001 | } | 1006 | } |
| 1002 | } | 1007 | } |
| 1003 | pref_zq = zcrypt_pick_queue(pref_zc, pref_zq, weight); | 1008 | pref_zq = zcrypt_pick_queue(pref_zc, pref_zq, &mod, weight); |
| 1004 | spin_unlock(&zcrypt_list_lock); | 1009 | spin_unlock(&zcrypt_list_lock); |
| 1005 | 1010 | ||
| 1006 | if (!pref_zq) { | 1011 | if (!pref_zq) { |
| @@ -1012,7 +1017,7 @@ static long zcrypt_send_ep11_cprb(struct ap_perms *perms, | |||
| 1012 | rc = pref_zq->ops->send_ep11_cprb(pref_zq, xcrb, &ap_msg); | 1017 | rc = pref_zq->ops->send_ep11_cprb(pref_zq, xcrb, &ap_msg); |
| 1013 | 1018 | ||
| 1014 | spin_lock(&zcrypt_list_lock); | 1019 | spin_lock(&zcrypt_list_lock); |
| 1015 | zcrypt_drop_queue(pref_zc, pref_zq, weight); | 1020 | zcrypt_drop_queue(pref_zc, pref_zq, mod, weight); |
| 1016 | spin_unlock(&zcrypt_list_lock); | 1021 | spin_unlock(&zcrypt_list_lock); |
| 1017 | 1022 | ||
| 1018 | out_free: | 1023 | out_free: |
| @@ -1033,6 +1038,7 @@ static long zcrypt_rng(char *buffer) | |||
| 1033 | struct ap_message ap_msg; | 1038 | struct ap_message ap_msg; |
| 1034 | unsigned int domain; | 1039 | unsigned int domain; |
| 1035 | int qid = 0, rc = -ENODEV; | 1040 | int qid = 0, rc = -ENODEV; |
| 1041 | struct module *mod; | ||
| 1036 | 1042 | ||
| 1037 | trace_s390_zcrypt_req(buffer, TP_HWRNGCPRB); | 1043 | trace_s390_zcrypt_req(buffer, TP_HWRNGCPRB); |
| 1038 | 1044 | ||
| @@ -1064,7 +1070,7 @@ static long zcrypt_rng(char *buffer) | |||
| 1064 | pref_weight = weight; | 1070 | pref_weight = weight; |
| 1065 | } | 1071 | } |
| 1066 | } | 1072 | } |
| 1067 | pref_zq = zcrypt_pick_queue(pref_zc, pref_zq, weight); | 1073 | pref_zq = zcrypt_pick_queue(pref_zc, pref_zq, &mod, weight); |
| 1068 | spin_unlock(&zcrypt_list_lock); | 1074 | spin_unlock(&zcrypt_list_lock); |
| 1069 | 1075 | ||
| 1070 | if (!pref_zq) { | 1076 | if (!pref_zq) { |
| @@ -1076,7 +1082,7 @@ static long zcrypt_rng(char *buffer) | |||
| 1076 | rc = pref_zq->ops->rng(pref_zq, buffer, &ap_msg); | 1082 | rc = pref_zq->ops->rng(pref_zq, buffer, &ap_msg); |
| 1077 | 1083 | ||
| 1078 | spin_lock(&zcrypt_list_lock); | 1084 | spin_lock(&zcrypt_list_lock); |
| 1079 | zcrypt_drop_queue(pref_zc, pref_zq, weight); | 1085 | zcrypt_drop_queue(pref_zc, pref_zq, mod, weight); |
| 1080 | spin_unlock(&zcrypt_list_lock); | 1086 | spin_unlock(&zcrypt_list_lock); |
| 1081 | 1087 | ||
| 1082 | out: | 1088 | out: |
diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c index 197b0f5b63e7..44bd6f04c145 100644 --- a/drivers/s390/net/qeth_core_main.c +++ b/drivers/s390/net/qeth_core_main.c | |||
| @@ -1150,13 +1150,16 @@ static void qeth_notify_skbs(struct qeth_qdio_out_q *q, | |||
| 1150 | 1150 | ||
| 1151 | static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) | 1151 | static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) |
| 1152 | { | 1152 | { |
| 1153 | struct sk_buff *skb; | ||
| 1154 | |||
| 1153 | /* release may never happen from within CQ tasklet scope */ | 1155 | /* release may never happen from within CQ tasklet scope */ |
| 1154 | WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); | 1156 | WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); |
| 1155 | 1157 | ||
| 1156 | if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) | 1158 | if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) |
| 1157 | qeth_notify_skbs(buf->q, buf, TX_NOTIFY_GENERALERROR); | 1159 | qeth_notify_skbs(buf->q, buf, TX_NOTIFY_GENERALERROR); |
| 1158 | 1160 | ||
| 1159 | __skb_queue_purge(&buf->skb_list); | 1161 | while ((skb = __skb_dequeue(&buf->skb_list)) != NULL) |
| 1162 | consume_skb(skb); | ||
| 1160 | } | 1163 | } |
| 1161 | 1164 | ||
| 1162 | static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, | 1165 | static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, |
diff --git a/drivers/s390/net/qeth_l2_main.c b/drivers/s390/net/qeth_l2_main.c index 8efb2e8ff8f4..c3067fd3bd9e 100644 --- a/drivers/s390/net/qeth_l2_main.c +++ b/drivers/s390/net/qeth_l2_main.c | |||
| @@ -629,8 +629,7 @@ static netdev_tx_t qeth_l2_hard_start_xmit(struct sk_buff *skb, | |||
| 629 | } /* else fall through */ | 629 | } /* else fall through */ |
| 630 | 630 | ||
| 631 | QETH_TXQ_STAT_INC(queue, tx_dropped); | 631 | QETH_TXQ_STAT_INC(queue, tx_dropped); |
| 632 | QETH_TXQ_STAT_INC(queue, tx_errors); | 632 | kfree_skb(skb); |
| 633 | dev_kfree_skb_any(skb); | ||
| 634 | netif_wake_queue(dev); | 633 | netif_wake_queue(dev); |
| 635 | return NETDEV_TX_OK; | 634 | return NETDEV_TX_OK; |
| 636 | } | 635 | } |
| @@ -645,6 +644,8 @@ static int qeth_l2_probe_device(struct ccwgroup_device *gdev) | |||
| 645 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); | 644 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); |
| 646 | int rc; | 645 | int rc; |
| 647 | 646 | ||
| 647 | qeth_l2_vnicc_set_defaults(card); | ||
| 648 | |||
| 648 | if (gdev->dev.type == &qeth_generic_devtype) { | 649 | if (gdev->dev.type == &qeth_generic_devtype) { |
| 649 | rc = qeth_l2_create_device_attributes(&gdev->dev); | 650 | rc = qeth_l2_create_device_attributes(&gdev->dev); |
| 650 | if (rc) | 651 | if (rc) |
| @@ -652,8 +653,6 @@ static int qeth_l2_probe_device(struct ccwgroup_device *gdev) | |||
| 652 | } | 653 | } |
| 653 | 654 | ||
| 654 | hash_init(card->mac_htable); | 655 | hash_init(card->mac_htable); |
| 655 | card->info.hwtrap = 0; | ||
| 656 | qeth_l2_vnicc_set_defaults(card); | ||
| 657 | return 0; | 656 | return 0; |
| 658 | } | 657 | } |
| 659 | 658 | ||
diff --git a/drivers/s390/net/qeth_l3_main.c b/drivers/s390/net/qeth_l3_main.c index 7e68d9d16859..53712cf26406 100644 --- a/drivers/s390/net/qeth_l3_main.c +++ b/drivers/s390/net/qeth_l3_main.c | |||
| @@ -2096,8 +2096,7 @@ static netdev_tx_t qeth_l3_hard_start_xmit(struct sk_buff *skb, | |||
| 2096 | 2096 | ||
| 2097 | tx_drop: | 2097 | tx_drop: |
| 2098 | QETH_TXQ_STAT_INC(queue, tx_dropped); | 2098 | QETH_TXQ_STAT_INC(queue, tx_dropped); |
| 2099 | QETH_TXQ_STAT_INC(queue, tx_errors); | 2099 | kfree_skb(skb); |
| 2100 | dev_kfree_skb_any(skb); | ||
| 2101 | netif_wake_queue(dev); | 2100 | netif_wake_queue(dev); |
| 2102 | return NETDEV_TX_OK; | 2101 | return NETDEV_TX_OK; |
| 2103 | } | 2102 | } |
| @@ -2253,14 +2252,15 @@ static int qeth_l3_probe_device(struct ccwgroup_device *gdev) | |||
| 2253 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); | 2252 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); |
| 2254 | int rc; | 2253 | int rc; |
| 2255 | 2254 | ||
| 2255 | hash_init(card->ip_htable); | ||
| 2256 | |||
| 2256 | if (gdev->dev.type == &qeth_generic_devtype) { | 2257 | if (gdev->dev.type == &qeth_generic_devtype) { |
| 2257 | rc = qeth_l3_create_device_attributes(&gdev->dev); | 2258 | rc = qeth_l3_create_device_attributes(&gdev->dev); |
| 2258 | if (rc) | 2259 | if (rc) |
| 2259 | return rc; | 2260 | return rc; |
| 2260 | } | 2261 | } |
| 2261 | hash_init(card->ip_htable); | 2262 | |
| 2262 | hash_init(card->ip_mc_htable); | 2263 | hash_init(card->ip_mc_htable); |
| 2263 | card->info.hwtrap = 0; | ||
| 2264 | return 0; | 2264 | return 0; |
| 2265 | } | 2265 | } |
| 2266 | 2266 | ||
diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c index 744a64680d5b..e8fc28dba8df 100644 --- a/drivers/s390/scsi/zfcp_erp.c +++ b/drivers/s390/scsi/zfcp_erp.c | |||
| @@ -624,6 +624,20 @@ static void zfcp_erp_strategy_memwait(struct zfcp_erp_action *erp_action) | |||
| 624 | add_timer(&erp_action->timer); | 624 | add_timer(&erp_action->timer); |
| 625 | } | 625 | } |
| 626 | 626 | ||
| 627 | void zfcp_erp_port_forced_reopen_all(struct zfcp_adapter *adapter, | ||
| 628 | int clear, char *dbftag) | ||
| 629 | { | ||
| 630 | unsigned long flags; | ||
| 631 | struct zfcp_port *port; | ||
| 632 | |||
| 633 | write_lock_irqsave(&adapter->erp_lock, flags); | ||
| 634 | read_lock(&adapter->port_list_lock); | ||
| 635 | list_for_each_entry(port, &adapter->port_list, list) | ||
| 636 | _zfcp_erp_port_forced_reopen(port, clear, dbftag); | ||
| 637 | read_unlock(&adapter->port_list_lock); | ||
| 638 | write_unlock_irqrestore(&adapter->erp_lock, flags); | ||
| 639 | } | ||
| 640 | |||
| 627 | static void _zfcp_erp_port_reopen_all(struct zfcp_adapter *adapter, | 641 | static void _zfcp_erp_port_reopen_all(struct zfcp_adapter *adapter, |
| 628 | int clear, char *dbftag) | 642 | int clear, char *dbftag) |
| 629 | { | 643 | { |
| @@ -1341,6 +1355,9 @@ static void zfcp_erp_try_rport_unblock(struct zfcp_port *port) | |||
| 1341 | struct zfcp_scsi_dev *zsdev = sdev_to_zfcp(sdev); | 1355 | struct zfcp_scsi_dev *zsdev = sdev_to_zfcp(sdev); |
| 1342 | int lun_status; | 1356 | int lun_status; |
| 1343 | 1357 | ||
| 1358 | if (sdev->sdev_state == SDEV_DEL || | ||
| 1359 | sdev->sdev_state == SDEV_CANCEL) | ||
| 1360 | continue; | ||
| 1344 | if (zsdev->port != port) | 1361 | if (zsdev->port != port) |
| 1345 | continue; | 1362 | continue; |
| 1346 | /* LUN under port of interest */ | 1363 | /* LUN under port of interest */ |
diff --git a/drivers/s390/scsi/zfcp_ext.h b/drivers/s390/scsi/zfcp_ext.h index 3fce47b0b21b..c6acca521ffe 100644 --- a/drivers/s390/scsi/zfcp_ext.h +++ b/drivers/s390/scsi/zfcp_ext.h | |||
| @@ -70,6 +70,8 @@ extern void zfcp_erp_port_reopen(struct zfcp_port *port, int clear, | |||
| 70 | char *dbftag); | 70 | char *dbftag); |
| 71 | extern void zfcp_erp_port_shutdown(struct zfcp_port *, int, char *); | 71 | extern void zfcp_erp_port_shutdown(struct zfcp_port *, int, char *); |
| 72 | extern void zfcp_erp_port_forced_reopen(struct zfcp_port *, int, char *); | 72 | extern void zfcp_erp_port_forced_reopen(struct zfcp_port *, int, char *); |
| 73 | extern void zfcp_erp_port_forced_reopen_all(struct zfcp_adapter *adapter, | ||
| 74 | int clear, char *dbftag); | ||
| 73 | extern void zfcp_erp_set_lun_status(struct scsi_device *, u32); | 75 | extern void zfcp_erp_set_lun_status(struct scsi_device *, u32); |
| 74 | extern void zfcp_erp_clear_lun_status(struct scsi_device *, u32); | 76 | extern void zfcp_erp_clear_lun_status(struct scsi_device *, u32); |
| 75 | extern void zfcp_erp_lun_reopen(struct scsi_device *, int, char *); | 77 | extern void zfcp_erp_lun_reopen(struct scsi_device *, int, char *); |
diff --git a/drivers/s390/scsi/zfcp_fc.c b/drivers/s390/scsi/zfcp_fc.c index db00b5e3abbe..33eddb02ee30 100644 --- a/drivers/s390/scsi/zfcp_fc.c +++ b/drivers/s390/scsi/zfcp_fc.c | |||
| @@ -239,10 +239,6 @@ static void _zfcp_fc_incoming_rscn(struct zfcp_fsf_req *fsf_req, u32 range, | |||
| 239 | list_for_each_entry(port, &adapter->port_list, list) { | 239 | list_for_each_entry(port, &adapter->port_list, list) { |
| 240 | if ((port->d_id & range) == (ntoh24(page->rscn_fid) & range)) | 240 | if ((port->d_id & range) == (ntoh24(page->rscn_fid) & range)) |
| 241 | zfcp_fc_test_link(port); | 241 | zfcp_fc_test_link(port); |
| 242 | if (!port->d_id) | ||
| 243 | zfcp_erp_port_reopen(port, | ||
| 244 | ZFCP_STATUS_COMMON_ERP_FAILED, | ||
| 245 | "fcrscn1"); | ||
| 246 | } | 242 | } |
| 247 | read_unlock_irqrestore(&adapter->port_list_lock, flags); | 243 | read_unlock_irqrestore(&adapter->port_list_lock, flags); |
| 248 | } | 244 | } |
| @@ -250,6 +246,7 @@ static void _zfcp_fc_incoming_rscn(struct zfcp_fsf_req *fsf_req, u32 range, | |||
| 250 | static void zfcp_fc_incoming_rscn(struct zfcp_fsf_req *fsf_req) | 246 | static void zfcp_fc_incoming_rscn(struct zfcp_fsf_req *fsf_req) |
| 251 | { | 247 | { |
| 252 | struct fsf_status_read_buffer *status_buffer = (void *)fsf_req->data; | 248 | struct fsf_status_read_buffer *status_buffer = (void *)fsf_req->data; |
| 249 | struct zfcp_adapter *adapter = fsf_req->adapter; | ||
| 253 | struct fc_els_rscn *head; | 250 | struct fc_els_rscn *head; |
| 254 | struct fc_els_rscn_page *page; | 251 | struct fc_els_rscn_page *page; |
| 255 | u16 i; | 252 | u16 i; |
| @@ -263,6 +260,22 @@ static void zfcp_fc_incoming_rscn(struct zfcp_fsf_req *fsf_req) | |||
| 263 | no_entries = be16_to_cpu(head->rscn_plen) / | 260 | no_entries = be16_to_cpu(head->rscn_plen) / |
| 264 | sizeof(struct fc_els_rscn_page); | 261 | sizeof(struct fc_els_rscn_page); |
| 265 | 262 | ||
| 263 | if (no_entries > 1) { | ||
| 264 | /* handle failed ports */ | ||
| 265 | unsigned long flags; | ||
| 266 | struct zfcp_port *port; | ||
| 267 | |||
| 268 | read_lock_irqsave(&adapter->port_list_lock, flags); | ||
| 269 | list_for_each_entry(port, &adapter->port_list, list) { | ||
| 270 | if (port->d_id) | ||
| 271 | continue; | ||
| 272 | zfcp_erp_port_reopen(port, | ||
| 273 | ZFCP_STATUS_COMMON_ERP_FAILED, | ||
| 274 | "fcrscn1"); | ||
| 275 | } | ||
| 276 | read_unlock_irqrestore(&adapter->port_list_lock, flags); | ||
| 277 | } | ||
| 278 | |||
| 266 | for (i = 1; i < no_entries; i++) { | 279 | for (i = 1; i < no_entries; i++) { |
| 267 | /* skip head and start with 1st element */ | 280 | /* skip head and start with 1st element */ |
| 268 | page++; | 281 | page++; |
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c index f4f6a07c5222..221d0dfb8493 100644 --- a/drivers/s390/scsi/zfcp_scsi.c +++ b/drivers/s390/scsi/zfcp_scsi.c | |||
| @@ -368,6 +368,10 @@ static int zfcp_scsi_eh_host_reset_handler(struct scsi_cmnd *scpnt) | |||
| 368 | struct zfcp_adapter *adapter = zfcp_sdev->port->adapter; | 368 | struct zfcp_adapter *adapter = zfcp_sdev->port->adapter; |
| 369 | int ret = SUCCESS, fc_ret; | 369 | int ret = SUCCESS, fc_ret; |
| 370 | 370 | ||
| 371 | if (!(adapter->connection_features & FSF_FEATURE_NPIV_MODE)) { | ||
| 372 | zfcp_erp_port_forced_reopen_all(adapter, 0, "schrh_p"); | ||
| 373 | zfcp_erp_wait(adapter); | ||
| 374 | } | ||
| 371 | zfcp_erp_adapter_reopen(adapter, 0, "schrh_1"); | 375 | zfcp_erp_adapter_reopen(adapter, 0, "schrh_1"); |
| 372 | zfcp_erp_wait(adapter); | 376 | zfcp_erp_wait(adapter); |
| 373 | fc_ret = fc_block_scsi_eh(scpnt); | 377 | fc_ret = fc_block_scsi_eh(scpnt); |
diff --git a/drivers/scsi/aacraid/aacraid.h b/drivers/scsi/aacraid/aacraid.h index 1df5171594b8..11fb68d7e60d 100644 --- a/drivers/scsi/aacraid/aacraid.h +++ b/drivers/scsi/aacraid/aacraid.h | |||
| @@ -2640,9 +2640,14 @@ static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor) | |||
| 2640 | return capacity; | 2640 | return capacity; |
| 2641 | } | 2641 | } |
| 2642 | 2642 | ||
| 2643 | static inline int aac_pci_offline(struct aac_dev *dev) | ||
| 2644 | { | ||
| 2645 | return pci_channel_offline(dev->pdev) || dev->handle_pci_error; | ||
| 2646 | } | ||
| 2647 | |||
| 2643 | static inline int aac_adapter_check_health(struct aac_dev *dev) | 2648 | static inline int aac_adapter_check_health(struct aac_dev *dev) |
| 2644 | { | 2649 | { |
| 2645 | if (unlikely(pci_channel_offline(dev->pdev))) | 2650 | if (unlikely(aac_pci_offline(dev))) |
| 2646 | return -1; | 2651 | return -1; |
| 2647 | 2652 | ||
| 2648 | return (dev)->a_ops.adapter_check_health(dev); | 2653 | return (dev)->a_ops.adapter_check_health(dev); |
diff --git a/drivers/scsi/aacraid/commsup.c b/drivers/scsi/aacraid/commsup.c index e67e032936ef..78430a7b294c 100644 --- a/drivers/scsi/aacraid/commsup.c +++ b/drivers/scsi/aacraid/commsup.c | |||
| @@ -672,7 +672,7 @@ int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size, | |||
| 672 | return -ETIMEDOUT; | 672 | return -ETIMEDOUT; |
| 673 | } | 673 | } |
| 674 | 674 | ||
| 675 | if (unlikely(pci_channel_offline(dev->pdev))) | 675 | if (unlikely(aac_pci_offline(dev))) |
| 676 | return -EFAULT; | 676 | return -EFAULT; |
| 677 | 677 | ||
| 678 | if ((blink = aac_adapter_check_health(dev)) > 0) { | 678 | if ((blink = aac_adapter_check_health(dev)) > 0) { |
| @@ -772,7 +772,7 @@ int aac_hba_send(u8 command, struct fib *fibptr, fib_callback callback, | |||
| 772 | 772 | ||
| 773 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | 773 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
| 774 | 774 | ||
| 775 | if (unlikely(pci_channel_offline(dev->pdev))) | 775 | if (unlikely(aac_pci_offline(dev))) |
| 776 | return -EFAULT; | 776 | return -EFAULT; |
| 777 | 777 | ||
| 778 | fibptr->flags |= FIB_CONTEXT_FLAG_WAIT; | 778 | fibptr->flags |= FIB_CONTEXT_FLAG_WAIT; |
diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index 3c3cf89f713f..14bac4966c87 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_main.c +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c | |||
| @@ -1801,6 +1801,12 @@ static int hisi_sas_I_T_nexus_reset(struct domain_device *device) | |||
| 1801 | } | 1801 | } |
| 1802 | hisi_sas_dereg_device(hisi_hba, device); | 1802 | hisi_sas_dereg_device(hisi_hba, device); |
| 1803 | 1803 | ||
| 1804 | if (dev_is_sata(device)) { | ||
| 1805 | rc = hisi_sas_softreset_ata_disk(device); | ||
| 1806 | if (rc) | ||
| 1807 | return TMF_RESP_FUNC_FAILED; | ||
| 1808 | } | ||
| 1809 | |||
| 1804 | rc = hisi_sas_debug_I_T_nexus_reset(device); | 1810 | rc = hisi_sas_debug_I_T_nexus_reset(device); |
| 1805 | 1811 | ||
| 1806 | if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV)) | 1812 | if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV)) |
diff --git a/drivers/scsi/ibmvscsi/ibmvfc.c b/drivers/scsi/ibmvscsi/ibmvfc.c index dbaa4f131433..3ad997ac3510 100644 --- a/drivers/scsi/ibmvscsi/ibmvfc.c +++ b/drivers/scsi/ibmvscsi/ibmvfc.c | |||
| @@ -139,6 +139,7 @@ static const struct { | |||
| 139 | { IBMVFC_FC_FAILURE, IBMVFC_VENDOR_SPECIFIC, DID_ERROR, 1, 1, "vendor specific" }, | 139 | { IBMVFC_FC_FAILURE, IBMVFC_VENDOR_SPECIFIC, DID_ERROR, 1, 1, "vendor specific" }, |
| 140 | 140 | ||
| 141 | { IBMVFC_FC_SCSI_ERROR, 0, DID_OK, 1, 0, "SCSI error" }, | 141 | { IBMVFC_FC_SCSI_ERROR, 0, DID_OK, 1, 0, "SCSI error" }, |
| 142 | { IBMVFC_FC_SCSI_ERROR, IBMVFC_COMMAND_FAILED, DID_ERROR, 0, 1, "PRLI to device failed." }, | ||
| 142 | }; | 143 | }; |
| 143 | 144 | ||
| 144 | static void ibmvfc_npiv_login(struct ibmvfc_host *); | 145 | static void ibmvfc_npiv_login(struct ibmvfc_host *); |
| @@ -1494,9 +1495,9 @@ static void ibmvfc_log_error(struct ibmvfc_event *evt) | |||
| 1494 | if (rsp->flags & FCP_RSP_LEN_VALID) | 1495 | if (rsp->flags & FCP_RSP_LEN_VALID) |
| 1495 | rsp_code = rsp->data.info.rsp_code; | 1496 | rsp_code = rsp->data.info.rsp_code; |
| 1496 | 1497 | ||
| 1497 | scmd_printk(KERN_ERR, cmnd, "Command (%02X) failed: %s (%x:%x) " | 1498 | scmd_printk(KERN_ERR, cmnd, "Command (%02X) : %s (%x:%x) " |
| 1498 | "flags: %x fcp_rsp: %x, resid=%d, scsi_status: %x\n", | 1499 | "flags: %x fcp_rsp: %x, resid=%d, scsi_status: %x\n", |
| 1499 | cmnd->cmnd[0], err, vfc_cmd->status, vfc_cmd->error, | 1500 | cmnd->cmnd[0], err, be16_to_cpu(vfc_cmd->status), be16_to_cpu(vfc_cmd->error), |
| 1500 | rsp->flags, rsp_code, scsi_get_resid(cmnd), rsp->scsi_status); | 1501 | rsp->flags, rsp_code, scsi_get_resid(cmnd), rsp->scsi_status); |
| 1501 | } | 1502 | } |
| 1502 | 1503 | ||
| @@ -2022,7 +2023,7 @@ static int ibmvfc_reset_device(struct scsi_device *sdev, int type, char *desc) | |||
| 2022 | sdev_printk(KERN_ERR, sdev, "%s reset failed: %s (%x:%x) " | 2023 | sdev_printk(KERN_ERR, sdev, "%s reset failed: %s (%x:%x) " |
| 2023 | "flags: %x fcp_rsp: %x, scsi_status: %x\n", desc, | 2024 | "flags: %x fcp_rsp: %x, scsi_status: %x\n", desc, |
| 2024 | ibmvfc_get_cmd_error(be16_to_cpu(rsp_iu.cmd.status), be16_to_cpu(rsp_iu.cmd.error)), | 2025 | ibmvfc_get_cmd_error(be16_to_cpu(rsp_iu.cmd.status), be16_to_cpu(rsp_iu.cmd.error)), |
| 2025 | rsp_iu.cmd.status, rsp_iu.cmd.error, fc_rsp->flags, rsp_code, | 2026 | be16_to_cpu(rsp_iu.cmd.status), be16_to_cpu(rsp_iu.cmd.error), fc_rsp->flags, rsp_code, |
| 2026 | fc_rsp->scsi_status); | 2027 | fc_rsp->scsi_status); |
| 2027 | rsp_rc = -EIO; | 2028 | rsp_rc = -EIO; |
| 2028 | } else | 2029 | } else |
| @@ -2381,7 +2382,7 @@ static int ibmvfc_abort_task_set(struct scsi_device *sdev) | |||
| 2381 | sdev_printk(KERN_ERR, sdev, "Abort failed: %s (%x:%x) " | 2382 | sdev_printk(KERN_ERR, sdev, "Abort failed: %s (%x:%x) " |
| 2382 | "flags: %x fcp_rsp: %x, scsi_status: %x\n", | 2383 | "flags: %x fcp_rsp: %x, scsi_status: %x\n", |
| 2383 | ibmvfc_get_cmd_error(be16_to_cpu(rsp_iu.cmd.status), be16_to_cpu(rsp_iu.cmd.error)), | 2384 | ibmvfc_get_cmd_error(be16_to_cpu(rsp_iu.cmd.status), be16_to_cpu(rsp_iu.cmd.error)), |
| 2384 | rsp_iu.cmd.status, rsp_iu.cmd.error, fc_rsp->flags, rsp_code, | 2385 | be16_to_cpu(rsp_iu.cmd.status), be16_to_cpu(rsp_iu.cmd.error), fc_rsp->flags, rsp_code, |
| 2385 | fc_rsp->scsi_status); | 2386 | fc_rsp->scsi_status); |
| 2386 | rsp_rc = -EIO; | 2387 | rsp_rc = -EIO; |
| 2387 | } else | 2388 | } else |
| @@ -2755,16 +2756,18 @@ static void ibmvfc_handle_crq(struct ibmvfc_crq *crq, struct ibmvfc_host *vhost) | |||
| 2755 | ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_NONE); | 2756 | ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_NONE); |
| 2756 | if (crq->format == IBMVFC_PARTITION_MIGRATED) { | 2757 | if (crq->format == IBMVFC_PARTITION_MIGRATED) { |
| 2757 | /* We need to re-setup the interpartition connection */ | 2758 | /* We need to re-setup the interpartition connection */ |
| 2758 | dev_info(vhost->dev, "Re-enabling adapter\n"); | 2759 | dev_info(vhost->dev, "Partition migrated, Re-enabling adapter\n"); |
| 2759 | vhost->client_migrated = 1; | 2760 | vhost->client_migrated = 1; |
| 2760 | ibmvfc_purge_requests(vhost, DID_REQUEUE); | 2761 | ibmvfc_purge_requests(vhost, DID_REQUEUE); |
| 2761 | ibmvfc_link_down(vhost, IBMVFC_LINK_DOWN); | 2762 | ibmvfc_link_down(vhost, IBMVFC_LINK_DOWN); |
| 2762 | ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_REENABLE); | 2763 | ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_REENABLE); |
| 2763 | } else { | 2764 | } else if (crq->format == IBMVFC_PARTNER_FAILED || crq->format == IBMVFC_PARTNER_DEREGISTER) { |
| 2764 | dev_err(vhost->dev, "Virtual adapter failed (rc=%d)\n", crq->format); | 2765 | dev_err(vhost->dev, "Host partner adapter deregistered or failed (rc=%d)\n", crq->format); |
| 2765 | ibmvfc_purge_requests(vhost, DID_ERROR); | 2766 | ibmvfc_purge_requests(vhost, DID_ERROR); |
| 2766 | ibmvfc_link_down(vhost, IBMVFC_LINK_DOWN); | 2767 | ibmvfc_link_down(vhost, IBMVFC_LINK_DOWN); |
| 2767 | ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_RESET); | 2768 | ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_RESET); |
| 2769 | } else { | ||
| 2770 | dev_err(vhost->dev, "Received unknown transport event from partner (rc=%d)\n", crq->format); | ||
| 2768 | } | 2771 | } |
| 2769 | return; | 2772 | return; |
| 2770 | case IBMVFC_CRQ_CMD_RSP: | 2773 | case IBMVFC_CRQ_CMD_RSP: |
| @@ -3348,7 +3351,7 @@ static void ibmvfc_tgt_prli_done(struct ibmvfc_event *evt) | |||
| 3348 | 3351 | ||
| 3349 | tgt_log(tgt, level, "Process Login failed: %s (%x:%x) rc=0x%02X\n", | 3352 | tgt_log(tgt, level, "Process Login failed: %s (%x:%x) rc=0x%02X\n", |
| 3350 | ibmvfc_get_cmd_error(be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)), | 3353 | ibmvfc_get_cmd_error(be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)), |
| 3351 | rsp->status, rsp->error, status); | 3354 | be16_to_cpu(rsp->status), be16_to_cpu(rsp->error), status); |
| 3352 | break; | 3355 | break; |
| 3353 | } | 3356 | } |
| 3354 | 3357 | ||
| @@ -3446,9 +3449,10 @@ static void ibmvfc_tgt_plogi_done(struct ibmvfc_event *evt) | |||
| 3446 | ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT); | 3449 | ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT); |
| 3447 | 3450 | ||
| 3448 | tgt_log(tgt, level, "Port Login failed: %s (%x:%x) %s (%x) %s (%x) rc=0x%02X\n", | 3451 | tgt_log(tgt, level, "Port Login failed: %s (%x:%x) %s (%x) %s (%x) rc=0x%02X\n", |
| 3449 | ibmvfc_get_cmd_error(be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)), rsp->status, rsp->error, | 3452 | ibmvfc_get_cmd_error(be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)), |
| 3450 | ibmvfc_get_fc_type(be16_to_cpu(rsp->fc_type)), rsp->fc_type, | 3453 | be16_to_cpu(rsp->status), be16_to_cpu(rsp->error), |
| 3451 | ibmvfc_get_ls_explain(be16_to_cpu(rsp->fc_explain)), rsp->fc_explain, status); | 3454 | ibmvfc_get_fc_type(be16_to_cpu(rsp->fc_type)), be16_to_cpu(rsp->fc_type), |
| 3455 | ibmvfc_get_ls_explain(be16_to_cpu(rsp->fc_explain)), be16_to_cpu(rsp->fc_explain), status); | ||
| 3452 | break; | 3456 | break; |
| 3453 | } | 3457 | } |
| 3454 | 3458 | ||
| @@ -3619,7 +3623,7 @@ static void ibmvfc_tgt_adisc_done(struct ibmvfc_event *evt) | |||
| 3619 | fc_explain = (be32_to_cpu(mad->fc_iu.response[1]) & 0x0000ff00) >> 8; | 3623 | fc_explain = (be32_to_cpu(mad->fc_iu.response[1]) & 0x0000ff00) >> 8; |
| 3620 | tgt_info(tgt, "ADISC failed: %s (%x:%x) %s (%x) %s (%x) rc=0x%02X\n", | 3624 | tgt_info(tgt, "ADISC failed: %s (%x:%x) %s (%x) %s (%x) rc=0x%02X\n", |
| 3621 | ibmvfc_get_cmd_error(be16_to_cpu(mad->iu.status), be16_to_cpu(mad->iu.error)), | 3625 | ibmvfc_get_cmd_error(be16_to_cpu(mad->iu.status), be16_to_cpu(mad->iu.error)), |
| 3622 | mad->iu.status, mad->iu.error, | 3626 | be16_to_cpu(mad->iu.status), be16_to_cpu(mad->iu.error), |
| 3623 | ibmvfc_get_fc_type(fc_reason), fc_reason, | 3627 | ibmvfc_get_fc_type(fc_reason), fc_reason, |
| 3624 | ibmvfc_get_ls_explain(fc_explain), fc_explain, status); | 3628 | ibmvfc_get_ls_explain(fc_explain), fc_explain, status); |
| 3625 | break; | 3629 | break; |
| @@ -3831,9 +3835,10 @@ static void ibmvfc_tgt_query_target_done(struct ibmvfc_event *evt) | |||
| 3831 | 3835 | ||
| 3832 | tgt_log(tgt, level, "Query Target failed: %s (%x:%x) %s (%x) %s (%x) rc=0x%02X\n", | 3836 | tgt_log(tgt, level, "Query Target failed: %s (%x:%x) %s (%x) %s (%x) rc=0x%02X\n", |
| 3833 | ibmvfc_get_cmd_error(be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)), | 3837 | ibmvfc_get_cmd_error(be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)), |
| 3834 | rsp->status, rsp->error, ibmvfc_get_fc_type(be16_to_cpu(rsp->fc_type)), | 3838 | be16_to_cpu(rsp->status), be16_to_cpu(rsp->error), |
| 3835 | rsp->fc_type, ibmvfc_get_gs_explain(be16_to_cpu(rsp->fc_explain)), | 3839 | ibmvfc_get_fc_type(be16_to_cpu(rsp->fc_type)), be16_to_cpu(rsp->fc_type), |
| 3836 | rsp->fc_explain, status); | 3840 | ibmvfc_get_gs_explain(be16_to_cpu(rsp->fc_explain)), be16_to_cpu(rsp->fc_explain), |
| 3841 | status); | ||
| 3837 | break; | 3842 | break; |
| 3838 | } | 3843 | } |
| 3839 | 3844 | ||
| @@ -3959,7 +3964,7 @@ static void ibmvfc_discover_targets_done(struct ibmvfc_event *evt) | |||
| 3959 | level += ibmvfc_retry_host_init(vhost); | 3964 | level += ibmvfc_retry_host_init(vhost); |
| 3960 | ibmvfc_log(vhost, level, "Discover Targets failed: %s (%x:%x)\n", | 3965 | ibmvfc_log(vhost, level, "Discover Targets failed: %s (%x:%x)\n", |
| 3961 | ibmvfc_get_cmd_error(be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)), | 3966 | ibmvfc_get_cmd_error(be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)), |
| 3962 | rsp->status, rsp->error); | 3967 | be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)); |
| 3963 | break; | 3968 | break; |
| 3964 | case IBMVFC_MAD_DRIVER_FAILED: | 3969 | case IBMVFC_MAD_DRIVER_FAILED: |
| 3965 | break; | 3970 | break; |
| @@ -4024,7 +4029,7 @@ static void ibmvfc_npiv_login_done(struct ibmvfc_event *evt) | |||
| 4024 | ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD); | 4029 | ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD); |
| 4025 | ibmvfc_log(vhost, level, "NPIV Login failed: %s (%x:%x)\n", | 4030 | ibmvfc_log(vhost, level, "NPIV Login failed: %s (%x:%x)\n", |
| 4026 | ibmvfc_get_cmd_error(be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)), | 4031 | ibmvfc_get_cmd_error(be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)), |
| 4027 | rsp->status, rsp->error); | 4032 | be16_to_cpu(rsp->status), be16_to_cpu(rsp->error)); |
| 4028 | ibmvfc_free_event(evt); | 4033 | ibmvfc_free_event(evt); |
| 4029 | return; | 4034 | return; |
| 4030 | case IBMVFC_MAD_CRQ_ERROR: | 4035 | case IBMVFC_MAD_CRQ_ERROR: |
diff --git a/drivers/scsi/ibmvscsi/ibmvfc.h b/drivers/scsi/ibmvscsi/ibmvfc.h index b81a53c4a9a8..459cc288ba1d 100644 --- a/drivers/scsi/ibmvscsi/ibmvfc.h +++ b/drivers/scsi/ibmvscsi/ibmvfc.h | |||
| @@ -78,9 +78,14 @@ enum ibmvfc_crq_valid { | |||
| 78 | IBMVFC_CRQ_XPORT_EVENT = 0xFF, | 78 | IBMVFC_CRQ_XPORT_EVENT = 0xFF, |
| 79 | }; | 79 | }; |
| 80 | 80 | ||
| 81 | enum ibmvfc_crq_format { | 81 | enum ibmvfc_crq_init_msg { |
| 82 | IBMVFC_CRQ_INIT = 0x01, | 82 | IBMVFC_CRQ_INIT = 0x01, |
| 83 | IBMVFC_CRQ_INIT_COMPLETE = 0x02, | 83 | IBMVFC_CRQ_INIT_COMPLETE = 0x02, |
| 84 | }; | ||
| 85 | |||
| 86 | enum ibmvfc_crq_xport_evts { | ||
| 87 | IBMVFC_PARTNER_FAILED = 0x01, | ||
| 88 | IBMVFC_PARTNER_DEREGISTER = 0x02, | ||
| 84 | IBMVFC_PARTITION_MIGRATED = 0x06, | 89 | IBMVFC_PARTITION_MIGRATED = 0x06, |
| 85 | }; | 90 | }; |
| 86 | 91 | ||
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c index 1135e74646e2..8cec5230fe31 100644 --- a/drivers/scsi/ibmvscsi/ibmvscsi.c +++ b/drivers/scsi/ibmvscsi/ibmvscsi.c | |||
| @@ -96,6 +96,7 @@ static int client_reserve = 1; | |||
| 96 | static char partition_name[96] = "UNKNOWN"; | 96 | static char partition_name[96] = "UNKNOWN"; |
| 97 | static unsigned int partition_number = -1; | 97 | static unsigned int partition_number = -1; |
| 98 | static LIST_HEAD(ibmvscsi_head); | 98 | static LIST_HEAD(ibmvscsi_head); |
| 99 | static DEFINE_SPINLOCK(ibmvscsi_driver_lock); | ||
| 99 | 100 | ||
| 100 | static struct scsi_transport_template *ibmvscsi_transport_template; | 101 | static struct scsi_transport_template *ibmvscsi_transport_template; |
| 101 | 102 | ||
| @@ -2270,7 +2271,9 @@ static int ibmvscsi_probe(struct vio_dev *vdev, const struct vio_device_id *id) | |||
| 2270 | } | 2271 | } |
| 2271 | 2272 | ||
| 2272 | dev_set_drvdata(&vdev->dev, hostdata); | 2273 | dev_set_drvdata(&vdev->dev, hostdata); |
| 2274 | spin_lock(&ibmvscsi_driver_lock); | ||
| 2273 | list_add_tail(&hostdata->host_list, &ibmvscsi_head); | 2275 | list_add_tail(&hostdata->host_list, &ibmvscsi_head); |
| 2276 | spin_unlock(&ibmvscsi_driver_lock); | ||
| 2274 | return 0; | 2277 | return 0; |
| 2275 | 2278 | ||
| 2276 | add_srp_port_failed: | 2279 | add_srp_port_failed: |
| @@ -2292,15 +2295,27 @@ static int ibmvscsi_probe(struct vio_dev *vdev, const struct vio_device_id *id) | |||
| 2292 | static int ibmvscsi_remove(struct vio_dev *vdev) | 2295 | static int ibmvscsi_remove(struct vio_dev *vdev) |
| 2293 | { | 2296 | { |
| 2294 | struct ibmvscsi_host_data *hostdata = dev_get_drvdata(&vdev->dev); | 2297 | struct ibmvscsi_host_data *hostdata = dev_get_drvdata(&vdev->dev); |
| 2295 | list_del(&hostdata->host_list); | 2298 | unsigned long flags; |
| 2296 | unmap_persist_bufs(hostdata); | 2299 | |
| 2300 | srp_remove_host(hostdata->host); | ||
| 2301 | scsi_remove_host(hostdata->host); | ||
| 2302 | |||
| 2303 | purge_requests(hostdata, DID_ERROR); | ||
| 2304 | |||
| 2305 | spin_lock_irqsave(hostdata->host->host_lock, flags); | ||
| 2297 | release_event_pool(&hostdata->pool, hostdata); | 2306 | release_event_pool(&hostdata->pool, hostdata); |
| 2307 | spin_unlock_irqrestore(hostdata->host->host_lock, flags); | ||
| 2308 | |||
| 2298 | ibmvscsi_release_crq_queue(&hostdata->queue, hostdata, | 2309 | ibmvscsi_release_crq_queue(&hostdata->queue, hostdata, |
| 2299 | max_events); | 2310 | max_events); |
| 2300 | 2311 | ||
| 2301 | kthread_stop(hostdata->work_thread); | 2312 | kthread_stop(hostdata->work_thread); |
| 2302 | srp_remove_host(hostdata->host); | 2313 | unmap_persist_bufs(hostdata); |
| 2303 | scsi_remove_host(hostdata->host); | 2314 | |
| 2315 | spin_lock(&ibmvscsi_driver_lock); | ||
| 2316 | list_del(&hostdata->host_list); | ||
| 2317 | spin_unlock(&ibmvscsi_driver_lock); | ||
| 2318 | |||
| 2304 | scsi_host_put(hostdata->host); | 2319 | scsi_host_put(hostdata->host); |
| 2305 | 2320 | ||
| 2306 | return 0; | 2321 | return 0; |
diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index e57774472e75..1d8c584ec1e9 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c | |||
| @@ -3281,12 +3281,18 @@ mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid) | |||
| 3281 | 3281 | ||
| 3282 | if (smid < ioc->hi_priority_smid) { | 3282 | if (smid < ioc->hi_priority_smid) { |
| 3283 | struct scsiio_tracker *st; | 3283 | struct scsiio_tracker *st; |
| 3284 | void *request; | ||
| 3284 | 3285 | ||
| 3285 | st = _get_st_from_smid(ioc, smid); | 3286 | st = _get_st_from_smid(ioc, smid); |
| 3286 | if (!st) { | 3287 | if (!st) { |
| 3287 | _base_recovery_check(ioc); | 3288 | _base_recovery_check(ioc); |
| 3288 | return; | 3289 | return; |
| 3289 | } | 3290 | } |
| 3291 | |||
| 3292 | /* Clear MPI request frame */ | ||
| 3293 | request = mpt3sas_base_get_msg_frame(ioc, smid); | ||
| 3294 | memset(request, 0, ioc->request_sz); | ||
| 3295 | |||
| 3290 | mpt3sas_base_clear_st(ioc, st); | 3296 | mpt3sas_base_clear_st(ioc, st); |
| 3291 | _base_recovery_check(ioc); | 3297 | _base_recovery_check(ioc); |
| 3292 | return; | 3298 | return; |
diff --git a/drivers/scsi/mpt3sas/mpt3sas_scsih.c b/drivers/scsi/mpt3sas/mpt3sas_scsih.c index 8bb5b8f9f4d2..1ccfbc7eebe0 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_scsih.c +++ b/drivers/scsi/mpt3sas/mpt3sas_scsih.c | |||
| @@ -1462,11 +1462,23 @@ mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc, u16 smid) | |||
| 1462 | { | 1462 | { |
| 1463 | struct scsi_cmnd *scmd = NULL; | 1463 | struct scsi_cmnd *scmd = NULL; |
| 1464 | struct scsiio_tracker *st; | 1464 | struct scsiio_tracker *st; |
| 1465 | Mpi25SCSIIORequest_t *mpi_request; | ||
| 1465 | 1466 | ||
| 1466 | if (smid > 0 && | 1467 | if (smid > 0 && |
| 1467 | smid <= ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT) { | 1468 | smid <= ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT) { |
| 1468 | u32 unique_tag = smid - 1; | 1469 | u32 unique_tag = smid - 1; |
| 1469 | 1470 | ||
| 1471 | mpi_request = mpt3sas_base_get_msg_frame(ioc, smid); | ||
| 1472 | |||
| 1473 | /* | ||
| 1474 | * If SCSI IO request is outstanding at driver level then | ||
| 1475 | * DevHandle filed must be non-zero. If DevHandle is zero | ||
| 1476 | * then it means that this smid is free at driver level, | ||
| 1477 | * so return NULL. | ||
| 1478 | */ | ||
| 1479 | if (!mpi_request->DevHandle) | ||
| 1480 | return scmd; | ||
| 1481 | |||
| 1470 | scmd = scsi_host_find_tag(ioc->shost, unique_tag); | 1482 | scmd = scsi_host_find_tag(ioc->shost, unique_tag); |
| 1471 | if (scmd) { | 1483 | if (scmd) { |
| 1472 | st = scsi_cmd_priv(scmd); | 1484 | st = scsi_cmd_priv(scmd); |
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index 420045155ba0..0c700b140ce7 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c | |||
| @@ -4991,6 +4991,13 @@ qla2x00_configure_local_loop(scsi_qla_host_t *vha) | |||
| 4991 | if ((domain & 0xf0) == 0xf0) | 4991 | if ((domain & 0xf0) == 0xf0) |
| 4992 | continue; | 4992 | continue; |
| 4993 | 4993 | ||
| 4994 | /* Bypass if not same domain and area of adapter. */ | ||
| 4995 | if (area && domain && ((area != vha->d_id.b.area) || | ||
| 4996 | (domain != vha->d_id.b.domain)) && | ||
| 4997 | (ha->current_topology == ISP_CFG_NL)) | ||
| 4998 | continue; | ||
| 4999 | |||
| 5000 | |||
| 4994 | /* Bypass invalid local loop ID. */ | 5001 | /* Bypass invalid local loop ID. */ |
| 4995 | if (loop_id > LAST_LOCAL_LOOP_ID) | 5002 | if (loop_id > LAST_LOCAL_LOOP_ID) |
| 4996 | continue; | 5003 | continue; |
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index 677f82fdf56f..91f576d743fe 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
| @@ -1517,7 +1517,7 @@ __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type, | |||
| 1517 | goto eh_reset_failed; | 1517 | goto eh_reset_failed; |
| 1518 | } | 1518 | } |
| 1519 | err = 2; | 1519 | err = 2; |
| 1520 | if (do_reset(fcport, cmd->device->lun, blk_mq_rq_cpu(cmd->request) + 1) | 1520 | if (do_reset(fcport, cmd->device->lun, 1) |
| 1521 | != QLA_SUCCESS) { | 1521 | != QLA_SUCCESS) { |
| 1522 | ql_log(ql_log_warn, vha, 0x800c, | 1522 | ql_log(ql_log_warn, vha, 0x800c, |
| 1523 | "do_reset failed for cmd=%p.\n", cmd); | 1523 | "do_reset failed for cmd=%p.\n", cmd); |
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c index 16a18d5d856f..6e4f4931ae17 100644 --- a/drivers/scsi/qla4xxx/ql4_os.c +++ b/drivers/scsi/qla4xxx/ql4_os.c | |||
| @@ -3203,6 +3203,8 @@ static int qla4xxx_conn_bind(struct iscsi_cls_session *cls_session, | |||
| 3203 | if (iscsi_conn_bind(cls_session, cls_conn, is_leading)) | 3203 | if (iscsi_conn_bind(cls_session, cls_conn, is_leading)) |
| 3204 | return -EINVAL; | 3204 | return -EINVAL; |
| 3205 | ep = iscsi_lookup_endpoint(transport_fd); | 3205 | ep = iscsi_lookup_endpoint(transport_fd); |
| 3206 | if (!ep) | ||
| 3207 | return -EINVAL; | ||
| 3206 | conn = cls_conn->dd_data; | 3208 | conn = cls_conn->dd_data; |
| 3207 | qla_conn = conn->dd_data; | 3209 | qla_conn = conn->dd_data; |
| 3208 | qla_conn->qla_ep = ep->dd_data; | 3210 | qla_conn->qla_ep = ep->dd_data; |
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c index 20189675677a..601b9f1de267 100644 --- a/drivers/scsi/scsi_lib.c +++ b/drivers/scsi/scsi_lib.c | |||
| @@ -585,10 +585,17 @@ static bool scsi_end_request(struct request *req, blk_status_t error, | |||
| 585 | if (!blk_rq_is_scsi(req)) { | 585 | if (!blk_rq_is_scsi(req)) { |
| 586 | WARN_ON_ONCE(!(cmd->flags & SCMD_INITIALIZED)); | 586 | WARN_ON_ONCE(!(cmd->flags & SCMD_INITIALIZED)); |
| 587 | cmd->flags &= ~SCMD_INITIALIZED; | 587 | cmd->flags &= ~SCMD_INITIALIZED; |
| 588 | destroy_rcu_head(&cmd->rcu); | ||
| 589 | } | 588 | } |
| 590 | 589 | ||
| 591 | /* | 590 | /* |
| 591 | * Calling rcu_barrier() is not necessary here because the | ||
| 592 | * SCSI error handler guarantees that the function called by | ||
| 593 | * call_rcu() has been called before scsi_end_request() is | ||
| 594 | * called. | ||
| 595 | */ | ||
| 596 | destroy_rcu_head(&cmd->rcu); | ||
| 597 | |||
| 598 | /* | ||
| 592 | * In the MQ case the command gets freed by __blk_mq_end_request, | 599 | * In the MQ case the command gets freed by __blk_mq_end_request, |
| 593 | * so we have to do all cleanup that depends on it earlier. | 600 | * so we have to do all cleanup that depends on it earlier. |
| 594 | * | 601 | * |
| @@ -2541,8 +2548,10 @@ void scsi_device_resume(struct scsi_device *sdev) | |||
| 2541 | * device deleted during suspend) | 2548 | * device deleted during suspend) |
| 2542 | */ | 2549 | */ |
| 2543 | mutex_lock(&sdev->state_mutex); | 2550 | mutex_lock(&sdev->state_mutex); |
| 2544 | sdev->quiesced_by = NULL; | 2551 | if (sdev->quiesced_by) { |
| 2545 | blk_clear_pm_only(sdev->request_queue); | 2552 | sdev->quiesced_by = NULL; |
| 2553 | blk_clear_pm_only(sdev->request_queue); | ||
| 2554 | } | ||
| 2546 | if (sdev->sdev_state == SDEV_QUIESCE) | 2555 | if (sdev->sdev_state == SDEV_QUIESCE) |
| 2547 | scsi_device_set_state(sdev, SDEV_RUNNING); | 2556 | scsi_device_set_state(sdev, SDEV_RUNNING); |
| 2548 | mutex_unlock(&sdev->state_mutex); | 2557 | mutex_unlock(&sdev->state_mutex); |
diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c index 6a9040faed00..3b119ca0cc0c 100644 --- a/drivers/scsi/scsi_sysfs.c +++ b/drivers/scsi/scsi_sysfs.c | |||
| @@ -771,6 +771,12 @@ store_state_field(struct device *dev, struct device_attribute *attr, | |||
| 771 | 771 | ||
| 772 | mutex_lock(&sdev->state_mutex); | 772 | mutex_lock(&sdev->state_mutex); |
| 773 | ret = scsi_device_set_state(sdev, state); | 773 | ret = scsi_device_set_state(sdev, state); |
| 774 | /* | ||
| 775 | * If the device state changes to SDEV_RUNNING, we need to run | ||
| 776 | * the queue to avoid I/O hang. | ||
| 777 | */ | ||
| 778 | if (ret == 0 && state == SDEV_RUNNING) | ||
| 779 | blk_mq_run_hw_queues(sdev->request_queue, true); | ||
| 774 | mutex_unlock(&sdev->state_mutex); | 780 | mutex_unlock(&sdev->state_mutex); |
| 775 | 781 | ||
| 776 | return ret == 0 ? count : -EINVAL; | 782 | return ret == 0 ? count : -EINVAL; |
diff --git a/drivers/scsi/scsi_transport_iscsi.c b/drivers/scsi/scsi_transport_iscsi.c index 0508831d6fb9..0a82e93566dc 100644 --- a/drivers/scsi/scsi_transport_iscsi.c +++ b/drivers/scsi/scsi_transport_iscsi.c | |||
| @@ -2200,6 +2200,8 @@ void iscsi_remove_session(struct iscsi_cls_session *session) | |||
| 2200 | scsi_target_unblock(&session->dev, SDEV_TRANSPORT_OFFLINE); | 2200 | scsi_target_unblock(&session->dev, SDEV_TRANSPORT_OFFLINE); |
| 2201 | /* flush running scans then delete devices */ | 2201 | /* flush running scans then delete devices */ |
| 2202 | flush_work(&session->scan_work); | 2202 | flush_work(&session->scan_work); |
| 2203 | /* flush running unbind operations */ | ||
| 2204 | flush_work(&session->unbind_work); | ||
| 2203 | __iscsi_unbind_session(&session->unbind_work); | 2205 | __iscsi_unbind_session(&session->unbind_work); |
| 2204 | 2206 | ||
| 2205 | /* hw iscsi may not have removed all connections from session */ | 2207 | /* hw iscsi may not have removed all connections from session */ |
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c index 251db30d0882..2b2bc4b49d78 100644 --- a/drivers/scsi/sd.c +++ b/drivers/scsi/sd.c | |||
| @@ -1415,11 +1415,6 @@ static void sd_release(struct gendisk *disk, fmode_t mode) | |||
| 1415 | scsi_set_medium_removal(sdev, SCSI_REMOVAL_ALLOW); | 1415 | scsi_set_medium_removal(sdev, SCSI_REMOVAL_ALLOW); |
| 1416 | } | 1416 | } |
| 1417 | 1417 | ||
| 1418 | /* | ||
| 1419 | * XXX and what if there are packets in flight and this close() | ||
| 1420 | * XXX is followed by a "rmmod sd_mod"? | ||
| 1421 | */ | ||
| 1422 | |||
| 1423 | scsi_disk_put(sdkp); | 1418 | scsi_disk_put(sdkp); |
| 1424 | } | 1419 | } |
| 1425 | 1420 | ||
| @@ -3076,6 +3071,9 @@ static bool sd_validate_opt_xfer_size(struct scsi_disk *sdkp, | |||
| 3076 | unsigned int opt_xfer_bytes = | 3071 | unsigned int opt_xfer_bytes = |
| 3077 | logical_to_bytes(sdp, sdkp->opt_xfer_blocks); | 3072 | logical_to_bytes(sdp, sdkp->opt_xfer_blocks); |
| 3078 | 3073 | ||
| 3074 | if (sdkp->opt_xfer_blocks == 0) | ||
| 3075 | return false; | ||
| 3076 | |||
| 3079 | if (sdkp->opt_xfer_blocks > dev_max) { | 3077 | if (sdkp->opt_xfer_blocks > dev_max) { |
| 3080 | sd_first_printk(KERN_WARNING, sdkp, | 3078 | sd_first_printk(KERN_WARNING, sdkp, |
| 3081 | "Optimal transfer size %u logical blocks " \ | 3079 | "Optimal transfer size %u logical blocks " \ |
| @@ -3505,9 +3503,21 @@ static void scsi_disk_release(struct device *dev) | |||
| 3505 | { | 3503 | { |
| 3506 | struct scsi_disk *sdkp = to_scsi_disk(dev); | 3504 | struct scsi_disk *sdkp = to_scsi_disk(dev); |
| 3507 | struct gendisk *disk = sdkp->disk; | 3505 | struct gendisk *disk = sdkp->disk; |
| 3508 | 3506 | struct request_queue *q = disk->queue; | |
| 3507 | |||
| 3509 | ida_free(&sd_index_ida, sdkp->index); | 3508 | ida_free(&sd_index_ida, sdkp->index); |
| 3510 | 3509 | ||
| 3510 | /* | ||
| 3511 | * Wait until all requests that are in progress have completed. | ||
| 3512 | * This is necessary to avoid that e.g. scsi_end_request() crashes | ||
| 3513 | * due to clearing the disk->private_data pointer. Wait from inside | ||
| 3514 | * scsi_disk_release() instead of from sd_release() to avoid that | ||
| 3515 | * freezing and unfreezing the request queue affects user space I/O | ||
| 3516 | * in case multiple processes open a /dev/sd... node concurrently. | ||
| 3517 | */ | ||
| 3518 | blk_mq_freeze_queue(q); | ||
| 3519 | blk_mq_unfreeze_queue(q); | ||
| 3520 | |||
| 3511 | disk->private_data = NULL; | 3521 | disk->private_data = NULL; |
| 3512 | put_disk(disk); | 3522 | put_disk(disk); |
| 3513 | put_device(&sdkp->device->sdev_gendev); | 3523 | put_device(&sdkp->device->sdev_gendev); |
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index c07b4a85253f..b750a88547c7 100644 --- a/drivers/soc/Kconfig +++ b/drivers/soc/Kconfig | |||
| @@ -2,6 +2,7 @@ menu "SOC (System On Chip) specific Drivers" | |||
| 2 | 2 | ||
| 3 | source "drivers/soc/actions/Kconfig" | 3 | source "drivers/soc/actions/Kconfig" |
| 4 | source "drivers/soc/amlogic/Kconfig" | 4 | source "drivers/soc/amlogic/Kconfig" |
| 5 | source "drivers/soc/aspeed/Kconfig" | ||
| 5 | source "drivers/soc/atmel/Kconfig" | 6 | source "drivers/soc/atmel/Kconfig" |
| 6 | source "drivers/soc/bcm/Kconfig" | 7 | source "drivers/soc/bcm/Kconfig" |
| 7 | source "drivers/soc/fsl/Kconfig" | 8 | source "drivers/soc/fsl/Kconfig" |
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 90b686e586c6..814128fe479f 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile | |||
| @@ -4,6 +4,7 @@ | |||
| 4 | # | 4 | # |
| 5 | 5 | ||
| 6 | obj-$(CONFIG_ARCH_ACTIONS) += actions/ | 6 | obj-$(CONFIG_ARCH_ACTIONS) += actions/ |
| 7 | obj-$(CONFIG_ARCH_ASPEED) += aspeed/ | ||
| 7 | obj-$(CONFIG_ARCH_AT91) += atmel/ | 8 | obj-$(CONFIG_ARCH_AT91) += atmel/ |
| 8 | obj-y += bcm/ | 9 | obj-y += bcm/ |
| 9 | obj-$(CONFIG_ARCH_DOVE) += dove/ | 10 | obj-$(CONFIG_ARCH_DOVE) += dove/ |
diff --git a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c index 6289965c42e9..511b6856225d 100644 --- a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c +++ b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c | |||
| @@ -11,6 +11,7 @@ | |||
| 11 | #include <linux/bitfield.h> | 11 | #include <linux/bitfield.h> |
| 12 | #include <linux/regmap.h> | 12 | #include <linux/regmap.h> |
| 13 | #include <linux/mfd/syscon.h> | 13 | #include <linux/mfd/syscon.h> |
| 14 | #include <linux/of_device.h> | ||
| 14 | #include <linux/reset.h> | 15 | #include <linux/reset.h> |
| 15 | #include <linux/clk.h> | 16 | #include <linux/clk.h> |
| 16 | 17 | ||
| @@ -26,6 +27,7 @@ | |||
| 26 | #define HHI_MEM_PD_REG0 (0x40 << 2) | 27 | #define HHI_MEM_PD_REG0 (0x40 << 2) |
| 27 | #define HHI_VPU_MEM_PD_REG0 (0x41 << 2) | 28 | #define HHI_VPU_MEM_PD_REG0 (0x41 << 2) |
| 28 | #define HHI_VPU_MEM_PD_REG1 (0x42 << 2) | 29 | #define HHI_VPU_MEM_PD_REG1 (0x42 << 2) |
| 30 | #define HHI_VPU_MEM_PD_REG2 (0x4d << 2) | ||
| 29 | 31 | ||
| 30 | struct meson_gx_pwrc_vpu { | 32 | struct meson_gx_pwrc_vpu { |
| 31 | struct generic_pm_domain genpd; | 33 | struct generic_pm_domain genpd; |
| @@ -54,12 +56,55 @@ static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd) | |||
| 54 | /* Power Down Memories */ | 56 | /* Power Down Memories */ |
| 55 | for (i = 0; i < 32; i += 2) { | 57 | for (i = 0; i < 32; i += 2) { |
| 56 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, | 58 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, |
| 57 | 0x2 << i, 0x3 << i); | 59 | 0x3 << i, 0x3 << i); |
| 58 | udelay(5); | 60 | udelay(5); |
| 59 | } | 61 | } |
| 60 | for (i = 0; i < 32; i += 2) { | 62 | for (i = 0; i < 32; i += 2) { |
| 61 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, | 63 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, |
| 62 | 0x2 << i, 0x3 << i); | 64 | 0x3 << i, 0x3 << i); |
| 65 | udelay(5); | ||
| 66 | } | ||
| 67 | for (i = 8; i < 16; i++) { | ||
| 68 | regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, | ||
| 69 | BIT(i), BIT(i)); | ||
| 70 | udelay(5); | ||
| 71 | } | ||
| 72 | udelay(20); | ||
| 73 | |||
| 74 | regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, | ||
| 75 | GEN_PWR_VPU_HDMI, GEN_PWR_VPU_HDMI); | ||
| 76 | |||
| 77 | msleep(20); | ||
| 78 | |||
| 79 | clk_disable_unprepare(pd->vpu_clk); | ||
| 80 | clk_disable_unprepare(pd->vapb_clk); | ||
| 81 | |||
| 82 | return 0; | ||
| 83 | } | ||
| 84 | |||
| 85 | static int meson_g12a_pwrc_vpu_power_off(struct generic_pm_domain *genpd) | ||
| 86 | { | ||
| 87 | struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd); | ||
| 88 | int i; | ||
| 89 | |||
| 90 | regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, | ||
| 91 | GEN_PWR_VPU_HDMI_ISO, GEN_PWR_VPU_HDMI_ISO); | ||
| 92 | udelay(20); | ||
| 93 | |||
| 94 | /* Power Down Memories */ | ||
| 95 | for (i = 0; i < 32; i += 2) { | ||
| 96 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, | ||
| 97 | 0x3 << i, 0x3 << i); | ||
| 98 | udelay(5); | ||
| 99 | } | ||
| 100 | for (i = 0; i < 32; i += 2) { | ||
| 101 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, | ||
| 102 | 0x3 << i, 0x3 << i); | ||
| 103 | udelay(5); | ||
| 104 | } | ||
| 105 | for (i = 0; i < 32; i += 2) { | ||
| 106 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG2, | ||
| 107 | 0x3 << i, 0x3 << i); | ||
| 63 | udelay(5); | 108 | udelay(5); |
| 64 | } | 109 | } |
| 65 | for (i = 8; i < 16; i++) { | 110 | for (i = 8; i < 16; i++) { |
| @@ -108,13 +153,67 @@ static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd) | |||
| 108 | /* Power Up Memories */ | 153 | /* Power Up Memories */ |
| 109 | for (i = 0; i < 32; i += 2) { | 154 | for (i = 0; i < 32; i += 2) { |
| 110 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, | 155 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, |
| 111 | 0x2 << i, 0); | 156 | 0x3 << i, 0); |
| 157 | udelay(5); | ||
| 158 | } | ||
| 159 | |||
| 160 | for (i = 0; i < 32; i += 2) { | ||
| 161 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, | ||
| 162 | 0x3 << i, 0); | ||
| 163 | udelay(5); | ||
| 164 | } | ||
| 165 | |||
| 166 | for (i = 8; i < 16; i++) { | ||
| 167 | regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, | ||
| 168 | BIT(i), 0); | ||
| 169 | udelay(5); | ||
| 170 | } | ||
| 171 | udelay(20); | ||
| 172 | |||
| 173 | ret = reset_control_assert(pd->rstc); | ||
| 174 | if (ret) | ||
| 175 | return ret; | ||
| 176 | |||
| 177 | regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, | ||
| 178 | GEN_PWR_VPU_HDMI_ISO, 0); | ||
| 179 | |||
| 180 | ret = reset_control_deassert(pd->rstc); | ||
| 181 | if (ret) | ||
| 182 | return ret; | ||
| 183 | |||
| 184 | ret = meson_gx_pwrc_vpu_setup_clk(pd); | ||
| 185 | if (ret) | ||
| 186 | return ret; | ||
| 187 | |||
| 188 | return 0; | ||
| 189 | } | ||
| 190 | |||
| 191 | static int meson_g12a_pwrc_vpu_power_on(struct generic_pm_domain *genpd) | ||
| 192 | { | ||
| 193 | struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd); | ||
| 194 | int ret; | ||
| 195 | int i; | ||
| 196 | |||
| 197 | regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, | ||
| 198 | GEN_PWR_VPU_HDMI, 0); | ||
| 199 | udelay(20); | ||
| 200 | |||
| 201 | /* Power Up Memories */ | ||
| 202 | for (i = 0; i < 32; i += 2) { | ||
| 203 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0, | ||
| 204 | 0x3 << i, 0); | ||
| 112 | udelay(5); | 205 | udelay(5); |
| 113 | } | 206 | } |
| 114 | 207 | ||
| 115 | for (i = 0; i < 32; i += 2) { | 208 | for (i = 0; i < 32; i += 2) { |
| 116 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, | 209 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1, |
| 117 | 0x2 << i, 0); | 210 | 0x3 << i, 0); |
| 211 | udelay(5); | ||
| 212 | } | ||
| 213 | |||
| 214 | for (i = 0; i < 32; i += 2) { | ||
| 215 | regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG2, | ||
| 216 | 0x3 << i, 0); | ||
| 118 | udelay(5); | 217 | udelay(5); |
| 119 | } | 218 | } |
| 120 | 219 | ||
| @@ -160,15 +259,37 @@ static struct meson_gx_pwrc_vpu vpu_hdmi_pd = { | |||
| 160 | }, | 259 | }, |
| 161 | }; | 260 | }; |
| 162 | 261 | ||
| 262 | static struct meson_gx_pwrc_vpu vpu_hdmi_pd_g12a = { | ||
| 263 | .genpd = { | ||
| 264 | .name = "vpu_hdmi", | ||
| 265 | .power_off = meson_g12a_pwrc_vpu_power_off, | ||
| 266 | .power_on = meson_g12a_pwrc_vpu_power_on, | ||
| 267 | }, | ||
| 268 | }; | ||
| 269 | |||
| 163 | static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev) | 270 | static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev) |
| 164 | { | 271 | { |
| 272 | const struct meson_gx_pwrc_vpu *vpu_pd_match; | ||
| 165 | struct regmap *regmap_ao, *regmap_hhi; | 273 | struct regmap *regmap_ao, *regmap_hhi; |
| 274 | struct meson_gx_pwrc_vpu *vpu_pd; | ||
| 166 | struct reset_control *rstc; | 275 | struct reset_control *rstc; |
| 167 | struct clk *vpu_clk; | 276 | struct clk *vpu_clk; |
| 168 | struct clk *vapb_clk; | 277 | struct clk *vapb_clk; |
| 169 | bool powered_off; | 278 | bool powered_off; |
| 170 | int ret; | 279 | int ret; |
| 171 | 280 | ||
| 281 | vpu_pd_match = of_device_get_match_data(&pdev->dev); | ||
| 282 | if (!vpu_pd_match) { | ||
| 283 | dev_err(&pdev->dev, "failed to get match data\n"); | ||
| 284 | return -ENODEV; | ||
| 285 | } | ||
| 286 | |||
| 287 | vpu_pd = devm_kzalloc(&pdev->dev, sizeof(*vpu_pd), GFP_KERNEL); | ||
| 288 | if (!vpu_pd) | ||
| 289 | return -ENOMEM; | ||
| 290 | |||
| 291 | memcpy(vpu_pd, vpu_pd_match, sizeof(*vpu_pd)); | ||
| 292 | |||
| 172 | regmap_ao = syscon_node_to_regmap(of_get_parent(pdev->dev.of_node)); | 293 | regmap_ao = syscon_node_to_regmap(of_get_parent(pdev->dev.of_node)); |
| 173 | if (IS_ERR(regmap_ao)) { | 294 | if (IS_ERR(regmap_ao)) { |
| 174 | dev_err(&pdev->dev, "failed to get regmap\n"); | 295 | dev_err(&pdev->dev, "failed to get regmap\n"); |
| @@ -201,39 +322,46 @@ static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev) | |||
| 201 | return PTR_ERR(vapb_clk); | 322 | return PTR_ERR(vapb_clk); |
| 202 | } | 323 | } |
| 203 | 324 | ||
| 204 | vpu_hdmi_pd.regmap_ao = regmap_ao; | 325 | vpu_pd->regmap_ao = regmap_ao; |
| 205 | vpu_hdmi_pd.regmap_hhi = regmap_hhi; | 326 | vpu_pd->regmap_hhi = regmap_hhi; |
| 206 | vpu_hdmi_pd.rstc = rstc; | 327 | vpu_pd->rstc = rstc; |
| 207 | vpu_hdmi_pd.vpu_clk = vpu_clk; | 328 | vpu_pd->vpu_clk = vpu_clk; |
| 208 | vpu_hdmi_pd.vapb_clk = vapb_clk; | 329 | vpu_pd->vapb_clk = vapb_clk; |
| 330 | |||
| 331 | platform_set_drvdata(pdev, vpu_pd); | ||
| 209 | 332 | ||
| 210 | powered_off = meson_gx_pwrc_vpu_get_power(&vpu_hdmi_pd); | 333 | powered_off = meson_gx_pwrc_vpu_get_power(vpu_pd); |
| 211 | 334 | ||
| 212 | /* If already powered, sync the clock states */ | 335 | /* If already powered, sync the clock states */ |
| 213 | if (!powered_off) { | 336 | if (!powered_off) { |
| 214 | ret = meson_gx_pwrc_vpu_setup_clk(&vpu_hdmi_pd); | 337 | ret = meson_gx_pwrc_vpu_setup_clk(vpu_pd); |
| 215 | if (ret) | 338 | if (ret) |
| 216 | return ret; | 339 | return ret; |
| 217 | } | 340 | } |
| 218 | 341 | ||
| 219 | pm_genpd_init(&vpu_hdmi_pd.genpd, &pm_domain_always_on_gov, | 342 | pm_genpd_init(&vpu_pd->genpd, &pm_domain_always_on_gov, |
| 220 | powered_off); | 343 | powered_off); |
| 221 | 344 | ||
| 222 | return of_genpd_add_provider_simple(pdev->dev.of_node, | 345 | return of_genpd_add_provider_simple(pdev->dev.of_node, |
| 223 | &vpu_hdmi_pd.genpd); | 346 | &vpu_pd->genpd); |
| 224 | } | 347 | } |
| 225 | 348 | ||
| 226 | static void meson_gx_pwrc_vpu_shutdown(struct platform_device *pdev) | 349 | static void meson_gx_pwrc_vpu_shutdown(struct platform_device *pdev) |
| 227 | { | 350 | { |
| 351 | struct meson_gx_pwrc_vpu *vpu_pd = platform_get_drvdata(pdev); | ||
| 228 | bool powered_off; | 352 | bool powered_off; |
| 229 | 353 | ||
| 230 | powered_off = meson_gx_pwrc_vpu_get_power(&vpu_hdmi_pd); | 354 | powered_off = meson_gx_pwrc_vpu_get_power(vpu_pd); |
| 231 | if (!powered_off) | 355 | if (!powered_off) |
| 232 | meson_gx_pwrc_vpu_power_off(&vpu_hdmi_pd.genpd); | 356 | vpu_pd->genpd.power_off(&vpu_pd->genpd); |
| 233 | } | 357 | } |
| 234 | 358 | ||
| 235 | static const struct of_device_id meson_gx_pwrc_vpu_match_table[] = { | 359 | static const struct of_device_id meson_gx_pwrc_vpu_match_table[] = { |
| 236 | { .compatible = "amlogic,meson-gx-pwrc-vpu" }, | 360 | { .compatible = "amlogic,meson-gx-pwrc-vpu", .data = &vpu_hdmi_pd }, |
| 361 | { | ||
| 362 | .compatible = "amlogic,meson-g12a-pwrc-vpu", | ||
| 363 | .data = &vpu_hdmi_pd_g12a | ||
| 364 | }, | ||
| 237 | { /* sentinel */ } | 365 | { /* sentinel */ } |
| 238 | }; | 366 | }; |
| 239 | 367 | ||
diff --git a/drivers/soc/amlogic/meson-gx-socinfo.c b/drivers/soc/amlogic/meson-gx-socinfo.c index 37ea0a1c24c8..bca34954518e 100644 --- a/drivers/soc/amlogic/meson-gx-socinfo.c +++ b/drivers/soc/amlogic/meson-gx-socinfo.c | |||
| @@ -37,26 +37,34 @@ static const struct meson_gx_soc_id { | |||
| 37 | { "AXG", 0x25 }, | 37 | { "AXG", 0x25 }, |
| 38 | { "GXLX", 0x26 }, | 38 | { "GXLX", 0x26 }, |
| 39 | { "TXHD", 0x27 }, | 39 | { "TXHD", 0x27 }, |
| 40 | { "G12A", 0x28 }, | ||
| 41 | { "G12B", 0x29 }, | ||
| 40 | }; | 42 | }; |
| 41 | 43 | ||
| 42 | static const struct meson_gx_package_id { | 44 | static const struct meson_gx_package_id { |
| 43 | const char *name; | 45 | const char *name; |
| 44 | unsigned int major_id; | 46 | unsigned int major_id; |
| 45 | unsigned int pack_id; | 47 | unsigned int pack_id; |
| 48 | unsigned int pack_mask; | ||
| 46 | } soc_packages[] = { | 49 | } soc_packages[] = { |
| 47 | { "S905", 0x1f, 0 }, | 50 | { "S905", 0x1f, 0, 0x20 }, /* pack_id != 0x20 */ |
| 48 | { "S905H", 0x1f, 0x13 }, | 51 | { "S905H", 0x1f, 0x3, 0xf }, /* pack_id & 0xf == 0x3 */ |
| 49 | { "S905M", 0x1f, 0x20 }, | 52 | { "S905M", 0x1f, 0x20, 0xf0 }, /* pack_id == 0x20 */ |
| 50 | { "S905D", 0x21, 0 }, | 53 | { "S905D", 0x21, 0, 0xf0 }, |
| 51 | { "S905X", 0x21, 0x80 }, | 54 | { "S905X", 0x21, 0x80, 0xf0 }, |
| 52 | { "S905W", 0x21, 0xa0 }, | 55 | { "S905W", 0x21, 0xa0, 0xf0 }, |
| 53 | { "S905L", 0x21, 0xc0 }, | 56 | { "S905L", 0x21, 0xc0, 0xf0 }, |
| 54 | { "S905M2", 0x21, 0xe0 }, | 57 | { "S905M2", 0x21, 0xe0, 0xf0 }, |
| 55 | { "S912", 0x22, 0 }, | 58 | { "S805X", 0x21, 0x30, 0xf0 }, |
| 56 | { "962X", 0x24, 0x10 }, | 59 | { "S805Y", 0x21, 0xb0, 0xf0 }, |
| 57 | { "962E", 0x24, 0x20 }, | 60 | { "S912", 0x22, 0, 0x0 }, /* Only S912 is known for GXM */ |
| 58 | { "A113X", 0x25, 0x37 }, | 61 | { "962X", 0x24, 0x10, 0xf0 }, |
| 59 | { "A113D", 0x25, 0x22 }, | 62 | { "962E", 0x24, 0x20, 0xf0 }, |
| 63 | { "A113X", 0x25, 0x37, 0xff }, | ||
| 64 | { "A113D", 0x25, 0x22, 0xff }, | ||
| 65 | { "S905D2", 0x28, 0x10, 0xf0 }, | ||
| 66 | { "S905X2", 0x28, 0x40, 0xf0 }, | ||
| 67 | { "S922X", 0x29, 0x40, 0xf0 }, | ||
| 60 | }; | 68 | }; |
| 61 | 69 | ||
| 62 | static inline unsigned int socinfo_to_major(u32 socinfo) | 70 | static inline unsigned int socinfo_to_major(u32 socinfo) |
| @@ -81,13 +89,14 @@ static inline unsigned int socinfo_to_misc(u32 socinfo) | |||
| 81 | 89 | ||
| 82 | static const char *socinfo_to_package_id(u32 socinfo) | 90 | static const char *socinfo_to_package_id(u32 socinfo) |
| 83 | { | 91 | { |
| 84 | unsigned int pack = socinfo_to_pack(socinfo) & 0xf0; | 92 | unsigned int pack = socinfo_to_pack(socinfo); |
| 85 | unsigned int major = socinfo_to_major(socinfo); | 93 | unsigned int major = socinfo_to_major(socinfo); |
| 86 | int i; | 94 | int i; |
| 87 | 95 | ||
| 88 | for (i = 0 ; i < ARRAY_SIZE(soc_packages) ; ++i) { | 96 | for (i = 0 ; i < ARRAY_SIZE(soc_packages) ; ++i) { |
| 89 | if (soc_packages[i].major_id == major && | 97 | if (soc_packages[i].major_id == major && |
| 90 | soc_packages[i].pack_id == pack) | 98 | soc_packages[i].pack_id == |
| 99 | (pack & soc_packages[i].pack_mask)) | ||
| 91 | return soc_packages[i].name; | 100 | return soc_packages[i].name; |
| 92 | } | 101 | } |
| 93 | 102 | ||
| @@ -123,8 +132,10 @@ static int __init meson_gx_socinfo_init(void) | |||
| 123 | return -ENODEV; | 132 | return -ENODEV; |
| 124 | 133 | ||
| 125 | /* check if interface is enabled */ | 134 | /* check if interface is enabled */ |
| 126 | if (!of_device_is_available(np)) | 135 | if (!of_device_is_available(np)) { |
| 136 | of_node_put(np); | ||
| 127 | return -ENODEV; | 137 | return -ENODEV; |
| 138 | } | ||
| 128 | 139 | ||
| 129 | /* check if chip-id is available */ | 140 | /* check if chip-id is available */ |
| 130 | if (!of_property_read_bool(np, "amlogic,has-chip-id")) | 141 | if (!of_property_read_bool(np, "amlogic,has-chip-id")) |
diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig new file mode 100644 index 000000000000..457282cd1da5 --- /dev/null +++ b/drivers/soc/aspeed/Kconfig | |||
| @@ -0,0 +1,19 @@ | |||
| 1 | menu "Aspeed SoC drivers" | ||
| 2 | |||
| 3 | config ASPEED_LPC_CTRL | ||
| 4 | depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON | ||
| 5 | tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control" | ||
| 6 | ---help--- | ||
| 7 | Control Aspeed ast2400/2500 HOST LPC to BMC mappings through | ||
| 8 | ioctl()s, the driver also provides a read/write interface to a BMC ram | ||
| 9 | region where the host LPC read/write region can be buffered. | ||
| 10 | |||
| 11 | config ASPEED_LPC_SNOOP | ||
| 12 | tristate "Aspeed ast2500 HOST LPC snoop support" | ||
| 13 | depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON | ||
| 14 | help | ||
| 15 | Provides a driver to control the LPC snoop interface which | ||
| 16 | allows the BMC to listen on and save the data written by | ||
| 17 | the host to an arbitrary LPC I/O port. | ||
| 18 | |||
| 19 | |||
diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile new file mode 100644 index 000000000000..cfaa9adc67b5 --- /dev/null +++ b/drivers/soc/aspeed/Makefile | |||
| @@ -0,0 +1,2 @@ | |||
| 1 | obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o | ||
| 2 | obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o | ||
diff --git a/drivers/misc/aspeed-lpc-ctrl.c b/drivers/soc/aspeed/aspeed-lpc-ctrl.c index a024f8042259..a024f8042259 100644 --- a/drivers/misc/aspeed-lpc-ctrl.c +++ b/drivers/soc/aspeed/aspeed-lpc-ctrl.c | |||
diff --git a/drivers/misc/aspeed-lpc-snoop.c b/drivers/soc/aspeed/aspeed-lpc-snoop.c index 2feb4347d67f..2feb4347d67f 100644 --- a/drivers/misc/aspeed-lpc-snoop.c +++ b/drivers/soc/aspeed/aspeed-lpc-snoop.c | |||
diff --git a/drivers/soc/bcm/bcm2835-power.c b/drivers/soc/bcm/bcm2835-power.c index 9351349cf0a9..1e0041ec8132 100644 --- a/drivers/soc/bcm/bcm2835-power.c +++ b/drivers/soc/bcm/bcm2835-power.c | |||
| @@ -150,7 +150,12 @@ struct bcm2835_power { | |||
| 150 | 150 | ||
| 151 | static int bcm2835_asb_enable(struct bcm2835_power *power, u32 reg) | 151 | static int bcm2835_asb_enable(struct bcm2835_power *power, u32 reg) |
| 152 | { | 152 | { |
| 153 | u64 start = ktime_get_ns(); | 153 | u64 start; |
| 154 | |||
| 155 | if (!reg) | ||
| 156 | return 0; | ||
| 157 | |||
| 158 | start = ktime_get_ns(); | ||
| 154 | 159 | ||
| 155 | /* Enable the module's async AXI bridges. */ | 160 | /* Enable the module's async AXI bridges. */ |
| 156 | ASB_WRITE(reg, ASB_READ(reg) & ~ASB_REQ_STOP); | 161 | ASB_WRITE(reg, ASB_READ(reg) & ~ASB_REQ_STOP); |
| @@ -165,7 +170,12 @@ static int bcm2835_asb_enable(struct bcm2835_power *power, u32 reg) | |||
| 165 | 170 | ||
| 166 | static int bcm2835_asb_disable(struct bcm2835_power *power, u32 reg) | 171 | static int bcm2835_asb_disable(struct bcm2835_power *power, u32 reg) |
| 167 | { | 172 | { |
| 168 | u64 start = ktime_get_ns(); | 173 | u64 start; |
| 174 | |||
| 175 | if (!reg) | ||
| 176 | return 0; | ||
| 177 | |||
| 178 | start = ktime_get_ns(); | ||
| 169 | 179 | ||
| 170 | /* Enable the module's async AXI bridges. */ | 180 | /* Enable the module's async AXI bridges. */ |
| 171 | ASB_WRITE(reg, ASB_READ(reg) | ASB_REQ_STOP); | 181 | ASB_WRITE(reg, ASB_READ(reg) | ASB_REQ_STOP); |
| @@ -475,7 +485,7 @@ static int bcm2835_power_pd_power_off(struct generic_pm_domain *domain) | |||
| 475 | } | 485 | } |
| 476 | } | 486 | } |
| 477 | 487 | ||
| 478 | static void | 488 | static int |
| 479 | bcm2835_init_power_domain(struct bcm2835_power *power, | 489 | bcm2835_init_power_domain(struct bcm2835_power *power, |
| 480 | int pd_xlate_index, const char *name) | 490 | int pd_xlate_index, const char *name) |
| 481 | { | 491 | { |
| @@ -483,6 +493,17 @@ bcm2835_init_power_domain(struct bcm2835_power *power, | |||
| 483 | struct bcm2835_power_domain *dom = &power->domains[pd_xlate_index]; | 493 | struct bcm2835_power_domain *dom = &power->domains[pd_xlate_index]; |
| 484 | 494 | ||
| 485 | dom->clk = devm_clk_get(dev->parent, name); | 495 | dom->clk = devm_clk_get(dev->parent, name); |
| 496 | if (IS_ERR(dom->clk)) { | ||
| 497 | int ret = PTR_ERR(dom->clk); | ||
| 498 | |||
| 499 | if (ret == -EPROBE_DEFER) | ||
| 500 | return ret; | ||
| 501 | |||
| 502 | /* Some domains don't have a clk, so make sure that we | ||
| 503 | * don't deref an error pointer later. | ||
| 504 | */ | ||
| 505 | dom->clk = NULL; | ||
| 506 | } | ||
| 486 | 507 | ||
| 487 | dom->base.name = name; | 508 | dom->base.name = name; |
| 488 | dom->base.power_on = bcm2835_power_pd_power_on; | 509 | dom->base.power_on = bcm2835_power_pd_power_on; |
| @@ -495,6 +516,8 @@ bcm2835_init_power_domain(struct bcm2835_power *power, | |||
| 495 | pm_genpd_init(&dom->base, NULL, true); | 516 | pm_genpd_init(&dom->base, NULL, true); |
| 496 | 517 | ||
| 497 | power->pd_xlate.domains[pd_xlate_index] = &dom->base; | 518 | power->pd_xlate.domains[pd_xlate_index] = &dom->base; |
| 519 | |||
| 520 | return 0; | ||
| 498 | } | 521 | } |
| 499 | 522 | ||
| 500 | /** bcm2835_reset_reset - Resets a block that has a reset line in the | 523 | /** bcm2835_reset_reset - Resets a block that has a reset line in the |
| @@ -592,7 +615,7 @@ static int bcm2835_power_probe(struct platform_device *pdev) | |||
| 592 | { BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM0 }, | 615 | { BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM0 }, |
| 593 | { BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM1 }, | 616 | { BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM1 }, |
| 594 | }; | 617 | }; |
| 595 | int ret, i; | 618 | int ret = 0, i; |
| 596 | u32 id; | 619 | u32 id; |
| 597 | 620 | ||
| 598 | power = devm_kzalloc(dev, sizeof(*power), GFP_KERNEL); | 621 | power = devm_kzalloc(dev, sizeof(*power), GFP_KERNEL); |
| @@ -619,8 +642,11 @@ static int bcm2835_power_probe(struct platform_device *pdev) | |||
| 619 | 642 | ||
| 620 | power->pd_xlate.num_domains = ARRAY_SIZE(power_domain_names); | 643 | power->pd_xlate.num_domains = ARRAY_SIZE(power_domain_names); |
| 621 | 644 | ||
| 622 | for (i = 0; i < ARRAY_SIZE(power_domain_names); i++) | 645 | for (i = 0; i < ARRAY_SIZE(power_domain_names); i++) { |
| 623 | bcm2835_init_power_domain(power, i, power_domain_names[i]); | 646 | ret = bcm2835_init_power_domain(power, i, power_domain_names[i]); |
| 647 | if (ret) | ||
| 648 | goto fail; | ||
| 649 | } | ||
| 624 | 650 | ||
| 625 | for (i = 0; i < ARRAY_SIZE(domain_deps); i++) { | 651 | for (i = 0; i < ARRAY_SIZE(domain_deps); i++) { |
| 626 | pm_genpd_add_subdomain(&power->domains[domain_deps[i].parent].base, | 652 | pm_genpd_add_subdomain(&power->domains[domain_deps[i].parent].base, |
| @@ -634,12 +660,21 @@ static int bcm2835_power_probe(struct platform_device *pdev) | |||
| 634 | 660 | ||
| 635 | ret = devm_reset_controller_register(dev, &power->reset); | 661 | ret = devm_reset_controller_register(dev, &power->reset); |
| 636 | if (ret) | 662 | if (ret) |
| 637 | return ret; | 663 | goto fail; |
| 638 | 664 | ||
| 639 | of_genpd_add_provider_onecell(dev->parent->of_node, &power->pd_xlate); | 665 | of_genpd_add_provider_onecell(dev->parent->of_node, &power->pd_xlate); |
| 640 | 666 | ||
| 641 | dev_info(dev, "Broadcom BCM2835 power domains driver"); | 667 | dev_info(dev, "Broadcom BCM2835 power domains driver"); |
| 642 | return 0; | 668 | return 0; |
| 669 | |||
| 670 | fail: | ||
| 671 | for (i = 0; i < ARRAY_SIZE(power_domain_names); i++) { | ||
| 672 | struct generic_pm_domain *dom = &power->domains[i].base; | ||
| 673 | |||
| 674 | if (dom->name) | ||
| 675 | pm_genpd_remove(dom); | ||
| 676 | } | ||
| 677 | return ret; | ||
| 643 | } | 678 | } |
| 644 | 679 | ||
| 645 | static int bcm2835_power_remove(struct platform_device *pdev) | 680 | static int bcm2835_power_remove(struct platform_device *pdev) |
diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile index 506a6f3c2b9b..d6b529e06d9a 100644 --- a/drivers/soc/imx/Makefile +++ b/drivers/soc/imx/Makefile | |||
| @@ -1,2 +1,3 @@ | |||
| 1 | obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o | 1 | obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o |
| 2 | obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o | 2 | obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o |
| 3 | obj-$(CONFIG_ARCH_MXC) += soc-imx8.o | ||
diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c index 7d14a4b4e82a..a8f1e47ce698 100644 --- a/drivers/soc/imx/gpc.c +++ b/drivers/soc/imx/gpc.c | |||
| @@ -406,7 +406,6 @@ static int imx_gpc_probe(struct platform_device *pdev) | |||
| 406 | const struct imx_gpc_dt_data *of_id_data = of_id->data; | 406 | const struct imx_gpc_dt_data *of_id_data = of_id->data; |
| 407 | struct device_node *pgc_node; | 407 | struct device_node *pgc_node; |
| 408 | struct regmap *regmap; | 408 | struct regmap *regmap; |
| 409 | struct resource *res; | ||
| 410 | void __iomem *base; | 409 | void __iomem *base; |
| 411 | int ret; | 410 | int ret; |
| 412 | 411 | ||
| @@ -417,8 +416,7 @@ static int imx_gpc_probe(struct platform_device *pdev) | |||
| 417 | !pgc_node) | 416 | !pgc_node) |
| 418 | return 0; | 417 | return 0; |
| 419 | 418 | ||
| 420 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 419 | base = devm_platform_ioremap_resource(pdev, 0); |
| 421 | base = devm_ioremap_resource(&pdev->dev, res); | ||
| 422 | if (IS_ERR(base)) | 420 | if (IS_ERR(base)) |
| 423 | return PTR_ERR(base); | 421 | return PTR_ERR(base); |
| 424 | 422 | ||
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 176f473127b6..31b8d002d855 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c | |||
| @@ -136,8 +136,8 @@ static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd, | |||
| 136 | GPC_PU_PGC_SW_PUP_REQ : GPC_PU_PGC_SW_PDN_REQ; | 136 | GPC_PU_PGC_SW_PUP_REQ : GPC_PU_PGC_SW_PDN_REQ; |
| 137 | const bool enable_power_control = !on; | 137 | const bool enable_power_control = !on; |
| 138 | const bool has_regulator = !IS_ERR(domain->regulator); | 138 | const bool has_regulator = !IS_ERR(domain->regulator); |
| 139 | unsigned long deadline; | ||
| 140 | int i, ret = 0; | 139 | int i, ret = 0; |
| 140 | u32 pxx_req; | ||
| 141 | 141 | ||
| 142 | regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, | 142 | regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, |
| 143 | domain->bits.map, domain->bits.map); | 143 | domain->bits.map, domain->bits.map); |
| @@ -169,30 +169,19 @@ static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd, | |||
| 169 | * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait | 169 | * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait |
| 170 | * for PUP_REQ/PDN_REQ bit to be cleared | 170 | * for PUP_REQ/PDN_REQ bit to be cleared |
| 171 | */ | 171 | */ |
| 172 | deadline = jiffies + msecs_to_jiffies(1); | 172 | ret = regmap_read_poll_timeout(domain->regmap, offset, pxx_req, |
| 173 | while (true) { | 173 | !(pxx_req & domain->bits.pxx), |
| 174 | u32 pxx_req; | 174 | 0, USEC_PER_MSEC); |
| 175 | 175 | if (ret) { | |
| 176 | regmap_read(domain->regmap, offset, &pxx_req); | 176 | dev_err(domain->dev, "failed to command PGC\n"); |
| 177 | 177 | /* | |
| 178 | if (!(pxx_req & domain->bits.pxx)) | 178 | * If we were in a process of enabling a |
| 179 | break; | 179 | * domain and failed we might as well disable |
| 180 | 180 | * the regulator we just enabled. And if it | |
| 181 | if (time_after(jiffies, deadline)) { | 181 | * was the opposite situation and we failed to |
| 182 | dev_err(domain->dev, "falied to command PGC\n"); | 182 | * power down -- keep the regulator on |
| 183 | ret = -ETIMEDOUT; | 183 | */ |
| 184 | /* | 184 | on = !on; |
| 185 | * If we were in a process of enabling a | ||
| 186 | * domain and failed we might as well disable | ||
| 187 | * the regulator we just enabled. And if it | ||
| 188 | * was the opposite situation and we failed to | ||
| 189 | * power down -- keep the regulator on | ||
| 190 | */ | ||
| 191 | on = !on; | ||
| 192 | break; | ||
| 193 | } | ||
| 194 | |||
| 195 | cpu_relax(); | ||
| 196 | } | 185 | } |
| 197 | 186 | ||
| 198 | if (enable_power_control) | 187 | if (enable_power_control) |
| @@ -574,7 +563,6 @@ static int imx_gpcv2_probe(struct platform_device *pdev) | |||
| 574 | struct device *dev = &pdev->dev; | 563 | struct device *dev = &pdev->dev; |
| 575 | struct device_node *pgc_np, *np; | 564 | struct device_node *pgc_np, *np; |
| 576 | struct regmap *regmap; | 565 | struct regmap *regmap; |
| 577 | struct resource *res; | ||
| 578 | void __iomem *base; | 566 | void __iomem *base; |
| 579 | int ret; | 567 | int ret; |
| 580 | 568 | ||
| @@ -584,8 +572,7 @@ static int imx_gpcv2_probe(struct platform_device *pdev) | |||
| 584 | return -EINVAL; | 572 | return -EINVAL; |
| 585 | } | 573 | } |
| 586 | 574 | ||
| 587 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 575 | base = devm_platform_ioremap_resource(pdev, 0); |
| 588 | base = devm_ioremap_resource(dev, res); | ||
| 589 | if (IS_ERR(base)) | 576 | if (IS_ERR(base)) |
| 590 | return PTR_ERR(base); | 577 | return PTR_ERR(base); |
| 591 | 578 | ||
diff --git a/drivers/soc/imx/soc-imx8.c b/drivers/soc/imx/soc-imx8.c new file mode 100644 index 000000000000..fc6429f9170a --- /dev/null +++ b/drivers/soc/imx/soc-imx8.c | |||
| @@ -0,0 +1,115 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | /* | ||
| 3 | * Copyright 2019 NXP. | ||
| 4 | */ | ||
| 5 | |||
| 6 | #include <linux/init.h> | ||
| 7 | #include <linux/io.h> | ||
| 8 | #include <linux/of_address.h> | ||
| 9 | #include <linux/slab.h> | ||
| 10 | #include <linux/sys_soc.h> | ||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/of.h> | ||
| 13 | |||
| 14 | #define REV_B1 0x21 | ||
| 15 | |||
| 16 | #define IMX8MQ_SW_INFO_B1 0x40 | ||
| 17 | #define IMX8MQ_SW_MAGIC_B1 0xff0055aa | ||
| 18 | |||
| 19 | struct imx8_soc_data { | ||
| 20 | char *name; | ||
| 21 | u32 (*soc_revision)(void); | ||
| 22 | }; | ||
| 23 | |||
| 24 | static u32 __init imx8mq_soc_revision(void) | ||
| 25 | { | ||
| 26 | struct device_node *np; | ||
| 27 | void __iomem *ocotp_base; | ||
| 28 | u32 magic; | ||
| 29 | u32 rev = 0; | ||
| 30 | |||
| 31 | np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp"); | ||
| 32 | if (!np) | ||
| 33 | goto out; | ||
| 34 | |||
| 35 | ocotp_base = of_iomap(np, 0); | ||
| 36 | WARN_ON(!ocotp_base); | ||
| 37 | |||
| 38 | magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1); | ||
| 39 | if (magic == IMX8MQ_SW_MAGIC_B1) | ||
| 40 | rev = REV_B1; | ||
| 41 | |||
| 42 | iounmap(ocotp_base); | ||
| 43 | |||
| 44 | out: | ||
| 45 | of_node_put(np); | ||
| 46 | return rev; | ||
| 47 | } | ||
| 48 | |||
| 49 | static const struct imx8_soc_data imx8mq_soc_data = { | ||
| 50 | .name = "i.MX8MQ", | ||
| 51 | .soc_revision = imx8mq_soc_revision, | ||
| 52 | }; | ||
| 53 | |||
| 54 | static const struct of_device_id imx8_soc_match[] = { | ||
| 55 | { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, }, | ||
| 56 | { } | ||
| 57 | }; | ||
| 58 | |||
| 59 | #define imx8_revision(soc_rev) \ | ||
| 60 | soc_rev ? \ | ||
| 61 | kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf, soc_rev & 0xf) : \ | ||
| 62 | "unknown" | ||
| 63 | |||
| 64 | static int __init imx8_soc_init(void) | ||
| 65 | { | ||
| 66 | struct soc_device_attribute *soc_dev_attr; | ||
| 67 | struct soc_device *soc_dev; | ||
| 68 | struct device_node *root; | ||
| 69 | const struct of_device_id *id; | ||
| 70 | u32 soc_rev = 0; | ||
| 71 | const struct imx8_soc_data *data; | ||
| 72 | int ret; | ||
| 73 | |||
| 74 | soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); | ||
| 75 | if (!soc_dev_attr) | ||
| 76 | return -ENODEV; | ||
| 77 | |||
| 78 | soc_dev_attr->family = "Freescale i.MX"; | ||
| 79 | |||
| 80 | root = of_find_node_by_path("/"); | ||
| 81 | ret = of_property_read_string(root, "model", &soc_dev_attr->machine); | ||
| 82 | if (ret) | ||
| 83 | goto free_soc; | ||
| 84 | |||
| 85 | id = of_match_node(imx8_soc_match, root); | ||
| 86 | if (!id) | ||
| 87 | goto free_soc; | ||
| 88 | |||
| 89 | of_node_put(root); | ||
| 90 | |||
| 91 | data = id->data; | ||
| 92 | if (data) { | ||
| 93 | soc_dev_attr->soc_id = data->name; | ||
| 94 | if (data->soc_revision) | ||
| 95 | soc_rev = data->soc_revision(); | ||
| 96 | } | ||
| 97 | |||
| 98 | soc_dev_attr->revision = imx8_revision(soc_rev); | ||
| 99 | if (!soc_dev_attr->revision) | ||
| 100 | goto free_soc; | ||
| 101 | |||
| 102 | soc_dev = soc_device_register(soc_dev_attr); | ||
| 103 | if (IS_ERR(soc_dev)) | ||
| 104 | goto free_rev; | ||
| 105 | |||
| 106 | return 0; | ||
| 107 | |||
| 108 | free_rev: | ||
| 109 | kfree(soc_dev_attr->revision); | ||
| 110 | free_soc: | ||
| 111 | kfree(soc_dev_attr); | ||
| 112 | of_node_put(root); | ||
| 113 | return -ENODEV; | ||
| 114 | } | ||
| 115 | device_initcall(imx8_soc_init); | ||
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index 8236a6c87e19..c4449a163991 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c | |||
| @@ -381,6 +381,10 @@ enum pwrap_regs { | |||
| 381 | PWRAP_EXT_GPS_AUXADC_RDATA_ADDR, | 381 | PWRAP_EXT_GPS_AUXADC_RDATA_ADDR, |
| 382 | PWRAP_GPSINF_0_STA, | 382 | PWRAP_GPSINF_0_STA, |
| 383 | PWRAP_GPSINF_1_STA, | 383 | PWRAP_GPSINF_1_STA, |
| 384 | |||
| 385 | /* MT8516 only regs */ | ||
| 386 | PWRAP_OP_TYPE, | ||
| 387 | PWRAP_MSB_FIRST, | ||
| 384 | }; | 388 | }; |
| 385 | 389 | ||
| 386 | static int mt2701_regs[] = { | 390 | static int mt2701_regs[] = { |
| @@ -852,6 +856,91 @@ static int mt8183_regs[] = { | |||
| 852 | [PWRAP_WACS2_VLDCLR] = 0xC28, | 856 | [PWRAP_WACS2_VLDCLR] = 0xC28, |
| 853 | }; | 857 | }; |
| 854 | 858 | ||
| 859 | static int mt8516_regs[] = { | ||
| 860 | [PWRAP_MUX_SEL] = 0x0, | ||
| 861 | [PWRAP_WRAP_EN] = 0x4, | ||
| 862 | [PWRAP_DIO_EN] = 0x8, | ||
| 863 | [PWRAP_SIDLY] = 0xc, | ||
| 864 | [PWRAP_RDDMY] = 0x10, | ||
| 865 | [PWRAP_SI_CK_CON] = 0x14, | ||
| 866 | [PWRAP_CSHEXT_WRITE] = 0x18, | ||
| 867 | [PWRAP_CSHEXT_READ] = 0x1c, | ||
| 868 | [PWRAP_CSLEXT_START] = 0x20, | ||
| 869 | [PWRAP_CSLEXT_END] = 0x24, | ||
| 870 | [PWRAP_STAUPD_PRD] = 0x28, | ||
| 871 | [PWRAP_STAUPD_GRPEN] = 0x2c, | ||
| 872 | [PWRAP_STAUPD_MAN_TRIG] = 0x40, | ||
| 873 | [PWRAP_STAUPD_STA] = 0x44, | ||
| 874 | [PWRAP_WRAP_STA] = 0x48, | ||
| 875 | [PWRAP_HARB_INIT] = 0x4c, | ||
| 876 | [PWRAP_HARB_HPRIO] = 0x50, | ||
| 877 | [PWRAP_HIPRIO_ARB_EN] = 0x54, | ||
| 878 | [PWRAP_HARB_STA0] = 0x58, | ||
| 879 | [PWRAP_HARB_STA1] = 0x5c, | ||
| 880 | [PWRAP_MAN_EN] = 0x60, | ||
| 881 | [PWRAP_MAN_CMD] = 0x64, | ||
| 882 | [PWRAP_MAN_RDATA] = 0x68, | ||
| 883 | [PWRAP_MAN_VLDCLR] = 0x6c, | ||
| 884 | [PWRAP_WACS0_EN] = 0x70, | ||
| 885 | [PWRAP_INIT_DONE0] = 0x74, | ||
| 886 | [PWRAP_WACS0_CMD] = 0x78, | ||
| 887 | [PWRAP_WACS0_RDATA] = 0x7c, | ||
| 888 | [PWRAP_WACS0_VLDCLR] = 0x80, | ||
| 889 | [PWRAP_WACS1_EN] = 0x84, | ||
| 890 | [PWRAP_INIT_DONE1] = 0x88, | ||
| 891 | [PWRAP_WACS1_CMD] = 0x8c, | ||
| 892 | [PWRAP_WACS1_RDATA] = 0x90, | ||
| 893 | [PWRAP_WACS1_VLDCLR] = 0x94, | ||
| 894 | [PWRAP_WACS2_EN] = 0x98, | ||
| 895 | [PWRAP_INIT_DONE2] = 0x9c, | ||
| 896 | [PWRAP_WACS2_CMD] = 0xa0, | ||
| 897 | [PWRAP_WACS2_RDATA] = 0xa4, | ||
| 898 | [PWRAP_WACS2_VLDCLR] = 0xa8, | ||
| 899 | [PWRAP_INT_EN] = 0xac, | ||
| 900 | [PWRAP_INT_FLG_RAW] = 0xb0, | ||
| 901 | [PWRAP_INT_FLG] = 0xb4, | ||
| 902 | [PWRAP_INT_CLR] = 0xb8, | ||
| 903 | [PWRAP_SIG_ADR] = 0xbc, | ||
| 904 | [PWRAP_SIG_MODE] = 0xc0, | ||
| 905 | [PWRAP_SIG_VALUE] = 0xc4, | ||
| 906 | [PWRAP_SIG_ERRVAL] = 0xc8, | ||
| 907 | [PWRAP_CRC_EN] = 0xcc, | ||
| 908 | [PWRAP_TIMER_EN] = 0xd0, | ||
| 909 | [PWRAP_TIMER_STA] = 0xd4, | ||
| 910 | [PWRAP_WDT_UNIT] = 0xd8, | ||
| 911 | [PWRAP_WDT_SRC_EN] = 0xdc, | ||
| 912 | [PWRAP_WDT_FLG] = 0xe0, | ||
| 913 | [PWRAP_DEBUG_INT_SEL] = 0xe4, | ||
| 914 | [PWRAP_DVFS_ADR0] = 0xe8, | ||
| 915 | [PWRAP_DVFS_WDATA0] = 0xec, | ||
| 916 | [PWRAP_DVFS_ADR1] = 0xf0, | ||
| 917 | [PWRAP_DVFS_WDATA1] = 0xf4, | ||
| 918 | [PWRAP_DVFS_ADR2] = 0xf8, | ||
| 919 | [PWRAP_DVFS_WDATA2] = 0xfc, | ||
| 920 | [PWRAP_DVFS_ADR3] = 0x100, | ||
| 921 | [PWRAP_DVFS_WDATA3] = 0x104, | ||
| 922 | [PWRAP_DVFS_ADR4] = 0x108, | ||
| 923 | [PWRAP_DVFS_WDATA4] = 0x10c, | ||
| 924 | [PWRAP_DVFS_ADR5] = 0x110, | ||
| 925 | [PWRAP_DVFS_WDATA5] = 0x114, | ||
| 926 | [PWRAP_DVFS_ADR6] = 0x118, | ||
| 927 | [PWRAP_DVFS_WDATA6] = 0x11c, | ||
| 928 | [PWRAP_DVFS_ADR7] = 0x120, | ||
| 929 | [PWRAP_DVFS_WDATA7] = 0x124, | ||
| 930 | [PWRAP_SPMINF_STA] = 0x128, | ||
| 931 | [PWRAP_CIPHER_KEY_SEL] = 0x12c, | ||
| 932 | [PWRAP_CIPHER_IV_SEL] = 0x130, | ||
| 933 | [PWRAP_CIPHER_EN] = 0x134, | ||
| 934 | [PWRAP_CIPHER_RDY] = 0x138, | ||
| 935 | [PWRAP_CIPHER_MODE] = 0x13c, | ||
| 936 | [PWRAP_CIPHER_SWRST] = 0x140, | ||
| 937 | [PWRAP_DCM_EN] = 0x144, | ||
| 938 | [PWRAP_DCM_DBC_PRD] = 0x148, | ||
| 939 | [PWRAP_SW_RST] = 0x168, | ||
| 940 | [PWRAP_OP_TYPE] = 0x16c, | ||
| 941 | [PWRAP_MSB_FIRST] = 0x170, | ||
| 942 | }; | ||
| 943 | |||
| 855 | enum pmic_type { | 944 | enum pmic_type { |
| 856 | PMIC_MT6323, | 945 | PMIC_MT6323, |
| 857 | PMIC_MT6351, | 946 | PMIC_MT6351, |
| @@ -869,6 +958,7 @@ enum pwrap_type { | |||
| 869 | PWRAP_MT8135, | 958 | PWRAP_MT8135, |
| 870 | PWRAP_MT8173, | 959 | PWRAP_MT8173, |
| 871 | PWRAP_MT8183, | 960 | PWRAP_MT8183, |
| 961 | PWRAP_MT8516, | ||
| 872 | }; | 962 | }; |
| 873 | 963 | ||
| 874 | struct pmic_wrapper; | 964 | struct pmic_wrapper; |
| @@ -1281,7 +1371,7 @@ static bool pwrap_is_pmic_cipher_ready(struct pmic_wrapper *wrp) | |||
| 1281 | static int pwrap_init_cipher(struct pmic_wrapper *wrp) | 1371 | static int pwrap_init_cipher(struct pmic_wrapper *wrp) |
| 1282 | { | 1372 | { |
| 1283 | int ret; | 1373 | int ret; |
| 1284 | u32 rdata; | 1374 | u32 rdata = 0; |
| 1285 | 1375 | ||
| 1286 | pwrap_writel(wrp, 0x1, PWRAP_CIPHER_SWRST); | 1376 | pwrap_writel(wrp, 0x1, PWRAP_CIPHER_SWRST); |
| 1287 | pwrap_writel(wrp, 0x0, PWRAP_CIPHER_SWRST); | 1377 | pwrap_writel(wrp, 0x0, PWRAP_CIPHER_SWRST); |
| @@ -1297,6 +1387,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp) | |||
| 1297 | case PWRAP_MT6765: | 1387 | case PWRAP_MT6765: |
| 1298 | case PWRAP_MT6797: | 1388 | case PWRAP_MT6797: |
| 1299 | case PWRAP_MT8173: | 1389 | case PWRAP_MT8173: |
| 1390 | case PWRAP_MT8516: | ||
| 1300 | pwrap_writel(wrp, 1, PWRAP_CIPHER_EN); | 1391 | pwrap_writel(wrp, 1, PWRAP_CIPHER_EN); |
| 1301 | break; | 1392 | break; |
| 1302 | case PWRAP_MT7622: | 1393 | case PWRAP_MT7622: |
| @@ -1478,7 +1569,8 @@ static int pwrap_init(struct pmic_wrapper *wrp) | |||
| 1478 | { | 1569 | { |
| 1479 | int ret; | 1570 | int ret; |
| 1480 | 1571 | ||
| 1481 | reset_control_reset(wrp->rstc); | 1572 | if (wrp->rstc) |
| 1573 | reset_control_reset(wrp->rstc); | ||
| 1482 | if (wrp->rstc_bridge) | 1574 | if (wrp->rstc_bridge) |
| 1483 | reset_control_reset(wrp->rstc_bridge); | 1575 | reset_control_reset(wrp->rstc_bridge); |
| 1484 | 1576 | ||
| @@ -1764,6 +1856,18 @@ static const struct pmic_wrapper_type pwrap_mt8183 = { | |||
| 1764 | .init_soc_specific = pwrap_mt8183_init_soc_specific, | 1856 | .init_soc_specific = pwrap_mt8183_init_soc_specific, |
| 1765 | }; | 1857 | }; |
| 1766 | 1858 | ||
| 1859 | static struct pmic_wrapper_type pwrap_mt8516 = { | ||
| 1860 | .regs = mt8516_regs, | ||
| 1861 | .type = PWRAP_MT8516, | ||
| 1862 | .arb_en_all = 0xff, | ||
| 1863 | .int_en_all = ~(u32)(BIT(31) | BIT(2)), | ||
| 1864 | .spi_w = PWRAP_MAN_CMD_SPI_WRITE, | ||
| 1865 | .wdt_src = PWRAP_WDT_SRC_MASK_ALL, | ||
| 1866 | .caps = PWRAP_CAP_DCM, | ||
| 1867 | .init_reg_clock = pwrap_mt2701_init_reg_clock, | ||
| 1868 | .init_soc_specific = NULL, | ||
| 1869 | }; | ||
| 1870 | |||
| 1767 | static const struct of_device_id of_pwrap_match_tbl[] = { | 1871 | static const struct of_device_id of_pwrap_match_tbl[] = { |
| 1768 | { | 1872 | { |
| 1769 | .compatible = "mediatek,mt2701-pwrap", | 1873 | .compatible = "mediatek,mt2701-pwrap", |
| @@ -1787,6 +1891,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = { | |||
| 1787 | .compatible = "mediatek,mt8183-pwrap", | 1891 | .compatible = "mediatek,mt8183-pwrap", |
| 1788 | .data = &pwrap_mt8183, | 1892 | .data = &pwrap_mt8183, |
| 1789 | }, { | 1893 | }, { |
| 1894 | .compatible = "mediatek,mt8516-pwrap", | ||
| 1895 | .data = &pwrap_mt8516, | ||
| 1896 | }, { | ||
| 1790 | /* sentinel */ | 1897 | /* sentinel */ |
| 1791 | } | 1898 | } |
| 1792 | }; | 1899 | }; |
diff --git a/drivers/soc/qcom/cmd-db.c b/drivers/soc/qcom/cmd-db.c index c701b3b010f1..f6c3d17b05c7 100644 --- a/drivers/soc/qcom/cmd-db.c +++ b/drivers/soc/qcom/cmd-db.c | |||
| @@ -248,8 +248,8 @@ static int cmd_db_dev_probe(struct platform_device *pdev) | |||
| 248 | } | 248 | } |
| 249 | 249 | ||
| 250 | cmd_db_header = memremap(rmem->base, rmem->size, MEMREMAP_WB); | 250 | cmd_db_header = memremap(rmem->base, rmem->size, MEMREMAP_WB); |
| 251 | if (IS_ERR_OR_NULL(cmd_db_header)) { | 251 | if (!cmd_db_header) { |
| 252 | ret = PTR_ERR(cmd_db_header); | 252 | ret = -ENOMEM; |
| 253 | cmd_db_header = NULL; | 253 | cmd_db_header = NULL; |
| 254 | return ret; | 254 | return ret; |
| 255 | } | 255 | } |
diff --git a/drivers/soc/qcom/qmi_interface.c b/drivers/soc/qcom/qmi_interface.c index c239a28e503f..f9e309f0acd3 100644 --- a/drivers/soc/qcom/qmi_interface.c +++ b/drivers/soc/qcom/qmi_interface.c | |||
| @@ -345,8 +345,7 @@ int qmi_txn_wait(struct qmi_txn *txn, unsigned long timeout) | |||
| 345 | struct qmi_handle *qmi = txn->qmi; | 345 | struct qmi_handle *qmi = txn->qmi; |
| 346 | int ret; | 346 | int ret; |
| 347 | 347 | ||
| 348 | ret = wait_for_completion_interruptible_timeout(&txn->completion, | 348 | ret = wait_for_completion_timeout(&txn->completion, timeout); |
| 349 | timeout); | ||
| 350 | 349 | ||
| 351 | mutex_lock(&qmi->txn_lock); | 350 | mutex_lock(&qmi->txn_lock); |
| 352 | mutex_lock(&txn->lock); | 351 | mutex_lock(&txn->lock); |
| @@ -354,9 +353,7 @@ int qmi_txn_wait(struct qmi_txn *txn, unsigned long timeout) | |||
| 354 | mutex_unlock(&txn->lock); | 353 | mutex_unlock(&txn->lock); |
| 355 | mutex_unlock(&qmi->txn_lock); | 354 | mutex_unlock(&qmi->txn_lock); |
| 356 | 355 | ||
| 357 | if (ret < 0) | 356 | if (ret == 0) |
| 358 | return ret; | ||
| 359 | else if (ret == 0) | ||
| 360 | return -ETIMEDOUT; | 357 | return -ETIMEDOUT; |
| 361 | else | 358 | else |
| 362 | return txn->result; | 359 | return txn->result; |
diff --git a/drivers/soc/qcom/rmtfs_mem.c b/drivers/soc/qcom/rmtfs_mem.c index 7200d762a951..6f5e8be9689c 100644 --- a/drivers/soc/qcom/rmtfs_mem.c +++ b/drivers/soc/qcom/rmtfs_mem.c | |||
| @@ -137,6 +137,26 @@ static struct class rmtfs_class = { | |||
| 137 | .name = "rmtfs", | 137 | .name = "rmtfs", |
| 138 | }; | 138 | }; |
| 139 | 139 | ||
| 140 | static int qcom_rmtfs_mem_mmap(struct file *filep, struct vm_area_struct *vma) | ||
| 141 | { | ||
| 142 | struct qcom_rmtfs_mem *rmtfs_mem = filep->private_data; | ||
| 143 | |||
| 144 | if (vma->vm_end - vma->vm_start > rmtfs_mem->size) { | ||
| 145 | dev_dbg(&rmtfs_mem->dev, | ||
| 146 | "vm_end[%lu] - vm_start[%lu] [%lu] > mem->size[%pa]\n", | ||
| 147 | vma->vm_end, vma->vm_start, | ||
| 148 | (vma->vm_end - vma->vm_start), &rmtfs_mem->size); | ||
| 149 | return -EINVAL; | ||
| 150 | } | ||
| 151 | |||
| 152 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); | ||
| 153 | return remap_pfn_range(vma, | ||
| 154 | vma->vm_start, | ||
| 155 | rmtfs_mem->addr >> PAGE_SHIFT, | ||
| 156 | vma->vm_end - vma->vm_start, | ||
| 157 | vma->vm_page_prot); | ||
| 158 | } | ||
| 159 | |||
| 140 | static const struct file_operations qcom_rmtfs_mem_fops = { | 160 | static const struct file_operations qcom_rmtfs_mem_fops = { |
| 141 | .owner = THIS_MODULE, | 161 | .owner = THIS_MODULE, |
| 142 | .open = qcom_rmtfs_mem_open, | 162 | .open = qcom_rmtfs_mem_open, |
| @@ -144,6 +164,7 @@ static const struct file_operations qcom_rmtfs_mem_fops = { | |||
| 144 | .write = qcom_rmtfs_mem_write, | 164 | .write = qcom_rmtfs_mem_write, |
| 145 | .release = qcom_rmtfs_mem_release, | 165 | .release = qcom_rmtfs_mem_release, |
| 146 | .llseek = default_llseek, | 166 | .llseek = default_llseek, |
| 167 | .mmap = qcom_rmtfs_mem_mmap, | ||
| 147 | }; | 168 | }; |
| 148 | 169 | ||
| 149 | static void qcom_rmtfs_mem_release_device(struct device *dev) | 170 | static void qcom_rmtfs_mem_release_device(struct device *dev) |
diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c index 75bd9a83aef0..e278fc11fe5c 100644 --- a/drivers/soc/qcom/rpmh-rsc.c +++ b/drivers/soc/qcom/rpmh-rsc.c | |||
| @@ -459,7 +459,7 @@ static int find_slots(struct tcs_group *tcs, const struct tcs_request *msg, | |||
| 459 | do { | 459 | do { |
| 460 | slot = bitmap_find_next_zero_area(tcs->slots, MAX_TCS_SLOTS, | 460 | slot = bitmap_find_next_zero_area(tcs->slots, MAX_TCS_SLOTS, |
| 461 | i, msg->num_cmds, 0); | 461 | i, msg->num_cmds, 0); |
| 462 | if (slot == tcs->num_tcs * tcs->ncpt) | 462 | if (slot >= tcs->num_tcs * tcs->ncpt) |
| 463 | return -ENOMEM; | 463 | return -ENOMEM; |
| 464 | i += tcs->ncpt; | 464 | i += tcs->ncpt; |
| 465 | } while (slot + msg->num_cmds - 1 >= i); | 465 | } while (slot + msg->num_cmds - 1 >= i); |
diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesas-soc.c index 4af96e668a2f..3299cf5365f3 100644 --- a/drivers/soc/renesas/renesas-soc.c +++ b/drivers/soc/renesas/renesas-soc.c | |||
| @@ -335,6 +335,9 @@ static int __init renesas_soc_init(void) | |||
| 335 | /* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */ | 335 | /* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */ |
| 336 | if ((product & 0x7fff) == 0x5210) | 336 | if ((product & 0x7fff) == 0x5210) |
| 337 | product ^= 0x11; | 337 | product ^= 0x11; |
| 338 | /* R-Car M3-W ES1.3 incorrectly identifies as ES2.1 */ | ||
| 339 | if ((product & 0x7fff) == 0x5211) | ||
| 340 | product ^= 0x12; | ||
| 338 | if (soc->id && ((product >> 8) & 0xff) != soc->id) { | 341 | if (soc->id && ((product >> 8) & 0xff) != soc->id) { |
| 339 | pr_warn("SoC mismatch (product = 0x%x)\n", product); | 342 | pr_warn("SoC mismatch (product = 0x%x)\n", product); |
| 340 | return -ENODEV; | 343 | return -ENODEV; |
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 0df258518693..5648e5c09ef5 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c | |||
| @@ -272,6 +272,14 @@ static const char * const tegra30_reset_sources[] = { | |||
| 272 | "WATCHDOG", | 272 | "WATCHDOG", |
| 273 | "SENSOR", | 273 | "SENSOR", |
| 274 | "SW_MAIN", | 274 | "SW_MAIN", |
| 275 | "LP0" | ||
| 276 | }; | ||
| 277 | |||
| 278 | static const char * const tegra210_reset_sources[] = { | ||
| 279 | "POWER_ON_RESET", | ||
| 280 | "WATCHDOG", | ||
| 281 | "SENSOR", | ||
| 282 | "SW_MAIN", | ||
| 275 | "LP0", | 283 | "LP0", |
| 276 | "AOTAG" | 284 | "AOTAG" |
| 277 | }; | 285 | }; |
| @@ -656,10 +664,15 @@ static int tegra_genpd_power_on(struct generic_pm_domain *domain) | |||
| 656 | int err; | 664 | int err; |
| 657 | 665 | ||
| 658 | err = tegra_powergate_power_up(pg, true); | 666 | err = tegra_powergate_power_up(pg, true); |
| 659 | if (err) | 667 | if (err) { |
| 660 | dev_err(dev, "failed to turn on PM domain %s: %d\n", | 668 | dev_err(dev, "failed to turn on PM domain %s: %d\n", |
| 661 | pg->genpd.name, err); | 669 | pg->genpd.name, err); |
| 670 | goto out; | ||
| 671 | } | ||
| 672 | |||
| 673 | reset_control_release(pg->reset); | ||
| 662 | 674 | ||
| 675 | out: | ||
| 663 | return err; | 676 | return err; |
| 664 | } | 677 | } |
| 665 | 678 | ||
| @@ -669,10 +682,18 @@ static int tegra_genpd_power_off(struct generic_pm_domain *domain) | |||
| 669 | struct device *dev = pg->pmc->dev; | 682 | struct device *dev = pg->pmc->dev; |
| 670 | int err; | 683 | int err; |
| 671 | 684 | ||
| 685 | err = reset_control_acquire(pg->reset); | ||
| 686 | if (err < 0) { | ||
| 687 | pr_err("failed to acquire resets: %d\n", err); | ||
| 688 | return err; | ||
| 689 | } | ||
| 690 | |||
| 672 | err = tegra_powergate_power_down(pg); | 691 | err = tegra_powergate_power_down(pg); |
| 673 | if (err) | 692 | if (err) { |
| 674 | dev_err(dev, "failed to turn off PM domain %s: %d\n", | 693 | dev_err(dev, "failed to turn off PM domain %s: %d\n", |
| 675 | pg->genpd.name, err); | 694 | pg->genpd.name, err); |
| 695 | reset_control_release(pg->reset); | ||
| 696 | } | ||
| 676 | 697 | ||
| 677 | return err; | 698 | return err; |
| 678 | } | 699 | } |
| @@ -937,38 +958,53 @@ static int tegra_powergate_of_get_resets(struct tegra_powergate *pg, | |||
| 937 | struct device *dev = pg->pmc->dev; | 958 | struct device *dev = pg->pmc->dev; |
| 938 | int err; | 959 | int err; |
| 939 | 960 | ||
| 940 | pg->reset = of_reset_control_array_get_exclusive(np); | 961 | pg->reset = of_reset_control_array_get_exclusive_released(np); |
| 941 | if (IS_ERR(pg->reset)) { | 962 | if (IS_ERR(pg->reset)) { |
| 942 | err = PTR_ERR(pg->reset); | 963 | err = PTR_ERR(pg->reset); |
| 943 | dev_err(dev, "failed to get device resets: %d\n", err); | 964 | dev_err(dev, "failed to get device resets: %d\n", err); |
| 944 | return err; | 965 | return err; |
| 945 | } | 966 | } |
| 946 | 967 | ||
| 947 | if (off) | 968 | err = reset_control_acquire(pg->reset); |
| 969 | if (err < 0) { | ||
| 970 | pr_err("failed to acquire resets: %d\n", err); | ||
| 971 | goto out; | ||
| 972 | } | ||
| 973 | |||
| 974 | if (off) { | ||
| 948 | err = reset_control_assert(pg->reset); | 975 | err = reset_control_assert(pg->reset); |
| 949 | else | 976 | } else { |
| 950 | err = reset_control_deassert(pg->reset); | 977 | err = reset_control_deassert(pg->reset); |
| 978 | if (err < 0) | ||
| 979 | goto out; | ||
| 951 | 980 | ||
| 952 | if (err) | 981 | reset_control_release(pg->reset); |
| 982 | } | ||
| 983 | |||
| 984 | out: | ||
| 985 | if (err) { | ||
| 986 | reset_control_release(pg->reset); | ||
| 953 | reset_control_put(pg->reset); | 987 | reset_control_put(pg->reset); |
| 988 | } | ||
| 954 | 989 | ||
| 955 | return err; | 990 | return err; |
| 956 | } | 991 | } |
| 957 | 992 | ||
| 958 | static void tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) | 993 | static int tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) |
| 959 | { | 994 | { |
| 960 | struct device *dev = pmc->dev; | 995 | struct device *dev = pmc->dev; |
| 961 | struct tegra_powergate *pg; | 996 | struct tegra_powergate *pg; |
| 962 | int id, err; | 997 | int id, err = 0; |
| 963 | bool off; | 998 | bool off; |
| 964 | 999 | ||
| 965 | pg = kzalloc(sizeof(*pg), GFP_KERNEL); | 1000 | pg = kzalloc(sizeof(*pg), GFP_KERNEL); |
| 966 | if (!pg) | 1001 | if (!pg) |
| 967 | return; | 1002 | return -ENOMEM; |
| 968 | 1003 | ||
| 969 | id = tegra_powergate_lookup(pmc, np->name); | 1004 | id = tegra_powergate_lookup(pmc, np->name); |
| 970 | if (id < 0) { | 1005 | if (id < 0) { |
| 971 | dev_err(dev, "powergate lookup failed for %pOFn: %d\n", np, id); | 1006 | dev_err(dev, "powergate lookup failed for %pOFn: %d\n", np, id); |
| 1007 | err = -ENODEV; | ||
| 972 | goto free_mem; | 1008 | goto free_mem; |
| 973 | } | 1009 | } |
| 974 | 1010 | ||
| @@ -1021,7 +1057,7 @@ static void tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np) | |||
| 1021 | 1057 | ||
| 1022 | dev_dbg(dev, "added PM domain %s\n", pg->genpd.name); | 1058 | dev_dbg(dev, "added PM domain %s\n", pg->genpd.name); |
| 1023 | 1059 | ||
| 1024 | return; | 1060 | return 0; |
| 1025 | 1061 | ||
| 1026 | remove_genpd: | 1062 | remove_genpd: |
| 1027 | pm_genpd_remove(&pg->genpd); | 1063 | pm_genpd_remove(&pg->genpd); |
| @@ -1040,25 +1076,67 @@ set_available: | |||
| 1040 | 1076 | ||
| 1041 | free_mem: | 1077 | free_mem: |
| 1042 | kfree(pg); | 1078 | kfree(pg); |
| 1079 | |||
| 1080 | return err; | ||
| 1043 | } | 1081 | } |
| 1044 | 1082 | ||
| 1045 | static void tegra_powergate_init(struct tegra_pmc *pmc, | 1083 | static int tegra_powergate_init(struct tegra_pmc *pmc, |
| 1046 | struct device_node *parent) | 1084 | struct device_node *parent) |
| 1047 | { | 1085 | { |
| 1048 | struct device_node *np, *child; | 1086 | struct device_node *np, *child; |
| 1049 | unsigned int i; | 1087 | int err = 0; |
| 1088 | |||
| 1089 | np = of_get_child_by_name(parent, "powergates"); | ||
| 1090 | if (!np) | ||
| 1091 | return 0; | ||
| 1092 | |||
| 1093 | for_each_child_of_node(np, child) { | ||
| 1094 | err = tegra_powergate_add(pmc, child); | ||
| 1095 | if (err < 0) { | ||
| 1096 | of_node_put(child); | ||
| 1097 | break; | ||
| 1098 | } | ||
| 1099 | } | ||
| 1100 | |||
| 1101 | of_node_put(np); | ||
| 1102 | |||
| 1103 | return err; | ||
| 1104 | } | ||
| 1105 | |||
| 1106 | static void tegra_powergate_remove(struct generic_pm_domain *genpd) | ||
| 1107 | { | ||
| 1108 | struct tegra_powergate *pg = to_powergate(genpd); | ||
| 1109 | |||
| 1110 | reset_control_put(pg->reset); | ||
| 1111 | |||
| 1112 | while (pg->num_clks--) | ||
| 1113 | clk_put(pg->clks[pg->num_clks]); | ||
| 1114 | |||
| 1115 | kfree(pg->clks); | ||
| 1050 | 1116 | ||
| 1051 | /* Create a bitmap of the available and valid partitions */ | 1117 | set_bit(pg->id, pmc->powergates_available); |
| 1052 | for (i = 0; i < pmc->soc->num_powergates; i++) | 1118 | |
| 1053 | if (pmc->soc->powergates[i]) | 1119 | kfree(pg); |
| 1054 | set_bit(i, pmc->powergates_available); | 1120 | } |
| 1121 | |||
| 1122 | static void tegra_powergate_remove_all(struct device_node *parent) | ||
| 1123 | { | ||
| 1124 | struct generic_pm_domain *genpd; | ||
| 1125 | struct device_node *np, *child; | ||
| 1055 | 1126 | ||
| 1056 | np = of_get_child_by_name(parent, "powergates"); | 1127 | np = of_get_child_by_name(parent, "powergates"); |
| 1057 | if (!np) | 1128 | if (!np) |
| 1058 | return; | 1129 | return; |
| 1059 | 1130 | ||
| 1060 | for_each_child_of_node(np, child) | 1131 | for_each_child_of_node(np, child) { |
| 1061 | tegra_powergate_add(pmc, child); | 1132 | of_genpd_del_provider(child); |
| 1133 | |||
| 1134 | genpd = of_genpd_remove_last(child); | ||
| 1135 | if (IS_ERR(genpd)) | ||
| 1136 | continue; | ||
| 1137 | |||
| 1138 | tegra_powergate_remove(genpd); | ||
| 1139 | } | ||
| 1062 | 1140 | ||
| 1063 | of_node_put(np); | 1141 | of_node_put(np); |
| 1064 | } | 1142 | } |
| @@ -1709,13 +1787,16 @@ static int tegra_pmc_pinctrl_init(struct tegra_pmc *pmc) | |||
| 1709 | static ssize_t reset_reason_show(struct device *dev, | 1787 | static ssize_t reset_reason_show(struct device *dev, |
| 1710 | struct device_attribute *attr, char *buf) | 1788 | struct device_attribute *attr, char *buf) |
| 1711 | { | 1789 | { |
| 1712 | u32 value, rst_src; | 1790 | u32 value; |
| 1713 | 1791 | ||
| 1714 | value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); | 1792 | value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); |
| 1715 | rst_src = (value & pmc->soc->regs->rst_source_mask) >> | 1793 | value &= pmc->soc->regs->rst_source_mask; |
| 1716 | pmc->soc->regs->rst_source_shift; | 1794 | value >>= pmc->soc->regs->rst_source_shift; |
| 1795 | |||
| 1796 | if (WARN_ON(value >= pmc->soc->num_reset_sources)) | ||
| 1797 | return sprintf(buf, "%s\n", "UNKNOWN"); | ||
| 1717 | 1798 | ||
| 1718 | return sprintf(buf, "%s\n", pmc->soc->reset_sources[rst_src]); | 1799 | return sprintf(buf, "%s\n", pmc->soc->reset_sources[value]); |
| 1719 | } | 1800 | } |
| 1720 | 1801 | ||
| 1721 | static DEVICE_ATTR_RO(reset_reason); | 1802 | static DEVICE_ATTR_RO(reset_reason); |
| @@ -1723,13 +1804,16 @@ static DEVICE_ATTR_RO(reset_reason); | |||
| 1723 | static ssize_t reset_level_show(struct device *dev, | 1804 | static ssize_t reset_level_show(struct device *dev, |
| 1724 | struct device_attribute *attr, char *buf) | 1805 | struct device_attribute *attr, char *buf) |
| 1725 | { | 1806 | { |
| 1726 | u32 value, rst_lvl; | 1807 | u32 value; |
| 1727 | 1808 | ||
| 1728 | value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); | 1809 | value = tegra_pmc_readl(pmc, pmc->soc->regs->rst_status); |
| 1729 | rst_lvl = (value & pmc->soc->regs->rst_level_mask) >> | 1810 | value &= pmc->soc->regs->rst_level_mask; |
| 1730 | pmc->soc->regs->rst_level_shift; | 1811 | value >>= pmc->soc->regs->rst_level_shift; |
| 1731 | 1812 | ||
| 1732 | return sprintf(buf, "%s\n", pmc->soc->reset_levels[rst_lvl]); | 1813 | if (WARN_ON(value >= pmc->soc->num_reset_levels)) |
| 1814 | return sprintf(buf, "%s\n", "UNKNOWN"); | ||
| 1815 | |||
| 1816 | return sprintf(buf, "%s\n", pmc->soc->reset_levels[value]); | ||
| 1733 | } | 1817 | } |
| 1734 | 1818 | ||
| 1735 | static DEVICE_ATTR_RO(reset_level); | 1819 | static DEVICE_ATTR_RO(reset_level); |
| @@ -1999,7 +2083,7 @@ static int tegra_pmc_probe(struct platform_device *pdev) | |||
| 1999 | if (IS_ENABLED(CONFIG_DEBUG_FS)) { | 2083 | if (IS_ENABLED(CONFIG_DEBUG_FS)) { |
| 2000 | err = tegra_powergate_debugfs_init(); | 2084 | err = tegra_powergate_debugfs_init(); |
| 2001 | if (err < 0) | 2085 | if (err < 0) |
| 2002 | return err; | 2086 | goto cleanup_sysfs; |
| 2003 | } | 2087 | } |
| 2004 | 2088 | ||
| 2005 | err = register_restart_handler(&tegra_pmc_restart_handler); | 2089 | err = register_restart_handler(&tegra_pmc_restart_handler); |
| @@ -2013,9 +2097,13 @@ static int tegra_pmc_probe(struct platform_device *pdev) | |||
| 2013 | if (err) | 2097 | if (err) |
| 2014 | goto cleanup_restart_handler; | 2098 | goto cleanup_restart_handler; |
| 2015 | 2099 | ||
| 2100 | err = tegra_powergate_init(pmc, pdev->dev.of_node); | ||
| 2101 | if (err < 0) | ||
| 2102 | goto cleanup_powergates; | ||
| 2103 | |||
| 2016 | err = tegra_pmc_irq_init(pmc); | 2104 | err = tegra_pmc_irq_init(pmc); |
| 2017 | if (err < 0) | 2105 | if (err < 0) |
| 2018 | goto cleanup_restart_handler; | 2106 | goto cleanup_powergates; |
| 2019 | 2107 | ||
| 2020 | mutex_lock(&pmc->powergates_lock); | 2108 | mutex_lock(&pmc->powergates_lock); |
| 2021 | iounmap(pmc->base); | 2109 | iounmap(pmc->base); |
| @@ -2026,10 +2114,15 @@ static int tegra_pmc_probe(struct platform_device *pdev) | |||
| 2026 | 2114 | ||
| 2027 | return 0; | 2115 | return 0; |
| 2028 | 2116 | ||
| 2117 | cleanup_powergates: | ||
| 2118 | tegra_powergate_remove_all(pdev->dev.of_node); | ||
| 2029 | cleanup_restart_handler: | 2119 | cleanup_restart_handler: |
| 2030 | unregister_restart_handler(&tegra_pmc_restart_handler); | 2120 | unregister_restart_handler(&tegra_pmc_restart_handler); |
| 2031 | cleanup_debugfs: | 2121 | cleanup_debugfs: |
| 2032 | debugfs_remove(pmc->debugfs); | 2122 | debugfs_remove(pmc->debugfs); |
| 2123 | cleanup_sysfs: | ||
| 2124 | device_remove_file(&pdev->dev, &dev_attr_reset_reason); | ||
| 2125 | device_remove_file(&pdev->dev, &dev_attr_reset_level); | ||
| 2033 | return err; | 2126 | return err; |
| 2034 | } | 2127 | } |
| 2035 | 2128 | ||
| @@ -2185,7 +2278,7 @@ static const struct tegra_pmc_soc tegra30_pmc_soc = { | |||
| 2185 | .init = tegra20_pmc_init, | 2278 | .init = tegra20_pmc_init, |
| 2186 | .setup_irq_polarity = tegra20_pmc_setup_irq_polarity, | 2279 | .setup_irq_polarity = tegra20_pmc_setup_irq_polarity, |
| 2187 | .reset_sources = tegra30_reset_sources, | 2280 | .reset_sources = tegra30_reset_sources, |
| 2188 | .num_reset_sources = 5, | 2281 | .num_reset_sources = ARRAY_SIZE(tegra30_reset_sources), |
| 2189 | .reset_levels = NULL, | 2282 | .reset_levels = NULL, |
| 2190 | .num_reset_levels = 0, | 2283 | .num_reset_levels = 0, |
| 2191 | }; | 2284 | }; |
| @@ -2236,7 +2329,7 @@ static const struct tegra_pmc_soc tegra114_pmc_soc = { | |||
| 2236 | .init = tegra20_pmc_init, | 2329 | .init = tegra20_pmc_init, |
| 2237 | .setup_irq_polarity = tegra20_pmc_setup_irq_polarity, | 2330 | .setup_irq_polarity = tegra20_pmc_setup_irq_polarity, |
| 2238 | .reset_sources = tegra30_reset_sources, | 2331 | .reset_sources = tegra30_reset_sources, |
| 2239 | .num_reset_sources = 5, | 2332 | .num_reset_sources = ARRAY_SIZE(tegra30_reset_sources), |
| 2240 | .reset_levels = NULL, | 2333 | .reset_levels = NULL, |
| 2241 | .num_reset_levels = 0, | 2334 | .num_reset_levels = 0, |
| 2242 | }; | 2335 | }; |
| @@ -2347,7 +2440,7 @@ static const struct tegra_pmc_soc tegra124_pmc_soc = { | |||
| 2347 | .init = tegra20_pmc_init, | 2440 | .init = tegra20_pmc_init, |
| 2348 | .setup_irq_polarity = tegra20_pmc_setup_irq_polarity, | 2441 | .setup_irq_polarity = tegra20_pmc_setup_irq_polarity, |
| 2349 | .reset_sources = tegra30_reset_sources, | 2442 | .reset_sources = tegra30_reset_sources, |
| 2350 | .num_reset_sources = 5, | 2443 | .num_reset_sources = ARRAY_SIZE(tegra30_reset_sources), |
| 2351 | .reset_levels = NULL, | 2444 | .reset_levels = NULL, |
| 2352 | .num_reset_levels = 0, | 2445 | .num_reset_levels = 0, |
| 2353 | }; | 2446 | }; |
| @@ -2452,8 +2545,8 @@ static const struct tegra_pmc_soc tegra210_pmc_soc = { | |||
| 2452 | .regs = &tegra20_pmc_regs, | 2545 | .regs = &tegra20_pmc_regs, |
| 2453 | .init = tegra20_pmc_init, | 2546 | .init = tegra20_pmc_init, |
| 2454 | .setup_irq_polarity = tegra20_pmc_setup_irq_polarity, | 2547 | .setup_irq_polarity = tegra20_pmc_setup_irq_polarity, |
| 2455 | .reset_sources = tegra30_reset_sources, | 2548 | .reset_sources = tegra210_reset_sources, |
| 2456 | .num_reset_sources = 5, | 2549 | .num_reset_sources = ARRAY_SIZE(tegra210_reset_sources), |
| 2457 | .reset_levels = NULL, | 2550 | .reset_levels = NULL, |
| 2458 | .num_reset_levels = 0, | 2551 | .num_reset_levels = 0, |
| 2459 | }; | 2552 | }; |
| @@ -2578,9 +2671,9 @@ static const struct tegra_pmc_soc tegra186_pmc_soc = { | |||
| 2578 | .init = NULL, | 2671 | .init = NULL, |
| 2579 | .setup_irq_polarity = tegra186_pmc_setup_irq_polarity, | 2672 | .setup_irq_polarity = tegra186_pmc_setup_irq_polarity, |
| 2580 | .reset_sources = tegra186_reset_sources, | 2673 | .reset_sources = tegra186_reset_sources, |
| 2581 | .num_reset_sources = 14, | 2674 | .num_reset_sources = ARRAY_SIZE(tegra186_reset_sources), |
| 2582 | .reset_levels = tegra186_reset_levels, | 2675 | .reset_levels = tegra186_reset_levels, |
| 2583 | .num_reset_levels = 3, | 2676 | .num_reset_levels = ARRAY_SIZE(tegra186_reset_levels), |
| 2584 | .num_wake_events = ARRAY_SIZE(tegra186_wake_events), | 2677 | .num_wake_events = ARRAY_SIZE(tegra186_wake_events), |
| 2585 | .wake_events = tegra186_wake_events, | 2678 | .wake_events = tegra186_wake_events, |
| 2586 | }; | 2679 | }; |
| @@ -2719,6 +2812,7 @@ static int __init tegra_pmc_early_init(void) | |||
| 2719 | const struct of_device_id *match; | 2812 | const struct of_device_id *match; |
| 2720 | struct device_node *np; | 2813 | struct device_node *np; |
| 2721 | struct resource regs; | 2814 | struct resource regs; |
| 2815 | unsigned int i; | ||
| 2722 | bool invert; | 2816 | bool invert; |
| 2723 | 2817 | ||
| 2724 | mutex_init(&pmc->powergates_lock); | 2818 | mutex_init(&pmc->powergates_lock); |
| @@ -2775,7 +2869,10 @@ static int __init tegra_pmc_early_init(void) | |||
| 2775 | if (pmc->soc->maybe_tz_only) | 2869 | if (pmc->soc->maybe_tz_only) |
| 2776 | pmc->tz_only = tegra_pmc_detect_tz_only(pmc); | 2870 | pmc->tz_only = tegra_pmc_detect_tz_only(pmc); |
| 2777 | 2871 | ||
| 2778 | tegra_powergate_init(pmc, np); | 2872 | /* Create a bitmap of the available and valid partitions */ |
| 2873 | for (i = 0; i < pmc->soc->num_powergates; i++) | ||
| 2874 | if (pmc->soc->powergates[i]) | ||
| 2875 | set_bit(i, pmc->powergates_available); | ||
| 2779 | 2876 | ||
| 2780 | /* | 2877 | /* |
| 2781 | * Invert the interrupt polarity if a PMC device tree node | 2878 | * Invert the interrupt polarity if a PMC device tree node |
diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/ti/Kconfig index be4570baad96..57960e92ebe0 100644 --- a/drivers/soc/ti/Kconfig +++ b/drivers/soc/ti/Kconfig | |||
| @@ -45,11 +45,12 @@ config KEYSTONE_NAVIGATOR_DMA | |||
| 45 | config AMX3_PM | 45 | config AMX3_PM |
| 46 | tristate "AMx3 Power Management" | 46 | tristate "AMx3 Power Management" |
| 47 | depends on SOC_AM33XX || SOC_AM43XX | 47 | depends on SOC_AM33XX || SOC_AM43XX |
| 48 | depends on WKUP_M3_IPC && TI_EMIF_SRAM && SRAM | 48 | depends on WKUP_M3_IPC && TI_EMIF_SRAM && SRAM && RTC_DRV_OMAP |
| 49 | help | 49 | help |
| 50 | Enable power management on AM335x and AM437x. Required for suspend to mem | 50 | Enable power management on AM335x and AM437x. Required for suspend to mem |
| 51 | and standby states on both AM335x and AM437x platforms and for deeper cpuidle | 51 | and standby states on both AM335x and AM437x platforms and for deeper cpuidle |
| 52 | c-states on AM335x. | 52 | c-states on AM335x. Also required for rtc and ddr in self-refresh low |
| 53 | power mode on AM437x platforms. | ||
| 53 | 54 | ||
| 54 | config WKUP_M3_IPC | 55 | config WKUP_M3_IPC |
| 55 | tristate "TI AMx3 Wkup-M3 IPC Driver" | 56 | tristate "TI AMx3 Wkup-M3 IPC Driver" |
diff --git a/drivers/soc/ti/pm33xx.c b/drivers/soc/ti/pm33xx.c index d0dab323651f..fc5802ccb1c0 100644 --- a/drivers/soc/ti/pm33xx.c +++ b/drivers/soc/ti/pm33xx.c | |||
| @@ -6,6 +6,7 @@ | |||
| 6 | * Vaibhav Bedia, Dave Gerlach | 6 | * Vaibhav Bedia, Dave Gerlach |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | #include <linux/clk.h> | ||
| 9 | #include <linux/cpu.h> | 10 | #include <linux/cpu.h> |
| 10 | #include <linux/err.h> | 11 | #include <linux/err.h> |
| 11 | #include <linux/genalloc.h> | 12 | #include <linux/genalloc.h> |
| @@ -13,9 +14,12 @@ | |||
| 13 | #include <linux/init.h> | 14 | #include <linux/init.h> |
| 14 | #include <linux/io.h> | 15 | #include <linux/io.h> |
| 15 | #include <linux/module.h> | 16 | #include <linux/module.h> |
| 17 | #include <linux/nvmem-consumer.h> | ||
| 16 | #include <linux/of.h> | 18 | #include <linux/of.h> |
| 17 | #include <linux/platform_data/pm33xx.h> | 19 | #include <linux/platform_data/pm33xx.h> |
| 18 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/rtc.h> | ||
| 22 | #include <linux/rtc/rtc-omap.h> | ||
| 19 | #include <linux/sizes.h> | 23 | #include <linux/sizes.h> |
| 20 | #include <linux/sram.h> | 24 | #include <linux/sram.h> |
| 21 | #include <linux/suspend.h> | 25 | #include <linux/suspend.h> |
| @@ -29,33 +33,162 @@ | |||
| 29 | #define AMX3_PM_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \ | 33 | #define AMX3_PM_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \ |
| 30 | (unsigned long)pm_sram->do_wfi) | 34 | (unsigned long)pm_sram->do_wfi) |
| 31 | 35 | ||
| 36 | #define RTC_SCRATCH_RESUME_REG 0 | ||
| 37 | #define RTC_SCRATCH_MAGIC_REG 1 | ||
| 38 | #define RTC_REG_BOOT_MAGIC 0x8cd0 /* RTC */ | ||
| 39 | #define GIC_INT_SET_PENDING_BASE 0x200 | ||
| 40 | #define AM43XX_GIC_DIST_BASE 0x48241000 | ||
| 41 | |||
| 42 | static u32 rtc_magic_val; | ||
| 43 | |||
| 32 | static int (*am33xx_do_wfi_sram)(unsigned long unused); | 44 | static int (*am33xx_do_wfi_sram)(unsigned long unused); |
| 33 | static phys_addr_t am33xx_do_wfi_sram_phys; | 45 | static phys_addr_t am33xx_do_wfi_sram_phys; |
| 34 | 46 | ||
| 35 | static struct gen_pool *sram_pool, *sram_pool_data; | 47 | static struct gen_pool *sram_pool, *sram_pool_data; |
| 36 | static unsigned long ocmcram_location, ocmcram_location_data; | 48 | static unsigned long ocmcram_location, ocmcram_location_data; |
| 37 | 49 | ||
| 50 | static struct rtc_device *omap_rtc; | ||
| 51 | static void __iomem *gic_dist_base; | ||
| 52 | |||
| 38 | static struct am33xx_pm_platform_data *pm_ops; | 53 | static struct am33xx_pm_platform_data *pm_ops; |
| 39 | static struct am33xx_pm_sram_addr *pm_sram; | 54 | static struct am33xx_pm_sram_addr *pm_sram; |
| 40 | 55 | ||
| 41 | static struct device *pm33xx_dev; | 56 | static struct device *pm33xx_dev; |
| 42 | static struct wkup_m3_ipc *m3_ipc; | 57 | static struct wkup_m3_ipc *m3_ipc; |
| 43 | 58 | ||
| 59 | #ifdef CONFIG_SUSPEND | ||
| 60 | static int rtc_only_idle; | ||
| 61 | static int retrigger_irq; | ||
| 44 | static unsigned long suspend_wfi_flags; | 62 | static unsigned long suspend_wfi_flags; |
| 45 | 63 | ||
| 64 | static struct wkup_m3_wakeup_src wakeup_src = {.irq_nr = 0, | ||
| 65 | .src = "Unknown", | ||
| 66 | }; | ||
| 67 | |||
| 68 | static struct wkup_m3_wakeup_src rtc_alarm_wakeup = { | ||
| 69 | .irq_nr = 108, .src = "RTC Alarm", | ||
| 70 | }; | ||
| 71 | |||
| 72 | static struct wkup_m3_wakeup_src rtc_ext_wakeup = { | ||
| 73 | .irq_nr = 0, .src = "Ext wakeup", | ||
| 74 | }; | ||
| 75 | #endif | ||
| 76 | |||
| 46 | static u32 sram_suspend_address(unsigned long addr) | 77 | static u32 sram_suspend_address(unsigned long addr) |
| 47 | { | 78 | { |
| 48 | return ((unsigned long)am33xx_do_wfi_sram + | 79 | return ((unsigned long)am33xx_do_wfi_sram + |
| 49 | AMX3_PM_SRAM_SYMBOL_OFFSET(addr)); | 80 | AMX3_PM_SRAM_SYMBOL_OFFSET(addr)); |
| 50 | } | 81 | } |
| 51 | 82 | ||
| 83 | static int am33xx_push_sram_idle(void) | ||
| 84 | { | ||
| 85 | struct am33xx_pm_ro_sram_data ro_sram_data; | ||
| 86 | int ret; | ||
| 87 | u32 table_addr, ro_data_addr; | ||
| 88 | void *copy_addr; | ||
| 89 | |||
| 90 | ro_sram_data.amx3_pm_sram_data_virt = ocmcram_location_data; | ||
| 91 | ro_sram_data.amx3_pm_sram_data_phys = | ||
| 92 | gen_pool_virt_to_phys(sram_pool_data, ocmcram_location_data); | ||
| 93 | ro_sram_data.rtc_base_virt = pm_ops->get_rtc_base_addr(); | ||
| 94 | |||
| 95 | /* Save physical address to calculate resume offset during pm init */ | ||
| 96 | am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool, | ||
| 97 | ocmcram_location); | ||
| 98 | |||
| 99 | am33xx_do_wfi_sram = sram_exec_copy(sram_pool, (void *)ocmcram_location, | ||
| 100 | pm_sram->do_wfi, | ||
| 101 | *pm_sram->do_wfi_sz); | ||
| 102 | if (!am33xx_do_wfi_sram) { | ||
| 103 | dev_err(pm33xx_dev, | ||
| 104 | "PM: %s: am33xx_do_wfi copy to sram failed\n", | ||
| 105 | __func__); | ||
| 106 | return -ENODEV; | ||
| 107 | } | ||
| 108 | |||
| 109 | table_addr = | ||
| 110 | sram_suspend_address((unsigned long)pm_sram->emif_sram_table); | ||
| 111 | ret = ti_emif_copy_pm_function_table(sram_pool, (void *)table_addr); | ||
| 112 | if (ret) { | ||
| 113 | dev_dbg(pm33xx_dev, | ||
| 114 | "PM: %s: EMIF function copy failed\n", __func__); | ||
| 115 | return -EPROBE_DEFER; | ||
| 116 | } | ||
| 117 | |||
| 118 | ro_data_addr = | ||
| 119 | sram_suspend_address((unsigned long)pm_sram->ro_sram_data); | ||
| 120 | copy_addr = sram_exec_copy(sram_pool, (void *)ro_data_addr, | ||
| 121 | &ro_sram_data, | ||
| 122 | sizeof(ro_sram_data)); | ||
| 123 | if (!copy_addr) { | ||
| 124 | dev_err(pm33xx_dev, | ||
| 125 | "PM: %s: ro_sram_data copy to sram failed\n", | ||
| 126 | __func__); | ||
| 127 | return -ENODEV; | ||
| 128 | } | ||
| 129 | |||
| 130 | return 0; | ||
| 131 | } | ||
| 132 | |||
| 133 | static int __init am43xx_map_gic(void) | ||
| 134 | { | ||
| 135 | gic_dist_base = ioremap(AM43XX_GIC_DIST_BASE, SZ_4K); | ||
| 136 | |||
| 137 | if (!gic_dist_base) | ||
| 138 | return -ENOMEM; | ||
| 139 | |||
| 140 | return 0; | ||
| 141 | } | ||
| 142 | |||
| 52 | #ifdef CONFIG_SUSPEND | 143 | #ifdef CONFIG_SUSPEND |
| 144 | struct wkup_m3_wakeup_src rtc_wake_src(void) | ||
| 145 | { | ||
| 146 | u32 i; | ||
| 147 | |||
| 148 | i = __raw_readl(pm_ops->get_rtc_base_addr() + 0x44) & 0x40; | ||
| 149 | |||
| 150 | if (i) { | ||
| 151 | retrigger_irq = rtc_alarm_wakeup.irq_nr; | ||
| 152 | return rtc_alarm_wakeup; | ||
| 153 | } | ||
| 154 | |||
| 155 | retrigger_irq = rtc_ext_wakeup.irq_nr; | ||
| 156 | |||
| 157 | return rtc_ext_wakeup; | ||
| 158 | } | ||
| 159 | |||
| 160 | int am33xx_rtc_only_idle(unsigned long wfi_flags) | ||
| 161 | { | ||
| 162 | omap_rtc_power_off_program(&omap_rtc->dev); | ||
| 163 | am33xx_do_wfi_sram(wfi_flags); | ||
| 164 | return 0; | ||
| 165 | } | ||
| 166 | |||
| 53 | static int am33xx_pm_suspend(suspend_state_t suspend_state) | 167 | static int am33xx_pm_suspend(suspend_state_t suspend_state) |
| 54 | { | 168 | { |
| 55 | int i, ret = 0; | 169 | int i, ret = 0; |
| 56 | 170 | ||
| 57 | ret = pm_ops->soc_suspend((unsigned long)suspend_state, | 171 | if (suspend_state == PM_SUSPEND_MEM && |
| 58 | am33xx_do_wfi_sram, suspend_wfi_flags); | 172 | pm_ops->check_off_mode_enable()) { |
| 173 | pm_ops->prepare_rtc_suspend(); | ||
| 174 | pm_ops->save_context(); | ||
| 175 | suspend_wfi_flags |= WFI_FLAG_RTC_ONLY; | ||
| 176 | clk_save_context(); | ||
| 177 | ret = pm_ops->soc_suspend(suspend_state, am33xx_rtc_only_idle, | ||
| 178 | suspend_wfi_flags); | ||
| 179 | |||
| 180 | suspend_wfi_flags &= ~WFI_FLAG_RTC_ONLY; | ||
| 181 | |||
| 182 | if (!ret) { | ||
| 183 | clk_restore_context(); | ||
| 184 | pm_ops->restore_context(); | ||
| 185 | m3_ipc->ops->set_rtc_only(m3_ipc); | ||
| 186 | am33xx_push_sram_idle(); | ||
| 187 | } | ||
| 188 | } else { | ||
| 189 | ret = pm_ops->soc_suspend(suspend_state, am33xx_do_wfi_sram, | ||
| 190 | suspend_wfi_flags); | ||
| 191 | } | ||
| 59 | 192 | ||
| 60 | if (ret) { | 193 | if (ret) { |
| 61 | dev_err(pm33xx_dev, "PM: Kernel suspend failure\n"); | 194 | dev_err(pm33xx_dev, "PM: Kernel suspend failure\n"); |
| @@ -77,8 +210,20 @@ static int am33xx_pm_suspend(suspend_state_t suspend_state) | |||
| 77 | "PM: CM3 returned unknown result = %d\n", i); | 210 | "PM: CM3 returned unknown result = %d\n", i); |
| 78 | ret = -1; | 211 | ret = -1; |
| 79 | } | 212 | } |
| 213 | |||
| 214 | /* print the wakeup reason */ | ||
| 215 | if (rtc_only_idle) { | ||
| 216 | wakeup_src = rtc_wake_src(); | ||
| 217 | pr_info("PM: Wakeup source %s\n", wakeup_src.src); | ||
| 218 | } else { | ||
| 219 | pr_info("PM: Wakeup source %s\n", | ||
| 220 | m3_ipc->ops->request_wake_src(m3_ipc)); | ||
| 221 | } | ||
| 80 | } | 222 | } |
| 81 | 223 | ||
| 224 | if (suspend_state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable()) | ||
| 225 | pm_ops->prepare_rtc_resume(); | ||
| 226 | |||
| 82 | return ret; | 227 | return ret; |
| 83 | } | 228 | } |
| 84 | 229 | ||
| @@ -101,6 +246,18 @@ static int am33xx_pm_enter(suspend_state_t suspend_state) | |||
| 101 | static int am33xx_pm_begin(suspend_state_t state) | 246 | static int am33xx_pm_begin(suspend_state_t state) |
| 102 | { | 247 | { |
| 103 | int ret = -EINVAL; | 248 | int ret = -EINVAL; |
| 249 | struct nvmem_device *nvmem; | ||
| 250 | |||
| 251 | if (state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable()) { | ||
| 252 | nvmem = devm_nvmem_device_get(&omap_rtc->dev, | ||
| 253 | "omap_rtc_scratch0"); | ||
| 254 | if (nvmem) | ||
| 255 | nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4, | ||
| 256 | (void *)&rtc_magic_val); | ||
| 257 | rtc_only_idle = 1; | ||
| 258 | } else { | ||
| 259 | rtc_only_idle = 0; | ||
| 260 | } | ||
| 104 | 261 | ||
| 105 | switch (state) { | 262 | switch (state) { |
| 106 | case PM_SUSPEND_MEM: | 263 | case PM_SUSPEND_MEM: |
| @@ -116,7 +273,28 @@ static int am33xx_pm_begin(suspend_state_t state) | |||
| 116 | 273 | ||
| 117 | static void am33xx_pm_end(void) | 274 | static void am33xx_pm_end(void) |
| 118 | { | 275 | { |
| 276 | u32 val = 0; | ||
| 277 | struct nvmem_device *nvmem; | ||
| 278 | |||
| 279 | nvmem = devm_nvmem_device_get(&omap_rtc->dev, "omap_rtc_scratch0"); | ||
| 119 | m3_ipc->ops->finish_low_power(m3_ipc); | 280 | m3_ipc->ops->finish_low_power(m3_ipc); |
| 281 | if (rtc_only_idle) { | ||
| 282 | if (retrigger_irq) | ||
| 283 | /* | ||
| 284 | * 32 bits of Interrupt Set-Pending correspond to 32 | ||
| 285 | * 32 interrupts. Compute the bit offset of the | ||
| 286 | * Interrupt and set that particular bit | ||
| 287 | * Compute the register offset by dividing interrupt | ||
| 288 | * number by 32 and mutiplying by 4 | ||
| 289 | */ | ||
| 290 | writel_relaxed(1 << (retrigger_irq & 31), | ||
| 291 | gic_dist_base + GIC_INT_SET_PENDING_BASE | ||
| 292 | + retrigger_irq / 32 * 4); | ||
| 293 | nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4, | ||
| 294 | (void *)&val); | ||
| 295 | } | ||
| 296 | |||
| 297 | rtc_only_idle = 0; | ||
| 120 | } | 298 | } |
| 121 | 299 | ||
| 122 | static int am33xx_pm_valid(suspend_state_t state) | 300 | static int am33xx_pm_valid(suspend_state_t state) |
| @@ -219,51 +397,37 @@ mpu_put_node: | |||
| 219 | return ret; | 397 | return ret; |
| 220 | } | 398 | } |
| 221 | 399 | ||
| 222 | static int am33xx_push_sram_idle(void) | 400 | static int am33xx_pm_rtc_setup(void) |
| 223 | { | 401 | { |
| 224 | struct am33xx_pm_ro_sram_data ro_sram_data; | 402 | struct device_node *np; |
| 225 | int ret; | 403 | unsigned long val = 0; |
| 226 | u32 table_addr, ro_data_addr; | 404 | struct nvmem_device *nvmem; |
| 227 | void *copy_addr; | ||
| 228 | |||
| 229 | ro_sram_data.amx3_pm_sram_data_virt = ocmcram_location_data; | ||
| 230 | ro_sram_data.amx3_pm_sram_data_phys = | ||
| 231 | gen_pool_virt_to_phys(sram_pool_data, ocmcram_location_data); | ||
| 232 | ro_sram_data.rtc_base_virt = pm_ops->get_rtc_base_addr(); | ||
| 233 | 405 | ||
| 234 | /* Save physical address to calculate resume offset during pm init */ | 406 | np = of_find_node_by_name(NULL, "rtc"); |
| 235 | am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool, | ||
| 236 | ocmcram_location); | ||
| 237 | 407 | ||
| 238 | am33xx_do_wfi_sram = sram_exec_copy(sram_pool, (void *)ocmcram_location, | 408 | if (of_device_is_available(np)) { |
| 239 | pm_sram->do_wfi, | 409 | omap_rtc = rtc_class_open("rtc0"); |
| 240 | *pm_sram->do_wfi_sz); | 410 | if (!omap_rtc) { |
| 241 | if (!am33xx_do_wfi_sram) { | 411 | pr_warn("PM: rtc0 not available"); |
| 242 | dev_err(pm33xx_dev, | 412 | return -EPROBE_DEFER; |
| 243 | "PM: %s: am33xx_do_wfi copy to sram failed\n", | 413 | } |
| 244 | __func__); | ||
| 245 | return -ENODEV; | ||
| 246 | } | ||
| 247 | |||
| 248 | table_addr = | ||
| 249 | sram_suspend_address((unsigned long)pm_sram->emif_sram_table); | ||
| 250 | ret = ti_emif_copy_pm_function_table(sram_pool, (void *)table_addr); | ||
| 251 | if (ret) { | ||
| 252 | dev_dbg(pm33xx_dev, | ||
| 253 | "PM: %s: EMIF function copy failed\n", __func__); | ||
| 254 | return -EPROBE_DEFER; | ||
| 255 | } | ||
| 256 | 414 | ||
| 257 | ro_data_addr = | 415 | nvmem = devm_nvmem_device_get(&omap_rtc->dev, |
| 258 | sram_suspend_address((unsigned long)pm_sram->ro_sram_data); | 416 | "omap_rtc_scratch0"); |
| 259 | copy_addr = sram_exec_copy(sram_pool, (void *)ro_data_addr, | 417 | if (nvmem) { |
| 260 | &ro_sram_data, | 418 | nvmem_device_read(nvmem, RTC_SCRATCH_MAGIC_REG * 4, |
| 261 | sizeof(ro_sram_data)); | 419 | 4, (void *)&rtc_magic_val); |
| 262 | if (!copy_addr) { | 420 | if ((rtc_magic_val & 0xffff) != RTC_REG_BOOT_MAGIC) |
| 263 | dev_err(pm33xx_dev, | 421 | pr_warn("PM: bootloader does not support rtc-only!\n"); |
| 264 | "PM: %s: ro_sram_data copy to sram failed\n", | 422 | |
| 265 | __func__); | 423 | nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, |
| 266 | return -ENODEV; | 424 | 4, (void *)&val); |
| 425 | val = pm_sram->resume_address; | ||
| 426 | nvmem_device_write(nvmem, RTC_SCRATCH_RESUME_REG * 4, | ||
| 427 | 4, (void *)&val); | ||
| 428 | } | ||
| 429 | } else { | ||
| 430 | pr_warn("PM: no-rtc available, rtc-only mode disabled.\n"); | ||
| 267 | } | 431 | } |
| 268 | 432 | ||
| 269 | return 0; | 433 | return 0; |
| @@ -284,34 +448,42 @@ static int am33xx_pm_probe(struct platform_device *pdev) | |||
| 284 | return -ENODEV; | 448 | return -ENODEV; |
| 285 | } | 449 | } |
| 286 | 450 | ||
| 451 | ret = am43xx_map_gic(); | ||
| 452 | if (ret) { | ||
| 453 | pr_err("PM: Could not ioremap GIC base\n"); | ||
| 454 | return ret; | ||
| 455 | } | ||
| 456 | |||
| 287 | pm_sram = pm_ops->get_sram_addrs(); | 457 | pm_sram = pm_ops->get_sram_addrs(); |
| 288 | if (!pm_sram) { | 458 | if (!pm_sram) { |
| 289 | dev_err(dev, "PM: Cannot get PM asm function addresses!!\n"); | 459 | dev_err(dev, "PM: Cannot get PM asm function addresses!!\n"); |
| 290 | return -ENODEV; | 460 | return -ENODEV; |
| 291 | } | 461 | } |
| 292 | 462 | ||
| 463 | m3_ipc = wkup_m3_ipc_get(); | ||
| 464 | if (!m3_ipc) { | ||
| 465 | pr_err("PM: Cannot get wkup_m3_ipc handle\n"); | ||
| 466 | return -EPROBE_DEFER; | ||
| 467 | } | ||
| 468 | |||
| 293 | pm33xx_dev = dev; | 469 | pm33xx_dev = dev; |
| 294 | 470 | ||
| 295 | ret = am33xx_pm_alloc_sram(); | 471 | ret = am33xx_pm_alloc_sram(); |
| 296 | if (ret) | 472 | if (ret) |
| 297 | return ret; | 473 | return ret; |
| 298 | 474 | ||
| 299 | ret = am33xx_push_sram_idle(); | 475 | ret = am33xx_pm_rtc_setup(); |
| 300 | if (ret) | 476 | if (ret) |
| 301 | goto err_free_sram; | 477 | goto err_free_sram; |
| 302 | 478 | ||
| 303 | m3_ipc = wkup_m3_ipc_get(); | 479 | ret = am33xx_push_sram_idle(); |
| 304 | if (!m3_ipc) { | 480 | if (ret) |
| 305 | dev_dbg(dev, "PM: Cannot get wkup_m3_ipc handle\n"); | ||
| 306 | ret = -EPROBE_DEFER; | ||
| 307 | goto err_free_sram; | 481 | goto err_free_sram; |
| 308 | } | ||
| 309 | 482 | ||
| 310 | am33xx_pm_set_ipc_ops(); | 483 | am33xx_pm_set_ipc_ops(); |
| 311 | 484 | ||
| 312 | #ifdef CONFIG_SUSPEND | 485 | #ifdef CONFIG_SUSPEND |
| 313 | suspend_set_ops(&am33xx_pm_ops); | 486 | suspend_set_ops(&am33xx_pm_ops); |
| 314 | #endif /* CONFIG_SUSPEND */ | ||
| 315 | 487 | ||
| 316 | /* | 488 | /* |
| 317 | * For a system suspend we must flush the caches, we want | 489 | * For a system suspend we must flush the caches, we want |
| @@ -323,6 +495,7 @@ static int am33xx_pm_probe(struct platform_device *pdev) | |||
| 323 | suspend_wfi_flags |= WFI_FLAG_SELF_REFRESH; | 495 | suspend_wfi_flags |= WFI_FLAG_SELF_REFRESH; |
| 324 | suspend_wfi_flags |= WFI_FLAG_SAVE_EMIF; | 496 | suspend_wfi_flags |= WFI_FLAG_SAVE_EMIF; |
| 325 | suspend_wfi_flags |= WFI_FLAG_WAKE_M3; | 497 | suspend_wfi_flags |= WFI_FLAG_WAKE_M3; |
| 498 | #endif /* CONFIG_SUSPEND */ | ||
| 326 | 499 | ||
| 327 | ret = pm_ops->init(); | 500 | ret = pm_ops->init(); |
| 328 | if (ret) { | 501 | if (ret) { |
diff --git a/drivers/soc/xilinx/zynqmp_pm_domains.c b/drivers/soc/xilinx/zynqmp_pm_domains.c index 354d256e6e00..600f57cf0c2e 100644 --- a/drivers/soc/xilinx/zynqmp_pm_domains.c +++ b/drivers/soc/xilinx/zynqmp_pm_domains.c | |||
| @@ -23,6 +23,8 @@ | |||
| 23 | /* Flag stating if PM nodes mapped to the PM domain has been requested */ | 23 | /* Flag stating if PM nodes mapped to the PM domain has been requested */ |
| 24 | #define ZYNQMP_PM_DOMAIN_REQUESTED BIT(0) | 24 | #define ZYNQMP_PM_DOMAIN_REQUESTED BIT(0) |
| 25 | 25 | ||
| 26 | static const struct zynqmp_eemi_ops *eemi_ops; | ||
| 27 | |||
| 26 | /** | 28 | /** |
| 27 | * struct zynqmp_pm_domain - Wrapper around struct generic_pm_domain | 29 | * struct zynqmp_pm_domain - Wrapper around struct generic_pm_domain |
| 28 | * @gpd: Generic power domain | 30 | * @gpd: Generic power domain |
| @@ -71,9 +73,8 @@ static int zynqmp_gpd_power_on(struct generic_pm_domain *domain) | |||
| 71 | { | 73 | { |
| 72 | int ret; | 74 | int ret; |
| 73 | struct zynqmp_pm_domain *pd; | 75 | struct zynqmp_pm_domain *pd; |
| 74 | const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); | ||
| 75 | 76 | ||
| 76 | if (!eemi_ops || !eemi_ops->set_requirement) | 77 | if (!eemi_ops->set_requirement) |
| 77 | return -ENXIO; | 78 | return -ENXIO; |
| 78 | 79 | ||
| 79 | pd = container_of(domain, struct zynqmp_pm_domain, gpd); | 80 | pd = container_of(domain, struct zynqmp_pm_domain, gpd); |
| @@ -107,9 +108,8 @@ static int zynqmp_gpd_power_off(struct generic_pm_domain *domain) | |||
| 107 | struct zynqmp_pm_domain *pd; | 108 | struct zynqmp_pm_domain *pd; |
| 108 | u32 capabilities = 0; | 109 | u32 capabilities = 0; |
| 109 | bool may_wakeup; | 110 | bool may_wakeup; |
| 110 | const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); | ||
| 111 | 111 | ||
| 112 | if (!eemi_ops || !eemi_ops->set_requirement) | 112 | if (!eemi_ops->set_requirement) |
| 113 | return -ENXIO; | 113 | return -ENXIO; |
| 114 | 114 | ||
| 115 | pd = container_of(domain, struct zynqmp_pm_domain, gpd); | 115 | pd = container_of(domain, struct zynqmp_pm_domain, gpd); |
| @@ -160,9 +160,8 @@ static int zynqmp_gpd_attach_dev(struct generic_pm_domain *domain, | |||
| 160 | { | 160 | { |
| 161 | int ret; | 161 | int ret; |
| 162 | struct zynqmp_pm_domain *pd; | 162 | struct zynqmp_pm_domain *pd; |
| 163 | const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); | ||
| 164 | 163 | ||
| 165 | if (!eemi_ops || !eemi_ops->request_node) | 164 | if (!eemi_ops->request_node) |
| 166 | return -ENXIO; | 165 | return -ENXIO; |
| 167 | 166 | ||
| 168 | pd = container_of(domain, struct zynqmp_pm_domain, gpd); | 167 | pd = container_of(domain, struct zynqmp_pm_domain, gpd); |
| @@ -197,9 +196,8 @@ static void zynqmp_gpd_detach_dev(struct generic_pm_domain *domain, | |||
| 197 | { | 196 | { |
| 198 | int ret; | 197 | int ret; |
| 199 | struct zynqmp_pm_domain *pd; | 198 | struct zynqmp_pm_domain *pd; |
| 200 | const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); | ||
| 201 | 199 | ||
| 202 | if (!eemi_ops || !eemi_ops->release_node) | 200 | if (!eemi_ops->release_node) |
| 203 | return; | 201 | return; |
| 204 | 202 | ||
| 205 | pd = container_of(domain, struct zynqmp_pm_domain, gpd); | 203 | pd = container_of(domain, struct zynqmp_pm_domain, gpd); |
| @@ -266,6 +264,10 @@ static int zynqmp_gpd_probe(struct platform_device *pdev) | |||
| 266 | struct zynqmp_pm_domain *pd; | 264 | struct zynqmp_pm_domain *pd; |
| 267 | struct device *dev = &pdev->dev; | 265 | struct device *dev = &pdev->dev; |
| 268 | 266 | ||
| 267 | eemi_ops = zynqmp_pm_get_eemi_ops(); | ||
| 268 | if (IS_ERR(eemi_ops)) | ||
| 269 | return PTR_ERR(eemi_ops); | ||
| 270 | |||
| 269 | pd = devm_kcalloc(dev, ZYNQMP_NUM_DOMAINS, sizeof(*pd), GFP_KERNEL); | 271 | pd = devm_kcalloc(dev, ZYNQMP_NUM_DOMAINS, sizeof(*pd), GFP_KERNEL); |
| 270 | if (!pd) | 272 | if (!pd) |
| 271 | return -ENOMEM; | 273 | return -ENOMEM; |
diff --git a/drivers/soc/xilinx/zynqmp_power.c b/drivers/soc/xilinx/zynqmp_power.c index 771cb59b9d22..1b9d14411a15 100644 --- a/drivers/soc/xilinx/zynqmp_power.c +++ b/drivers/soc/xilinx/zynqmp_power.c | |||
| @@ -31,6 +31,7 @@ static const char *const suspend_modes[] = { | |||
| 31 | }; | 31 | }; |
| 32 | 32 | ||
| 33 | static enum pm_suspend_mode suspend_mode = PM_SUSPEND_MODE_STD; | 33 | static enum pm_suspend_mode suspend_mode = PM_SUSPEND_MODE_STD; |
| 34 | static const struct zynqmp_eemi_ops *eemi_ops; | ||
| 34 | 35 | ||
| 35 | enum pm_api_cb_id { | 36 | enum pm_api_cb_id { |
| 36 | PM_INIT_SUSPEND_CB = 30, | 37 | PM_INIT_SUSPEND_CB = 30, |
| @@ -92,9 +93,8 @@ static ssize_t suspend_mode_store(struct device *dev, | |||
| 92 | const char *buf, size_t count) | 93 | const char *buf, size_t count) |
| 93 | { | 94 | { |
| 94 | int md, ret = -EINVAL; | 95 | int md, ret = -EINVAL; |
| 95 | const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); | ||
| 96 | 96 | ||
| 97 | if (!eemi_ops || !eemi_ops->set_suspend_mode) | 97 | if (!eemi_ops->set_suspend_mode) |
| 98 | return ret; | 98 | return ret; |
| 99 | 99 | ||
| 100 | for (md = PM_SUSPEND_MODE_FIRST; md < ARRAY_SIZE(suspend_modes); md++) | 100 | for (md = PM_SUSPEND_MODE_FIRST; md < ARRAY_SIZE(suspend_modes); md++) |
| @@ -120,9 +120,11 @@ static int zynqmp_pm_probe(struct platform_device *pdev) | |||
| 120 | int ret, irq; | 120 | int ret, irq; |
| 121 | u32 pm_api_version; | 121 | u32 pm_api_version; |
| 122 | 122 | ||
| 123 | const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); | 123 | eemi_ops = zynqmp_pm_get_eemi_ops(); |
| 124 | if (IS_ERR(eemi_ops)) | ||
| 125 | return PTR_ERR(eemi_ops); | ||
| 124 | 126 | ||
| 125 | if (!eemi_ops || !eemi_ops->get_api_version || !eemi_ops->init_finalize) | 127 | if (!eemi_ops->get_api_version || !eemi_ops->init_finalize) |
| 126 | return -ENXIO; | 128 | return -ENXIO; |
| 127 | 129 | ||
| 128 | eemi_ops->init_finalize(); | 130 | eemi_ops->init_finalize(); |
diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c index 9f83e1b17aa1..9850a0efe85a 100644 --- a/drivers/spi/spi-zynqmp-gqspi.c +++ b/drivers/spi/spi-zynqmp-gqspi.c | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | #include <linux/delay.h> | 14 | #include <linux/delay.h> |
| 15 | #include <linux/dma-mapping.h> | 15 | #include <linux/dma-mapping.h> |
| 16 | #include <linux/dmaengine.h> | 16 | #include <linux/dmaengine.h> |
| 17 | #include <linux/firmware/xlnx-zynqmp.h> | ||
| 17 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
| 18 | #include <linux/io.h> | 19 | #include <linux/io.h> |
| 19 | #include <linux/module.h> | 20 | #include <linux/module.h> |
| @@ -138,6 +139,7 @@ | |||
| 138 | 139 | ||
| 139 | #define SPI_AUTOSUSPEND_TIMEOUT 3000 | 140 | #define SPI_AUTOSUSPEND_TIMEOUT 3000 |
| 140 | enum mode_type {GQSPI_MODE_IO, GQSPI_MODE_DMA}; | 141 | enum mode_type {GQSPI_MODE_IO, GQSPI_MODE_DMA}; |
| 142 | static const struct zynqmp_eemi_ops *eemi_ops; | ||
| 141 | 143 | ||
| 142 | /** | 144 | /** |
| 143 | * struct zynqmp_qspi - Defines qspi driver instance | 145 | * struct zynqmp_qspi - Defines qspi driver instance |
| @@ -1021,6 +1023,10 @@ static int zynqmp_qspi_probe(struct platform_device *pdev) | |||
| 1021 | struct resource *res; | 1023 | struct resource *res; |
| 1022 | struct device *dev = &pdev->dev; | 1024 | struct device *dev = &pdev->dev; |
| 1023 | 1025 | ||
| 1026 | eemi_ops = zynqmp_pm_get_eemi_ops(); | ||
| 1027 | if (IS_ERR(eemi_ops)) | ||
| 1028 | return PTR_ERR(eemi_ops); | ||
| 1029 | |||
| 1024 | master = spi_alloc_master(&pdev->dev, sizeof(*xqspi)); | 1030 | master = spi_alloc_master(&pdev->dev, sizeof(*xqspi)); |
| 1025 | if (!master) | 1031 | if (!master) |
| 1026 | return -ENOMEM; | 1032 | return -ENOMEM; |
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index c0901b96cfe4..62951e836cbc 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig | |||
| @@ -114,8 +114,6 @@ source "drivers/staging/ralink-gdma/Kconfig" | |||
| 114 | 114 | ||
| 115 | source "drivers/staging/mt7621-mmc/Kconfig" | 115 | source "drivers/staging/mt7621-mmc/Kconfig" |
| 116 | 116 | ||
| 117 | source "drivers/staging/mt7621-eth/Kconfig" | ||
| 118 | |||
| 119 | source "drivers/staging/mt7621-dts/Kconfig" | 117 | source "drivers/staging/mt7621-dts/Kconfig" |
| 120 | 118 | ||
| 121 | source "drivers/staging/gasket/Kconfig" | 119 | source "drivers/staging/gasket/Kconfig" |
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index 57c6bce13ff4..d1b17ddcd354 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile | |||
| @@ -47,7 +47,6 @@ obj-$(CONFIG_SPI_MT7621) += mt7621-spi/ | |||
| 47 | obj-$(CONFIG_SOC_MT7621) += mt7621-dma/ | 47 | obj-$(CONFIG_SOC_MT7621) += mt7621-dma/ |
| 48 | obj-$(CONFIG_DMA_RALINK) += ralink-gdma/ | 48 | obj-$(CONFIG_DMA_RALINK) += ralink-gdma/ |
| 49 | obj-$(CONFIG_MTK_MMC) += mt7621-mmc/ | 49 | obj-$(CONFIG_MTK_MMC) += mt7621-mmc/ |
| 50 | obj-$(CONFIG_NET_MEDIATEK_SOC_STAGING) += mt7621-eth/ | ||
| 51 | obj-$(CONFIG_SOC_MT7621) += mt7621-dts/ | 50 | obj-$(CONFIG_SOC_MT7621) += mt7621-dts/ |
| 52 | obj-$(CONFIG_STAGING_GASKET_FRAMEWORK) += gasket/ | 51 | obj-$(CONFIG_STAGING_GASKET_FRAMEWORK) += gasket/ |
| 53 | obj-$(CONFIG_XIL_AXIS_FIFO) += axis-fifo/ | 52 | obj-$(CONFIG_XIL_AXIS_FIFO) += axis-fifo/ |
diff --git a/drivers/staging/axis-fifo/Kconfig b/drivers/staging/axis-fifo/Kconfig index 687537203d9c..d9725888af6f 100644 --- a/drivers/staging/axis-fifo/Kconfig +++ b/drivers/staging/axis-fifo/Kconfig | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | # | 3 | # |
| 4 | config XIL_AXIS_FIFO | 4 | config XIL_AXIS_FIFO |
| 5 | tristate "Xilinx AXI-Stream FIFO IP core driver" | 5 | tristate "Xilinx AXI-Stream FIFO IP core driver" |
| 6 | depends on OF | ||
| 6 | default n | 7 | default n |
| 7 | help | 8 | help |
| 8 | This adds support for the Xilinx AXI-Stream | 9 | This adds support for the Xilinx AXI-Stream |
diff --git a/drivers/staging/comedi/comedidev.h b/drivers/staging/comedi/comedidev.h index a7d569cfca5d..0dff1ac057cd 100644 --- a/drivers/staging/comedi/comedidev.h +++ b/drivers/staging/comedi/comedidev.h | |||
| @@ -1001,6 +1001,8 @@ int comedi_dio_insn_config(struct comedi_device *dev, | |||
| 1001 | unsigned int mask); | 1001 | unsigned int mask); |
| 1002 | unsigned int comedi_dio_update_state(struct comedi_subdevice *s, | 1002 | unsigned int comedi_dio_update_state(struct comedi_subdevice *s, |
| 1003 | unsigned int *data); | 1003 | unsigned int *data); |
| 1004 | unsigned int comedi_bytes_per_scan_cmd(struct comedi_subdevice *s, | ||
| 1005 | struct comedi_cmd *cmd); | ||
| 1004 | unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s); | 1006 | unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s); |
| 1005 | unsigned int comedi_nscans_left(struct comedi_subdevice *s, | 1007 | unsigned int comedi_nscans_left(struct comedi_subdevice *s, |
| 1006 | unsigned int nscans); | 1008 | unsigned int nscans); |
diff --git a/drivers/staging/comedi/drivers.c b/drivers/staging/comedi/drivers.c index eefa62f42c0f..5a32b8fc000e 100644 --- a/drivers/staging/comedi/drivers.c +++ b/drivers/staging/comedi/drivers.c | |||
| @@ -394,11 +394,13 @@ unsigned int comedi_dio_update_state(struct comedi_subdevice *s, | |||
| 394 | EXPORT_SYMBOL_GPL(comedi_dio_update_state); | 394 | EXPORT_SYMBOL_GPL(comedi_dio_update_state); |
| 395 | 395 | ||
| 396 | /** | 396 | /** |
| 397 | * comedi_bytes_per_scan() - Get length of asynchronous command "scan" in bytes | 397 | * comedi_bytes_per_scan_cmd() - Get length of asynchronous command "scan" in |
| 398 | * bytes | ||
| 398 | * @s: COMEDI subdevice. | 399 | * @s: COMEDI subdevice. |
| 400 | * @cmd: COMEDI command. | ||
| 399 | * | 401 | * |
| 400 | * Determines the overall scan length according to the subdevice type and the | 402 | * Determines the overall scan length according to the subdevice type and the |
| 401 | * number of channels in the scan. | 403 | * number of channels in the scan for the specified command. |
| 402 | * | 404 | * |
| 403 | * For digital input, output or input/output subdevices, samples for | 405 | * For digital input, output or input/output subdevices, samples for |
| 404 | * multiple channels are assumed to be packed into one or more unsigned | 406 | * multiple channels are assumed to be packed into one or more unsigned |
| @@ -408,9 +410,9 @@ EXPORT_SYMBOL_GPL(comedi_dio_update_state); | |||
| 408 | * | 410 | * |
| 409 | * Returns the overall scan length in bytes. | 411 | * Returns the overall scan length in bytes. |
| 410 | */ | 412 | */ |
| 411 | unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s) | 413 | unsigned int comedi_bytes_per_scan_cmd(struct comedi_subdevice *s, |
| 414 | struct comedi_cmd *cmd) | ||
| 412 | { | 415 | { |
| 413 | struct comedi_cmd *cmd = &s->async->cmd; | ||
| 414 | unsigned int num_samples; | 416 | unsigned int num_samples; |
| 415 | unsigned int bits_per_sample; | 417 | unsigned int bits_per_sample; |
| 416 | 418 | ||
| @@ -427,6 +429,29 @@ unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s) | |||
| 427 | } | 429 | } |
| 428 | return comedi_samples_to_bytes(s, num_samples); | 430 | return comedi_samples_to_bytes(s, num_samples); |
| 429 | } | 431 | } |
| 432 | EXPORT_SYMBOL_GPL(comedi_bytes_per_scan_cmd); | ||
| 433 | |||
| 434 | /** | ||
| 435 | * comedi_bytes_per_scan() - Get length of asynchronous command "scan" in bytes | ||
| 436 | * @s: COMEDI subdevice. | ||
| 437 | * | ||
| 438 | * Determines the overall scan length according to the subdevice type and the | ||
| 439 | * number of channels in the scan for the current command. | ||
| 440 | * | ||
| 441 | * For digital input, output or input/output subdevices, samples for | ||
| 442 | * multiple channels are assumed to be packed into one or more unsigned | ||
| 443 | * short or unsigned int values according to the subdevice's %SDF_LSAMPL | ||
| 444 | * flag. For other types of subdevice, samples are assumed to occupy a | ||
| 445 | * whole unsigned short or unsigned int according to the %SDF_LSAMPL flag. | ||
| 446 | * | ||
| 447 | * Returns the overall scan length in bytes. | ||
| 448 | */ | ||
| 449 | unsigned int comedi_bytes_per_scan(struct comedi_subdevice *s) | ||
| 450 | { | ||
| 451 | struct comedi_cmd *cmd = &s->async->cmd; | ||
| 452 | |||
| 453 | return comedi_bytes_per_scan_cmd(s, cmd); | ||
| 454 | } | ||
| 430 | EXPORT_SYMBOL_GPL(comedi_bytes_per_scan); | 455 | EXPORT_SYMBOL_GPL(comedi_bytes_per_scan); |
| 431 | 456 | ||
| 432 | static unsigned int __comedi_nscans_left(struct comedi_subdevice *s, | 457 | static unsigned int __comedi_nscans_left(struct comedi_subdevice *s, |
diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c index 5edf59ac6706..b04dad8c7092 100644 --- a/drivers/staging/comedi/drivers/ni_mio_common.c +++ b/drivers/staging/comedi/drivers/ni_mio_common.c | |||
| @@ -3545,6 +3545,7 @@ static int ni_cdio_cmdtest(struct comedi_device *dev, | |||
| 3545 | struct comedi_subdevice *s, struct comedi_cmd *cmd) | 3545 | struct comedi_subdevice *s, struct comedi_cmd *cmd) |
| 3546 | { | 3546 | { |
| 3547 | struct ni_private *devpriv = dev->private; | 3547 | struct ni_private *devpriv = dev->private; |
| 3548 | unsigned int bytes_per_scan; | ||
| 3548 | int err = 0; | 3549 | int err = 0; |
| 3549 | 3550 | ||
| 3550 | /* Step 1 : check if triggers are trivially valid */ | 3551 | /* Step 1 : check if triggers are trivially valid */ |
| @@ -3579,9 +3580,12 @@ static int ni_cdio_cmdtest(struct comedi_device *dev, | |||
| 3579 | err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); | 3580 | err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); |
| 3580 | err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg, | 3581 | err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg, |
| 3581 | cmd->chanlist_len); | 3582 | cmd->chanlist_len); |
| 3582 | err |= comedi_check_trigger_arg_max(&cmd->stop_arg, | 3583 | bytes_per_scan = comedi_bytes_per_scan_cmd(s, cmd); |
| 3583 | s->async->prealloc_bufsz / | 3584 | if (bytes_per_scan) { |
| 3584 | comedi_bytes_per_scan(s)); | 3585 | err |= comedi_check_trigger_arg_max(&cmd->stop_arg, |
| 3586 | s->async->prealloc_bufsz / | ||
| 3587 | bytes_per_scan); | ||
| 3588 | } | ||
| 3585 | 3589 | ||
| 3586 | if (err) | 3590 | if (err) |
| 3587 | return 3; | 3591 | return 3; |
diff --git a/drivers/staging/erofs/dir.c b/drivers/staging/erofs/dir.c index 829f7b12e0dc..9bbc68729c11 100644 --- a/drivers/staging/erofs/dir.c +++ b/drivers/staging/erofs/dir.c | |||
| @@ -23,6 +23,21 @@ static const unsigned char erofs_filetype_table[EROFS_FT_MAX] = { | |||
| 23 | [EROFS_FT_SYMLINK] = DT_LNK, | 23 | [EROFS_FT_SYMLINK] = DT_LNK, |
| 24 | }; | 24 | }; |
| 25 | 25 | ||
| 26 | static void debug_one_dentry(unsigned char d_type, const char *de_name, | ||
| 27 | unsigned int de_namelen) | ||
| 28 | { | ||
| 29 | #ifdef CONFIG_EROFS_FS_DEBUG | ||
| 30 | /* since the on-disk name could not have the trailing '\0' */ | ||
| 31 | unsigned char dbg_namebuf[EROFS_NAME_LEN + 1]; | ||
| 32 | |||
| 33 | memcpy(dbg_namebuf, de_name, de_namelen); | ||
| 34 | dbg_namebuf[de_namelen] = '\0'; | ||
| 35 | |||
| 36 | debugln("found dirent %s de_len %u d_type %d", dbg_namebuf, | ||
| 37 | de_namelen, d_type); | ||
| 38 | #endif | ||
| 39 | } | ||
| 40 | |||
| 26 | static int erofs_fill_dentries(struct dir_context *ctx, | 41 | static int erofs_fill_dentries(struct dir_context *ctx, |
| 27 | void *dentry_blk, unsigned int *ofs, | 42 | void *dentry_blk, unsigned int *ofs, |
| 28 | unsigned int nameoff, unsigned int maxsize) | 43 | unsigned int nameoff, unsigned int maxsize) |
| @@ -33,14 +48,10 @@ static int erofs_fill_dentries(struct dir_context *ctx, | |||
| 33 | de = dentry_blk + *ofs; | 48 | de = dentry_blk + *ofs; |
| 34 | while (de < end) { | 49 | while (de < end) { |
| 35 | const char *de_name; | 50 | const char *de_name; |
| 36 | int de_namelen; | 51 | unsigned int de_namelen; |
| 37 | unsigned char d_type; | 52 | unsigned char d_type; |
| 38 | #ifdef CONFIG_EROFS_FS_DEBUG | ||
| 39 | unsigned int dbg_namelen; | ||
| 40 | unsigned char dbg_namebuf[EROFS_NAME_LEN]; | ||
| 41 | #endif | ||
| 42 | 53 | ||
| 43 | if (unlikely(de->file_type < EROFS_FT_MAX)) | 54 | if (de->file_type < EROFS_FT_MAX) |
| 44 | d_type = erofs_filetype_table[de->file_type]; | 55 | d_type = erofs_filetype_table[de->file_type]; |
| 45 | else | 56 | else |
| 46 | d_type = DT_UNKNOWN; | 57 | d_type = DT_UNKNOWN; |
| @@ -48,26 +59,20 @@ static int erofs_fill_dentries(struct dir_context *ctx, | |||
| 48 | nameoff = le16_to_cpu(de->nameoff); | 59 | nameoff = le16_to_cpu(de->nameoff); |
| 49 | de_name = (char *)dentry_blk + nameoff; | 60 | de_name = (char *)dentry_blk + nameoff; |
| 50 | 61 | ||
| 51 | de_namelen = unlikely(de + 1 >= end) ? | 62 | /* the last dirent in the block? */ |
| 52 | /* last directory entry */ | 63 | if (de + 1 >= end) |
| 53 | strnlen(de_name, maxsize - nameoff) : | 64 | de_namelen = strnlen(de_name, maxsize - nameoff); |
| 54 | le16_to_cpu(de[1].nameoff) - nameoff; | 65 | else |
| 66 | de_namelen = le16_to_cpu(de[1].nameoff) - nameoff; | ||
| 55 | 67 | ||
| 56 | /* a corrupted entry is found */ | 68 | /* a corrupted entry is found */ |
| 57 | if (unlikely(de_namelen < 0)) { | 69 | if (unlikely(nameoff + de_namelen > maxsize || |
| 70 | de_namelen > EROFS_NAME_LEN)) { | ||
| 58 | DBG_BUGON(1); | 71 | DBG_BUGON(1); |
| 59 | return -EIO; | 72 | return -EIO; |
| 60 | } | 73 | } |
| 61 | 74 | ||
| 62 | #ifdef CONFIG_EROFS_FS_DEBUG | 75 | debug_one_dentry(d_type, de_name, de_namelen); |
| 63 | dbg_namelen = min(EROFS_NAME_LEN - 1, de_namelen); | ||
| 64 | memcpy(dbg_namebuf, de_name, dbg_namelen); | ||
| 65 | dbg_namebuf[dbg_namelen] = '\0'; | ||
| 66 | |||
| 67 | debugln("%s, found de_name %s de_len %d d_type %d", __func__, | ||
| 68 | dbg_namebuf, de_namelen, d_type); | ||
| 69 | #endif | ||
| 70 | |||
| 71 | if (!dir_emit(ctx, de_name, de_namelen, | 76 | if (!dir_emit(ctx, de_name, de_namelen, |
| 72 | le64_to_cpu(de->nid), d_type)) | 77 | le64_to_cpu(de->nid), d_type)) |
| 73 | /* stopped by some reason */ | 78 | /* stopped by some reason */ |
diff --git a/drivers/staging/erofs/unzip_vle.c b/drivers/staging/erofs/unzip_vle.c index 8715bc50e09c..31eef8395774 100644 --- a/drivers/staging/erofs/unzip_vle.c +++ b/drivers/staging/erofs/unzip_vle.c | |||
| @@ -972,6 +972,7 @@ repeat: | |||
| 972 | overlapped = false; | 972 | overlapped = false; |
| 973 | compressed_pages = grp->compressed_pages; | 973 | compressed_pages = grp->compressed_pages; |
| 974 | 974 | ||
| 975 | err = 0; | ||
| 975 | for (i = 0; i < clusterpages; ++i) { | 976 | for (i = 0; i < clusterpages; ++i) { |
| 976 | unsigned int pagenr; | 977 | unsigned int pagenr; |
| 977 | 978 | ||
| @@ -981,26 +982,39 @@ repeat: | |||
| 981 | DBG_BUGON(!page); | 982 | DBG_BUGON(!page); |
| 982 | DBG_BUGON(!page->mapping); | 983 | DBG_BUGON(!page->mapping); |
| 983 | 984 | ||
| 984 | if (z_erofs_is_stagingpage(page)) | 985 | if (!z_erofs_is_stagingpage(page)) { |
| 985 | continue; | ||
| 986 | #ifdef EROFS_FS_HAS_MANAGED_CACHE | 986 | #ifdef EROFS_FS_HAS_MANAGED_CACHE |
| 987 | if (page->mapping == MNGD_MAPPING(sbi)) { | 987 | if (page->mapping == MNGD_MAPPING(sbi)) { |
| 988 | DBG_BUGON(!PageUptodate(page)); | 988 | if (unlikely(!PageUptodate(page))) |
| 989 | continue; | 989 | err = -EIO; |
| 990 | } | 990 | continue; |
| 991 | } | ||
| 991 | #endif | 992 | #endif |
| 992 | 993 | ||
| 993 | /* only non-head page could be reused as a compressed page */ | 994 | /* |
| 994 | pagenr = z_erofs_onlinepage_index(page); | 995 | * only if non-head page can be selected |
| 996 | * for inplace decompression | ||
| 997 | */ | ||
| 998 | pagenr = z_erofs_onlinepage_index(page); | ||
| 995 | 999 | ||
| 996 | DBG_BUGON(pagenr >= nr_pages); | 1000 | DBG_BUGON(pagenr >= nr_pages); |
| 997 | DBG_BUGON(pages[pagenr]); | 1001 | DBG_BUGON(pages[pagenr]); |
| 998 | ++sparsemem_pages; | 1002 | ++sparsemem_pages; |
| 999 | pages[pagenr] = page; | 1003 | pages[pagenr] = page; |
| 1000 | 1004 | ||
| 1001 | overlapped = true; | 1005 | overlapped = true; |
| 1006 | } | ||
| 1007 | |||
| 1008 | /* PG_error needs checking for inplaced and staging pages */ | ||
| 1009 | if (unlikely(PageError(page))) { | ||
| 1010 | DBG_BUGON(PageUptodate(page)); | ||
| 1011 | err = -EIO; | ||
| 1012 | } | ||
| 1002 | } | 1013 | } |
| 1003 | 1014 | ||
| 1015 | if (unlikely(err)) | ||
| 1016 | goto out; | ||
| 1017 | |||
| 1004 | llen = (nr_pages << PAGE_SHIFT) - work->pageofs; | 1018 | llen = (nr_pages << PAGE_SHIFT) - work->pageofs; |
| 1005 | 1019 | ||
| 1006 | if (z_erofs_vle_workgrp_fmt(grp) == Z_EROFS_VLE_WORKGRP_FMT_PLAIN) { | 1020 | if (z_erofs_vle_workgrp_fmt(grp) == Z_EROFS_VLE_WORKGRP_FMT_PLAIN) { |
| @@ -1029,6 +1043,10 @@ repeat: | |||
| 1029 | 1043 | ||
| 1030 | skip_allocpage: | 1044 | skip_allocpage: |
| 1031 | vout = erofs_vmap(pages, nr_pages); | 1045 | vout = erofs_vmap(pages, nr_pages); |
| 1046 | if (!vout) { | ||
| 1047 | err = -ENOMEM; | ||
| 1048 | goto out; | ||
| 1049 | } | ||
| 1032 | 1050 | ||
| 1033 | err = z_erofs_vle_unzip_vmap(compressed_pages, | 1051 | err = z_erofs_vle_unzip_vmap(compressed_pages, |
| 1034 | clusterpages, vout, llen, work->pageofs, overlapped); | 1052 | clusterpages, vout, llen, work->pageofs, overlapped); |
| @@ -1194,6 +1212,7 @@ repeat: | |||
| 1194 | if (page->mapping == mc) { | 1212 | if (page->mapping == mc) { |
| 1195 | WRITE_ONCE(grp->compressed_pages[nr], page); | 1213 | WRITE_ONCE(grp->compressed_pages[nr], page); |
| 1196 | 1214 | ||
| 1215 | ClearPageError(page); | ||
| 1197 | if (!PagePrivate(page)) { | 1216 | if (!PagePrivate(page)) { |
| 1198 | /* | 1217 | /* |
| 1199 | * impossible to be !PagePrivate(page) for | 1218 | * impossible to be !PagePrivate(page) for |
diff --git a/drivers/staging/erofs/unzip_vle_lz4.c b/drivers/staging/erofs/unzip_vle_lz4.c index 48b263a2731a..0daac9b984a8 100644 --- a/drivers/staging/erofs/unzip_vle_lz4.c +++ b/drivers/staging/erofs/unzip_vle_lz4.c | |||
| @@ -136,10 +136,13 @@ int z_erofs_vle_unzip_fast_percpu(struct page **compressed_pages, | |||
| 136 | 136 | ||
| 137 | nr_pages = DIV_ROUND_UP(outlen + pageofs, PAGE_SIZE); | 137 | nr_pages = DIV_ROUND_UP(outlen + pageofs, PAGE_SIZE); |
| 138 | 138 | ||
| 139 | if (clusterpages == 1) | 139 | if (clusterpages == 1) { |
| 140 | vin = kmap_atomic(compressed_pages[0]); | 140 | vin = kmap_atomic(compressed_pages[0]); |
| 141 | else | 141 | } else { |
| 142 | vin = erofs_vmap(compressed_pages, clusterpages); | 142 | vin = erofs_vmap(compressed_pages, clusterpages); |
| 143 | if (!vin) | ||
| 144 | return -ENOMEM; | ||
| 145 | } | ||
| 143 | 146 | ||
| 144 | preempt_disable(); | 147 | preempt_disable(); |
| 145 | vout = erofs_pcpubuf[smp_processor_id()].data; | 148 | vout = erofs_pcpubuf[smp_processor_id()].data; |
diff --git a/drivers/staging/mt7621-dts/gbpc1.dts b/drivers/staging/mt7621-dts/gbpc1.dts index b73385540216..250c15ace2a7 100644 --- a/drivers/staging/mt7621-dts/gbpc1.dts +++ b/drivers/staging/mt7621-dts/gbpc1.dts | |||
| @@ -117,22 +117,6 @@ | |||
| 117 | status = "okay"; | 117 | status = "okay"; |
| 118 | }; | 118 | }; |
| 119 | 119 | ||
| 120 | ðernet { | ||
| 121 | //mtd-mac-address = <&factory 0xe000>; | ||
| 122 | gmac1: mac@0 { | ||
| 123 | compatible = "mediatek,eth-mac"; | ||
| 124 | reg = <0>; | ||
| 125 | phy-handle = <&phy1>; | ||
| 126 | }; | ||
| 127 | |||
| 128 | mdio-bus { | ||
| 129 | phy1: ethernet-phy@1 { | ||
| 130 | reg = <1>; | ||
| 131 | phy-mode = "rgmii"; | ||
| 132 | }; | ||
| 133 | }; | ||
| 134 | }; | ||
| 135 | |||
| 136 | &pinctrl { | 120 | &pinctrl { |
| 137 | state_default: pinctrl0 { | 121 | state_default: pinctrl0 { |
| 138 | gpio { | 122 | gpio { |
| @@ -141,3 +125,16 @@ | |||
| 141 | }; | 125 | }; |
| 142 | }; | 126 | }; |
| 143 | }; | 127 | }; |
| 128 | |||
| 129 | &switch0 { | ||
| 130 | ports { | ||
| 131 | port@0 { | ||
| 132 | label = "ethblack"; | ||
| 133 | status = "ok"; | ||
| 134 | }; | ||
| 135 | port@4 { | ||
| 136 | label = "ethblue"; | ||
| 137 | status = "ok"; | ||
| 138 | }; | ||
| 139 | }; | ||
| 140 | }; | ||
diff --git a/drivers/staging/mt7621-dts/mt7621.dtsi b/drivers/staging/mt7621-dts/mt7621.dtsi index 6aff3680ce4b..17020e24abd2 100644 --- a/drivers/staging/mt7621-dts/mt7621.dtsi +++ b/drivers/staging/mt7621-dts/mt7621.dtsi | |||
| @@ -372,16 +372,83 @@ | |||
| 372 | 372 | ||
| 373 | mediatek,ethsys = <ðsys>; | 373 | mediatek,ethsys = <ðsys>; |
| 374 | 374 | ||
| 375 | mediatek,switch = <&gsw>; | ||
| 376 | 375 | ||
| 376 | gmac0: mac@0 { | ||
| 377 | compatible = "mediatek,eth-mac"; | ||
| 378 | reg = <0>; | ||
| 379 | phy-mode = "rgmii"; | ||
| 380 | fixed-link { | ||
| 381 | speed = <1000>; | ||
| 382 | full-duplex; | ||
| 383 | pause; | ||
| 384 | }; | ||
| 385 | }; | ||
| 386 | gmac1: mac@1 { | ||
| 387 | compatible = "mediatek,eth-mac"; | ||
| 388 | reg = <1>; | ||
| 389 | status = "off"; | ||
| 390 | phy-mode = "rgmii"; | ||
| 391 | phy-handle = <&phy5>; | ||
| 392 | }; | ||
| 377 | mdio-bus { | 393 | mdio-bus { |
| 378 | #address-cells = <1>; | 394 | #address-cells = <1>; |
| 379 | #size-cells = <0>; | 395 | #size-cells = <0>; |
| 380 | 396 | ||
| 381 | phy1f: ethernet-phy@1f { | 397 | phy5: ethernet-phy@5 { |
| 382 | reg = <0x1f>; | 398 | reg = <5>; |
| 383 | phy-mode = "rgmii"; | 399 | phy-mode = "rgmii"; |
| 384 | }; | 400 | }; |
| 401 | |||
| 402 | switch0: switch0@0 { | ||
| 403 | compatible = "mediatek,mt7621"; | ||
| 404 | #address-cells = <1>; | ||
| 405 | #size-cells = <0>; | ||
| 406 | reg = <0>; | ||
| 407 | mediatek,mcm; | ||
| 408 | resets = <&rstctrl 2>; | ||
| 409 | reset-names = "mcm"; | ||
| 410 | |||
| 411 | ports { | ||
| 412 | #address-cells = <1>; | ||
| 413 | #size-cells = <0>; | ||
| 414 | reg = <0>; | ||
| 415 | port@0 { | ||
| 416 | status = "off"; | ||
| 417 | reg = <0>; | ||
| 418 | label = "lan0"; | ||
| 419 | }; | ||
| 420 | port@1 { | ||
| 421 | status = "off"; | ||
| 422 | reg = <1>; | ||
| 423 | label = "lan1"; | ||
| 424 | }; | ||
| 425 | port@2 { | ||
| 426 | status = "off"; | ||
| 427 | reg = <2>; | ||
| 428 | label = "lan2"; | ||
| 429 | }; | ||
| 430 | port@3 { | ||
| 431 | status = "off"; | ||
| 432 | reg = <3>; | ||
| 433 | label = "lan3"; | ||
| 434 | }; | ||
| 435 | port@4 { | ||
| 436 | status = "off"; | ||
| 437 | reg = <4>; | ||
| 438 | label = "lan4"; | ||
| 439 | }; | ||
| 440 | port@6 { | ||
| 441 | reg = <6>; | ||
| 442 | label = "cpu"; | ||
| 443 | ethernet = <&gmac0>; | ||
| 444 | phy-mode = "trgmii"; | ||
| 445 | fixed-link { | ||
| 446 | speed = <1000>; | ||
| 447 | full-duplex; | ||
| 448 | }; | ||
| 449 | }; | ||
| 450 | }; | ||
| 451 | }; | ||
| 385 | }; | 452 | }; |
| 386 | }; | 453 | }; |
| 387 | 454 | ||
diff --git a/drivers/staging/mt7621-eth/Documentation/devicetree/bindings/net/mediatek-net-gsw.txt b/drivers/staging/mt7621-eth/Documentation/devicetree/bindings/net/mediatek-net-gsw.txt deleted file mode 100644 index 596b38552697..000000000000 --- a/drivers/staging/mt7621-eth/Documentation/devicetree/bindings/net/mediatek-net-gsw.txt +++ /dev/null | |||
| @@ -1,48 +0,0 @@ | |||
| 1 | Mediatek Gigabit Switch | ||
| 2 | ======================= | ||
| 3 | |||
| 4 | The mediatek gigabit switch can be found on Mediatek SoCs. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: Should be "mediatek,mt7620-gsw", "mediatek,mt7621-gsw", | ||
| 8 | "mediatek,mt7623-gsw" | ||
| 9 | - reg: Address and length of the register set for the device | ||
| 10 | - interrupts: Should contain the gigabit switches interrupt | ||
| 11 | |||
| 12 | |||
| 13 | Additional required properties for ARM based SoCs: | ||
| 14 | - mediatek,reset-pin: phandle describing the reset GPIO | ||
| 15 | - clocks: the clocks used by the switch | ||
| 16 | - clock-names: the names of the clocks listed in the clocks property | ||
| 17 | these should be "trgpll", "esw", "gp2", "gp1" | ||
| 18 | - mt7530-supply: the phandle of the regulator used to power the switch | ||
| 19 | - mediatek,pctl-regmap: phandle to the port control regmap. this is used to | ||
| 20 | setup the drive current | ||
| 21 | |||
| 22 | |||
| 23 | Optional properties: | ||
| 24 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 25 | that services interrupts for this device | ||
| 26 | |||
| 27 | Example: | ||
| 28 | |||
| 29 | gsw: switch@1b100000 { | ||
| 30 | compatible = "mediatek,mt7623-gsw"; | ||
| 31 | reg = <0 0x1b110000 0 0x300000>; | ||
| 32 | |||
| 33 | interrupt-parent = <&pio>; | ||
| 34 | interrupts = <168 IRQ_TYPE_EDGE_RISING>; | ||
| 35 | |||
| 36 | clocks = <&apmixedsys CLK_APMIXED_TRGPLL>, | ||
| 37 | <ðsys CLK_ETHSYS_ESW>, | ||
| 38 | <ðsys CLK_ETHSYS_GP2>, | ||
| 39 | <ðsys CLK_ETHSYS_GP1>; | ||
| 40 | clock-names = "trgpll", "esw", "gp2", "gp1"; | ||
| 41 | |||
| 42 | mt7530-supply = <&mt6323_vpa_reg>; | ||
| 43 | |||
| 44 | mediatek,pctl-regmap = <&syscfg_pctl_a>; | ||
| 45 | mediatek,reset-pin = <&pio 15 0>; | ||
| 46 | |||
| 47 | status = "okay"; | ||
| 48 | }; | ||
diff --git a/drivers/staging/mt7621-eth/Kconfig b/drivers/staging/mt7621-eth/Kconfig deleted file mode 100644 index 44ea86c7a96c..000000000000 --- a/drivers/staging/mt7621-eth/Kconfig +++ /dev/null | |||
| @@ -1,39 +0,0 @@ | |||
| 1 | config NET_VENDOR_MEDIATEK_STAGING | ||
| 2 | bool "MediaTek ethernet driver - staging version" | ||
| 3 | depends on RALINK | ||
| 4 | ---help--- | ||
| 5 | If you have an MT7621 Mediatek SoC with ethernet, say Y. | ||
| 6 | |||
| 7 | if NET_VENDOR_MEDIATEK_STAGING | ||
| 8 | choice | ||
| 9 | prompt "MAC type" | ||
| 10 | |||
| 11 | config NET_MEDIATEK_MT7621 | ||
| 12 | bool "MT7621" | ||
| 13 | depends on MIPS && SOC_MT7621 | ||
| 14 | |||
| 15 | endchoice | ||
| 16 | |||
| 17 | config NET_MEDIATEK_SOC_STAGING | ||
| 18 | tristate "MediaTek SoC Gigabit Ethernet support" | ||
| 19 | depends on NET_VENDOR_MEDIATEK_STAGING | ||
| 20 | select PHYLIB | ||
| 21 | ---help--- | ||
| 22 | This driver supports the gigabit ethernet MACs in the | ||
| 23 | MediaTek SoC family. | ||
| 24 | |||
| 25 | config NET_MEDIATEK_MDIO | ||
| 26 | def_bool NET_MEDIATEK_SOC_STAGING | ||
| 27 | depends on NET_MEDIATEK_MT7621 | ||
| 28 | select PHYLIB | ||
| 29 | |||
| 30 | config NET_MEDIATEK_MDIO_MT7620 | ||
| 31 | def_bool NET_MEDIATEK_SOC_STAGING | ||
| 32 | depends on NET_MEDIATEK_MT7621 | ||
| 33 | select NET_MEDIATEK_MDIO | ||
| 34 | |||
| 35 | config NET_MEDIATEK_GSW_MT7621 | ||
| 36 | def_tristate NET_MEDIATEK_SOC_STAGING | ||
| 37 | depends on NET_MEDIATEK_MT7621 | ||
| 38 | |||
| 39 | endif #NET_VENDOR_MEDIATEK_STAGING | ||
diff --git a/drivers/staging/mt7621-eth/Makefile b/drivers/staging/mt7621-eth/Makefile deleted file mode 100644 index 018bcc3596b3..000000000000 --- a/drivers/staging/mt7621-eth/Makefile +++ /dev/null | |||
| @@ -1,14 +0,0 @@ | |||
| 1 | # | ||
| 2 | # Makefile for the Ralink SoCs built-in ethernet macs | ||
| 3 | # | ||
| 4 | |||
| 5 | mtk-eth-soc-y += mtk_eth_soc.o ethtool.o | ||
| 6 | |||
| 7 | mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MDIO) += mdio.o | ||
| 8 | mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MDIO_MT7620) += mdio_mt7620.o | ||
| 9 | |||
| 10 | mtk-eth-soc-$(CONFIG_NET_MEDIATEK_MT7621) += soc_mt7621.o | ||
| 11 | |||
| 12 | obj-$(CONFIG_NET_MEDIATEK_GSW_MT7621) += gsw_mt7621.o | ||
| 13 | |||
| 14 | obj-$(CONFIG_NET_MEDIATEK_SOC_STAGING) += mtk-eth-soc.o | ||
diff --git a/drivers/staging/mt7621-eth/TODO b/drivers/staging/mt7621-eth/TODO deleted file mode 100644 index f9e47d4b4cd4..000000000000 --- a/drivers/staging/mt7621-eth/TODO +++ /dev/null | |||
| @@ -1,13 +0,0 @@ | |||
| 1 | |||
| 2 | - verify devicetree documentation is consistent with code | ||
| 3 | - fix ethtool - currently doesn't return valid data. | ||
| 4 | - general code review and clean up | ||
| 5 | - add support for second MAC on mt7621 | ||
| 6 | - convert gsw code to use switchdev interfaces | ||
| 7 | - md7620_mmi_write etc should probably be wrapped | ||
| 8 | in a regmap abstraction. | ||
| 9 | - Get soc_mt7621 to work with QDMA TX if possible. | ||
| 10 | - Ensure phys are correctly configured when a cable | ||
| 11 | is plugged in. | ||
| 12 | |||
| 13 | Cc: NeilBrown <neil@brown.name> | ||
diff --git a/drivers/staging/mt7621-eth/ethtool.c b/drivers/staging/mt7621-eth/ethtool.c deleted file mode 100644 index 8c4228e2c987..000000000000 --- a/drivers/staging/mt7621-eth/ethtool.c +++ /dev/null | |||
| @@ -1,250 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | /* This program is free software; you can redistribute it and/or modify | ||
| 3 | * it under the terms of the GNU General Public License as published by | ||
| 4 | * the Free Software Foundation; version 2 of the License | ||
| 5 | * | ||
| 6 | * This program is distributed in the hope that it will be useful, | ||
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 9 | * GNU General Public License for more details. | ||
| 10 | * | ||
| 11 | * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> | ||
| 12 | * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> | ||
| 13 | * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include "mtk_eth_soc.h" | ||
| 17 | #include "ethtool.h" | ||
| 18 | |||
| 19 | struct mtk_stat { | ||
| 20 | char name[ETH_GSTRING_LEN]; | ||
| 21 | unsigned int idx; | ||
| 22 | }; | ||
| 23 | |||
| 24 | #define MTK_HW_STAT(stat) { \ | ||
| 25 | .name = #stat, \ | ||
| 26 | .idx = offsetof(struct mtk_hw_stats, stat) / sizeof(u64) \ | ||
| 27 | } | ||
| 28 | |||
| 29 | static const struct mtk_stat mtk_ethtool_hw_stats[] = { | ||
| 30 | MTK_HW_STAT(tx_bytes), | ||
| 31 | MTK_HW_STAT(tx_packets), | ||
| 32 | MTK_HW_STAT(tx_skip), | ||
| 33 | MTK_HW_STAT(tx_collisions), | ||
| 34 | MTK_HW_STAT(rx_bytes), | ||
| 35 | MTK_HW_STAT(rx_packets), | ||
| 36 | MTK_HW_STAT(rx_overflow), | ||
| 37 | MTK_HW_STAT(rx_fcs_errors), | ||
| 38 | MTK_HW_STAT(rx_short_errors), | ||
| 39 | MTK_HW_STAT(rx_long_errors), | ||
| 40 | MTK_HW_STAT(rx_checksum_errors), | ||
| 41 | MTK_HW_STAT(rx_flow_control_packets), | ||
| 42 | }; | ||
| 43 | |||
| 44 | #define MTK_HW_STATS_LEN ARRAY_SIZE(mtk_ethtool_hw_stats) | ||
| 45 | |||
| 46 | static int mtk_get_link_ksettings(struct net_device *dev, | ||
| 47 | struct ethtool_link_ksettings *cmd) | ||
| 48 | { | ||
| 49 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 50 | int err; | ||
| 51 | |||
| 52 | if (!mac->phy_dev) | ||
| 53 | return -ENODEV; | ||
| 54 | |||
| 55 | if (mac->phy_flags == MTK_PHY_FLAG_ATTACH) { | ||
| 56 | err = phy_read_status(mac->phy_dev); | ||
| 57 | if (err) | ||
| 58 | return -ENODEV; | ||
| 59 | } | ||
| 60 | |||
| 61 | phy_ethtool_ksettings_get(mac->phy_dev, cmd); | ||
| 62 | return 0; | ||
| 63 | } | ||
| 64 | |||
| 65 | static int mtk_set_link_ksettings(struct net_device *dev, | ||
| 66 | const struct ethtool_link_ksettings *cmd) | ||
| 67 | { | ||
| 68 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 69 | |||
| 70 | if (!mac->phy_dev) | ||
| 71 | return -ENODEV; | ||
| 72 | |||
| 73 | if (cmd->base.phy_address != mac->phy_dev->mdio.addr) { | ||
| 74 | if (mac->hw->phy->phy_node[cmd->base.phy_address]) { | ||
| 75 | mac->phy_dev = mac->hw->phy->phy[cmd->base.phy_address]; | ||
| 76 | mac->phy_flags = MTK_PHY_FLAG_PORT; | ||
| 77 | } else if (mac->hw->mii_bus) { | ||
| 78 | mac->phy_dev = mdiobus_get_phy(mac->hw->mii_bus, | ||
| 79 | cmd->base.phy_address); | ||
| 80 | if (!mac->phy_dev) | ||
| 81 | return -ENODEV; | ||
| 82 | mac->phy_flags = MTK_PHY_FLAG_ATTACH; | ||
| 83 | } else { | ||
| 84 | return -ENODEV; | ||
| 85 | } | ||
| 86 | } | ||
| 87 | |||
| 88 | return phy_ethtool_ksettings_set(mac->phy_dev, cmd); | ||
| 89 | } | ||
| 90 | |||
| 91 | static void mtk_get_drvinfo(struct net_device *dev, | ||
| 92 | struct ethtool_drvinfo *info) | ||
| 93 | { | ||
| 94 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 95 | struct mtk_soc_data *soc = mac->hw->soc; | ||
| 96 | |||
| 97 | strlcpy(info->driver, mac->hw->dev->driver->name, sizeof(info->driver)); | ||
| 98 | strlcpy(info->bus_info, dev_name(mac->hw->dev), sizeof(info->bus_info)); | ||
| 99 | |||
| 100 | if (soc->reg_table[MTK_REG_MTK_COUNTER_BASE]) | ||
| 101 | info->n_stats = MTK_HW_STATS_LEN; | ||
| 102 | } | ||
| 103 | |||
| 104 | static u32 mtk_get_msglevel(struct net_device *dev) | ||
| 105 | { | ||
| 106 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 107 | |||
| 108 | return mac->hw->msg_enable; | ||
| 109 | } | ||
| 110 | |||
| 111 | static void mtk_set_msglevel(struct net_device *dev, u32 value) | ||
| 112 | { | ||
| 113 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 114 | |||
| 115 | mac->hw->msg_enable = value; | ||
| 116 | } | ||
| 117 | |||
| 118 | static int mtk_nway_reset(struct net_device *dev) | ||
| 119 | { | ||
| 120 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 121 | |||
| 122 | if (!mac->phy_dev) | ||
| 123 | return -EOPNOTSUPP; | ||
| 124 | |||
| 125 | return genphy_restart_aneg(mac->phy_dev); | ||
| 126 | } | ||
| 127 | |||
| 128 | static u32 mtk_get_link(struct net_device *dev) | ||
| 129 | { | ||
| 130 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 131 | int err; | ||
| 132 | |||
| 133 | if (!mac->phy_dev) | ||
| 134 | goto out_get_link; | ||
| 135 | |||
| 136 | if (mac->phy_flags == MTK_PHY_FLAG_ATTACH) { | ||
| 137 | err = genphy_update_link(mac->phy_dev); | ||
| 138 | if (err) | ||
| 139 | goto out_get_link; | ||
| 140 | } | ||
| 141 | |||
| 142 | return mac->phy_dev->link; | ||
| 143 | |||
| 144 | out_get_link: | ||
| 145 | return ethtool_op_get_link(dev); | ||
| 146 | } | ||
| 147 | |||
| 148 | static int mtk_set_ringparam(struct net_device *dev, | ||
| 149 | struct ethtool_ringparam *ring) | ||
| 150 | { | ||
| 151 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 152 | |||
| 153 | if ((ring->tx_pending < 2) || | ||
| 154 | (ring->rx_pending < 2) || | ||
| 155 | (ring->rx_pending > mac->hw->soc->dma_ring_size) || | ||
| 156 | (ring->tx_pending > mac->hw->soc->dma_ring_size)) | ||
| 157 | return -EINVAL; | ||
| 158 | |||
| 159 | dev->netdev_ops->ndo_stop(dev); | ||
| 160 | |||
| 161 | mac->hw->tx_ring.tx_ring_size = BIT(fls(ring->tx_pending) - 1); | ||
| 162 | mac->hw->rx_ring[0].rx_ring_size = BIT(fls(ring->rx_pending) - 1); | ||
| 163 | |||
| 164 | return dev->netdev_ops->ndo_open(dev); | ||
| 165 | } | ||
| 166 | |||
| 167 | static void mtk_get_ringparam(struct net_device *dev, | ||
| 168 | struct ethtool_ringparam *ring) | ||
| 169 | { | ||
| 170 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 171 | |||
| 172 | ring->rx_max_pending = mac->hw->soc->dma_ring_size; | ||
| 173 | ring->tx_max_pending = mac->hw->soc->dma_ring_size; | ||
| 174 | ring->rx_pending = mac->hw->rx_ring[0].rx_ring_size; | ||
| 175 | ring->tx_pending = mac->hw->tx_ring.tx_ring_size; | ||
| 176 | } | ||
| 177 | |||
| 178 | static void mtk_get_strings(struct net_device *dev, u32 stringset, u8 *data) | ||
| 179 | { | ||
| 180 | int i; | ||
| 181 | |||
| 182 | switch (stringset) { | ||
| 183 | case ETH_SS_STATS: | ||
| 184 | for (i = 0; i < MTK_HW_STATS_LEN; i++) { | ||
| 185 | memcpy(data, mtk_ethtool_hw_stats[i].name, | ||
| 186 | ETH_GSTRING_LEN); | ||
| 187 | data += ETH_GSTRING_LEN; | ||
| 188 | } | ||
| 189 | break; | ||
| 190 | } | ||
| 191 | } | ||
| 192 | |||
| 193 | static int mtk_get_sset_count(struct net_device *dev, int sset) | ||
| 194 | { | ||
| 195 | switch (sset) { | ||
| 196 | case ETH_SS_STATS: | ||
| 197 | return MTK_HW_STATS_LEN; | ||
| 198 | default: | ||
| 199 | return -EOPNOTSUPP; | ||
| 200 | } | ||
| 201 | } | ||
| 202 | |||
| 203 | static void mtk_get_ethtool_stats(struct net_device *dev, | ||
| 204 | struct ethtool_stats *stats, u64 *data) | ||
| 205 | { | ||
| 206 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 207 | struct mtk_hw_stats *hwstats = mac->hw_stats; | ||
| 208 | unsigned int start; | ||
| 209 | int i; | ||
| 210 | |||
| 211 | if (netif_running(dev) && netif_device_present(dev)) { | ||
| 212 | if (spin_trylock(&hwstats->stats_lock)) { | ||
| 213 | mtk_stats_update_mac(mac); | ||
| 214 | spin_unlock(&hwstats->stats_lock); | ||
| 215 | } | ||
| 216 | } | ||
| 217 | |||
| 218 | do { | ||
| 219 | start = u64_stats_fetch_begin_irq(&hwstats->syncp); | ||
| 220 | for (i = 0; i < MTK_HW_STATS_LEN; i++) | ||
| 221 | data[i] = ((u64 *)hwstats)[mtk_ethtool_hw_stats[i].idx]; | ||
| 222 | |||
| 223 | } while (u64_stats_fetch_retry_irq(&hwstats->syncp, start)); | ||
| 224 | } | ||
| 225 | |||
| 226 | static struct ethtool_ops mtk_ethtool_ops = { | ||
| 227 | .get_link_ksettings = mtk_get_link_ksettings, | ||
| 228 | .set_link_ksettings = mtk_set_link_ksettings, | ||
| 229 | .get_drvinfo = mtk_get_drvinfo, | ||
| 230 | .get_msglevel = mtk_get_msglevel, | ||
| 231 | .set_msglevel = mtk_set_msglevel, | ||
| 232 | .nway_reset = mtk_nway_reset, | ||
| 233 | .get_link = mtk_get_link, | ||
| 234 | .set_ringparam = mtk_set_ringparam, | ||
| 235 | .get_ringparam = mtk_get_ringparam, | ||
| 236 | }; | ||
| 237 | |||
| 238 | void mtk_set_ethtool_ops(struct net_device *netdev) | ||
| 239 | { | ||
| 240 | struct mtk_mac *mac = netdev_priv(netdev); | ||
| 241 | struct mtk_soc_data *soc = mac->hw->soc; | ||
| 242 | |||
| 243 | if (soc->reg_table[MTK_REG_MTK_COUNTER_BASE]) { | ||
| 244 | mtk_ethtool_ops.get_strings = mtk_get_strings; | ||
| 245 | mtk_ethtool_ops.get_sset_count = mtk_get_sset_count; | ||
| 246 | mtk_ethtool_ops.get_ethtool_stats = mtk_get_ethtool_stats; | ||
| 247 | } | ||
| 248 | |||
| 249 | netdev->ethtool_ops = &mtk_ethtool_ops; | ||
| 250 | } | ||
diff --git a/drivers/staging/mt7621-eth/ethtool.h b/drivers/staging/mt7621-eth/ethtool.h deleted file mode 100644 index 0071469aea6c..000000000000 --- a/drivers/staging/mt7621-eth/ethtool.h +++ /dev/null | |||
| @@ -1,15 +0,0 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
| 2 | /* | ||
| 3 | * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> | ||
| 4 | * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> | ||
| 5 | * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> | ||
| 6 | */ | ||
| 7 | |||
| 8 | #ifndef MTK_ETHTOOL_H | ||
| 9 | #define MTK_ETHTOOL_H | ||
| 10 | |||
| 11 | #include <linux/ethtool.h> | ||
| 12 | |||
| 13 | void mtk_set_ethtool_ops(struct net_device *netdev); | ||
| 14 | |||
| 15 | #endif /* MTK_ETHTOOL_H */ | ||
diff --git a/drivers/staging/mt7621-eth/gsw_mt7620.h b/drivers/staging/mt7621-eth/gsw_mt7620.h deleted file mode 100644 index 70f7e5481952..000000000000 --- a/drivers/staging/mt7621-eth/gsw_mt7620.h +++ /dev/null | |||
| @@ -1,277 +0,0 @@ | |||
| 1 | /* This program is free software; you can redistribute it and/or modify | ||
| 2 | * it under the terms of the GNU General Public License as published by | ||
| 3 | * the Free Software Foundation; version 2 of the License | ||
| 4 | * | ||
| 5 | * This program is distributed in the hope that it will be useful, | ||
| 6 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 7 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 8 | * GNU General Public License for more details. | ||
| 9 | * | ||
| 10 | * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> | ||
| 11 | * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> | ||
| 12 | * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef _RALINK_GSW_MT7620_H__ | ||
| 16 | #define _RALINK_GSW_MT7620_H__ | ||
| 17 | |||
| 18 | #define GSW_REG_PHY_TIMEOUT (5 * HZ) | ||
| 19 | |||
| 20 | #define MT7620_GSW_REG_PIAC 0x0004 | ||
| 21 | |||
| 22 | #define GSW_NUM_VLANS 16 | ||
| 23 | #define GSW_NUM_VIDS 4096 | ||
| 24 | #define GSW_NUM_PORTS 7 | ||
| 25 | #define GSW_PORT6 6 | ||
| 26 | |||
| 27 | #define GSW_MDIO_ACCESS BIT(31) | ||
| 28 | #define GSW_MDIO_READ BIT(19) | ||
| 29 | #define GSW_MDIO_WRITE BIT(18) | ||
| 30 | #define GSW_MDIO_START BIT(16) | ||
| 31 | #define GSW_MDIO_ADDR_SHIFT 20 | ||
| 32 | #define GSW_MDIO_REG_SHIFT 25 | ||
| 33 | |||
| 34 | #define GSW_REG_PORT_PMCR(x) (0x3000 + (x * 0x100)) | ||
| 35 | #define GSW_REG_PORT_STATUS(x) (0x3008 + (x * 0x100)) | ||
| 36 | #define GSW_REG_SMACCR0 0x3fE4 | ||
| 37 | #define GSW_REG_SMACCR1 0x3fE8 | ||
| 38 | #define GSW_REG_CKGCR 0x3ff0 | ||
| 39 | |||
| 40 | #define GSW_REG_IMR 0x7008 | ||
| 41 | #define GSW_REG_ISR 0x700c | ||
| 42 | #define GSW_REG_GPC1 0x7014 | ||
| 43 | |||
| 44 | #define SYSC_REG_CHIP_REV_ID 0x0c | ||
| 45 | #define SYSC_REG_CFG 0x10 | ||
| 46 | #define SYSC_REG_CFG1 0x14 | ||
| 47 | #define RST_CTRL_MCM BIT(2) | ||
| 48 | #define SYSC_PAD_RGMII2_MDIO 0x58 | ||
| 49 | #define SYSC_GPIO_MODE 0x60 | ||
| 50 | |||
| 51 | #define PORT_IRQ_ST_CHG 0x7f | ||
| 52 | |||
| 53 | #define MT7621_ESW_PHY_POLLING 0x0000 | ||
| 54 | #define MT7620_ESW_PHY_POLLING 0x7000 | ||
| 55 | |||
| 56 | #define PMCR_IPG BIT(18) | ||
| 57 | #define PMCR_MAC_MODE BIT(16) | ||
| 58 | #define PMCR_FORCE BIT(15) | ||
| 59 | #define PMCR_TX_EN BIT(14) | ||
| 60 | #define PMCR_RX_EN BIT(13) | ||
| 61 | #define PMCR_BACKOFF BIT(9) | ||
| 62 | #define PMCR_BACKPRES BIT(8) | ||
| 63 | #define PMCR_RX_FC BIT(5) | ||
| 64 | #define PMCR_TX_FC BIT(4) | ||
| 65 | #define PMCR_SPEED(_x) (_x << 2) | ||
| 66 | #define PMCR_DUPLEX BIT(1) | ||
| 67 | #define PMCR_LINK BIT(0) | ||
| 68 | |||
| 69 | #define PHY_AN_EN BIT(31) | ||
| 70 | #define PHY_PRE_EN BIT(30) | ||
| 71 | #define PMY_MDC_CONF(_x) ((_x & 0x3f) << 24) | ||
| 72 | |||
| 73 | /* ethernet subsystem config register */ | ||
| 74 | #define ETHSYS_SYSCFG0 0x14 | ||
| 75 | /* ethernet subsystem clock register */ | ||
| 76 | #define ETHSYS_CLKCFG0 0x2c | ||
| 77 | #define ETHSYS_TRGMII_CLK_SEL362_5 BIT(11) | ||
| 78 | |||
| 79 | /* p5 RGMII wrapper TX clock control register */ | ||
| 80 | #define MT7530_P5RGMIITXCR 0x7b04 | ||
| 81 | /* p5 RGMII wrapper RX clock control register */ | ||
| 82 | #define MT7530_P5RGMIIRXCR 0x7b00 | ||
| 83 | /* TRGMII TDX ODT registers */ | ||
| 84 | #define MT7530_TRGMII_TD0_ODT 0x7a54 | ||
| 85 | #define MT7530_TRGMII_TD1_ODT 0x7a5c | ||
| 86 | #define MT7530_TRGMII_TD2_ODT 0x7a64 | ||
| 87 | #define MT7530_TRGMII_TD3_ODT 0x7a6c | ||
| 88 | #define MT7530_TRGMII_TD4_ODT 0x7a74 | ||
| 89 | #define MT7530_TRGMII_TD5_ODT 0x7a7c | ||
| 90 | /* TRGMII TCK ctrl register */ | ||
| 91 | #define MT7530_TRGMII_TCK_CTRL 0x7a78 | ||
| 92 | /* TRGMII Tx ctrl register */ | ||
| 93 | #define MT7530_TRGMII_TXCTRL 0x7a40 | ||
| 94 | /* port 6 extended control register */ | ||
| 95 | #define MT7530_P6ECR 0x7830 | ||
| 96 | /* IO driver control register */ | ||
| 97 | #define MT7530_IO_DRV_CR 0x7810 | ||
| 98 | /* top signal control register */ | ||
| 99 | #define MT7530_TOP_SIG_CTRL 0x7808 | ||
| 100 | /* modified hwtrap register */ | ||
| 101 | #define MT7530_MHWTRAP 0x7804 | ||
| 102 | /* hwtrap status register */ | ||
| 103 | #define MT7530_HWTRAP 0x7800 | ||
| 104 | /* status interrupt register */ | ||
| 105 | #define MT7530_SYS_INT_STS 0x700c | ||
| 106 | /* system nterrupt register */ | ||
| 107 | #define MT7530_SYS_INT_EN 0x7008 | ||
| 108 | /* system control register */ | ||
| 109 | #define MT7530_SYS_CTRL 0x7000 | ||
| 110 | /* port MAC status register */ | ||
| 111 | #define MT7530_PMSR_P(x) (0x3008 + (x * 0x100)) | ||
| 112 | /* port MAC control register */ | ||
| 113 | #define MT7530_PMCR_P(x) (0x3000 + (x * 0x100)) | ||
| 114 | |||
| 115 | #define MT7621_XTAL_SHIFT 6 | ||
| 116 | #define MT7621_XTAL_MASK 0x7 | ||
| 117 | #define MT7621_XTAL_25 6 | ||
| 118 | #define MT7621_XTAL_40 3 | ||
| 119 | #define MT7621_MDIO_DRV_MASK (3 << 4) | ||
| 120 | #define MT7621_GE1_MODE_MASK (3 << 12) | ||
| 121 | |||
| 122 | #define TRGMII_TXCTRL_TXC_INV BIT(30) | ||
| 123 | #define P6ECR_INTF_MODE_RGMII BIT(1) | ||
| 124 | #define P5RGMIIRXCR_C_ALIGN BIT(8) | ||
| 125 | #define P5RGMIIRXCR_DELAY_2 BIT(1) | ||
| 126 | #define P5RGMIITXCR_DELAY_2 (BIT(8) | BIT(2)) | ||
| 127 | |||
| 128 | /* TOP_SIG_CTRL bits */ | ||
| 129 | #define TOP_SIG_CTRL_NORMAL (BIT(17) | BIT(16)) | ||
| 130 | |||
| 131 | /* MHWTRAP bits */ | ||
| 132 | #define MHWTRAP_MANUAL BIT(16) | ||
| 133 | #define MHWTRAP_P5_MAC_SEL BIT(13) | ||
| 134 | #define MHWTRAP_P6_DIS BIT(8) | ||
| 135 | #define MHWTRAP_P5_RGMII_MODE BIT(7) | ||
| 136 | #define MHWTRAP_P5_DIS BIT(6) | ||
| 137 | #define MHWTRAP_PHY_ACCESS BIT(5) | ||
| 138 | |||
| 139 | /* HWTRAP bits */ | ||
| 140 | #define HWTRAP_XTAL_SHIFT 9 | ||
| 141 | #define HWTRAP_XTAL_MASK 0x3 | ||
| 142 | |||
| 143 | /* SYS_CTRL bits */ | ||
| 144 | #define SYS_CTRL_SW_RST BIT(1) | ||
| 145 | #define SYS_CTRL_REG_RST BIT(0) | ||
| 146 | |||
| 147 | /* PMCR bits */ | ||
| 148 | #define PMCR_IFG_XMIT_96 BIT(18) | ||
| 149 | #define PMCR_MAC_MODE BIT(16) | ||
| 150 | #define PMCR_FORCE_MODE BIT(15) | ||
| 151 | #define PMCR_TX_EN BIT(14) | ||
| 152 | #define PMCR_RX_EN BIT(13) | ||
| 153 | #define PMCR_BACK_PRES_EN BIT(9) | ||
| 154 | #define PMCR_BACKOFF_EN BIT(8) | ||
| 155 | #define PMCR_TX_FC_EN BIT(5) | ||
| 156 | #define PMCR_RX_FC_EN BIT(4) | ||
| 157 | #define PMCR_FORCE_SPEED_1000 BIT(3) | ||
| 158 | #define PMCR_FORCE_FDX BIT(1) | ||
| 159 | #define PMCR_FORCE_LNK BIT(0) | ||
| 160 | #define PMCR_FIXED_LINK (PMCR_IFG_XMIT_96 | PMCR_MAC_MODE | \ | ||
| 161 | PMCR_FORCE_MODE | PMCR_TX_EN | PMCR_RX_EN | \ | ||
| 162 | PMCR_BACK_PRES_EN | PMCR_BACKOFF_EN | \ | ||
| 163 | PMCR_FORCE_SPEED_1000 | PMCR_FORCE_FDX | \ | ||
| 164 | PMCR_FORCE_LNK) | ||
| 165 | |||
| 166 | #define PMCR_FIXED_LINK_FC (PMCR_FIXED_LINK | \ | ||
| 167 | PMCR_TX_FC_EN | PMCR_RX_FC_EN) | ||
| 168 | |||
| 169 | /* TRGMII control registers */ | ||
| 170 | #define GSW_INTF_MODE 0x390 | ||
| 171 | #define GSW_TRGMII_TD0_ODT 0x354 | ||
| 172 | #define GSW_TRGMII_TD1_ODT 0x35c | ||
| 173 | #define GSW_TRGMII_TD2_ODT 0x364 | ||
| 174 | #define GSW_TRGMII_TD3_ODT 0x36c | ||
| 175 | #define GSW_TRGMII_TXCTL_ODT 0x374 | ||
| 176 | #define GSW_TRGMII_TCK_ODT 0x37c | ||
| 177 | #define GSW_TRGMII_RCK_CTRL 0x300 | ||
| 178 | |||
| 179 | #define INTF_MODE_TRGMII BIT(1) | ||
| 180 | #define TRGMII_RCK_CTRL_RX_RST BIT(31) | ||
| 181 | |||
| 182 | /* Mac control registers */ | ||
| 183 | #define MTK_MAC_P2_MCR 0x200 | ||
| 184 | #define MTK_MAC_P1_MCR 0x100 | ||
| 185 | |||
| 186 | #define MAC_MCR_MAX_RX_2K BIT(29) | ||
| 187 | #define MAC_MCR_IPG_CFG (BIT(18) | BIT(16)) | ||
| 188 | #define MAC_MCR_FORCE_MODE BIT(15) | ||
| 189 | #define MAC_MCR_TX_EN BIT(14) | ||
| 190 | #define MAC_MCR_RX_EN BIT(13) | ||
| 191 | #define MAC_MCR_BACKOFF_EN BIT(9) | ||
| 192 | #define MAC_MCR_BACKPR_EN BIT(8) | ||
| 193 | #define MAC_MCR_FORCE_RX_FC BIT(5) | ||
| 194 | #define MAC_MCR_FORCE_TX_FC BIT(4) | ||
| 195 | #define MAC_MCR_SPEED_1000 BIT(3) | ||
| 196 | #define MAC_MCR_FORCE_DPX BIT(1) | ||
| 197 | #define MAC_MCR_FORCE_LINK BIT(0) | ||
| 198 | #define MAC_MCR_FIXED_LINK (MAC_MCR_MAX_RX_2K | MAC_MCR_IPG_CFG | \ | ||
| 199 | MAC_MCR_FORCE_MODE | MAC_MCR_TX_EN | \ | ||
| 200 | MAC_MCR_RX_EN | MAC_MCR_BACKOFF_EN | \ | ||
| 201 | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_RX_FC | \ | ||
| 202 | MAC_MCR_FORCE_TX_FC | MAC_MCR_SPEED_1000 | \ | ||
| 203 | MAC_MCR_FORCE_DPX | MAC_MCR_FORCE_LINK) | ||
| 204 | #define MAC_MCR_FIXED_LINK_FC (MAC_MCR_MAX_RX_2K | MAC_MCR_IPG_CFG | \ | ||
| 205 | MAC_MCR_FIXED_LINK) | ||
| 206 | |||
| 207 | /* possible XTAL speed */ | ||
| 208 | #define MT7623_XTAL_40 0 | ||
| 209 | #define MT7623_XTAL_20 1 | ||
| 210 | #define MT7623_XTAL_25 3 | ||
| 211 | |||
| 212 | /* GPIO port control registers */ | ||
| 213 | #define GPIO_OD33_CTRL8 0x4c0 | ||
| 214 | #define GPIO_BIAS_CTRL 0xed0 | ||
| 215 | #define GPIO_DRV_SEL10 0xf00 | ||
| 216 | |||
| 217 | /* on MT7620 the functio of port 4 can be software configured */ | ||
| 218 | enum { | ||
| 219 | PORT4_EPHY = 0, | ||
| 220 | PORT4_EXT, | ||
| 221 | }; | ||
| 222 | |||
| 223 | /* struct mt7620_gsw - the structure that holds the SoC specific data | ||
| 224 | * @dev: The Device struct | ||
| 225 | * @base: The base address | ||
| 226 | * @piac_offset: The PIAC base may change depending on SoC | ||
| 227 | * @irq: The IRQ we are using | ||
| 228 | * @port4: The port4 mode on MT7620 | ||
| 229 | * @autopoll: Is MDIO autopolling enabled | ||
| 230 | * @ethsys: The ethsys register map | ||
| 231 | * @pctl: The pin control register map | ||
| 232 | * @clk_gsw: The switch clock | ||
| 233 | * @clk_gp1: The gmac1 clock | ||
| 234 | * @clk_gp2: The gmac2 clock | ||
| 235 | * @clk_trgpll: The trgmii pll clock | ||
| 236 | */ | ||
| 237 | struct mt7620_gsw { | ||
| 238 | struct device *dev; | ||
| 239 | void __iomem *base; | ||
| 240 | u32 piac_offset; | ||
| 241 | int irq; | ||
| 242 | int port4; | ||
| 243 | unsigned long int autopoll; | ||
| 244 | |||
| 245 | struct regmap *ethsys; | ||
| 246 | struct regmap *pctl; | ||
| 247 | |||
| 248 | struct clk *clk_gsw; | ||
| 249 | struct clk *clk_gp1; | ||
| 250 | struct clk *clk_gp2; | ||
| 251 | struct clk *clk_trgpll; | ||
| 252 | }; | ||
| 253 | |||
| 254 | /* switch register I/O wrappers */ | ||
| 255 | void mtk_switch_w32(struct mt7620_gsw *gsw, u32 val, unsigned int reg); | ||
| 256 | u32 mtk_switch_r32(struct mt7620_gsw *gsw, unsigned int reg); | ||
| 257 | |||
| 258 | /* the callback used by the driver core to bringup the switch */ | ||
| 259 | int mtk_gsw_init(struct mtk_eth *eth); | ||
| 260 | |||
| 261 | /* MDIO access wrappers */ | ||
| 262 | int mt7620_mdio_write(struct mii_bus *bus, int phy_addr, int phy_reg, u16 val); | ||
| 263 | int mt7620_mdio_read(struct mii_bus *bus, int phy_addr, int phy_reg); | ||
| 264 | void mt7620_mdio_link_adjust(struct mtk_eth *eth, int port); | ||
| 265 | int mt7620_has_carrier(struct mtk_eth *eth); | ||
| 266 | void mt7620_print_link_state(struct mtk_eth *eth, int port, int link, | ||
| 267 | int speed, int duplex); | ||
| 268 | void mt7530_mdio_w32(struct mt7620_gsw *gsw, u32 reg, u32 val); | ||
| 269 | u32 mt7530_mdio_r32(struct mt7620_gsw *gsw, u32 reg); | ||
| 270 | void mt7530_mdio_m32(struct mt7620_gsw *gsw, u32 mask, u32 set, u32 reg); | ||
| 271 | |||
| 272 | u32 _mt7620_mii_write(struct mt7620_gsw *gsw, u32 phy_addr, | ||
| 273 | u32 phy_register, u32 write_data); | ||
| 274 | u32 _mt7620_mii_read(struct mt7620_gsw *gsw, int phy_addr, int phy_reg); | ||
| 275 | void mt7620_handle_carrier(struct mtk_eth *eth); | ||
| 276 | |||
| 277 | #endif | ||
diff --git a/drivers/staging/mt7621-eth/gsw_mt7621.c b/drivers/staging/mt7621-eth/gsw_mt7621.c deleted file mode 100644 index 53767b17bad9..000000000000 --- a/drivers/staging/mt7621-eth/gsw_mt7621.c +++ /dev/null | |||
| @@ -1,297 +0,0 @@ | |||
| 1 | /* This program is free software; you can redistribute it and/or modify | ||
| 2 | * it under the terms of the GNU General Public License as published by | ||
| 3 | * the Free Software Foundation; version 2 of the License | ||
| 4 | * | ||
| 5 | * This program is distributed in the hope that it will be useful, | ||
| 6 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 7 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 8 | * GNU General Public License for more details. | ||
| 9 | * | ||
| 10 | * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> | ||
| 11 | * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> | ||
| 12 | * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/types.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | #include <linux/of_device.h> | ||
| 20 | #include <linux/of_irq.h> | ||
| 21 | |||
| 22 | #include <ralink_regs.h> | ||
| 23 | |||
| 24 | #include "mtk_eth_soc.h" | ||
| 25 | #include "gsw_mt7620.h" | ||
| 26 | |||
| 27 | void mtk_switch_w32(struct mt7620_gsw *gsw, u32 val, unsigned int reg) | ||
| 28 | { | ||
| 29 | iowrite32(val, gsw->base + reg); | ||
| 30 | } | ||
| 31 | EXPORT_SYMBOL_GPL(mtk_switch_w32); | ||
| 32 | |||
| 33 | u32 mtk_switch_r32(struct mt7620_gsw *gsw, unsigned int reg) | ||
| 34 | { | ||
| 35 | return ioread32(gsw->base + reg); | ||
| 36 | } | ||
| 37 | EXPORT_SYMBOL_GPL(mtk_switch_r32); | ||
| 38 | |||
| 39 | static irqreturn_t gsw_interrupt_mt7621(int irq, void *_eth) | ||
| 40 | { | ||
| 41 | struct mtk_eth *eth = (struct mtk_eth *)_eth; | ||
| 42 | struct mt7620_gsw *gsw = (struct mt7620_gsw *)eth->sw_priv; | ||
| 43 | u32 reg, i; | ||
| 44 | |||
| 45 | reg = mt7530_mdio_r32(gsw, MT7530_SYS_INT_STS); | ||
| 46 | |||
| 47 | for (i = 0; i < 5; i++) { | ||
| 48 | unsigned int link; | ||
| 49 | |||
| 50 | if ((reg & BIT(i)) == 0) | ||
| 51 | continue; | ||
| 52 | |||
| 53 | link = mt7530_mdio_r32(gsw, MT7530_PMSR_P(i)) & 0x1; | ||
| 54 | |||
| 55 | if (link == eth->link[i]) | ||
| 56 | continue; | ||
| 57 | |||
| 58 | eth->link[i] = link; | ||
| 59 | if (link) | ||
| 60 | netdev_info(*eth->netdev, | ||
| 61 | "port %d link up\n", i); | ||
| 62 | else | ||
| 63 | netdev_info(*eth->netdev, | ||
| 64 | "port %d link down\n", i); | ||
| 65 | } | ||
| 66 | |||
| 67 | mt7530_mdio_w32(gsw, MT7530_SYS_INT_STS, 0x1f); | ||
| 68 | |||
| 69 | return IRQ_HANDLED; | ||
| 70 | } | ||
| 71 | |||
| 72 | static void mt7621_hw_init(struct mtk_eth *eth, struct mt7620_gsw *gsw, | ||
| 73 | struct device_node *np) | ||
| 74 | { | ||
| 75 | u32 i; | ||
| 76 | u32 val; | ||
| 77 | |||
| 78 | /* hardware reset the switch */ | ||
| 79 | mtk_reset(eth, RST_CTRL_MCM); | ||
| 80 | mdelay(10); | ||
| 81 | |||
| 82 | /* reduce RGMII2 PAD driving strength */ | ||
| 83 | rt_sysc_m32(MT7621_MDIO_DRV_MASK, 0, SYSC_PAD_RGMII2_MDIO); | ||
| 84 | |||
| 85 | /* gpio mux - RGMII1=Normal mode */ | ||
| 86 | rt_sysc_m32(BIT(14), 0, SYSC_GPIO_MODE); | ||
| 87 | |||
| 88 | /* set GMAC1 RGMII mode */ | ||
| 89 | rt_sysc_m32(MT7621_GE1_MODE_MASK, 0, SYSC_REG_CFG1); | ||
| 90 | |||
| 91 | /* enable MDIO to control MT7530 */ | ||
| 92 | rt_sysc_m32(3 << 12, 0, SYSC_GPIO_MODE); | ||
| 93 | |||
| 94 | /* turn off all PHYs */ | ||
| 95 | for (i = 0; i <= 4; i++) { | ||
| 96 | val = _mt7620_mii_read(gsw, i, 0x0); | ||
| 97 | val |= BIT(11); | ||
| 98 | _mt7620_mii_write(gsw, i, 0x0, val); | ||
| 99 | } | ||
| 100 | |||
| 101 | /* reset the switch */ | ||
| 102 | mt7530_mdio_w32(gsw, MT7530_SYS_CTRL, | ||
| 103 | SYS_CTRL_SW_RST | SYS_CTRL_REG_RST); | ||
| 104 | usleep_range(10, 20); | ||
| 105 | |||
| 106 | if ((rt_sysc_r32(SYSC_REG_CHIP_REV_ID) & 0xFFFF) == 0x0101) { | ||
| 107 | /* GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536 */ | ||
| 108 | mtk_switch_w32(gsw, MAC_MCR_FIXED_LINK, MTK_MAC_P2_MCR); | ||
| 109 | mt7530_mdio_w32(gsw, MT7530_PMCR_P(6), PMCR_FIXED_LINK); | ||
| 110 | } else { | ||
| 111 | /* GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536 */ | ||
| 112 | mtk_switch_w32(gsw, MAC_MCR_FIXED_LINK_FC, MTK_MAC_P1_MCR); | ||
| 113 | mt7530_mdio_w32(gsw, MT7530_PMCR_P(6), PMCR_FIXED_LINK_FC); | ||
| 114 | } | ||
| 115 | |||
| 116 | /* GE2, Link down */ | ||
| 117 | mtk_switch_w32(gsw, MAC_MCR_FORCE_MODE, MTK_MAC_P2_MCR); | ||
| 118 | |||
| 119 | /* Enable Port 6, P5 as GMAC5, P5 disable */ | ||
| 120 | val = mt7530_mdio_r32(gsw, MT7530_MHWTRAP); | ||
| 121 | /* Enable Port 6 */ | ||
| 122 | val &= ~MHWTRAP_P6_DIS; | ||
| 123 | /* Disable Port 5 */ | ||
| 124 | val |= MHWTRAP_P5_DIS; | ||
| 125 | /* manual override of HW-Trap */ | ||
| 126 | val |= MHWTRAP_MANUAL; | ||
| 127 | mt7530_mdio_w32(gsw, MT7530_MHWTRAP, val); | ||
| 128 | |||
| 129 | val = rt_sysc_r32(SYSC_REG_CFG); | ||
| 130 | val = (val >> MT7621_XTAL_SHIFT) & MT7621_XTAL_MASK; | ||
| 131 | if (val < MT7621_XTAL_25 && val >= MT7621_XTAL_40) { | ||
| 132 | /* 40Mhz */ | ||
| 133 | |||
| 134 | /* disable MT7530 core clock */ | ||
| 135 | _mt7620_mii_write(gsw, 0, 13, 0x1f); | ||
| 136 | _mt7620_mii_write(gsw, 0, 14, 0x410); | ||
| 137 | _mt7620_mii_write(gsw, 0, 13, 0x401f); | ||
| 138 | _mt7620_mii_write(gsw, 0, 14, 0x0); | ||
| 139 | |||
| 140 | /* disable MT7530 PLL */ | ||
| 141 | _mt7620_mii_write(gsw, 0, 13, 0x1f); | ||
| 142 | _mt7620_mii_write(gsw, 0, 14, 0x40d); | ||
| 143 | _mt7620_mii_write(gsw, 0, 13, 0x401f); | ||
| 144 | _mt7620_mii_write(gsw, 0, 14, 0x2020); | ||
| 145 | |||
| 146 | /* for MT7530 core clock = 500Mhz */ | ||
| 147 | _mt7620_mii_write(gsw, 0, 13, 0x1f); | ||
| 148 | _mt7620_mii_write(gsw, 0, 14, 0x40e); | ||
| 149 | _mt7620_mii_write(gsw, 0, 13, 0x401f); | ||
| 150 | _mt7620_mii_write(gsw, 0, 14, 0x119); | ||
| 151 | |||
| 152 | /* enable MT7530 PLL */ | ||
| 153 | _mt7620_mii_write(gsw, 0, 13, 0x1f); | ||
| 154 | _mt7620_mii_write(gsw, 0, 14, 0x40d); | ||
| 155 | _mt7620_mii_write(gsw, 0, 13, 0x401f); | ||
| 156 | _mt7620_mii_write(gsw, 0, 14, 0x2820); | ||
| 157 | |||
| 158 | usleep_range(20, 40); | ||
| 159 | |||
| 160 | /* enable MT7530 core clock */ | ||
| 161 | _mt7620_mii_write(gsw, 0, 13, 0x1f); | ||
| 162 | _mt7620_mii_write(gsw, 0, 14, 0x410); | ||
| 163 | _mt7620_mii_write(gsw, 0, 13, 0x401f); | ||
| 164 | } | ||
| 165 | |||
| 166 | /* RGMII */ | ||
| 167 | _mt7620_mii_write(gsw, 0, 14, 0x1); | ||
| 168 | |||
| 169 | /* set MT7530 central align */ | ||
| 170 | mt7530_mdio_m32(gsw, BIT(0), P6ECR_INTF_MODE_RGMII, MT7530_P6ECR); | ||
| 171 | mt7530_mdio_m32(gsw, TRGMII_TXCTRL_TXC_INV, 0, | ||
| 172 | MT7530_TRGMII_TXCTRL); | ||
| 173 | mt7530_mdio_w32(gsw, MT7530_TRGMII_TCK_CTRL, 0x855); | ||
| 174 | |||
| 175 | /* delay setting for 10/1000M */ | ||
| 176 | mt7530_mdio_w32(gsw, MT7530_P5RGMIIRXCR, | ||
| 177 | P5RGMIIRXCR_C_ALIGN | P5RGMIIRXCR_DELAY_2); | ||
| 178 | mt7530_mdio_w32(gsw, MT7530_P5RGMIITXCR, 0x14); | ||
| 179 | |||
| 180 | /* lower Tx Driving*/ | ||
| 181 | mt7530_mdio_w32(gsw, MT7530_TRGMII_TD0_ODT, 0x44); | ||
| 182 | mt7530_mdio_w32(gsw, MT7530_TRGMII_TD1_ODT, 0x44); | ||
| 183 | mt7530_mdio_w32(gsw, MT7530_TRGMII_TD2_ODT, 0x44); | ||
| 184 | mt7530_mdio_w32(gsw, MT7530_TRGMII_TD3_ODT, 0x44); | ||
| 185 | mt7530_mdio_w32(gsw, MT7530_TRGMII_TD4_ODT, 0x44); | ||
| 186 | mt7530_mdio_w32(gsw, MT7530_TRGMII_TD5_ODT, 0x44); | ||
| 187 | |||
| 188 | /* turn on all PHYs */ | ||
| 189 | for (i = 0; i <= 4; i++) { | ||
| 190 | val = _mt7620_mii_read(gsw, i, 0); | ||
| 191 | val &= ~BIT(11); | ||
| 192 | _mt7620_mii_write(gsw, i, 0, val); | ||
| 193 | } | ||
| 194 | |||
| 195 | #define MT7530_NUM_PORTS 8 | ||
| 196 | #define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8)) | ||
| 197 | #define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8)) | ||
| 198 | #define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8)) | ||
| 199 | #define MT7530_CPU_PORT 6 | ||
| 200 | |||
| 201 | /* This is copied from mt7530_apply_config in libreCMC driver */ | ||
| 202 | { | ||
| 203 | int i; | ||
| 204 | |||
| 205 | for (i = 0; i < MT7530_NUM_PORTS; i++) | ||
| 206 | mt7530_mdio_w32(gsw, REG_ESW_PORT_PCR(i), 0x00400000); | ||
| 207 | |||
| 208 | mt7530_mdio_w32(gsw, REG_ESW_PORT_PCR(MT7530_CPU_PORT), | ||
| 209 | 0x00ff0000); | ||
| 210 | |||
| 211 | for (i = 0; i < MT7530_NUM_PORTS; i++) | ||
| 212 | mt7530_mdio_w32(gsw, REG_ESW_PORT_PVC(i), 0x810000c0); | ||
| 213 | } | ||
| 214 | |||
| 215 | /* enable irq */ | ||
| 216 | mt7530_mdio_m32(gsw, 0, 3 << 16, MT7530_TOP_SIG_CTRL); | ||
| 217 | mt7530_mdio_w32(gsw, MT7530_SYS_INT_EN, 0x1f); | ||
| 218 | } | ||
| 219 | |||
| 220 | static const struct of_device_id mediatek_gsw_match[] = { | ||
| 221 | { .compatible = "mediatek,mt7621-gsw" }, | ||
| 222 | {}, | ||
| 223 | }; | ||
| 224 | MODULE_DEVICE_TABLE(of, mediatek_gsw_match); | ||
| 225 | |||
| 226 | int mtk_gsw_init(struct mtk_eth *eth) | ||
| 227 | { | ||
| 228 | struct device_node *np = eth->switch_np; | ||
| 229 | struct platform_device *pdev = of_find_device_by_node(np); | ||
| 230 | struct mt7620_gsw *gsw; | ||
| 231 | |||
| 232 | if (!pdev) | ||
| 233 | return -ENODEV; | ||
| 234 | |||
| 235 | if (!of_device_is_compatible(np, mediatek_gsw_match->compatible)) | ||
| 236 | return -EINVAL; | ||
| 237 | |||
| 238 | gsw = platform_get_drvdata(pdev); | ||
| 239 | eth->sw_priv = gsw; | ||
| 240 | |||
| 241 | if (!gsw->irq) | ||
| 242 | return -EINVAL; | ||
| 243 | |||
| 244 | request_irq(gsw->irq, gsw_interrupt_mt7621, 0, | ||
| 245 | "gsw", eth); | ||
| 246 | disable_irq(gsw->irq); | ||
| 247 | |||
| 248 | mt7621_hw_init(eth, gsw, np); | ||
| 249 | |||
| 250 | enable_irq(gsw->irq); | ||
| 251 | |||
| 252 | return 0; | ||
| 253 | } | ||
| 254 | EXPORT_SYMBOL_GPL(mtk_gsw_init); | ||
| 255 | |||
| 256 | static int mt7621_gsw_probe(struct platform_device *pdev) | ||
| 257 | { | ||
| 258 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 259 | struct mt7620_gsw *gsw; | ||
| 260 | |||
| 261 | gsw = devm_kzalloc(&pdev->dev, sizeof(struct mt7620_gsw), GFP_KERNEL); | ||
| 262 | if (!gsw) | ||
| 263 | return -ENOMEM; | ||
| 264 | |||
| 265 | gsw->base = devm_ioremap_resource(&pdev->dev, res); | ||
| 266 | if (IS_ERR(gsw->base)) | ||
| 267 | return PTR_ERR(gsw->base); | ||
| 268 | |||
| 269 | gsw->dev = &pdev->dev; | ||
| 270 | gsw->irq = irq_of_parse_and_map(pdev->dev.of_node, 0); | ||
| 271 | |||
| 272 | platform_set_drvdata(pdev, gsw); | ||
| 273 | |||
| 274 | return 0; | ||
| 275 | } | ||
| 276 | |||
| 277 | static int mt7621_gsw_remove(struct platform_device *pdev) | ||
| 278 | { | ||
| 279 | platform_set_drvdata(pdev, NULL); | ||
| 280 | |||
| 281 | return 0; | ||
| 282 | } | ||
| 283 | |||
| 284 | static struct platform_driver gsw_driver = { | ||
| 285 | .probe = mt7621_gsw_probe, | ||
| 286 | .remove = mt7621_gsw_remove, | ||
| 287 | .driver = { | ||
| 288 | .name = "mt7621-gsw", | ||
| 289 | .of_match_table = mediatek_gsw_match, | ||
| 290 | }, | ||
| 291 | }; | ||
| 292 | |||
| 293 | module_platform_driver(gsw_driver); | ||
| 294 | |||
| 295 | MODULE_LICENSE("GPL"); | ||
| 296 | MODULE_AUTHOR("John Crispin <blogic@openwrt.org>"); | ||
| 297 | MODULE_DESCRIPTION("GBit switch driver for Mediatek MT7621 SoC"); | ||
diff --git a/drivers/staging/mt7621-eth/mdio.c b/drivers/staging/mt7621-eth/mdio.c deleted file mode 100644 index 5fea6a447eed..000000000000 --- a/drivers/staging/mt7621-eth/mdio.c +++ /dev/null | |||
| @@ -1,275 +0,0 @@ | |||
| 1 | /* This program is free software; you can redistribute it and/or modify | ||
| 2 | * it under the terms of the GNU General Public License as published by | ||
| 3 | * the Free Software Foundation; version 2 of the License | ||
| 4 | * | ||
| 5 | * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> | ||
| 6 | * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> | ||
| 7 | * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> | ||
| 8 | */ | ||
| 9 | |||
| 10 | #include <linux/module.h> | ||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/phy.h> | ||
| 13 | #include <linux/of_net.h> | ||
| 14 | #include <linux/of_mdio.h> | ||
| 15 | |||
| 16 | #include "mtk_eth_soc.h" | ||
| 17 | #include "mdio.h" | ||
| 18 | |||
| 19 | static int mtk_mdio_reset(struct mii_bus *bus) | ||
| 20 | { | ||
| 21 | /* TODO */ | ||
| 22 | return 0; | ||
| 23 | } | ||
| 24 | |||
| 25 | static void mtk_phy_link_adjust(struct net_device *dev) | ||
| 26 | { | ||
| 27 | struct mtk_eth *eth = netdev_priv(dev); | ||
| 28 | unsigned long flags; | ||
| 29 | int i; | ||
| 30 | |||
| 31 | spin_lock_irqsave(ð->phy->lock, flags); | ||
| 32 | for (i = 0; i < 8; i++) { | ||
| 33 | if (eth->phy->phy_node[i]) { | ||
| 34 | struct phy_device *phydev = eth->phy->phy[i]; | ||
| 35 | int status_change = 0; | ||
| 36 | |||
| 37 | if (phydev->link) | ||
| 38 | if (eth->phy->duplex[i] != phydev->duplex || | ||
| 39 | eth->phy->speed[i] != phydev->speed) | ||
| 40 | status_change = 1; | ||
| 41 | |||
| 42 | if (phydev->link != eth->link[i]) | ||
| 43 | status_change = 1; | ||
| 44 | |||
| 45 | switch (phydev->speed) { | ||
| 46 | case SPEED_1000: | ||
| 47 | case SPEED_100: | ||
| 48 | case SPEED_10: | ||
| 49 | eth->link[i] = phydev->link; | ||
| 50 | eth->phy->duplex[i] = phydev->duplex; | ||
| 51 | eth->phy->speed[i] = phydev->speed; | ||
| 52 | |||
| 53 | if (status_change && | ||
| 54 | eth->soc->mdio_adjust_link) | ||
| 55 | eth->soc->mdio_adjust_link(eth, i); | ||
| 56 | break; | ||
| 57 | } | ||
| 58 | } | ||
| 59 | } | ||
| 60 | spin_unlock_irqrestore(ð->phy->lock, flags); | ||
| 61 | } | ||
| 62 | |||
| 63 | int mtk_connect_phy_node(struct mtk_eth *eth, struct mtk_mac *mac, | ||
| 64 | struct device_node *phy_node) | ||
| 65 | { | ||
| 66 | const __be32 *_port = NULL; | ||
| 67 | struct phy_device *phydev; | ||
| 68 | int phy_mode, port; | ||
| 69 | |||
| 70 | _port = of_get_property(phy_node, "reg", NULL); | ||
| 71 | |||
| 72 | if (!_port || (be32_to_cpu(*_port) >= 0x20)) { | ||
| 73 | pr_err("%pOFn: invalid port id\n", phy_node); | ||
| 74 | return -EINVAL; | ||
| 75 | } | ||
| 76 | port = be32_to_cpu(*_port); | ||
| 77 | phy_mode = of_get_phy_mode(phy_node); | ||
| 78 | if (phy_mode < 0) { | ||
| 79 | dev_err(eth->dev, "incorrect phy-mode %d\n", phy_mode); | ||
| 80 | eth->phy->phy_node[port] = NULL; | ||
| 81 | return -EINVAL; | ||
| 82 | } | ||
| 83 | |||
| 84 | phydev = of_phy_connect(eth->netdev[mac->id], phy_node, | ||
| 85 | mtk_phy_link_adjust, 0, phy_mode); | ||
| 86 | if (!phydev) { | ||
| 87 | dev_err(eth->dev, "could not connect to PHY\n"); | ||
| 88 | eth->phy->phy_node[port] = NULL; | ||
| 89 | return -ENODEV; | ||
| 90 | } | ||
| 91 | |||
| 92 | phydev->supported &= PHY_1000BT_FEATURES; | ||
| 93 | phydev->advertising = phydev->supported; | ||
| 94 | |||
| 95 | dev_info(eth->dev, | ||
| 96 | "connected port %d to PHY at %s [uid=%08x, driver=%s]\n", | ||
| 97 | port, phydev_name(phydev), phydev->phy_id, | ||
| 98 | phydev->drv->name); | ||
| 99 | |||
| 100 | eth->phy->phy[port] = phydev; | ||
| 101 | eth->link[port] = 0; | ||
| 102 | |||
| 103 | return 0; | ||
| 104 | } | ||
| 105 | |||
| 106 | static void phy_init(struct mtk_eth *eth, struct mtk_mac *mac, | ||
| 107 | struct phy_device *phy) | ||
| 108 | { | ||
| 109 | phy_attach(eth->netdev[mac->id], phydev_name(phy), | ||
| 110 | PHY_INTERFACE_MODE_MII); | ||
| 111 | |||
| 112 | phy->autoneg = AUTONEG_ENABLE; | ||
| 113 | phy->speed = 0; | ||
| 114 | phy->duplex = 0; | ||
| 115 | phy_set_max_speed(phy, SPEED_100); | ||
| 116 | phy->advertising = phy->supported | ADVERTISED_Autoneg; | ||
| 117 | |||
| 118 | phy_start_aneg(phy); | ||
| 119 | } | ||
| 120 | |||
| 121 | static int mtk_phy_connect(struct mtk_mac *mac) | ||
| 122 | { | ||
| 123 | struct mtk_eth *eth = mac->hw; | ||
| 124 | int i; | ||
| 125 | |||
| 126 | for (i = 0; i < 8; i++) { | ||
| 127 | if (eth->phy->phy_node[i]) { | ||
| 128 | if (!mac->phy_dev) { | ||
| 129 | mac->phy_dev = eth->phy->phy[i]; | ||
| 130 | mac->phy_flags = MTK_PHY_FLAG_PORT; | ||
| 131 | } | ||
| 132 | } else if (eth->mii_bus) { | ||
| 133 | struct phy_device *phy; | ||
| 134 | |||
| 135 | phy = mdiobus_get_phy(eth->mii_bus, i); | ||
| 136 | if (phy) { | ||
| 137 | phy_init(eth, mac, phy); | ||
| 138 | if (!mac->phy_dev) { | ||
| 139 | mac->phy_dev = phy; | ||
| 140 | mac->phy_flags = MTK_PHY_FLAG_ATTACH; | ||
| 141 | } | ||
| 142 | } | ||
| 143 | } | ||
| 144 | } | ||
| 145 | |||
| 146 | return 0; | ||
| 147 | } | ||
| 148 | |||
| 149 | static void mtk_phy_disconnect(struct mtk_mac *mac) | ||
| 150 | { | ||
| 151 | struct mtk_eth *eth = mac->hw; | ||
| 152 | unsigned long flags; | ||
| 153 | int i; | ||
| 154 | |||
| 155 | for (i = 0; i < 8; i++) | ||
| 156 | if (eth->phy->phy_fixed[i]) { | ||
| 157 | spin_lock_irqsave(ð->phy->lock, flags); | ||
| 158 | eth->link[i] = 0; | ||
| 159 | if (eth->soc->mdio_adjust_link) | ||
| 160 | eth->soc->mdio_adjust_link(eth, i); | ||
| 161 | spin_unlock_irqrestore(ð->phy->lock, flags); | ||
| 162 | } else if (eth->phy->phy[i]) { | ||
| 163 | phy_disconnect(eth->phy->phy[i]); | ||
| 164 | } else if (eth->mii_bus) { | ||
| 165 | struct phy_device *phy = | ||
| 166 | mdiobus_get_phy(eth->mii_bus, i); | ||
| 167 | |||
| 168 | if (phy) | ||
| 169 | phy_detach(phy); | ||
| 170 | } | ||
| 171 | } | ||
| 172 | |||
| 173 | static void mtk_phy_start(struct mtk_mac *mac) | ||
| 174 | { | ||
| 175 | struct mtk_eth *eth = mac->hw; | ||
| 176 | unsigned long flags; | ||
| 177 | int i; | ||
| 178 | |||
| 179 | for (i = 0; i < 8; i++) { | ||
| 180 | if (eth->phy->phy_fixed[i]) { | ||
| 181 | spin_lock_irqsave(ð->phy->lock, flags); | ||
| 182 | eth->link[i] = 1; | ||
| 183 | if (eth->soc->mdio_adjust_link) | ||
| 184 | eth->soc->mdio_adjust_link(eth, i); | ||
| 185 | spin_unlock_irqrestore(ð->phy->lock, flags); | ||
| 186 | } else if (eth->phy->phy[i]) { | ||
| 187 | phy_start(eth->phy->phy[i]); | ||
| 188 | } | ||
| 189 | } | ||
| 190 | } | ||
| 191 | |||
| 192 | static void mtk_phy_stop(struct mtk_mac *mac) | ||
| 193 | { | ||
| 194 | struct mtk_eth *eth = mac->hw; | ||
| 195 | unsigned long flags; | ||
| 196 | int i; | ||
| 197 | |||
| 198 | for (i = 0; i < 8; i++) | ||
| 199 | if (eth->phy->phy_fixed[i]) { | ||
| 200 | spin_lock_irqsave(ð->phy->lock, flags); | ||
| 201 | eth->link[i] = 0; | ||
| 202 | if (eth->soc->mdio_adjust_link) | ||
| 203 | eth->soc->mdio_adjust_link(eth, i); | ||
| 204 | spin_unlock_irqrestore(ð->phy->lock, flags); | ||
| 205 | } else if (eth->phy->phy[i]) { | ||
| 206 | phy_stop(eth->phy->phy[i]); | ||
| 207 | } | ||
| 208 | } | ||
| 209 | |||
| 210 | static struct mtk_phy phy_ralink = { | ||
| 211 | .connect = mtk_phy_connect, | ||
| 212 | .disconnect = mtk_phy_disconnect, | ||
| 213 | .start = mtk_phy_start, | ||
| 214 | .stop = mtk_phy_stop, | ||
| 215 | }; | ||
| 216 | |||
| 217 | int mtk_mdio_init(struct mtk_eth *eth) | ||
| 218 | { | ||
| 219 | struct device_node *mii_np; | ||
| 220 | int err; | ||
| 221 | |||
| 222 | if (!eth->soc->mdio_read || !eth->soc->mdio_write) | ||
| 223 | return 0; | ||
| 224 | |||
| 225 | spin_lock_init(&phy_ralink.lock); | ||
| 226 | eth->phy = &phy_ralink; | ||
| 227 | |||
| 228 | mii_np = of_get_child_by_name(eth->dev->of_node, "mdio-bus"); | ||
| 229 | if (!mii_np) { | ||
| 230 | dev_err(eth->dev, "no %s child node found", "mdio-bus"); | ||
| 231 | return -ENODEV; | ||
| 232 | } | ||
| 233 | |||
| 234 | if (!of_device_is_available(mii_np)) { | ||
| 235 | err = 0; | ||
| 236 | goto err_put_node; | ||
| 237 | } | ||
| 238 | |||
| 239 | eth->mii_bus = mdiobus_alloc(); | ||
| 240 | if (!eth->mii_bus) { | ||
| 241 | err = -ENOMEM; | ||
| 242 | goto err_put_node; | ||
| 243 | } | ||
| 244 | |||
| 245 | eth->mii_bus->name = "mdio"; | ||
| 246 | eth->mii_bus->read = eth->soc->mdio_read; | ||
| 247 | eth->mii_bus->write = eth->soc->mdio_write; | ||
| 248 | eth->mii_bus->reset = mtk_mdio_reset; | ||
| 249 | eth->mii_bus->priv = eth; | ||
| 250 | eth->mii_bus->parent = eth->dev; | ||
| 251 | |||
| 252 | snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np); | ||
| 253 | err = of_mdiobus_register(eth->mii_bus, mii_np); | ||
| 254 | if (err) | ||
| 255 | goto err_free_bus; | ||
| 256 | |||
| 257 | return 0; | ||
| 258 | |||
| 259 | err_free_bus: | ||
| 260 | kfree(eth->mii_bus); | ||
| 261 | err_put_node: | ||
| 262 | of_node_put(mii_np); | ||
| 263 | eth->mii_bus = NULL; | ||
| 264 | return err; | ||
| 265 | } | ||
| 266 | |||
| 267 | void mtk_mdio_cleanup(struct mtk_eth *eth) | ||
| 268 | { | ||
| 269 | if (!eth->mii_bus) | ||
| 270 | return; | ||
| 271 | |||
| 272 | mdiobus_unregister(eth->mii_bus); | ||
| 273 | of_node_put(eth->mii_bus->dev.of_node); | ||
| 274 | kfree(eth->mii_bus); | ||
| 275 | } | ||
diff --git a/drivers/staging/mt7621-eth/mdio.h b/drivers/staging/mt7621-eth/mdio.h deleted file mode 100644 index b14e23842a01..000000000000 --- a/drivers/staging/mt7621-eth/mdio.h +++ /dev/null | |||
| @@ -1,27 +0,0 @@ | |||
| 1 | /* This program is free software; you can redistribute it and/or modify | ||
| 2 | * it under the terms of the GNU General Public License as published by | ||
| 3 | * the Free Software Foundation; version 2 of the License | ||
| 4 | * | ||
| 5 | * This program is distributed in the hope that it will be useful, | ||
| 6 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 7 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 8 | * GNU General Public License for more details. | ||
| 9 | * | ||
| 10 | * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> | ||
| 11 | * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> | ||
| 12 | * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef _RALINK_MDIO_H__ | ||
| 16 | #define _RALINK_MDIO_H__ | ||
| 17 | |||
| 18 | #ifdef CONFIG_NET_MEDIATEK_MDIO | ||
| 19 | int mtk_mdio_init(struct mtk_eth *eth); | ||
| 20 | void mtk_mdio_cleanup(struct mtk_eth *eth); | ||
| 21 | int mtk_connect_phy_node(struct mtk_eth *eth, struct mtk_mac *mac, | ||
| 22 | struct device_node *phy_node); | ||
| 23 | #else | ||
| 24 | static inline int mtk_mdio_init(struct mtk_eth *eth) { return 0; } | ||
| 25 | static inline void mtk_mdio_cleanup(struct mtk_eth *eth) {} | ||
| 26 | #endif | ||
| 27 | #endif | ||
diff --git a/drivers/staging/mt7621-eth/mdio_mt7620.c b/drivers/staging/mt7621-eth/mdio_mt7620.c deleted file mode 100644 index ced605c2914e..000000000000 --- a/drivers/staging/mt7621-eth/mdio_mt7620.c +++ /dev/null | |||
| @@ -1,173 +0,0 @@ | |||
| 1 | /* This program is free software; you can redistribute it and/or modify | ||
| 2 | * it under the terms of the GNU General Public License as published by | ||
| 3 | * the Free Software Foundation; version 2 of the License | ||
| 4 | * | ||
| 5 | * This program is distributed in the hope that it will be useful, | ||
| 6 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 7 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 8 | * GNU General Public License for more details. | ||
| 9 | * | ||
| 10 | * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> | ||
| 11 | * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> | ||
| 12 | * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/types.h> | ||
| 18 | |||
| 19 | #include "mtk_eth_soc.h" | ||
| 20 | #include "gsw_mt7620.h" | ||
| 21 | #include "mdio.h" | ||
| 22 | |||
| 23 | static int mt7620_mii_busy_wait(struct mt7620_gsw *gsw) | ||
| 24 | { | ||
| 25 | unsigned long t_start = jiffies; | ||
| 26 | |||
| 27 | while (1) { | ||
| 28 | if (!(mtk_switch_r32(gsw, | ||
| 29 | gsw->piac_offset + MT7620_GSW_REG_PIAC) & | ||
| 30 | GSW_MDIO_ACCESS)) | ||
| 31 | return 0; | ||
| 32 | if (time_after(jiffies, t_start + GSW_REG_PHY_TIMEOUT)) | ||
| 33 | break; | ||
| 34 | } | ||
| 35 | |||
| 36 | dev_err(gsw->dev, "mdio: MDIO timeout\n"); | ||
| 37 | return -1; | ||
| 38 | } | ||
| 39 | |||
| 40 | u32 _mt7620_mii_write(struct mt7620_gsw *gsw, u32 phy_addr, | ||
| 41 | u32 phy_register, u32 write_data) | ||
| 42 | { | ||
| 43 | if (mt7620_mii_busy_wait(gsw)) | ||
| 44 | return -1; | ||
| 45 | |||
| 46 | write_data &= 0xffff; | ||
| 47 | |||
| 48 | mtk_switch_w32(gsw, GSW_MDIO_ACCESS | GSW_MDIO_START | GSW_MDIO_WRITE | | ||
| 49 | (phy_register << GSW_MDIO_REG_SHIFT) | | ||
| 50 | (phy_addr << GSW_MDIO_ADDR_SHIFT) | write_data, | ||
| 51 | MT7620_GSW_REG_PIAC); | ||
| 52 | |||
| 53 | if (mt7620_mii_busy_wait(gsw)) | ||
| 54 | return -1; | ||
| 55 | |||
| 56 | return 0; | ||
| 57 | } | ||
| 58 | EXPORT_SYMBOL_GPL(_mt7620_mii_write); | ||
| 59 | |||
| 60 | u32 _mt7620_mii_read(struct mt7620_gsw *gsw, int phy_addr, int phy_reg) | ||
| 61 | { | ||
| 62 | u32 d; | ||
| 63 | |||
| 64 | if (mt7620_mii_busy_wait(gsw)) | ||
| 65 | return 0xffff; | ||
| 66 | |||
| 67 | mtk_switch_w32(gsw, GSW_MDIO_ACCESS | GSW_MDIO_START | GSW_MDIO_READ | | ||
| 68 | (phy_reg << GSW_MDIO_REG_SHIFT) | | ||
| 69 | (phy_addr << GSW_MDIO_ADDR_SHIFT), | ||
| 70 | MT7620_GSW_REG_PIAC); | ||
| 71 | |||
| 72 | if (mt7620_mii_busy_wait(gsw)) | ||
| 73 | return 0xffff; | ||
| 74 | |||
| 75 | d = mtk_switch_r32(gsw, MT7620_GSW_REG_PIAC) & 0xffff; | ||
| 76 | |||
| 77 | return d; | ||
| 78 | } | ||
| 79 | EXPORT_SYMBOL_GPL(_mt7620_mii_read); | ||
| 80 | |||
| 81 | int mt7620_mdio_write(struct mii_bus *bus, int phy_addr, int phy_reg, u16 val) | ||
| 82 | { | ||
| 83 | struct mtk_eth *eth = bus->priv; | ||
| 84 | struct mt7620_gsw *gsw = (struct mt7620_gsw *)eth->sw_priv; | ||
| 85 | |||
| 86 | return _mt7620_mii_write(gsw, phy_addr, phy_reg, val); | ||
| 87 | } | ||
| 88 | |||
| 89 | int mt7620_mdio_read(struct mii_bus *bus, int phy_addr, int phy_reg) | ||
| 90 | { | ||
| 91 | struct mtk_eth *eth = bus->priv; | ||
| 92 | struct mt7620_gsw *gsw = (struct mt7620_gsw *)eth->sw_priv; | ||
| 93 | |||
| 94 | return _mt7620_mii_read(gsw, phy_addr, phy_reg); | ||
| 95 | } | ||
| 96 | |||
| 97 | void mt7530_mdio_w32(struct mt7620_gsw *gsw, u32 reg, u32 val) | ||
| 98 | { | ||
| 99 | _mt7620_mii_write(gsw, 0x1f, 0x1f, (reg >> 6) & 0x3ff); | ||
| 100 | _mt7620_mii_write(gsw, 0x1f, (reg >> 2) & 0xf, val & 0xffff); | ||
| 101 | _mt7620_mii_write(gsw, 0x1f, 0x10, val >> 16); | ||
| 102 | } | ||
| 103 | EXPORT_SYMBOL_GPL(mt7530_mdio_w32); | ||
| 104 | |||
| 105 | u32 mt7530_mdio_r32(struct mt7620_gsw *gsw, u32 reg) | ||
| 106 | { | ||
| 107 | u16 high, low; | ||
| 108 | |||
| 109 | _mt7620_mii_write(gsw, 0x1f, 0x1f, (reg >> 6) & 0x3ff); | ||
| 110 | low = _mt7620_mii_read(gsw, 0x1f, (reg >> 2) & 0xf); | ||
| 111 | high = _mt7620_mii_read(gsw, 0x1f, 0x10); | ||
| 112 | |||
| 113 | return (high << 16) | (low & 0xffff); | ||
| 114 | } | ||
| 115 | EXPORT_SYMBOL_GPL(mt7530_mdio_r32); | ||
| 116 | |||
| 117 | void mt7530_mdio_m32(struct mt7620_gsw *gsw, u32 mask, u32 set, u32 reg) | ||
| 118 | { | ||
| 119 | u32 val = mt7530_mdio_r32(gsw, reg); | ||
| 120 | |||
| 121 | val &= ~mask; | ||
| 122 | val |= set; | ||
| 123 | mt7530_mdio_w32(gsw, reg, val); | ||
| 124 | } | ||
| 125 | EXPORT_SYMBOL_GPL(mt7530_mdio_m32); | ||
| 126 | |||
| 127 | static unsigned char *mtk_speed_str(int speed) | ||
| 128 | { | ||
| 129 | switch (speed) { | ||
| 130 | case 2: | ||
| 131 | case SPEED_1000: | ||
| 132 | return "1000"; | ||
| 133 | case 1: | ||
| 134 | case SPEED_100: | ||
| 135 | return "100"; | ||
| 136 | case 0: | ||
| 137 | case SPEED_10: | ||
| 138 | return "10"; | ||
| 139 | } | ||
| 140 | |||
| 141 | return "? "; | ||
| 142 | } | ||
| 143 | |||
| 144 | int mt7620_has_carrier(struct mtk_eth *eth) | ||
| 145 | { | ||
| 146 | struct mt7620_gsw *gsw = (struct mt7620_gsw *)eth->sw_priv; | ||
| 147 | int i; | ||
| 148 | |||
| 149 | for (i = 0; i < GSW_PORT6; i++) | ||
| 150 | if (mt7530_mdio_r32(gsw, GSW_REG_PORT_STATUS(i)) & 0x1) | ||
| 151 | return 1; | ||
| 152 | return 0; | ||
| 153 | } | ||
| 154 | |||
| 155 | void mt7620_print_link_state(struct mtk_eth *eth, int port, int link, | ||
| 156 | int speed, int duplex) | ||
| 157 | { | ||
| 158 | struct mt7620_gsw *gsw = eth->sw_priv; | ||
| 159 | |||
| 160 | if (link) | ||
| 161 | dev_info(gsw->dev, "port %d link up (%sMbps/%s duplex)\n", | ||
| 162 | port, mtk_speed_str(speed), | ||
| 163 | (duplex) ? "Full" : "Half"); | ||
| 164 | else | ||
| 165 | dev_info(gsw->dev, "port %d link down\n", port); | ||
| 166 | } | ||
| 167 | |||
| 168 | void mt7620_mdio_link_adjust(struct mtk_eth *eth, int port) | ||
| 169 | { | ||
| 170 | mt7620_print_link_state(eth, port, eth->link[port], | ||
| 171 | eth->phy->speed[port], | ||
| 172 | (eth->phy->duplex[port] == DUPLEX_FULL)); | ||
| 173 | } | ||
diff --git a/drivers/staging/mt7621-eth/mtk_eth_soc.c b/drivers/staging/mt7621-eth/mtk_eth_soc.c deleted file mode 100644 index 6027b19f7bc2..000000000000 --- a/drivers/staging/mt7621-eth/mtk_eth_soc.c +++ /dev/null | |||
| @@ -1,2176 +0,0 @@ | |||
| 1 | /* This program is free software; you can redistribute it and/or modify | ||
| 2 | * it under the terms of the GNU General Public License as published by | ||
| 3 | * the Free Software Foundation; version 2 of the License | ||
| 4 | * | ||
| 5 | * This program is distributed in the hope that it will be useful, | ||
| 6 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 7 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 8 | * GNU General Public License for more details. | ||
| 9 | * | ||
| 10 | * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> | ||
| 11 | * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> | ||
| 12 | * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/types.h> | ||
| 18 | #include <linux/dma-mapping.h> | ||
| 19 | #include <linux/init.h> | ||
| 20 | #include <linux/skbuff.h> | ||
| 21 | #include <linux/etherdevice.h> | ||
| 22 | #include <linux/ethtool.h> | ||
| 23 | #include <linux/platform_device.h> | ||
| 24 | #include <linux/of_device.h> | ||
| 25 | #include <linux/mfd/syscon.h> | ||
| 26 | #include <linux/clk.h> | ||
| 27 | #include <linux/of_net.h> | ||
| 28 | #include <linux/of_mdio.h> | ||
| 29 | #include <linux/if_vlan.h> | ||
| 30 | #include <linux/reset.h> | ||
| 31 | #include <linux/tcp.h> | ||
| 32 | #include <linux/io.h> | ||
| 33 | #include <linux/bug.h> | ||
| 34 | #include <linux/regmap.h> | ||
| 35 | |||
| 36 | #include "mtk_eth_soc.h" | ||
| 37 | #include "mdio.h" | ||
| 38 | #include "ethtool.h" | ||
| 39 | |||
| 40 | #define MAX_RX_LENGTH 1536 | ||
| 41 | #define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN) | ||
| 42 | #define MTK_RX_HLEN (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN) | ||
| 43 | #define DMA_DUMMY_DESC 0xffffffff | ||
| 44 | #define MTK_DEFAULT_MSG_ENABLE \ | ||
| 45 | (NETIF_MSG_DRV | \ | ||
| 46 | NETIF_MSG_PROBE | \ | ||
| 47 | NETIF_MSG_LINK | \ | ||
| 48 | NETIF_MSG_TIMER | \ | ||
| 49 | NETIF_MSG_IFDOWN | \ | ||
| 50 | NETIF_MSG_IFUP | \ | ||
| 51 | NETIF_MSG_RX_ERR | \ | ||
| 52 | NETIF_MSG_TX_ERR) | ||
| 53 | |||
| 54 | #define TX_DMA_DESP2_DEF (TX_DMA_LS0 | TX_DMA_DONE) | ||
| 55 | #define NEXT_TX_DESP_IDX(X) (((X) + 1) & (ring->tx_ring_size - 1)) | ||
| 56 | #define NEXT_RX_DESP_IDX(X) (((X) + 1) & (ring->rx_ring_size - 1)) | ||
| 57 | |||
| 58 | #define SYSC_REG_RSTCTRL 0x34 | ||
| 59 | |||
| 60 | static int mtk_msg_level = -1; | ||
| 61 | module_param_named(msg_level, mtk_msg_level, int, 0); | ||
| 62 | MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)"); | ||
| 63 | |||
| 64 | static const u16 mtk_reg_table_default[MTK_REG_COUNT] = { | ||
| 65 | [MTK_REG_PDMA_GLO_CFG] = MTK_PDMA_GLO_CFG, | ||
| 66 | [MTK_REG_PDMA_RST_CFG] = MTK_PDMA_RST_CFG, | ||
| 67 | [MTK_REG_DLY_INT_CFG] = MTK_DLY_INT_CFG, | ||
| 68 | [MTK_REG_TX_BASE_PTR0] = MTK_TX_BASE_PTR0, | ||
| 69 | [MTK_REG_TX_MAX_CNT0] = MTK_TX_MAX_CNT0, | ||
| 70 | [MTK_REG_TX_CTX_IDX0] = MTK_TX_CTX_IDX0, | ||
| 71 | [MTK_REG_TX_DTX_IDX0] = MTK_TX_DTX_IDX0, | ||
| 72 | [MTK_REG_RX_BASE_PTR0] = MTK_RX_BASE_PTR0, | ||
| 73 | [MTK_REG_RX_MAX_CNT0] = MTK_RX_MAX_CNT0, | ||
| 74 | [MTK_REG_RX_CALC_IDX0] = MTK_RX_CALC_IDX0, | ||
| 75 | [MTK_REG_RX_DRX_IDX0] = MTK_RX_DRX_IDX0, | ||
| 76 | [MTK_REG_MTK_INT_ENABLE] = MTK_INT_ENABLE, | ||
| 77 | [MTK_REG_MTK_INT_STATUS] = MTK_INT_STATUS, | ||
| 78 | [MTK_REG_MTK_DMA_VID_BASE] = MTK_DMA_VID0, | ||
| 79 | [MTK_REG_MTK_COUNTER_BASE] = MTK_GDMA1_TX_GBCNT, | ||
| 80 | [MTK_REG_MTK_RST_GL] = MTK_RST_GL, | ||
| 81 | }; | ||
| 82 | |||
| 83 | static const u16 *mtk_reg_table = mtk_reg_table_default; | ||
| 84 | |||
| 85 | void mtk_w32(struct mtk_eth *eth, u32 val, unsigned int reg) | ||
| 86 | { | ||
| 87 | __raw_writel(val, eth->base + reg); | ||
| 88 | } | ||
| 89 | |||
| 90 | u32 mtk_r32(struct mtk_eth *eth, unsigned int reg) | ||
| 91 | { | ||
| 92 | return __raw_readl(eth->base + reg); | ||
| 93 | } | ||
| 94 | |||
| 95 | static void mtk_reg_w32(struct mtk_eth *eth, u32 val, enum mtk_reg reg) | ||
| 96 | { | ||
| 97 | mtk_w32(eth, val, mtk_reg_table[reg]); | ||
| 98 | } | ||
| 99 | |||
| 100 | static u32 mtk_reg_r32(struct mtk_eth *eth, enum mtk_reg reg) | ||
| 101 | { | ||
| 102 | return mtk_r32(eth, mtk_reg_table[reg]); | ||
| 103 | } | ||
| 104 | |||
| 105 | /* these bits are also exposed via the reset-controller API. however the switch | ||
| 106 | * and FE need to be brought out of reset in the exakt same moemtn and the | ||
| 107 | * reset-controller api does not provide this feature yet. Do the reset manually | ||
| 108 | * until we fixed the reset-controller api to be able to do this | ||
| 109 | */ | ||
| 110 | void mtk_reset(struct mtk_eth *eth, u32 reset_bits) | ||
| 111 | { | ||
| 112 | u32 val; | ||
| 113 | |||
| 114 | regmap_read(eth->ethsys, SYSC_REG_RSTCTRL, &val); | ||
| 115 | val |= reset_bits; | ||
| 116 | regmap_write(eth->ethsys, SYSC_REG_RSTCTRL, val); | ||
| 117 | usleep_range(10, 20); | ||
| 118 | val &= ~reset_bits; | ||
| 119 | regmap_write(eth->ethsys, SYSC_REG_RSTCTRL, val); | ||
| 120 | usleep_range(10, 20); | ||
| 121 | } | ||
| 122 | EXPORT_SYMBOL(mtk_reset); | ||
| 123 | |||
| 124 | static inline void mtk_irq_ack(struct mtk_eth *eth, u32 mask) | ||
| 125 | { | ||
| 126 | if (eth->soc->dma_type & MTK_PDMA) | ||
| 127 | mtk_reg_w32(eth, mask, MTK_REG_MTK_INT_STATUS); | ||
| 128 | if (eth->soc->dma_type & MTK_QDMA) | ||
| 129 | mtk_w32(eth, mask, MTK_QMTK_INT_STATUS); | ||
| 130 | } | ||
| 131 | |||
| 132 | static inline u32 mtk_irq_pending(struct mtk_eth *eth) | ||
| 133 | { | ||
| 134 | u32 status = 0; | ||
| 135 | |||
| 136 | if (eth->soc->dma_type & MTK_PDMA) | ||
| 137 | status |= mtk_reg_r32(eth, MTK_REG_MTK_INT_STATUS); | ||
| 138 | if (eth->soc->dma_type & MTK_QDMA) | ||
| 139 | status |= mtk_r32(eth, MTK_QMTK_INT_STATUS); | ||
| 140 | |||
| 141 | return status; | ||
| 142 | } | ||
| 143 | |||
| 144 | static void mtk_irq_ack_status(struct mtk_eth *eth, u32 mask) | ||
| 145 | { | ||
| 146 | u32 status_reg = MTK_REG_MTK_INT_STATUS; | ||
| 147 | |||
| 148 | if (mtk_reg_table[MTK_REG_MTK_INT_STATUS2]) | ||
| 149 | status_reg = MTK_REG_MTK_INT_STATUS2; | ||
| 150 | |||
| 151 | mtk_reg_w32(eth, mask, status_reg); | ||
| 152 | } | ||
| 153 | |||
| 154 | static u32 mtk_irq_pending_status(struct mtk_eth *eth) | ||
| 155 | { | ||
| 156 | u32 status_reg = MTK_REG_MTK_INT_STATUS; | ||
| 157 | |||
| 158 | if (mtk_reg_table[MTK_REG_MTK_INT_STATUS2]) | ||
| 159 | status_reg = MTK_REG_MTK_INT_STATUS2; | ||
| 160 | |||
| 161 | return mtk_reg_r32(eth, status_reg); | ||
| 162 | } | ||
| 163 | |||
| 164 | static inline void mtk_irq_disable(struct mtk_eth *eth, u32 mask) | ||
| 165 | { | ||
| 166 | u32 val; | ||
| 167 | |||
| 168 | if (eth->soc->dma_type & MTK_PDMA) { | ||
| 169 | val = mtk_reg_r32(eth, MTK_REG_MTK_INT_ENABLE); | ||
| 170 | mtk_reg_w32(eth, val & ~mask, MTK_REG_MTK_INT_ENABLE); | ||
| 171 | /* flush write */ | ||
| 172 | mtk_reg_r32(eth, MTK_REG_MTK_INT_ENABLE); | ||
| 173 | } | ||
| 174 | if (eth->soc->dma_type & MTK_QDMA) { | ||
| 175 | val = mtk_r32(eth, MTK_QMTK_INT_ENABLE); | ||
| 176 | mtk_w32(eth, val & ~mask, MTK_QMTK_INT_ENABLE); | ||
| 177 | /* flush write */ | ||
| 178 | mtk_r32(eth, MTK_QMTK_INT_ENABLE); | ||
| 179 | } | ||
| 180 | } | ||
| 181 | |||
| 182 | static inline void mtk_irq_enable(struct mtk_eth *eth, u32 mask) | ||
| 183 | { | ||
| 184 | u32 val; | ||
| 185 | |||
| 186 | if (eth->soc->dma_type & MTK_PDMA) { | ||
| 187 | val = mtk_reg_r32(eth, MTK_REG_MTK_INT_ENABLE); | ||
| 188 | mtk_reg_w32(eth, val | mask, MTK_REG_MTK_INT_ENABLE); | ||
| 189 | /* flush write */ | ||
| 190 | mtk_reg_r32(eth, MTK_REG_MTK_INT_ENABLE); | ||
| 191 | } | ||
| 192 | if (eth->soc->dma_type & MTK_QDMA) { | ||
| 193 | val = mtk_r32(eth, MTK_QMTK_INT_ENABLE); | ||
| 194 | mtk_w32(eth, val | mask, MTK_QMTK_INT_ENABLE); | ||
| 195 | /* flush write */ | ||
| 196 | mtk_r32(eth, MTK_QMTK_INT_ENABLE); | ||
| 197 | } | ||
| 198 | } | ||
| 199 | |||
| 200 | static inline u32 mtk_irq_enabled(struct mtk_eth *eth) | ||
| 201 | { | ||
| 202 | u32 enabled = 0; | ||
| 203 | |||
| 204 | if (eth->soc->dma_type & MTK_PDMA) | ||
| 205 | enabled |= mtk_reg_r32(eth, MTK_REG_MTK_INT_ENABLE); | ||
| 206 | if (eth->soc->dma_type & MTK_QDMA) | ||
| 207 | enabled |= mtk_r32(eth, MTK_QMTK_INT_ENABLE); | ||
| 208 | |||
| 209 | return enabled; | ||
| 210 | } | ||
| 211 | |||
| 212 | static inline void mtk_hw_set_macaddr(struct mtk_mac *mac, | ||
| 213 | unsigned char *macaddr) | ||
| 214 | { | ||
| 215 | unsigned long flags; | ||
| 216 | |||
| 217 | spin_lock_irqsave(&mac->hw->page_lock, flags); | ||
| 218 | mtk_w32(mac->hw, (macaddr[0] << 8) | macaddr[1], MTK_GDMA1_MAC_ADRH); | ||
| 219 | mtk_w32(mac->hw, (macaddr[2] << 24) | (macaddr[3] << 16) | | ||
| 220 | (macaddr[4] << 8) | macaddr[5], | ||
| 221 | MTK_GDMA1_MAC_ADRL); | ||
| 222 | spin_unlock_irqrestore(&mac->hw->page_lock, flags); | ||
| 223 | } | ||
| 224 | |||
| 225 | static int mtk_set_mac_address(struct net_device *dev, void *p) | ||
| 226 | { | ||
| 227 | int ret = eth_mac_addr(dev, p); | ||
| 228 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 229 | struct mtk_eth *eth = mac->hw; | ||
| 230 | |||
| 231 | if (ret) | ||
| 232 | return ret; | ||
| 233 | |||
| 234 | if (eth->soc->set_mac) | ||
| 235 | eth->soc->set_mac(mac, dev->dev_addr); | ||
| 236 | else | ||
| 237 | mtk_hw_set_macaddr(mac, p); | ||
| 238 | |||
| 239 | return 0; | ||
| 240 | } | ||
| 241 | |||
| 242 | static inline int mtk_max_frag_size(int mtu) | ||
| 243 | { | ||
| 244 | /* make sure buf_size will be at least MAX_RX_LENGTH */ | ||
| 245 | if (mtu + MTK_RX_ETH_HLEN < MAX_RX_LENGTH) | ||
| 246 | mtu = MAX_RX_LENGTH - MTK_RX_ETH_HLEN; | ||
| 247 | |||
| 248 | return SKB_DATA_ALIGN(MTK_RX_HLEN + mtu) + | ||
| 249 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); | ||
| 250 | } | ||
| 251 | |||
| 252 | static inline int mtk_max_buf_size(int frag_size) | ||
| 253 | { | ||
| 254 | int buf_size = frag_size - NET_SKB_PAD - NET_IP_ALIGN - | ||
| 255 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); | ||
| 256 | |||
| 257 | WARN_ON(buf_size < MAX_RX_LENGTH); | ||
| 258 | |||
| 259 | return buf_size; | ||
| 260 | } | ||
| 261 | |||
| 262 | static inline void mtk_get_rxd(struct mtk_rx_dma *rxd, | ||
| 263 | struct mtk_rx_dma *dma_rxd) | ||
| 264 | { | ||
| 265 | rxd->rxd1 = READ_ONCE(dma_rxd->rxd1); | ||
| 266 | rxd->rxd2 = READ_ONCE(dma_rxd->rxd2); | ||
| 267 | rxd->rxd3 = READ_ONCE(dma_rxd->rxd3); | ||
| 268 | rxd->rxd4 = READ_ONCE(dma_rxd->rxd4); | ||
| 269 | } | ||
| 270 | |||
| 271 | static inline void mtk_set_txd_pdma(struct mtk_tx_dma *txd, | ||
| 272 | struct mtk_tx_dma *dma_txd) | ||
| 273 | { | ||
| 274 | WRITE_ONCE(dma_txd->txd1, txd->txd1); | ||
| 275 | WRITE_ONCE(dma_txd->txd3, txd->txd3); | ||
| 276 | WRITE_ONCE(dma_txd->txd4, txd->txd4); | ||
| 277 | /* clean dma done flag last */ | ||
| 278 | WRITE_ONCE(dma_txd->txd2, txd->txd2); | ||
| 279 | } | ||
| 280 | |||
| 281 | static void mtk_clean_rx(struct mtk_eth *eth, struct mtk_rx_ring *ring) | ||
| 282 | { | ||
| 283 | int i; | ||
| 284 | |||
| 285 | if (ring->rx_data && ring->rx_dma) { | ||
| 286 | for (i = 0; i < ring->rx_ring_size; i++) { | ||
| 287 | if (!ring->rx_data[i]) | ||
| 288 | continue; | ||
| 289 | if (!ring->rx_dma[i].rxd1) | ||
| 290 | continue; | ||
| 291 | dma_unmap_single(eth->dev, | ||
| 292 | ring->rx_dma[i].rxd1, | ||
| 293 | ring->rx_buf_size, | ||
| 294 | DMA_FROM_DEVICE); | ||
| 295 | skb_free_frag(ring->rx_data[i]); | ||
| 296 | } | ||
| 297 | kfree(ring->rx_data); | ||
| 298 | ring->rx_data = NULL; | ||
| 299 | } | ||
| 300 | |||
| 301 | if (ring->rx_dma) { | ||
| 302 | dma_free_coherent(eth->dev, | ||
| 303 | ring->rx_ring_size * sizeof(*ring->rx_dma), | ||
| 304 | ring->rx_dma, | ||
| 305 | ring->rx_phys); | ||
| 306 | ring->rx_dma = NULL; | ||
| 307 | } | ||
| 308 | } | ||
| 309 | |||
| 310 | static int mtk_dma_rx_alloc(struct mtk_eth *eth, struct mtk_rx_ring *ring) | ||
| 311 | { | ||
| 312 | int i, pad = 0; | ||
| 313 | |||
| 314 | ring->frag_size = mtk_max_frag_size(ETH_DATA_LEN); | ||
| 315 | ring->rx_buf_size = mtk_max_buf_size(ring->frag_size); | ||
| 316 | ring->rx_ring_size = eth->soc->dma_ring_size; | ||
| 317 | ring->rx_data = kcalloc(ring->rx_ring_size, sizeof(*ring->rx_data), | ||
| 318 | GFP_KERNEL); | ||
| 319 | if (!ring->rx_data) | ||
| 320 | goto no_rx_mem; | ||
| 321 | |||
| 322 | for (i = 0; i < ring->rx_ring_size; i++) { | ||
| 323 | ring->rx_data[i] = netdev_alloc_frag(ring->frag_size); | ||
| 324 | if (!ring->rx_data[i]) | ||
| 325 | goto no_rx_mem; | ||
| 326 | } | ||
| 327 | |||
| 328 | ring->rx_dma = | ||
| 329 | dma_alloc_coherent(eth->dev, | ||
| 330 | ring->rx_ring_size * sizeof(*ring->rx_dma), | ||
| 331 | &ring->rx_phys, GFP_ATOMIC | __GFP_ZERO); | ||
| 332 | if (!ring->rx_dma) | ||
| 333 | goto no_rx_mem; | ||
| 334 | |||
| 335 | if (!eth->soc->rx_2b_offset) | ||
| 336 | pad = NET_IP_ALIGN; | ||
| 337 | |||
| 338 | for (i = 0; i < ring->rx_ring_size; i++) { | ||
| 339 | dma_addr_t dma_addr = dma_map_single(eth->dev, | ||
| 340 | ring->rx_data[i] + NET_SKB_PAD + pad, | ||
| 341 | ring->rx_buf_size, | ||
| 342 | DMA_FROM_DEVICE); | ||
| 343 | if (unlikely(dma_mapping_error(eth->dev, dma_addr))) | ||
| 344 | goto no_rx_mem; | ||
| 345 | ring->rx_dma[i].rxd1 = (unsigned int)dma_addr; | ||
| 346 | |||
| 347 | if (eth->soc->rx_sg_dma) | ||
| 348 | ring->rx_dma[i].rxd2 = RX_DMA_PLEN0(ring->rx_buf_size); | ||
| 349 | else | ||
| 350 | ring->rx_dma[i].rxd2 = RX_DMA_LSO; | ||
| 351 | } | ||
| 352 | ring->rx_calc_idx = ring->rx_ring_size - 1; | ||
| 353 | /* make sure that all changes to the dma ring are flushed before we | ||
| 354 | * continue | ||
| 355 | */ | ||
| 356 | wmb(); | ||
| 357 | |||
| 358 | return 0; | ||
| 359 | |||
| 360 | no_rx_mem: | ||
| 361 | return -ENOMEM; | ||
| 362 | } | ||
| 363 | |||
| 364 | static void mtk_txd_unmap(struct device *dev, struct mtk_tx_buf *tx_buf) | ||
| 365 | { | ||
| 366 | if (tx_buf->flags & MTK_TX_FLAGS_SINGLE0) { | ||
| 367 | dma_unmap_single(dev, | ||
| 368 | dma_unmap_addr(tx_buf, dma_addr0), | ||
| 369 | dma_unmap_len(tx_buf, dma_len0), | ||
| 370 | DMA_TO_DEVICE); | ||
| 371 | } else if (tx_buf->flags & MTK_TX_FLAGS_PAGE0) { | ||
| 372 | dma_unmap_page(dev, | ||
| 373 | dma_unmap_addr(tx_buf, dma_addr0), | ||
| 374 | dma_unmap_len(tx_buf, dma_len0), | ||
| 375 | DMA_TO_DEVICE); | ||
| 376 | } | ||
| 377 | if (tx_buf->flags & MTK_TX_FLAGS_PAGE1) | ||
| 378 | dma_unmap_page(dev, | ||
| 379 | dma_unmap_addr(tx_buf, dma_addr1), | ||
| 380 | dma_unmap_len(tx_buf, dma_len1), | ||
| 381 | DMA_TO_DEVICE); | ||
| 382 | |||
| 383 | tx_buf->flags = 0; | ||
| 384 | if (tx_buf->skb && (tx_buf->skb != (struct sk_buff *)DMA_DUMMY_DESC)) | ||
| 385 | dev_kfree_skb_any(tx_buf->skb); | ||
| 386 | tx_buf->skb = NULL; | ||
| 387 | } | ||
| 388 | |||
| 389 | static void mtk_pdma_tx_clean(struct mtk_eth *eth) | ||
| 390 | { | ||
| 391 | struct mtk_tx_ring *ring = ð->tx_ring; | ||
| 392 | int i; | ||
| 393 | |||
| 394 | if (ring->tx_buf) { | ||
| 395 | for (i = 0; i < ring->tx_ring_size; i++) | ||
| 396 | mtk_txd_unmap(eth->dev, &ring->tx_buf[i]); | ||
| 397 | kfree(ring->tx_buf); | ||
| 398 | ring->tx_buf = NULL; | ||
| 399 | } | ||
| 400 | |||
| 401 | if (ring->tx_dma) { | ||
| 402 | dma_free_coherent(eth->dev, | ||
| 403 | ring->tx_ring_size * sizeof(*ring->tx_dma), | ||
| 404 | ring->tx_dma, | ||
| 405 | ring->tx_phys); | ||
| 406 | ring->tx_dma = NULL; | ||
| 407 | } | ||
| 408 | } | ||
| 409 | |||
| 410 | static void mtk_qdma_tx_clean(struct mtk_eth *eth) | ||
| 411 | { | ||
| 412 | struct mtk_tx_ring *ring = ð->tx_ring; | ||
| 413 | int i; | ||
| 414 | |||
| 415 | if (ring->tx_buf) { | ||
| 416 | for (i = 0; i < ring->tx_ring_size; i++) | ||
| 417 | mtk_txd_unmap(eth->dev, &ring->tx_buf[i]); | ||
| 418 | kfree(ring->tx_buf); | ||
| 419 | ring->tx_buf = NULL; | ||
| 420 | } | ||
| 421 | |||
| 422 | if (ring->tx_dma) { | ||
| 423 | dma_free_coherent(eth->dev, | ||
| 424 | ring->tx_ring_size * sizeof(*ring->tx_dma), | ||
| 425 | ring->tx_dma, | ||
| 426 | ring->tx_phys); | ||
| 427 | ring->tx_dma = NULL; | ||
| 428 | } | ||
| 429 | } | ||
| 430 | |||
| 431 | void mtk_stats_update_mac(struct mtk_mac *mac) | ||
| 432 | { | ||
| 433 | struct mtk_hw_stats *hw_stats = mac->hw_stats; | ||
| 434 | unsigned int base = mtk_reg_table[MTK_REG_MTK_COUNTER_BASE]; | ||
| 435 | u64 stats; | ||
| 436 | |||
| 437 | base += hw_stats->reg_offset; | ||
| 438 | |||
| 439 | u64_stats_update_begin(&hw_stats->syncp); | ||
| 440 | |||
| 441 | if (mac->hw->soc->new_stats) { | ||
| 442 | hw_stats->rx_bytes += mtk_r32(mac->hw, base); | ||
| 443 | stats = mtk_r32(mac->hw, base + 0x04); | ||
| 444 | if (stats) | ||
| 445 | hw_stats->rx_bytes += (stats << 32); | ||
| 446 | hw_stats->rx_packets += mtk_r32(mac->hw, base + 0x08); | ||
| 447 | hw_stats->rx_overflow += mtk_r32(mac->hw, base + 0x10); | ||
| 448 | hw_stats->rx_fcs_errors += mtk_r32(mac->hw, base + 0x14); | ||
| 449 | hw_stats->rx_short_errors += mtk_r32(mac->hw, base + 0x18); | ||
| 450 | hw_stats->rx_long_errors += mtk_r32(mac->hw, base + 0x1c); | ||
| 451 | hw_stats->rx_checksum_errors += mtk_r32(mac->hw, base + 0x20); | ||
| 452 | hw_stats->rx_flow_control_packets += | ||
| 453 | mtk_r32(mac->hw, base + 0x24); | ||
| 454 | hw_stats->tx_skip += mtk_r32(mac->hw, base + 0x28); | ||
| 455 | hw_stats->tx_collisions += mtk_r32(mac->hw, base + 0x2c); | ||
| 456 | hw_stats->tx_bytes += mtk_r32(mac->hw, base + 0x30); | ||
| 457 | stats = mtk_r32(mac->hw, base + 0x34); | ||
| 458 | if (stats) | ||
| 459 | hw_stats->tx_bytes += (stats << 32); | ||
| 460 | hw_stats->tx_packets += mtk_r32(mac->hw, base + 0x38); | ||
| 461 | } else { | ||
| 462 | hw_stats->tx_bytes += mtk_r32(mac->hw, base); | ||
| 463 | hw_stats->tx_packets += mtk_r32(mac->hw, base + 0x04); | ||
| 464 | hw_stats->tx_skip += mtk_r32(mac->hw, base + 0x08); | ||
| 465 | hw_stats->tx_collisions += mtk_r32(mac->hw, base + 0x0c); | ||
| 466 | hw_stats->rx_bytes += mtk_r32(mac->hw, base + 0x20); | ||
| 467 | hw_stats->rx_packets += mtk_r32(mac->hw, base + 0x24); | ||
| 468 | hw_stats->rx_overflow += mtk_r32(mac->hw, base + 0x28); | ||
| 469 | hw_stats->rx_fcs_errors += mtk_r32(mac->hw, base + 0x2c); | ||
| 470 | hw_stats->rx_short_errors += mtk_r32(mac->hw, base + 0x30); | ||
| 471 | hw_stats->rx_long_errors += mtk_r32(mac->hw, base + 0x34); | ||
| 472 | hw_stats->rx_checksum_errors += mtk_r32(mac->hw, base + 0x38); | ||
| 473 | hw_stats->rx_flow_control_packets += | ||
| 474 | mtk_r32(mac->hw, base + 0x3c); | ||
| 475 | } | ||
| 476 | |||
| 477 | u64_stats_update_end(&hw_stats->syncp); | ||
| 478 | } | ||
| 479 | |||
| 480 | static void mtk_get_stats64(struct net_device *dev, | ||
| 481 | struct rtnl_link_stats64 *storage) | ||
| 482 | { | ||
| 483 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 484 | struct mtk_hw_stats *hw_stats = mac->hw_stats; | ||
| 485 | unsigned int base = mtk_reg_table[MTK_REG_MTK_COUNTER_BASE]; | ||
| 486 | unsigned int start; | ||
| 487 | |||
| 488 | if (!base) { | ||
| 489 | netdev_stats_to_stats64(storage, &dev->stats); | ||
| 490 | return; | ||
| 491 | } | ||
| 492 | |||
| 493 | if (netif_running(dev) && netif_device_present(dev)) { | ||
| 494 | if (spin_trylock(&hw_stats->stats_lock)) { | ||
| 495 | mtk_stats_update_mac(mac); | ||
| 496 | spin_unlock(&hw_stats->stats_lock); | ||
| 497 | } | ||
| 498 | } | ||
| 499 | |||
| 500 | do { | ||
| 501 | start = u64_stats_fetch_begin_irq(&hw_stats->syncp); | ||
| 502 | storage->rx_packets = hw_stats->rx_packets; | ||
| 503 | storage->tx_packets = hw_stats->tx_packets; | ||
| 504 | storage->rx_bytes = hw_stats->rx_bytes; | ||
| 505 | storage->tx_bytes = hw_stats->tx_bytes; | ||
| 506 | storage->collisions = hw_stats->tx_collisions; | ||
| 507 | storage->rx_length_errors = hw_stats->rx_short_errors + | ||
| 508 | hw_stats->rx_long_errors; | ||
| 509 | storage->rx_over_errors = hw_stats->rx_overflow; | ||
| 510 | storage->rx_crc_errors = hw_stats->rx_fcs_errors; | ||
| 511 | storage->rx_errors = hw_stats->rx_checksum_errors; | ||
| 512 | storage->tx_aborted_errors = hw_stats->tx_skip; | ||
| 513 | } while (u64_stats_fetch_retry_irq(&hw_stats->syncp, start)); | ||
| 514 | |||
| 515 | storage->tx_errors = dev->stats.tx_errors; | ||
| 516 | storage->rx_dropped = dev->stats.rx_dropped; | ||
| 517 | storage->tx_dropped = dev->stats.tx_dropped; | ||
| 518 | } | ||
| 519 | |||
| 520 | static int mtk_vlan_rx_add_vid(struct net_device *dev, | ||
| 521 | __be16 proto, u16 vid) | ||
| 522 | { | ||
| 523 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 524 | struct mtk_eth *eth = mac->hw; | ||
| 525 | u32 idx = (vid & 0xf); | ||
| 526 | u32 vlan_cfg; | ||
| 527 | |||
| 528 | if (!((mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE]) && | ||
| 529 | (dev->features & NETIF_F_HW_VLAN_CTAG_TX))) | ||
| 530 | return 0; | ||
| 531 | |||
| 532 | if (test_bit(idx, ð->vlan_map)) { | ||
| 533 | netdev_warn(dev, "disable tx vlan offload\n"); | ||
| 534 | dev->wanted_features &= ~NETIF_F_HW_VLAN_CTAG_TX; | ||
| 535 | netdev_update_features(dev); | ||
| 536 | } else { | ||
| 537 | vlan_cfg = mtk_r32(eth, | ||
| 538 | mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE] + | ||
| 539 | ((idx >> 1) << 2)); | ||
| 540 | if (idx & 0x1) { | ||
| 541 | vlan_cfg &= 0xffff; | ||
| 542 | vlan_cfg |= (vid << 16); | ||
| 543 | } else { | ||
| 544 | vlan_cfg &= 0xffff0000; | ||
| 545 | vlan_cfg |= vid; | ||
| 546 | } | ||
| 547 | mtk_w32(eth, | ||
| 548 | vlan_cfg, mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE] + | ||
| 549 | ((idx >> 1) << 2)); | ||
| 550 | set_bit(idx, ð->vlan_map); | ||
| 551 | } | ||
| 552 | |||
| 553 | return 0; | ||
| 554 | } | ||
| 555 | |||
| 556 | static int mtk_vlan_rx_kill_vid(struct net_device *dev, | ||
| 557 | __be16 proto, u16 vid) | ||
| 558 | { | ||
| 559 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 560 | struct mtk_eth *eth = mac->hw; | ||
| 561 | u32 idx = (vid & 0xf); | ||
| 562 | |||
| 563 | if (!((mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE]) && | ||
| 564 | (dev->features & NETIF_F_HW_VLAN_CTAG_TX))) | ||
| 565 | return 0; | ||
| 566 | |||
| 567 | clear_bit(idx, ð->vlan_map); | ||
| 568 | |||
| 569 | return 0; | ||
| 570 | } | ||
| 571 | |||
| 572 | static inline u32 mtk_pdma_empty_txd(struct mtk_tx_ring *ring) | ||
| 573 | { | ||
| 574 | barrier(); | ||
| 575 | return (u32)(ring->tx_ring_size - | ||
| 576 | ((ring->tx_next_idx - ring->tx_free_idx) & | ||
| 577 | (ring->tx_ring_size - 1))); | ||
| 578 | } | ||
| 579 | |||
| 580 | static int mtk_skb_padto(struct sk_buff *skb, struct mtk_eth *eth) | ||
| 581 | { | ||
| 582 | unsigned int len; | ||
| 583 | int ret; | ||
| 584 | |||
| 585 | if (unlikely(skb->len >= VLAN_ETH_ZLEN)) | ||
| 586 | return 0; | ||
| 587 | |||
| 588 | if (eth->soc->padding_64b && !eth->soc->padding_bug) | ||
| 589 | return 0; | ||
| 590 | |||
| 591 | if (skb_vlan_tag_present(skb)) | ||
| 592 | len = ETH_ZLEN; | ||
| 593 | else if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) | ||
| 594 | len = VLAN_ETH_ZLEN; | ||
| 595 | else if (!eth->soc->padding_64b) | ||
| 596 | len = ETH_ZLEN; | ||
| 597 | else | ||
| 598 | return 0; | ||
| 599 | |||
| 600 | if (skb->len >= len) | ||
| 601 | return 0; | ||
| 602 | |||
| 603 | ret = skb_pad(skb, len - skb->len); | ||
| 604 | if (ret < 0) | ||
| 605 | return ret; | ||
| 606 | skb->len = len; | ||
| 607 | skb_set_tail_pointer(skb, len); | ||
| 608 | |||
| 609 | return ret; | ||
| 610 | } | ||
| 611 | |||
| 612 | static int mtk_pdma_tx_map(struct sk_buff *skb, struct net_device *dev, | ||
| 613 | int tx_num, struct mtk_tx_ring *ring, bool gso) | ||
| 614 | { | ||
| 615 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 616 | struct mtk_eth *eth = mac->hw; | ||
| 617 | struct skb_frag_struct *frag; | ||
| 618 | struct mtk_tx_dma txd, *ptxd; | ||
| 619 | struct mtk_tx_buf *tx_buf; | ||
| 620 | int i, j, k, frag_size, frag_map_size, offset; | ||
| 621 | dma_addr_t mapped_addr; | ||
| 622 | unsigned int nr_frags; | ||
| 623 | u32 def_txd4; | ||
| 624 | |||
| 625 | if (mtk_skb_padto(skb, eth)) { | ||
| 626 | netif_warn(eth, tx_err, dev, "tx padding failed!\n"); | ||
| 627 | return -1; | ||
| 628 | } | ||
| 629 | |||
| 630 | tx_buf = &ring->tx_buf[ring->tx_next_idx]; | ||
| 631 | memset(tx_buf, 0, sizeof(*tx_buf)); | ||
| 632 | memset(&txd, 0, sizeof(txd)); | ||
| 633 | nr_frags = skb_shinfo(skb)->nr_frags; | ||
| 634 | |||
| 635 | /* init tx descriptor */ | ||
| 636 | def_txd4 = eth->soc->txd4; | ||
| 637 | txd.txd4 = def_txd4; | ||
| 638 | |||
| 639 | if (eth->soc->mac_count > 1) | ||
| 640 | txd.txd4 |= (mac->id + 1) << TX_DMA_FPORT_SHIFT; | ||
| 641 | |||
| 642 | if (gso) | ||
| 643 | txd.txd4 |= TX_DMA_TSO; | ||
| 644 | |||
| 645 | /* TX Checksum offload */ | ||
| 646 | if (skb->ip_summed == CHECKSUM_PARTIAL) | ||
| 647 | txd.txd4 |= TX_DMA_CHKSUM; | ||
| 648 | |||
| 649 | /* VLAN header offload */ | ||
| 650 | if (skb_vlan_tag_present(skb)) { | ||
| 651 | u16 tag = skb_vlan_tag_get(skb); | ||
| 652 | |||
| 653 | txd.txd4 |= TX_DMA_INS_VLAN | | ||
| 654 | ((tag >> VLAN_PRIO_SHIFT) << 4) | | ||
| 655 | (tag & 0xF); | ||
| 656 | } | ||
| 657 | |||
| 658 | mapped_addr = dma_map_single(&dev->dev, skb->data, | ||
| 659 | skb_headlen(skb), DMA_TO_DEVICE); | ||
| 660 | if (unlikely(dma_mapping_error(&dev->dev, mapped_addr))) | ||
| 661 | return -1; | ||
| 662 | |||
| 663 | txd.txd1 = mapped_addr; | ||
| 664 | txd.txd2 = TX_DMA_PLEN0(skb_headlen(skb)); | ||
| 665 | |||
| 666 | tx_buf->flags |= MTK_TX_FLAGS_SINGLE0; | ||
| 667 | dma_unmap_addr_set(tx_buf, dma_addr0, mapped_addr); | ||
| 668 | dma_unmap_len_set(tx_buf, dma_len0, skb_headlen(skb)); | ||
| 669 | |||
| 670 | /* TX SG offload */ | ||
| 671 | j = ring->tx_next_idx; | ||
| 672 | k = 0; | ||
| 673 | for (i = 0; i < nr_frags; i++) { | ||
| 674 | offset = 0; | ||
| 675 | frag = &skb_shinfo(skb)->frags[i]; | ||
| 676 | frag_size = skb_frag_size(frag); | ||
| 677 | |||
| 678 | while (frag_size > 0) { | ||
| 679 | frag_map_size = min(frag_size, TX_DMA_BUF_LEN); | ||
| 680 | mapped_addr = skb_frag_dma_map(&dev->dev, frag, offset, | ||
| 681 | frag_map_size, | ||
| 682 | DMA_TO_DEVICE); | ||
| 683 | if (unlikely(dma_mapping_error(&dev->dev, mapped_addr))) | ||
| 684 | goto err_dma; | ||
| 685 | |||
| 686 | if (k & 0x1) { | ||
| 687 | j = NEXT_TX_DESP_IDX(j); | ||
| 688 | txd.txd1 = mapped_addr; | ||
| 689 | txd.txd2 = TX_DMA_PLEN0(frag_map_size); | ||
| 690 | txd.txd4 = def_txd4; | ||
| 691 | |||
| 692 | tx_buf = &ring->tx_buf[j]; | ||
| 693 | memset(tx_buf, 0, sizeof(*tx_buf)); | ||
| 694 | |||
| 695 | tx_buf->flags |= MTK_TX_FLAGS_PAGE0; | ||
| 696 | dma_unmap_addr_set(tx_buf, dma_addr0, | ||
| 697 | mapped_addr); | ||
| 698 | dma_unmap_len_set(tx_buf, dma_len0, | ||
| 699 | frag_map_size); | ||
| 700 | } else { | ||
| 701 | txd.txd3 = mapped_addr; | ||
| 702 | txd.txd2 |= TX_DMA_PLEN1(frag_map_size); | ||
| 703 | |||
| 704 | tx_buf->skb = (struct sk_buff *)DMA_DUMMY_DESC; | ||
| 705 | tx_buf->flags |= MTK_TX_FLAGS_PAGE1; | ||
| 706 | dma_unmap_addr_set(tx_buf, dma_addr1, | ||
| 707 | mapped_addr); | ||
| 708 | dma_unmap_len_set(tx_buf, dma_len1, | ||
| 709 | frag_map_size); | ||
| 710 | |||
| 711 | if (!((i == (nr_frags - 1)) && | ||
| 712 | (frag_map_size == frag_size))) { | ||
| 713 | mtk_set_txd_pdma(&txd, | ||
| 714 | &ring->tx_dma[j]); | ||
| 715 | memset(&txd, 0, sizeof(txd)); | ||
| 716 | } | ||
| 717 | } | ||
| 718 | frag_size -= frag_map_size; | ||
| 719 | offset += frag_map_size; | ||
| 720 | k++; | ||
| 721 | } | ||
| 722 | } | ||
| 723 | |||
| 724 | /* set last segment */ | ||
| 725 | if (k & 0x1) | ||
| 726 | txd.txd2 |= TX_DMA_LS1; | ||
| 727 | else | ||
| 728 | txd.txd2 |= TX_DMA_LS0; | ||
| 729 | mtk_set_txd_pdma(&txd, &ring->tx_dma[j]); | ||
| 730 | |||
| 731 | /* store skb to cleanup */ | ||
| 732 | tx_buf->skb = skb; | ||
| 733 | |||
| 734 | netdev_sent_queue(dev, skb->len); | ||
| 735 | skb_tx_timestamp(skb); | ||
| 736 | |||
| 737 | ring->tx_next_idx = NEXT_TX_DESP_IDX(j); | ||
| 738 | /* make sure that all changes to the dma ring are flushed before we | ||
| 739 | * continue | ||
| 740 | */ | ||
| 741 | wmb(); | ||
| 742 | atomic_set(&ring->tx_free_count, mtk_pdma_empty_txd(ring)); | ||
| 743 | |||
| 744 | if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) || !skb->xmit_more) | ||
| 745 | mtk_reg_w32(eth, ring->tx_next_idx, MTK_REG_TX_CTX_IDX0); | ||
| 746 | |||
| 747 | return 0; | ||
| 748 | |||
| 749 | err_dma: | ||
| 750 | j = ring->tx_next_idx; | ||
| 751 | for (i = 0; i < tx_num; i++) { | ||
| 752 | ptxd = &ring->tx_dma[j]; | ||
| 753 | tx_buf = &ring->tx_buf[j]; | ||
| 754 | |||
| 755 | /* unmap dma */ | ||
| 756 | mtk_txd_unmap(&dev->dev, tx_buf); | ||
| 757 | |||
| 758 | ptxd->txd2 = TX_DMA_DESP2_DEF; | ||
| 759 | j = NEXT_TX_DESP_IDX(j); | ||
| 760 | } | ||
| 761 | /* make sure that all changes to the dma ring are flushed before we | ||
| 762 | * continue | ||
| 763 | */ | ||
| 764 | wmb(); | ||
| 765 | return -1; | ||
| 766 | } | ||
| 767 | |||
| 768 | /* the qdma core needs scratch memory to be setup */ | ||
| 769 | static int mtk_init_fq_dma(struct mtk_eth *eth) | ||
| 770 | { | ||
| 771 | dma_addr_t dma_addr, phy_ring_head, phy_ring_tail; | ||
| 772 | int cnt = eth->soc->dma_ring_size; | ||
| 773 | int i; | ||
| 774 | |||
| 775 | eth->scratch_ring = dma_alloc_coherent(eth->dev, | ||
| 776 | cnt * sizeof(struct mtk_tx_dma), | ||
| 777 | &phy_ring_head, | ||
| 778 | GFP_ATOMIC | __GFP_ZERO); | ||
| 779 | if (unlikely(!eth->scratch_ring)) | ||
| 780 | return -ENOMEM; | ||
| 781 | |||
| 782 | eth->scratch_head = kcalloc(cnt, QDMA_PAGE_SIZE, | ||
| 783 | GFP_KERNEL); | ||
| 784 | dma_addr = dma_map_single(eth->dev, | ||
| 785 | eth->scratch_head, cnt * QDMA_PAGE_SIZE, | ||
| 786 | DMA_FROM_DEVICE); | ||
| 787 | if (unlikely(dma_mapping_error(eth->dev, dma_addr))) | ||
| 788 | return -ENOMEM; | ||
| 789 | |||
| 790 | memset(eth->scratch_ring, 0x0, sizeof(struct mtk_tx_dma) * cnt); | ||
| 791 | phy_ring_tail = phy_ring_head + (sizeof(struct mtk_tx_dma) * (cnt - 1)); | ||
| 792 | |||
| 793 | for (i = 0; i < cnt; i++) { | ||
| 794 | eth->scratch_ring[i].txd1 = (dma_addr + (i * QDMA_PAGE_SIZE)); | ||
| 795 | if (i < cnt - 1) | ||
| 796 | eth->scratch_ring[i].txd2 = (phy_ring_head + | ||
| 797 | ((i + 1) * sizeof(struct mtk_tx_dma))); | ||
| 798 | eth->scratch_ring[i].txd3 = TX_QDMA_SDL(QDMA_PAGE_SIZE); | ||
| 799 | } | ||
| 800 | |||
| 801 | mtk_w32(eth, phy_ring_head, MTK_QDMA_FQ_HEAD); | ||
| 802 | mtk_w32(eth, phy_ring_tail, MTK_QDMA_FQ_TAIL); | ||
| 803 | mtk_w32(eth, (cnt << 16) | cnt, MTK_QDMA_FQ_CNT); | ||
| 804 | mtk_w32(eth, QDMA_PAGE_SIZE << 16, MTK_QDMA_FQ_BLEN); | ||
| 805 | |||
| 806 | return 0; | ||
| 807 | } | ||
| 808 | |||
| 809 | static void *mtk_qdma_phys_to_virt(struct mtk_tx_ring *ring, u32 desc) | ||
| 810 | { | ||
| 811 | void *ret = ring->tx_dma; | ||
| 812 | |||
| 813 | return ret + (desc - ring->tx_phys); | ||
| 814 | } | ||
| 815 | |||
| 816 | static struct mtk_tx_dma *mtk_tx_next_qdma(struct mtk_tx_ring *ring, | ||
| 817 | struct mtk_tx_dma *txd) | ||
| 818 | { | ||
| 819 | return mtk_qdma_phys_to_virt(ring, txd->txd2); | ||
| 820 | } | ||
| 821 | |||
| 822 | static struct mtk_tx_buf *mtk_desc_to_tx_buf(struct mtk_tx_ring *ring, | ||
| 823 | struct mtk_tx_dma *txd) | ||
| 824 | { | ||
| 825 | int idx = txd - ring->tx_dma; | ||
| 826 | |||
| 827 | return &ring->tx_buf[idx]; | ||
| 828 | } | ||
| 829 | |||
| 830 | static int mtk_qdma_tx_map(struct sk_buff *skb, struct net_device *dev, | ||
| 831 | int tx_num, struct mtk_tx_ring *ring, bool gso) | ||
| 832 | { | ||
| 833 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 834 | struct mtk_eth *eth = mac->hw; | ||
| 835 | struct mtk_tx_dma *itxd, *txd; | ||
| 836 | struct mtk_tx_buf *tx_buf; | ||
| 837 | dma_addr_t mapped_addr; | ||
| 838 | unsigned int nr_frags; | ||
| 839 | int i, n_desc = 1; | ||
| 840 | u32 txd4 = eth->soc->txd4; | ||
| 841 | |||
| 842 | itxd = ring->tx_next_free; | ||
| 843 | if (itxd == ring->tx_last_free) | ||
| 844 | return -ENOMEM; | ||
| 845 | |||
| 846 | if (eth->soc->mac_count > 1) | ||
| 847 | txd4 |= (mac->id + 1) << TX_DMA_FPORT_SHIFT; | ||
| 848 | |||
| 849 | tx_buf = mtk_desc_to_tx_buf(ring, itxd); | ||
| 850 | memset(tx_buf, 0, sizeof(*tx_buf)); | ||
| 851 | |||
| 852 | if (gso) | ||
| 853 | txd4 |= TX_DMA_TSO; | ||
| 854 | |||
| 855 | /* TX Checksum offload */ | ||
| 856 | if (skb->ip_summed == CHECKSUM_PARTIAL) | ||
| 857 | txd4 |= TX_DMA_CHKSUM; | ||
| 858 | |||
| 859 | /* VLAN header offload */ | ||
| 860 | if (skb_vlan_tag_present(skb)) | ||
| 861 | txd4 |= TX_DMA_INS_VLAN_MT7621 | skb_vlan_tag_get(skb); | ||
| 862 | |||
| 863 | mapped_addr = dma_map_single(&dev->dev, skb->data, | ||
| 864 | skb_headlen(skb), DMA_TO_DEVICE); | ||
| 865 | if (unlikely(dma_mapping_error(&dev->dev, mapped_addr))) | ||
| 866 | return -ENOMEM; | ||
| 867 | |||
| 868 | WRITE_ONCE(itxd->txd1, mapped_addr); | ||
| 869 | tx_buf->flags |= MTK_TX_FLAGS_SINGLE0; | ||
| 870 | dma_unmap_addr_set(tx_buf, dma_addr0, mapped_addr); | ||
| 871 | dma_unmap_len_set(tx_buf, dma_len0, skb_headlen(skb)); | ||
| 872 | |||
| 873 | /* TX SG offload */ | ||
| 874 | txd = itxd; | ||
| 875 | nr_frags = skb_shinfo(skb)->nr_frags; | ||
| 876 | for (i = 0; i < nr_frags; i++) { | ||
| 877 | struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; | ||
| 878 | unsigned int offset = 0; | ||
| 879 | int frag_size = skb_frag_size(frag); | ||
| 880 | |||
| 881 | while (frag_size) { | ||
| 882 | bool last_frag = false; | ||
| 883 | unsigned int frag_map_size; | ||
| 884 | |||
| 885 | txd = mtk_tx_next_qdma(ring, txd); | ||
| 886 | if (txd == ring->tx_last_free) | ||
| 887 | goto err_dma; | ||
| 888 | |||
| 889 | n_desc++; | ||
| 890 | frag_map_size = min(frag_size, TX_DMA_BUF_LEN); | ||
| 891 | mapped_addr = skb_frag_dma_map(&dev->dev, frag, offset, | ||
| 892 | frag_map_size, | ||
| 893 | DMA_TO_DEVICE); | ||
| 894 | if (unlikely(dma_mapping_error(&dev->dev, mapped_addr))) | ||
| 895 | goto err_dma; | ||
| 896 | |||
| 897 | if (i == nr_frags - 1 && | ||
| 898 | (frag_size - frag_map_size) == 0) | ||
| 899 | last_frag = true; | ||
| 900 | |||
| 901 | WRITE_ONCE(txd->txd1, mapped_addr); | ||
| 902 | WRITE_ONCE(txd->txd3, (QDMA_TX_SWC | | ||
| 903 | TX_DMA_PLEN0(frag_map_size) | | ||
| 904 | last_frag * TX_DMA_LS0) | | ||
| 905 | mac->id); | ||
| 906 | WRITE_ONCE(txd->txd4, 0); | ||
| 907 | |||
| 908 | tx_buf->skb = (struct sk_buff *)DMA_DUMMY_DESC; | ||
| 909 | tx_buf = mtk_desc_to_tx_buf(ring, txd); | ||
| 910 | memset(tx_buf, 0, sizeof(*tx_buf)); | ||
| 911 | |||
| 912 | tx_buf->flags |= MTK_TX_FLAGS_PAGE0; | ||
| 913 | dma_unmap_addr_set(tx_buf, dma_addr0, mapped_addr); | ||
| 914 | dma_unmap_len_set(tx_buf, dma_len0, frag_map_size); | ||
| 915 | frag_size -= frag_map_size; | ||
| 916 | offset += frag_map_size; | ||
| 917 | } | ||
| 918 | } | ||
| 919 | |||
| 920 | /* store skb to cleanup */ | ||
| 921 | tx_buf->skb = skb; | ||
| 922 | |||
| 923 | WRITE_ONCE(itxd->txd4, txd4); | ||
| 924 | WRITE_ONCE(itxd->txd3, (QDMA_TX_SWC | TX_DMA_PLEN0(skb_headlen(skb)) | | ||
| 925 | (!nr_frags * TX_DMA_LS0))); | ||
| 926 | |||
| 927 | netdev_sent_queue(dev, skb->len); | ||
| 928 | skb_tx_timestamp(skb); | ||
| 929 | |||
| 930 | ring->tx_next_free = mtk_tx_next_qdma(ring, txd); | ||
| 931 | atomic_sub(n_desc, &ring->tx_free_count); | ||
| 932 | |||
| 933 | /* make sure that all changes to the dma ring are flushed before we | ||
| 934 | * continue | ||
| 935 | */ | ||
| 936 | wmb(); | ||
| 937 | |||
| 938 | if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) || !skb->xmit_more) | ||
| 939 | mtk_w32(eth, txd->txd2, MTK_QTX_CTX_PTR); | ||
| 940 | |||
| 941 | return 0; | ||
| 942 | |||
| 943 | err_dma: | ||
| 944 | do { | ||
| 945 | tx_buf = mtk_desc_to_tx_buf(ring, txd); | ||
| 946 | |||
| 947 | /* unmap dma */ | ||
| 948 | mtk_txd_unmap(&dev->dev, tx_buf); | ||
| 949 | |||
| 950 | itxd->txd3 = TX_DMA_DESP2_DEF; | ||
| 951 | itxd = mtk_tx_next_qdma(ring, itxd); | ||
| 952 | } while (itxd != txd); | ||
| 953 | |||
| 954 | return -ENOMEM; | ||
| 955 | } | ||
| 956 | |||
| 957 | static inline int mtk_cal_txd_req(struct sk_buff *skb) | ||
| 958 | { | ||
| 959 | int i, nfrags; | ||
| 960 | struct skb_frag_struct *frag; | ||
| 961 | |||
| 962 | nfrags = 1; | ||
| 963 | if (skb_is_gso(skb)) { | ||
| 964 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | ||
| 965 | frag = &skb_shinfo(skb)->frags[i]; | ||
| 966 | nfrags += DIV_ROUND_UP(frag->size, TX_DMA_BUF_LEN); | ||
| 967 | } | ||
| 968 | } else { | ||
| 969 | nfrags += skb_shinfo(skb)->nr_frags; | ||
| 970 | } | ||
| 971 | |||
| 972 | return DIV_ROUND_UP(nfrags, 2); | ||
| 973 | } | ||
| 974 | |||
| 975 | static int mtk_start_xmit(struct sk_buff *skb, struct net_device *dev) | ||
| 976 | { | ||
| 977 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 978 | struct mtk_eth *eth = mac->hw; | ||
| 979 | struct mtk_tx_ring *ring = ð->tx_ring; | ||
| 980 | struct net_device_stats *stats = &dev->stats; | ||
| 981 | int tx_num; | ||
| 982 | int len = skb->len; | ||
| 983 | bool gso = false; | ||
| 984 | |||
| 985 | tx_num = mtk_cal_txd_req(skb); | ||
| 986 | if (unlikely(atomic_read(&ring->tx_free_count) <= tx_num)) { | ||
| 987 | netif_stop_queue(dev); | ||
| 988 | netif_err(eth, tx_queued, dev, | ||
| 989 | "Tx Ring full when queue awake!\n"); | ||
| 990 | return NETDEV_TX_BUSY; | ||
| 991 | } | ||
| 992 | |||
| 993 | /* TSO: fill MSS info in tcp checksum field */ | ||
| 994 | if (skb_is_gso(skb)) { | ||
| 995 | if (skb_cow_head(skb, 0)) { | ||
| 996 | netif_warn(eth, tx_err, dev, | ||
| 997 | "GSO expand head fail.\n"); | ||
| 998 | goto drop; | ||
| 999 | } | ||
| 1000 | |||
| 1001 | if (skb_shinfo(skb)->gso_type & | ||
| 1002 | (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) { | ||
| 1003 | gso = true; | ||
| 1004 | tcp_hdr(skb)->check = htons(skb_shinfo(skb)->gso_size); | ||
| 1005 | } | ||
| 1006 | } | ||
| 1007 | |||
| 1008 | if (ring->tx_map(skb, dev, tx_num, ring, gso) < 0) | ||
| 1009 | goto drop; | ||
| 1010 | |||
| 1011 | stats->tx_packets++; | ||
| 1012 | stats->tx_bytes += len; | ||
| 1013 | |||
| 1014 | if (unlikely(atomic_read(&ring->tx_free_count) <= ring->tx_thresh)) { | ||
| 1015 | netif_stop_queue(dev); | ||
| 1016 | smp_mb(); | ||
| 1017 | if (unlikely(atomic_read(&ring->tx_free_count) > | ||
| 1018 | ring->tx_thresh)) | ||
| 1019 | netif_wake_queue(dev); | ||
| 1020 | } | ||
| 1021 | |||
| 1022 | return NETDEV_TX_OK; | ||
| 1023 | |||
| 1024 | drop: | ||
| 1025 | stats->tx_dropped++; | ||
| 1026 | dev_kfree_skb(skb); | ||
| 1027 | return NETDEV_TX_OK; | ||
| 1028 | } | ||
| 1029 | |||
| 1030 | static int mtk_poll_rx(struct napi_struct *napi, int budget, | ||
| 1031 | struct mtk_eth *eth, u32 rx_intr) | ||
| 1032 | { | ||
| 1033 | struct mtk_soc_data *soc = eth->soc; | ||
| 1034 | struct mtk_rx_ring *ring = ð->rx_ring[0]; | ||
| 1035 | int idx = ring->rx_calc_idx; | ||
| 1036 | u32 checksum_bit; | ||
| 1037 | struct sk_buff *skb; | ||
| 1038 | u8 *data, *new_data; | ||
| 1039 | struct mtk_rx_dma *rxd, trxd; | ||
| 1040 | int done = 0, pad; | ||
| 1041 | |||
| 1042 | if (eth->soc->hw_features & NETIF_F_RXCSUM) | ||
| 1043 | checksum_bit = soc->checksum_bit; | ||
| 1044 | else | ||
| 1045 | checksum_bit = 0; | ||
| 1046 | |||
| 1047 | if (eth->soc->rx_2b_offset) | ||
| 1048 | pad = 0; | ||
| 1049 | else | ||
| 1050 | pad = NET_IP_ALIGN; | ||
| 1051 | |||
| 1052 | while (done < budget) { | ||
| 1053 | struct net_device *netdev; | ||
| 1054 | unsigned int pktlen; | ||
| 1055 | dma_addr_t dma_addr; | ||
| 1056 | int mac = 0; | ||
| 1057 | |||
| 1058 | idx = NEXT_RX_DESP_IDX(idx); | ||
| 1059 | rxd = &ring->rx_dma[idx]; | ||
| 1060 | data = ring->rx_data[idx]; | ||
| 1061 | |||
| 1062 | mtk_get_rxd(&trxd, rxd); | ||
| 1063 | if (!(trxd.rxd2 & RX_DMA_DONE)) | ||
| 1064 | break; | ||
| 1065 | |||
| 1066 | /* find out which mac the packet come from. values start at 1 */ | ||
| 1067 | if (eth->soc->mac_count > 1) { | ||
| 1068 | mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) & | ||
| 1069 | RX_DMA_FPORT_MASK; | ||
| 1070 | mac--; | ||
| 1071 | if (mac < 0 || mac >= eth->soc->mac_count) | ||
| 1072 | goto release_desc; | ||
| 1073 | } | ||
| 1074 | |||
| 1075 | netdev = eth->netdev[mac]; | ||
| 1076 | |||
| 1077 | /* alloc new buffer */ | ||
| 1078 | new_data = napi_alloc_frag(ring->frag_size); | ||
| 1079 | if (unlikely(!new_data || !netdev)) { | ||
| 1080 | netdev->stats.rx_dropped++; | ||
| 1081 | goto release_desc; | ||
| 1082 | } | ||
| 1083 | dma_addr = dma_map_single(&netdev->dev, | ||
| 1084 | new_data + NET_SKB_PAD + pad, | ||
| 1085 | ring->rx_buf_size, | ||
| 1086 | DMA_FROM_DEVICE); | ||
| 1087 | if (unlikely(dma_mapping_error(&netdev->dev, dma_addr))) { | ||
| 1088 | skb_free_frag(new_data); | ||
| 1089 | goto release_desc; | ||
| 1090 | } | ||
| 1091 | |||
| 1092 | /* receive data */ | ||
| 1093 | skb = build_skb(data, ring->frag_size); | ||
| 1094 | if (unlikely(!skb)) { | ||
| 1095 | put_page(virt_to_head_page(new_data)); | ||
| 1096 | goto release_desc; | ||
| 1097 | } | ||
| 1098 | skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN); | ||
| 1099 | |||
| 1100 | dma_unmap_single(&netdev->dev, trxd.rxd1, | ||
| 1101 | ring->rx_buf_size, DMA_FROM_DEVICE); | ||
| 1102 | pktlen = RX_DMA_GET_PLEN0(trxd.rxd2); | ||
| 1103 | skb->dev = netdev; | ||
| 1104 | skb_put(skb, pktlen); | ||
| 1105 | if (trxd.rxd4 & checksum_bit) | ||
| 1106 | skb->ip_summed = CHECKSUM_UNNECESSARY; | ||
| 1107 | else | ||
| 1108 | skb_checksum_none_assert(skb); | ||
| 1109 | skb->protocol = eth_type_trans(skb, netdev); | ||
| 1110 | |||
| 1111 | netdev->stats.rx_packets++; | ||
| 1112 | netdev->stats.rx_bytes += pktlen; | ||
| 1113 | |||
| 1114 | if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX && | ||
| 1115 | RX_DMA_VID(trxd.rxd3)) | ||
| 1116 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), | ||
| 1117 | RX_DMA_VID(trxd.rxd3)); | ||
| 1118 | napi_gro_receive(napi, skb); | ||
| 1119 | |||
| 1120 | ring->rx_data[idx] = new_data; | ||
| 1121 | rxd->rxd1 = (unsigned int)dma_addr; | ||
| 1122 | |||
| 1123 | release_desc: | ||
| 1124 | if (eth->soc->rx_sg_dma) | ||
| 1125 | rxd->rxd2 = RX_DMA_PLEN0(ring->rx_buf_size); | ||
| 1126 | else | ||
| 1127 | rxd->rxd2 = RX_DMA_LSO; | ||
| 1128 | |||
| 1129 | ring->rx_calc_idx = idx; | ||
| 1130 | /* make sure that all changes to the dma ring are flushed before | ||
| 1131 | * we continue | ||
| 1132 | */ | ||
| 1133 | wmb(); | ||
| 1134 | if (eth->soc->dma_type == MTK_QDMA) | ||
| 1135 | mtk_w32(eth, ring->rx_calc_idx, MTK_QRX_CRX_IDX0); | ||
| 1136 | else | ||
| 1137 | mtk_reg_w32(eth, ring->rx_calc_idx, | ||
| 1138 | MTK_REG_RX_CALC_IDX0); | ||
| 1139 | done++; | ||
| 1140 | } | ||
| 1141 | |||
| 1142 | if (done < budget) | ||
| 1143 | mtk_irq_ack(eth, rx_intr); | ||
| 1144 | |||
| 1145 | return done; | ||
| 1146 | } | ||
| 1147 | |||
| 1148 | static int mtk_pdma_tx_poll(struct mtk_eth *eth, int budget, bool *tx_again) | ||
| 1149 | { | ||
| 1150 | struct sk_buff *skb; | ||
| 1151 | struct mtk_tx_buf *tx_buf; | ||
| 1152 | int done = 0; | ||
| 1153 | u32 idx, hwidx; | ||
| 1154 | struct mtk_tx_ring *ring = ð->tx_ring; | ||
| 1155 | unsigned int bytes = 0; | ||
| 1156 | |||
| 1157 | idx = ring->tx_free_idx; | ||
| 1158 | hwidx = mtk_reg_r32(eth, MTK_REG_TX_DTX_IDX0); | ||
| 1159 | |||
| 1160 | while ((idx != hwidx) && budget) { | ||
| 1161 | tx_buf = &ring->tx_buf[idx]; | ||
| 1162 | skb = tx_buf->skb; | ||
| 1163 | |||
| 1164 | if (!skb) | ||
| 1165 | break; | ||
| 1166 | |||
| 1167 | if (skb != (struct sk_buff *)DMA_DUMMY_DESC) { | ||
| 1168 | bytes += skb->len; | ||
| 1169 | done++; | ||
| 1170 | budget--; | ||
| 1171 | } | ||
| 1172 | mtk_txd_unmap(eth->dev, tx_buf); | ||
| 1173 | idx = NEXT_TX_DESP_IDX(idx); | ||
| 1174 | } | ||
| 1175 | ring->tx_free_idx = idx; | ||
| 1176 | atomic_set(&ring->tx_free_count, mtk_pdma_empty_txd(ring)); | ||
| 1177 | |||
| 1178 | /* read hw index again make sure no new tx packet */ | ||
| 1179 | if (idx != hwidx || idx != mtk_reg_r32(eth, MTK_REG_TX_DTX_IDX0)) | ||
| 1180 | *tx_again = 1; | ||
| 1181 | |||
| 1182 | if (done) | ||
| 1183 | netdev_completed_queue(*eth->netdev, done, bytes); | ||
| 1184 | |||
| 1185 | return done; | ||
| 1186 | } | ||
| 1187 | |||
| 1188 | static int mtk_qdma_tx_poll(struct mtk_eth *eth, int budget, bool *tx_again) | ||
| 1189 | { | ||
| 1190 | struct mtk_tx_ring *ring = ð->tx_ring; | ||
| 1191 | struct mtk_tx_dma *desc; | ||
| 1192 | struct sk_buff *skb; | ||
| 1193 | struct mtk_tx_buf *tx_buf; | ||
| 1194 | int total = 0, done[MTK_MAX_DEVS]; | ||
| 1195 | unsigned int bytes[MTK_MAX_DEVS]; | ||
| 1196 | u32 cpu, dma; | ||
| 1197 | int i; | ||
| 1198 | |||
| 1199 | memset(done, 0, sizeof(done)); | ||
| 1200 | memset(bytes, 0, sizeof(bytes)); | ||
| 1201 | |||
| 1202 | cpu = mtk_r32(eth, MTK_QTX_CRX_PTR); | ||
| 1203 | dma = mtk_r32(eth, MTK_QTX_DRX_PTR); | ||
| 1204 | |||
| 1205 | desc = mtk_qdma_phys_to_virt(ring, cpu); | ||
| 1206 | |||
| 1207 | while ((cpu != dma) && budget) { | ||
| 1208 | u32 next_cpu = desc->txd2; | ||
| 1209 | int mac; | ||
| 1210 | |||
| 1211 | desc = mtk_tx_next_qdma(ring, desc); | ||
| 1212 | if ((desc->txd3 & QDMA_TX_OWNER_CPU) == 0) | ||
| 1213 | break; | ||
| 1214 | |||
| 1215 | mac = (desc->txd4 >> TX_DMA_FPORT_SHIFT) & | ||
| 1216 | TX_DMA_FPORT_MASK; | ||
| 1217 | mac--; | ||
| 1218 | |||
| 1219 | tx_buf = mtk_desc_to_tx_buf(ring, desc); | ||
| 1220 | skb = tx_buf->skb; | ||
| 1221 | if (!skb) | ||
| 1222 | break; | ||
| 1223 | |||
| 1224 | if (skb != (struct sk_buff *)DMA_DUMMY_DESC) { | ||
| 1225 | bytes[mac] += skb->len; | ||
| 1226 | done[mac]++; | ||
| 1227 | budget--; | ||
| 1228 | } | ||
| 1229 | mtk_txd_unmap(eth->dev, tx_buf); | ||
| 1230 | |||
| 1231 | ring->tx_last_free->txd2 = next_cpu; | ||
| 1232 | ring->tx_last_free = desc; | ||
| 1233 | atomic_inc(&ring->tx_free_count); | ||
| 1234 | |||
| 1235 | cpu = next_cpu; | ||
| 1236 | } | ||
| 1237 | |||
| 1238 | mtk_w32(eth, cpu, MTK_QTX_CRX_PTR); | ||
| 1239 | |||
| 1240 | /* read hw index again make sure no new tx packet */ | ||
| 1241 | if (cpu != dma || cpu != mtk_r32(eth, MTK_QTX_DRX_PTR)) | ||
| 1242 | *tx_again = true; | ||
| 1243 | |||
| 1244 | for (i = 0; i < eth->soc->mac_count; i++) { | ||
| 1245 | if (!done[i]) | ||
| 1246 | continue; | ||
| 1247 | netdev_completed_queue(eth->netdev[i], done[i], bytes[i]); | ||
| 1248 | total += done[i]; | ||
| 1249 | } | ||
| 1250 | |||
| 1251 | return total; | ||
| 1252 | } | ||
| 1253 | |||
| 1254 | static int mtk_poll_tx(struct mtk_eth *eth, int budget, u32 tx_intr, | ||
| 1255 | bool *tx_again) | ||
| 1256 | { | ||
| 1257 | struct mtk_tx_ring *ring = ð->tx_ring; | ||
| 1258 | struct net_device *netdev = eth->netdev[0]; | ||
| 1259 | int done; | ||
| 1260 | |||
| 1261 | done = eth->tx_ring.tx_poll(eth, budget, tx_again); | ||
| 1262 | if (!*tx_again) | ||
| 1263 | mtk_irq_ack(eth, tx_intr); | ||
| 1264 | |||
| 1265 | if (!done) | ||
| 1266 | return 0; | ||
| 1267 | |||
| 1268 | smp_mb(); | ||
| 1269 | if (unlikely(!netif_queue_stopped(netdev))) | ||
| 1270 | return done; | ||
| 1271 | |||
| 1272 | if (atomic_read(&ring->tx_free_count) > ring->tx_thresh) | ||
| 1273 | netif_wake_queue(netdev); | ||
| 1274 | |||
| 1275 | return done; | ||
| 1276 | } | ||
| 1277 | |||
| 1278 | static void mtk_stats_update(struct mtk_eth *eth) | ||
| 1279 | { | ||
| 1280 | int i; | ||
| 1281 | |||
| 1282 | for (i = 0; i < eth->soc->mac_count; i++) { | ||
| 1283 | if (!eth->mac[i] || !eth->mac[i]->hw_stats) | ||
| 1284 | continue; | ||
| 1285 | if (spin_trylock(ð->mac[i]->hw_stats->stats_lock)) { | ||
| 1286 | mtk_stats_update_mac(eth->mac[i]); | ||
| 1287 | spin_unlock(ð->mac[i]->hw_stats->stats_lock); | ||
| 1288 | } | ||
| 1289 | } | ||
| 1290 | } | ||
| 1291 | |||
| 1292 | static int mtk_poll(struct napi_struct *napi, int budget) | ||
| 1293 | { | ||
| 1294 | struct mtk_eth *eth = container_of(napi, struct mtk_eth, rx_napi); | ||
| 1295 | u32 status, mtk_status, mask, tx_intr, rx_intr, status_intr; | ||
| 1296 | int tx_done, rx_done; | ||
| 1297 | bool tx_again = false; | ||
| 1298 | |||
| 1299 | status = mtk_irq_pending(eth); | ||
| 1300 | mtk_status = mtk_irq_pending_status(eth); | ||
| 1301 | tx_intr = eth->soc->tx_int; | ||
| 1302 | rx_intr = eth->soc->rx_int; | ||
| 1303 | status_intr = eth->soc->status_int; | ||
| 1304 | tx_done = 0; | ||
| 1305 | rx_done = 0; | ||
| 1306 | tx_again = 0; | ||
| 1307 | |||
| 1308 | if (status & tx_intr) | ||
| 1309 | tx_done = mtk_poll_tx(eth, budget, tx_intr, &tx_again); | ||
| 1310 | |||
| 1311 | if (status & rx_intr) | ||
| 1312 | rx_done = mtk_poll_rx(napi, budget, eth, rx_intr); | ||
| 1313 | |||
| 1314 | if (unlikely(mtk_status & status_intr)) { | ||
| 1315 | mtk_stats_update(eth); | ||
| 1316 | mtk_irq_ack_status(eth, status_intr); | ||
| 1317 | } | ||
| 1318 | |||
| 1319 | if (unlikely(netif_msg_intr(eth))) { | ||
| 1320 | mask = mtk_irq_enabled(eth); | ||
| 1321 | netdev_info(eth->netdev[0], | ||
| 1322 | "done tx %d, rx %d, intr 0x%08x/0x%x\n", | ||
| 1323 | tx_done, rx_done, status, mask); | ||
| 1324 | } | ||
| 1325 | |||
| 1326 | if (tx_again || rx_done == budget) | ||
| 1327 | return budget; | ||
| 1328 | |||
| 1329 | status = mtk_irq_pending(eth); | ||
| 1330 | if (status & (tx_intr | rx_intr)) | ||
| 1331 | return budget; | ||
| 1332 | |||
| 1333 | napi_complete(napi); | ||
| 1334 | mtk_irq_enable(eth, tx_intr | rx_intr); | ||
| 1335 | |||
| 1336 | return rx_done; | ||
| 1337 | } | ||
| 1338 | |||
| 1339 | static int mtk_pdma_tx_alloc(struct mtk_eth *eth) | ||
| 1340 | { | ||
| 1341 | int i; | ||
| 1342 | struct mtk_tx_ring *ring = ð->tx_ring; | ||
| 1343 | |||
| 1344 | ring->tx_ring_size = eth->soc->dma_ring_size; | ||
| 1345 | ring->tx_free_idx = 0; | ||
| 1346 | ring->tx_next_idx = 0; | ||
| 1347 | ring->tx_thresh = max((unsigned long)ring->tx_ring_size >> 2, | ||
| 1348 | MAX_SKB_FRAGS); | ||
| 1349 | |||
| 1350 | ring->tx_buf = kcalloc(ring->tx_ring_size, sizeof(*ring->tx_buf), | ||
| 1351 | GFP_KERNEL); | ||
| 1352 | if (!ring->tx_buf) | ||
| 1353 | goto no_tx_mem; | ||
| 1354 | |||
| 1355 | ring->tx_dma = | ||
| 1356 | dma_alloc_coherent(eth->dev, | ||
| 1357 | ring->tx_ring_size * sizeof(*ring->tx_dma), | ||
| 1358 | &ring->tx_phys, GFP_ATOMIC | __GFP_ZERO); | ||
| 1359 | if (!ring->tx_dma) | ||
| 1360 | goto no_tx_mem; | ||
| 1361 | |||
| 1362 | for (i = 0; i < ring->tx_ring_size; i++) { | ||
| 1363 | ring->tx_dma[i].txd2 = TX_DMA_DESP2_DEF; | ||
| 1364 | ring->tx_dma[i].txd4 = eth->soc->txd4; | ||
| 1365 | } | ||
| 1366 | |||
| 1367 | atomic_set(&ring->tx_free_count, mtk_pdma_empty_txd(ring)); | ||
| 1368 | ring->tx_map = mtk_pdma_tx_map; | ||
| 1369 | ring->tx_poll = mtk_pdma_tx_poll; | ||
| 1370 | ring->tx_clean = mtk_pdma_tx_clean; | ||
| 1371 | |||
| 1372 | /* make sure that all changes to the dma ring are flushed before we | ||
| 1373 | * continue | ||
| 1374 | */ | ||
| 1375 | wmb(); | ||
| 1376 | |||
| 1377 | mtk_reg_w32(eth, ring->tx_phys, MTK_REG_TX_BASE_PTR0); | ||
| 1378 | mtk_reg_w32(eth, ring->tx_ring_size, MTK_REG_TX_MAX_CNT0); | ||
| 1379 | mtk_reg_w32(eth, 0, MTK_REG_TX_CTX_IDX0); | ||
| 1380 | mtk_reg_w32(eth, MTK_PST_DTX_IDX0, MTK_REG_PDMA_RST_CFG); | ||
| 1381 | |||
| 1382 | return 0; | ||
| 1383 | |||
| 1384 | no_tx_mem: | ||
| 1385 | return -ENOMEM; | ||
| 1386 | } | ||
| 1387 | |||
| 1388 | static int mtk_qdma_tx_alloc_tx(struct mtk_eth *eth) | ||
| 1389 | { | ||
| 1390 | struct mtk_tx_ring *ring = ð->tx_ring; | ||
| 1391 | int i, sz = sizeof(*ring->tx_dma); | ||
| 1392 | |||
| 1393 | ring->tx_ring_size = eth->soc->dma_ring_size; | ||
| 1394 | ring->tx_buf = kcalloc(ring->tx_ring_size, sizeof(*ring->tx_buf), | ||
| 1395 | GFP_KERNEL); | ||
| 1396 | if (!ring->tx_buf) | ||
| 1397 | goto no_tx_mem; | ||
| 1398 | |||
| 1399 | ring->tx_dma = dma_alloc_coherent(eth->dev, ring->tx_ring_size * sz, | ||
| 1400 | &ring->tx_phys, | ||
| 1401 | GFP_ATOMIC | __GFP_ZERO); | ||
| 1402 | if (!ring->tx_dma) | ||
| 1403 | goto no_tx_mem; | ||
| 1404 | |||
| 1405 | for (i = 0; i < ring->tx_ring_size; i++) { | ||
| 1406 | int next = (i + 1) % ring->tx_ring_size; | ||
| 1407 | u32 next_ptr = ring->tx_phys + next * sz; | ||
| 1408 | |||
| 1409 | ring->tx_dma[i].txd2 = next_ptr; | ||
| 1410 | ring->tx_dma[i].txd3 = TX_DMA_DESP2_DEF; | ||
| 1411 | } | ||
| 1412 | |||
| 1413 | atomic_set(&ring->tx_free_count, ring->tx_ring_size - 2); | ||
| 1414 | ring->tx_next_free = &ring->tx_dma[0]; | ||
| 1415 | ring->tx_last_free = &ring->tx_dma[ring->tx_ring_size - 2]; | ||
| 1416 | ring->tx_thresh = max((unsigned long)ring->tx_ring_size >> 2, | ||
| 1417 | MAX_SKB_FRAGS); | ||
| 1418 | |||
| 1419 | ring->tx_map = mtk_qdma_tx_map; | ||
| 1420 | ring->tx_poll = mtk_qdma_tx_poll; | ||
| 1421 | ring->tx_clean = mtk_qdma_tx_clean; | ||
| 1422 | |||
| 1423 | /* make sure that all changes to the dma ring are flushed before we | ||
| 1424 | * continue | ||
| 1425 | */ | ||
| 1426 | wmb(); | ||
| 1427 | |||
| 1428 | mtk_w32(eth, ring->tx_phys, MTK_QTX_CTX_PTR); | ||
| 1429 | mtk_w32(eth, ring->tx_phys, MTK_QTX_DTX_PTR); | ||
| 1430 | mtk_w32(eth, | ||
| 1431 | ring->tx_phys + ((ring->tx_ring_size - 1) * sz), | ||
| 1432 | MTK_QTX_CRX_PTR); | ||
| 1433 | mtk_w32(eth, | ||
| 1434 | ring->tx_phys + ((ring->tx_ring_size - 1) * sz), | ||
| 1435 | MTK_QTX_DRX_PTR); | ||
| 1436 | |||
| 1437 | return 0; | ||
| 1438 | |||
| 1439 | no_tx_mem: | ||
| 1440 | return -ENOMEM; | ||
| 1441 | } | ||
| 1442 | |||
| 1443 | static int mtk_qdma_init(struct mtk_eth *eth, int ring) | ||
| 1444 | { | ||
| 1445 | int err; | ||
| 1446 | |||
| 1447 | err = mtk_init_fq_dma(eth); | ||
| 1448 | if (err) | ||
| 1449 | return err; | ||
| 1450 | |||
| 1451 | err = mtk_qdma_tx_alloc_tx(eth); | ||
| 1452 | if (err) | ||
| 1453 | return err; | ||
| 1454 | |||
| 1455 | err = mtk_dma_rx_alloc(eth, ð->rx_ring[ring]); | ||
| 1456 | if (err) | ||
| 1457 | return err; | ||
| 1458 | |||
| 1459 | mtk_w32(eth, eth->rx_ring[ring].rx_phys, MTK_QRX_BASE_PTR0); | ||
| 1460 | mtk_w32(eth, eth->rx_ring[ring].rx_ring_size, MTK_QRX_MAX_CNT0); | ||
| 1461 | mtk_w32(eth, eth->rx_ring[ring].rx_calc_idx, MTK_QRX_CRX_IDX0); | ||
| 1462 | mtk_w32(eth, MTK_PST_DRX_IDX0, MTK_QDMA_RST_IDX); | ||
| 1463 | mtk_w32(eth, (QDMA_RES_THRES << 8) | QDMA_RES_THRES, MTK_QTX_CFG(0)); | ||
| 1464 | |||
| 1465 | /* Enable random early drop and set drop threshold automatically */ | ||
| 1466 | mtk_w32(eth, 0x174444, MTK_QDMA_FC_THRES); | ||
| 1467 | mtk_w32(eth, 0x0, MTK_QDMA_HRED2); | ||
| 1468 | |||
| 1469 | return 0; | ||
| 1470 | } | ||
| 1471 | |||
| 1472 | static int mtk_pdma_qdma_init(struct mtk_eth *eth) | ||
| 1473 | { | ||
| 1474 | int err = mtk_qdma_init(eth, 1); | ||
| 1475 | |||
| 1476 | if (err) | ||
| 1477 | return err; | ||
| 1478 | |||
| 1479 | err = mtk_dma_rx_alloc(eth, ð->rx_ring[0]); | ||
| 1480 | if (err) | ||
| 1481 | return err; | ||
| 1482 | |||
| 1483 | mtk_reg_w32(eth, eth->rx_ring[0].rx_phys, MTK_REG_RX_BASE_PTR0); | ||
| 1484 | mtk_reg_w32(eth, eth->rx_ring[0].rx_ring_size, MTK_REG_RX_MAX_CNT0); | ||
| 1485 | mtk_reg_w32(eth, eth->rx_ring[0].rx_calc_idx, MTK_REG_RX_CALC_IDX0); | ||
| 1486 | mtk_reg_w32(eth, MTK_PST_DRX_IDX0, MTK_REG_PDMA_RST_CFG); | ||
| 1487 | |||
| 1488 | return 0; | ||
| 1489 | } | ||
| 1490 | |||
| 1491 | static int mtk_pdma_init(struct mtk_eth *eth) | ||
| 1492 | { | ||
| 1493 | struct mtk_rx_ring *ring = ð->rx_ring[0]; | ||
| 1494 | int err; | ||
| 1495 | |||
| 1496 | err = mtk_pdma_tx_alloc(eth); | ||
| 1497 | if (err) | ||
| 1498 | return err; | ||
| 1499 | |||
| 1500 | err = mtk_dma_rx_alloc(eth, ring); | ||
| 1501 | if (err) | ||
| 1502 | return err; | ||
| 1503 | |||
| 1504 | mtk_reg_w32(eth, ring->rx_phys, MTK_REG_RX_BASE_PTR0); | ||
| 1505 | mtk_reg_w32(eth, ring->rx_ring_size, MTK_REG_RX_MAX_CNT0); | ||
| 1506 | mtk_reg_w32(eth, ring->rx_calc_idx, MTK_REG_RX_CALC_IDX0); | ||
| 1507 | mtk_reg_w32(eth, MTK_PST_DRX_IDX0, MTK_REG_PDMA_RST_CFG); | ||
| 1508 | |||
| 1509 | return 0; | ||
| 1510 | } | ||
| 1511 | |||
| 1512 | static void mtk_dma_free(struct mtk_eth *eth) | ||
| 1513 | { | ||
| 1514 | int i; | ||
| 1515 | |||
| 1516 | for (i = 0; i < eth->soc->mac_count; i++) | ||
| 1517 | if (eth->netdev[i]) | ||
| 1518 | netdev_reset_queue(eth->netdev[i]); | ||
| 1519 | eth->tx_ring.tx_clean(eth); | ||
| 1520 | mtk_clean_rx(eth, ð->rx_ring[0]); | ||
| 1521 | mtk_clean_rx(eth, ð->rx_ring[1]); | ||
| 1522 | kfree(eth->scratch_head); | ||
| 1523 | } | ||
| 1524 | |||
| 1525 | static void mtk_tx_timeout(struct net_device *dev) | ||
| 1526 | { | ||
| 1527 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 1528 | struct mtk_eth *eth = mac->hw; | ||
| 1529 | struct mtk_tx_ring *ring = ð->tx_ring; | ||
| 1530 | |||
| 1531 | eth->netdev[mac->id]->stats.tx_errors++; | ||
| 1532 | netif_err(eth, tx_err, dev, | ||
| 1533 | "transmit timed out\n"); | ||
| 1534 | if (eth->soc->dma_type & MTK_PDMA) { | ||
| 1535 | netif_info(eth, drv, dev, "pdma_cfg:%08x\n", | ||
| 1536 | mtk_reg_r32(eth, MTK_REG_PDMA_GLO_CFG)); | ||
| 1537 | netif_info(eth, drv, dev, | ||
| 1538 | "tx_ring=%d, base=%08x, max=%u, ctx=%u, dtx=%u, fdx=%hu, next=%hu\n", | ||
| 1539 | 0, mtk_reg_r32(eth, MTK_REG_TX_BASE_PTR0), | ||
| 1540 | mtk_reg_r32(eth, MTK_REG_TX_MAX_CNT0), | ||
| 1541 | mtk_reg_r32(eth, MTK_REG_TX_CTX_IDX0), | ||
| 1542 | mtk_reg_r32(eth, MTK_REG_TX_DTX_IDX0), | ||
| 1543 | ring->tx_free_idx, | ||
| 1544 | ring->tx_next_idx); | ||
| 1545 | } | ||
| 1546 | if (eth->soc->dma_type & MTK_QDMA) { | ||
| 1547 | netif_info(eth, drv, dev, "qdma_cfg:%08x\n", | ||
| 1548 | mtk_r32(eth, MTK_QDMA_GLO_CFG)); | ||
| 1549 | netif_info(eth, drv, dev, | ||
| 1550 | "tx_ring=%d, ctx=%08x, dtx=%08x, crx=%08x, drx=%08x, free=%hu\n", | ||
| 1551 | 0, mtk_r32(eth, MTK_QTX_CTX_PTR), | ||
| 1552 | mtk_r32(eth, MTK_QTX_DTX_PTR), | ||
| 1553 | mtk_r32(eth, MTK_QTX_CRX_PTR), | ||
| 1554 | mtk_r32(eth, MTK_QTX_DRX_PTR), | ||
| 1555 | atomic_read(&ring->tx_free_count)); | ||
| 1556 | } | ||
| 1557 | netif_info(eth, drv, dev, | ||
| 1558 | "rx_ring=%d, base=%08x, max=%u, calc=%u, drx=%u\n", | ||
| 1559 | 0, mtk_reg_r32(eth, MTK_REG_RX_BASE_PTR0), | ||
| 1560 | mtk_reg_r32(eth, MTK_REG_RX_MAX_CNT0), | ||
| 1561 | mtk_reg_r32(eth, MTK_REG_RX_CALC_IDX0), | ||
| 1562 | mtk_reg_r32(eth, MTK_REG_RX_DRX_IDX0)); | ||
| 1563 | |||
| 1564 | schedule_work(&mac->pending_work); | ||
| 1565 | } | ||
| 1566 | |||
| 1567 | static irqreturn_t mtk_handle_irq(int irq, void *_eth) | ||
| 1568 | { | ||
| 1569 | struct mtk_eth *eth = _eth; | ||
| 1570 | u32 status, int_mask; | ||
| 1571 | |||
| 1572 | status = mtk_irq_pending(eth); | ||
| 1573 | if (unlikely(!status)) | ||
| 1574 | return IRQ_NONE; | ||
| 1575 | |||
| 1576 | int_mask = (eth->soc->rx_int | eth->soc->tx_int); | ||
| 1577 | if (likely(status & int_mask)) { | ||
| 1578 | if (likely(napi_schedule_prep(ð->rx_napi))) | ||
| 1579 | __napi_schedule(ð->rx_napi); | ||
| 1580 | } else { | ||
| 1581 | mtk_irq_ack(eth, status); | ||
| 1582 | } | ||
| 1583 | mtk_irq_disable(eth, int_mask); | ||
| 1584 | |||
| 1585 | return IRQ_HANDLED; | ||
| 1586 | } | ||
| 1587 | |||
| 1588 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
| 1589 | static void mtk_poll_controller(struct net_device *dev) | ||
| 1590 | { | ||
| 1591 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 1592 | struct mtk_eth *eth = mac->hw; | ||
| 1593 | u32 int_mask = eth->soc->tx_int | eth->soc->rx_int; | ||
| 1594 | |||
| 1595 | mtk_irq_disable(eth, int_mask); | ||
| 1596 | mtk_handle_irq(dev->irq, dev); | ||
| 1597 | mtk_irq_enable(eth, int_mask); | ||
| 1598 | } | ||
| 1599 | #endif | ||
| 1600 | |||
| 1601 | int mtk_set_clock_cycle(struct mtk_eth *eth) | ||
| 1602 | { | ||
| 1603 | unsigned long sysclk = eth->sysclk; | ||
| 1604 | |||
| 1605 | sysclk /= MTK_US_CYC_CNT_DIVISOR; | ||
| 1606 | sysclk <<= MTK_US_CYC_CNT_SHIFT; | ||
| 1607 | |||
| 1608 | mtk_w32(eth, (mtk_r32(eth, MTK_GLO_CFG) & | ||
| 1609 | ~(MTK_US_CYC_CNT_MASK << MTK_US_CYC_CNT_SHIFT)) | | ||
| 1610 | sysclk, | ||
| 1611 | MTK_GLO_CFG); | ||
| 1612 | return 0; | ||
| 1613 | } | ||
| 1614 | |||
| 1615 | void mtk_fwd_config(struct mtk_eth *eth) | ||
| 1616 | { | ||
| 1617 | u32 fwd_cfg; | ||
| 1618 | |||
| 1619 | fwd_cfg = mtk_r32(eth, MTK_GDMA1_FWD_CFG); | ||
| 1620 | |||
| 1621 | /* disable jumbo frame */ | ||
| 1622 | if (eth->soc->jumbo_frame) | ||
| 1623 | fwd_cfg &= ~MTK_GDM1_JMB_EN; | ||
| 1624 | |||
| 1625 | /* set unicast/multicast/broadcast frame to cpu */ | ||
| 1626 | fwd_cfg &= ~0xffff; | ||
| 1627 | |||
| 1628 | mtk_w32(eth, fwd_cfg, MTK_GDMA1_FWD_CFG); | ||
| 1629 | } | ||
| 1630 | |||
| 1631 | void mtk_csum_config(struct mtk_eth *eth) | ||
| 1632 | { | ||
| 1633 | if (eth->soc->hw_features & NETIF_F_RXCSUM) | ||
| 1634 | mtk_w32(eth, mtk_r32(eth, MTK_GDMA1_FWD_CFG) | | ||
| 1635 | (MTK_GDM1_ICS_EN | MTK_GDM1_TCS_EN | MTK_GDM1_UCS_EN), | ||
| 1636 | MTK_GDMA1_FWD_CFG); | ||
| 1637 | else | ||
| 1638 | mtk_w32(eth, mtk_r32(eth, MTK_GDMA1_FWD_CFG) & | ||
| 1639 | ~(MTK_GDM1_ICS_EN | MTK_GDM1_TCS_EN | MTK_GDM1_UCS_EN), | ||
| 1640 | MTK_GDMA1_FWD_CFG); | ||
| 1641 | if (eth->soc->hw_features & NETIF_F_IP_CSUM) | ||
| 1642 | mtk_w32(eth, mtk_r32(eth, MTK_CDMA_CSG_CFG) | | ||
| 1643 | (MTK_ICS_GEN_EN | MTK_TCS_GEN_EN | MTK_UCS_GEN_EN), | ||
| 1644 | MTK_CDMA_CSG_CFG); | ||
| 1645 | else | ||
| 1646 | mtk_w32(eth, mtk_r32(eth, MTK_CDMA_CSG_CFG) & | ||
| 1647 | ~(MTK_ICS_GEN_EN | MTK_TCS_GEN_EN | MTK_UCS_GEN_EN), | ||
| 1648 | MTK_CDMA_CSG_CFG); | ||
| 1649 | } | ||
| 1650 | |||
| 1651 | static int mtk_start_dma(struct mtk_eth *eth) | ||
| 1652 | { | ||
| 1653 | unsigned long flags; | ||
| 1654 | u32 val; | ||
| 1655 | int err; | ||
| 1656 | |||
| 1657 | if (eth->soc->dma_type == MTK_PDMA) | ||
| 1658 | err = mtk_pdma_init(eth); | ||
| 1659 | else if (eth->soc->dma_type == MTK_QDMA) | ||
| 1660 | err = mtk_qdma_init(eth, 0); | ||
| 1661 | else | ||
| 1662 | err = mtk_pdma_qdma_init(eth); | ||
| 1663 | if (err) { | ||
| 1664 | mtk_dma_free(eth); | ||
| 1665 | return err; | ||
| 1666 | } | ||
| 1667 | |||
| 1668 | spin_lock_irqsave(ð->page_lock, flags); | ||
| 1669 | |||
| 1670 | val = MTK_TX_WB_DDONE | MTK_RX_DMA_EN | MTK_TX_DMA_EN; | ||
| 1671 | if (eth->soc->rx_2b_offset) | ||
| 1672 | val |= MTK_RX_2B_OFFSET; | ||
| 1673 | val |= eth->soc->pdma_glo_cfg; | ||
| 1674 | |||
| 1675 | if (eth->soc->dma_type & MTK_PDMA) | ||
| 1676 | mtk_reg_w32(eth, val, MTK_REG_PDMA_GLO_CFG); | ||
| 1677 | |||
| 1678 | if (eth->soc->dma_type & MTK_QDMA) | ||
| 1679 | mtk_w32(eth, val, MTK_QDMA_GLO_CFG); | ||
| 1680 | |||
| 1681 | spin_unlock_irqrestore(ð->page_lock, flags); | ||
| 1682 | |||
| 1683 | return 0; | ||
| 1684 | } | ||
| 1685 | |||
| 1686 | static int mtk_open(struct net_device *dev) | ||
| 1687 | { | ||
| 1688 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 1689 | struct mtk_eth *eth = mac->hw; | ||
| 1690 | |||
| 1691 | dma_coerce_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)); | ||
| 1692 | |||
| 1693 | if (!atomic_read(ð->dma_refcnt)) { | ||
| 1694 | int err = mtk_start_dma(eth); | ||
| 1695 | |||
| 1696 | if (err) | ||
| 1697 | return err; | ||
| 1698 | |||
| 1699 | napi_enable(ð->rx_napi); | ||
| 1700 | mtk_irq_enable(eth, eth->soc->tx_int | eth->soc->rx_int); | ||
| 1701 | } | ||
| 1702 | atomic_inc(ð->dma_refcnt); | ||
| 1703 | |||
| 1704 | if (eth->phy) | ||
| 1705 | eth->phy->start(mac); | ||
| 1706 | |||
| 1707 | if (eth->soc->has_carrier && eth->soc->has_carrier(eth)) | ||
| 1708 | netif_carrier_on(dev); | ||
| 1709 | |||
| 1710 | netif_start_queue(dev); | ||
| 1711 | eth->soc->fwd_config(eth); | ||
| 1712 | |||
| 1713 | return 0; | ||
| 1714 | } | ||
| 1715 | |||
| 1716 | static void mtk_stop_dma(struct mtk_eth *eth, u32 glo_cfg) | ||
| 1717 | { | ||
| 1718 | unsigned long flags; | ||
| 1719 | u32 val; | ||
| 1720 | int i; | ||
| 1721 | |||
| 1722 | /* stop the dma enfine */ | ||
| 1723 | spin_lock_irqsave(ð->page_lock, flags); | ||
| 1724 | val = mtk_r32(eth, glo_cfg); | ||
| 1725 | mtk_w32(eth, val & ~(MTK_TX_WB_DDONE | MTK_RX_DMA_EN | MTK_TX_DMA_EN), | ||
| 1726 | glo_cfg); | ||
| 1727 | spin_unlock_irqrestore(ð->page_lock, flags); | ||
| 1728 | |||
| 1729 | /* wait for dma stop */ | ||
| 1730 | for (i = 0; i < 10; i++) { | ||
| 1731 | val = mtk_r32(eth, glo_cfg); | ||
| 1732 | if (val & (MTK_TX_DMA_BUSY | MTK_RX_DMA_BUSY)) { | ||
| 1733 | msleep(20); | ||
| 1734 | continue; | ||
| 1735 | } | ||
| 1736 | break; | ||
| 1737 | } | ||
| 1738 | } | ||
| 1739 | |||
| 1740 | static int mtk_stop(struct net_device *dev) | ||
| 1741 | { | ||
| 1742 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 1743 | struct mtk_eth *eth = mac->hw; | ||
| 1744 | |||
| 1745 | netif_tx_disable(dev); | ||
| 1746 | if (eth->phy) | ||
| 1747 | eth->phy->stop(mac); | ||
| 1748 | |||
| 1749 | if (!atomic_dec_and_test(ð->dma_refcnt)) | ||
| 1750 | return 0; | ||
| 1751 | |||
| 1752 | mtk_irq_disable(eth, eth->soc->tx_int | eth->soc->rx_int); | ||
| 1753 | napi_disable(ð->rx_napi); | ||
| 1754 | |||
| 1755 | if (eth->soc->dma_type & MTK_PDMA) | ||
| 1756 | mtk_stop_dma(eth, mtk_reg_table[MTK_REG_PDMA_GLO_CFG]); | ||
| 1757 | |||
| 1758 | if (eth->soc->dma_type & MTK_QDMA) | ||
| 1759 | mtk_stop_dma(eth, MTK_QDMA_GLO_CFG); | ||
| 1760 | |||
| 1761 | mtk_dma_free(eth); | ||
| 1762 | |||
| 1763 | return 0; | ||
| 1764 | } | ||
| 1765 | |||
| 1766 | static int __init mtk_init_hw(struct mtk_eth *eth) | ||
| 1767 | { | ||
| 1768 | int i, err; | ||
| 1769 | |||
| 1770 | eth->soc->reset_fe(eth); | ||
| 1771 | |||
| 1772 | if (eth->soc->switch_init) | ||
| 1773 | if (eth->soc->switch_init(eth)) { | ||
| 1774 | dev_err(eth->dev, "failed to initialize switch core\n"); | ||
| 1775 | return -ENODEV; | ||
| 1776 | } | ||
| 1777 | |||
| 1778 | err = devm_request_irq(eth->dev, eth->irq, mtk_handle_irq, 0, | ||
| 1779 | dev_name(eth->dev), eth); | ||
| 1780 | if (err) | ||
| 1781 | return err; | ||
| 1782 | |||
| 1783 | err = mtk_mdio_init(eth); | ||
| 1784 | if (err) | ||
| 1785 | return err; | ||
| 1786 | |||
| 1787 | /* disable delay and normal interrupt */ | ||
| 1788 | mtk_reg_w32(eth, 0, MTK_REG_DLY_INT_CFG); | ||
| 1789 | if (eth->soc->dma_type & MTK_QDMA) | ||
| 1790 | mtk_w32(eth, 0, MTK_QDMA_DELAY_INT); | ||
| 1791 | mtk_irq_disable(eth, eth->soc->tx_int | eth->soc->rx_int); | ||
| 1792 | |||
| 1793 | /* frame engine will push VLAN tag regarding to VIDX field in Tx desc */ | ||
| 1794 | if (mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE]) | ||
| 1795 | for (i = 0; i < 16; i += 2) | ||
| 1796 | mtk_w32(eth, ((i + 1) << 16) + i, | ||
| 1797 | mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE] + | ||
| 1798 | (i * 2)); | ||
| 1799 | |||
| 1800 | if (eth->soc->fwd_config(eth)) | ||
| 1801 | dev_err(eth->dev, "unable to get clock\n"); | ||
| 1802 | |||
| 1803 | if (mtk_reg_table[MTK_REG_MTK_RST_GL]) { | ||
| 1804 | mtk_reg_w32(eth, 1, MTK_REG_MTK_RST_GL); | ||
| 1805 | mtk_reg_w32(eth, 0, MTK_REG_MTK_RST_GL); | ||
| 1806 | } | ||
| 1807 | |||
| 1808 | return 0; | ||
| 1809 | } | ||
| 1810 | |||
| 1811 | static int __init mtk_init(struct net_device *dev) | ||
| 1812 | { | ||
| 1813 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 1814 | struct mtk_eth *eth = mac->hw; | ||
| 1815 | struct device_node *port; | ||
| 1816 | const char *mac_addr; | ||
| 1817 | int err; | ||
| 1818 | |||
| 1819 | mac_addr = of_get_mac_address(mac->of_node); | ||
| 1820 | if (mac_addr) | ||
| 1821 | ether_addr_copy(dev->dev_addr, mac_addr); | ||
| 1822 | |||
| 1823 | /* If the mac address is invalid, use random mac address */ | ||
| 1824 | if (!is_valid_ether_addr(dev->dev_addr)) { | ||
| 1825 | eth_hw_addr_random(dev); | ||
| 1826 | dev_err(eth->dev, "generated random MAC address %pM\n", | ||
| 1827 | dev->dev_addr); | ||
| 1828 | } | ||
| 1829 | mac->hw->soc->set_mac(mac, dev->dev_addr); | ||
| 1830 | |||
| 1831 | if (eth->soc->port_init) | ||
| 1832 | for_each_child_of_node(mac->of_node, port) | ||
| 1833 | if (of_device_is_compatible(port, | ||
| 1834 | "mediatek,eth-port") && | ||
| 1835 | of_device_is_available(port)) | ||
| 1836 | eth->soc->port_init(eth, mac, port); | ||
| 1837 | |||
| 1838 | if (eth->phy) { | ||
| 1839 | err = eth->phy->connect(mac); | ||
| 1840 | if (err) | ||
| 1841 | return err; | ||
| 1842 | } | ||
| 1843 | |||
| 1844 | return 0; | ||
| 1845 | } | ||
| 1846 | |||
| 1847 | static void mtk_uninit(struct net_device *dev) | ||
| 1848 | { | ||
| 1849 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 1850 | struct mtk_eth *eth = mac->hw; | ||
| 1851 | |||
| 1852 | if (eth->phy) | ||
| 1853 | eth->phy->disconnect(mac); | ||
| 1854 | mtk_mdio_cleanup(eth); | ||
| 1855 | |||
| 1856 | mtk_irq_disable(eth, ~0); | ||
| 1857 | free_irq(dev->irq, dev); | ||
| 1858 | } | ||
| 1859 | |||
| 1860 | static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | ||
| 1861 | { | ||
| 1862 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 1863 | |||
| 1864 | if (!mac->phy_dev) | ||
| 1865 | return -ENODEV; | ||
| 1866 | |||
| 1867 | switch (cmd) { | ||
| 1868 | case SIOCGMIIPHY: | ||
| 1869 | case SIOCGMIIREG: | ||
| 1870 | case SIOCSMIIREG: | ||
| 1871 | return phy_mii_ioctl(mac->phy_dev, ifr, cmd); | ||
| 1872 | default: | ||
| 1873 | break; | ||
| 1874 | } | ||
| 1875 | |||
| 1876 | return -EOPNOTSUPP; | ||
| 1877 | } | ||
| 1878 | |||
| 1879 | static int mtk_change_mtu(struct net_device *dev, int new_mtu) | ||
| 1880 | { | ||
| 1881 | struct mtk_mac *mac = netdev_priv(dev); | ||
| 1882 | struct mtk_eth *eth = mac->hw; | ||
| 1883 | int frag_size, old_mtu; | ||
| 1884 | u32 fwd_cfg; | ||
| 1885 | |||
| 1886 | if (!eth->soc->jumbo_frame) | ||
| 1887 | return eth_change_mtu(dev, new_mtu); | ||
| 1888 | |||
| 1889 | frag_size = mtk_max_frag_size(new_mtu); | ||
| 1890 | if (new_mtu < 68 || frag_size > PAGE_SIZE) | ||
| 1891 | return -EINVAL; | ||
| 1892 | |||
| 1893 | old_mtu = dev->mtu; | ||
| 1894 | dev->mtu = new_mtu; | ||
| 1895 | |||
| 1896 | /* return early if the buffer sizes will not change */ | ||
| 1897 | if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN) | ||
| 1898 | return 0; | ||
| 1899 | if (old_mtu > ETH_DATA_LEN && new_mtu > ETH_DATA_LEN) | ||
| 1900 | return 0; | ||
| 1901 | |||
| 1902 | if (new_mtu <= ETH_DATA_LEN) | ||
| 1903 | eth->rx_ring[0].frag_size = mtk_max_frag_size(ETH_DATA_LEN); | ||
| 1904 | else | ||
| 1905 | eth->rx_ring[0].frag_size = PAGE_SIZE; | ||
| 1906 | eth->rx_ring[0].rx_buf_size = | ||
| 1907 | mtk_max_buf_size(eth->rx_ring[0].frag_size); | ||
| 1908 | |||
| 1909 | if (!netif_running(dev)) | ||
| 1910 | return 0; | ||
| 1911 | |||
| 1912 | mtk_stop(dev); | ||
| 1913 | fwd_cfg = mtk_r32(eth, MTK_GDMA1_FWD_CFG); | ||
| 1914 | if (new_mtu <= ETH_DATA_LEN) { | ||
| 1915 | fwd_cfg &= ~MTK_GDM1_JMB_EN; | ||
| 1916 | } else { | ||
| 1917 | fwd_cfg &= ~(MTK_GDM1_JMB_LEN_MASK << MTK_GDM1_JMB_LEN_SHIFT); | ||
| 1918 | fwd_cfg |= (DIV_ROUND_UP(frag_size, 1024) << | ||
| 1919 | MTK_GDM1_JMB_LEN_SHIFT) | MTK_GDM1_JMB_EN; | ||
| 1920 | } | ||
| 1921 | mtk_w32(eth, fwd_cfg, MTK_GDMA1_FWD_CFG); | ||
| 1922 | |||
| 1923 | return mtk_open(dev); | ||
| 1924 | } | ||
| 1925 | |||
| 1926 | static void mtk_pending_work(struct work_struct *work) | ||
| 1927 | { | ||
| 1928 | struct mtk_mac *mac = container_of(work, struct mtk_mac, pending_work); | ||
| 1929 | struct mtk_eth *eth = mac->hw; | ||
| 1930 | struct net_device *dev = eth->netdev[mac->id]; | ||
| 1931 | int err; | ||
| 1932 | |||
| 1933 | rtnl_lock(); | ||
| 1934 | mtk_stop(dev); | ||
| 1935 | |||
| 1936 | err = mtk_open(dev); | ||
| 1937 | if (err) { | ||
| 1938 | netif_alert(eth, ifup, dev, | ||
| 1939 | "Driver up/down cycle failed, closing device.\n"); | ||
| 1940 | dev_close(dev); | ||
| 1941 | } | ||
| 1942 | rtnl_unlock(); | ||
| 1943 | } | ||
| 1944 | |||
| 1945 | static int mtk_cleanup(struct mtk_eth *eth) | ||
| 1946 | { | ||
| 1947 | int i; | ||
| 1948 | |||
| 1949 | for (i = 0; i < eth->soc->mac_count; i++) { | ||
| 1950 | struct mtk_mac *mac = netdev_priv(eth->netdev[i]); | ||
| 1951 | |||
| 1952 | if (!eth->netdev[i]) | ||
| 1953 | continue; | ||
| 1954 | |||
| 1955 | unregister_netdev(eth->netdev[i]); | ||
| 1956 | free_netdev(eth->netdev[i]); | ||
| 1957 | cancel_work_sync(&mac->pending_work); | ||
| 1958 | } | ||
| 1959 | |||
| 1960 | return 0; | ||
| 1961 | } | ||
| 1962 | |||
| 1963 | static const struct net_device_ops mtk_netdev_ops = { | ||
| 1964 | .ndo_init = mtk_init, | ||
| 1965 | .ndo_uninit = mtk_uninit, | ||
| 1966 | .ndo_open = mtk_open, | ||
| 1967 | .ndo_stop = mtk_stop, | ||
| 1968 | .ndo_start_xmit = mtk_start_xmit, | ||
| 1969 | .ndo_set_mac_address = mtk_set_mac_address, | ||
| 1970 | .ndo_validate_addr = eth_validate_addr, | ||
| 1971 | .ndo_do_ioctl = mtk_do_ioctl, | ||
| 1972 | .ndo_change_mtu = mtk_change_mtu, | ||
| 1973 | .ndo_tx_timeout = mtk_tx_timeout, | ||
| 1974 | .ndo_get_stats64 = mtk_get_stats64, | ||
| 1975 | .ndo_vlan_rx_add_vid = mtk_vlan_rx_add_vid, | ||
| 1976 | .ndo_vlan_rx_kill_vid = mtk_vlan_rx_kill_vid, | ||
| 1977 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
| 1978 | .ndo_poll_controller = mtk_poll_controller, | ||
| 1979 | #endif | ||
| 1980 | }; | ||
| 1981 | |||
| 1982 | static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) | ||
| 1983 | { | ||
| 1984 | struct mtk_mac *mac; | ||
| 1985 | const __be32 *_id = of_get_property(np, "reg", NULL); | ||
| 1986 | int id, err; | ||
| 1987 | |||
| 1988 | if (!_id) { | ||
| 1989 | dev_err(eth->dev, "missing mac id\n"); | ||
| 1990 | return -EINVAL; | ||
| 1991 | } | ||
| 1992 | id = be32_to_cpup(_id); | ||
| 1993 | if (id >= eth->soc->mac_count || eth->netdev[id]) { | ||
| 1994 | dev_err(eth->dev, "%d is not a valid mac id\n", id); | ||
| 1995 | return -EINVAL; | ||
| 1996 | } | ||
| 1997 | |||
| 1998 | eth->netdev[id] = alloc_etherdev(sizeof(*mac)); | ||
| 1999 | if (!eth->netdev[id]) { | ||
| 2000 | dev_err(eth->dev, "alloc_etherdev failed\n"); | ||
| 2001 | return -ENOMEM; | ||
| 2002 | } | ||
| 2003 | mac = netdev_priv(eth->netdev[id]); | ||
| 2004 | eth->mac[id] = mac; | ||
| 2005 | mac->id = id; | ||
| 2006 | mac->hw = eth; | ||
| 2007 | mac->of_node = np; | ||
| 2008 | INIT_WORK(&mac->pending_work, mtk_pending_work); | ||
| 2009 | |||
| 2010 | if (mtk_reg_table[MTK_REG_MTK_COUNTER_BASE]) { | ||
| 2011 | mac->hw_stats = devm_kzalloc(eth->dev, | ||
| 2012 | sizeof(*mac->hw_stats), | ||
| 2013 | GFP_KERNEL); | ||
| 2014 | if (!mac->hw_stats) { | ||
| 2015 | err = -ENOMEM; | ||
| 2016 | goto free_netdev; | ||
| 2017 | } | ||
| 2018 | spin_lock_init(&mac->hw_stats->stats_lock); | ||
| 2019 | mac->hw_stats->reg_offset = id * MTK_STAT_OFFSET; | ||
| 2020 | } | ||
| 2021 | |||
| 2022 | SET_NETDEV_DEV(eth->netdev[id], eth->dev); | ||
| 2023 | eth->netdev[id]->netdev_ops = &mtk_netdev_ops; | ||
| 2024 | eth->netdev[id]->base_addr = (unsigned long)eth->base; | ||
| 2025 | |||
| 2026 | if (eth->soc->init_data) | ||
| 2027 | eth->soc->init_data(eth->soc, eth->netdev[id]); | ||
| 2028 | |||
| 2029 | eth->netdev[id]->vlan_features = eth->soc->hw_features & | ||
| 2030 | ~(NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX); | ||
| 2031 | eth->netdev[id]->features |= eth->soc->hw_features; | ||
| 2032 | |||
| 2033 | if (mtk_reg_table[MTK_REG_MTK_DMA_VID_BASE]) | ||
| 2034 | eth->netdev[id]->features |= NETIF_F_HW_VLAN_CTAG_FILTER; | ||
| 2035 | |||
| 2036 | mtk_set_ethtool_ops(eth->netdev[id]); | ||
| 2037 | |||
| 2038 | err = register_netdev(eth->netdev[id]); | ||
| 2039 | if (err) { | ||
| 2040 | dev_err(eth->dev, "error bringing up device\n"); | ||
| 2041 | err = -ENOMEM; | ||
| 2042 | goto free_netdev; | ||
| 2043 | } | ||
| 2044 | eth->netdev[id]->irq = eth->irq; | ||
| 2045 | netif_info(eth, probe, eth->netdev[id], | ||
| 2046 | "mediatek frame engine at 0x%08lx, irq %d\n", | ||
| 2047 | eth->netdev[id]->base_addr, eth->netdev[id]->irq); | ||
| 2048 | |||
| 2049 | return 0; | ||
| 2050 | |||
| 2051 | free_netdev: | ||
| 2052 | free_netdev(eth->netdev[id]); | ||
| 2053 | return err; | ||
| 2054 | } | ||
| 2055 | |||
| 2056 | static int mtk_probe(struct platform_device *pdev) | ||
| 2057 | { | ||
| 2058 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 2059 | const struct of_device_id *match; | ||
| 2060 | struct device_node *mac_np; | ||
| 2061 | struct mtk_soc_data *soc; | ||
| 2062 | struct mtk_eth *eth; | ||
| 2063 | struct clk *sysclk; | ||
| 2064 | int err; | ||
| 2065 | |||
| 2066 | device_reset(&pdev->dev); | ||
| 2067 | |||
| 2068 | match = of_match_device(of_mtk_match, &pdev->dev); | ||
| 2069 | soc = (struct mtk_soc_data *)match->data; | ||
| 2070 | |||
| 2071 | if (soc->reg_table) | ||
| 2072 | mtk_reg_table = soc->reg_table; | ||
| 2073 | |||
| 2074 | eth = devm_kzalloc(&pdev->dev, sizeof(*eth), GFP_KERNEL); | ||
| 2075 | if (!eth) | ||
| 2076 | return -ENOMEM; | ||
| 2077 | |||
| 2078 | eth->base = devm_ioremap_resource(&pdev->dev, res); | ||
| 2079 | if (IS_ERR(eth->base)) | ||
| 2080 | return PTR_ERR(eth->base); | ||
| 2081 | |||
| 2082 | spin_lock_init(ð->page_lock); | ||
| 2083 | |||
| 2084 | eth->ethsys = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, | ||
| 2085 | "mediatek,ethsys"); | ||
| 2086 | if (IS_ERR(eth->ethsys)) | ||
| 2087 | return PTR_ERR(eth->ethsys); | ||
| 2088 | |||
| 2089 | eth->irq = platform_get_irq(pdev, 0); | ||
| 2090 | if (eth->irq < 0) { | ||
| 2091 | dev_err(&pdev->dev, "no IRQ resource found\n"); | ||
| 2092 | return -ENXIO; | ||
| 2093 | } | ||
| 2094 | |||
| 2095 | sysclk = devm_clk_get(&pdev->dev, NULL); | ||
| 2096 | if (IS_ERR(sysclk)) { | ||
| 2097 | dev_err(&pdev->dev, | ||
| 2098 | "the clock is not defined in the devicetree\n"); | ||
| 2099 | return -ENXIO; | ||
| 2100 | } | ||
| 2101 | eth->sysclk = clk_get_rate(sysclk); | ||
| 2102 | |||
| 2103 | eth->switch_np = of_parse_phandle(pdev->dev.of_node, | ||
| 2104 | "mediatek,switch", 0); | ||
| 2105 | if (soc->has_switch && !eth->switch_np) { | ||
| 2106 | dev_err(&pdev->dev, "failed to read switch phandle\n"); | ||
| 2107 | return -ENODEV; | ||
| 2108 | } | ||
| 2109 | |||
| 2110 | eth->dev = &pdev->dev; | ||
| 2111 | eth->soc = soc; | ||
| 2112 | eth->msg_enable = netif_msg_init(mtk_msg_level, MTK_DEFAULT_MSG_ENABLE); | ||
| 2113 | |||
| 2114 | err = mtk_init_hw(eth); | ||
| 2115 | if (err) | ||
| 2116 | return err; | ||
| 2117 | |||
| 2118 | if (eth->soc->mac_count > 1) { | ||
| 2119 | for_each_child_of_node(pdev->dev.of_node, mac_np) { | ||
| 2120 | if (!of_device_is_compatible(mac_np, | ||
| 2121 | "mediatek,eth-mac")) | ||
| 2122 | continue; | ||
| 2123 | |||
| 2124 | if (!of_device_is_available(mac_np)) | ||
| 2125 | continue; | ||
| 2126 | |||
| 2127 | err = mtk_add_mac(eth, mac_np); | ||
| 2128 | if (err) | ||
| 2129 | goto err_free_dev; | ||
| 2130 | } | ||
| 2131 | |||
| 2132 | init_dummy_netdev(ð->dummy_dev); | ||
| 2133 | netif_napi_add(ð->dummy_dev, ð->rx_napi, mtk_poll, | ||
| 2134 | soc->napi_weight); | ||
| 2135 | } else { | ||
| 2136 | err = mtk_add_mac(eth, pdev->dev.of_node); | ||
| 2137 | if (err) | ||
| 2138 | goto err_free_dev; | ||
| 2139 | netif_napi_add(eth->netdev[0], ð->rx_napi, mtk_poll, | ||
| 2140 | soc->napi_weight); | ||
| 2141 | } | ||
| 2142 | |||
| 2143 | platform_set_drvdata(pdev, eth); | ||
| 2144 | |||
| 2145 | return 0; | ||
| 2146 | |||
| 2147 | err_free_dev: | ||
| 2148 | mtk_cleanup(eth); | ||
| 2149 | return err; | ||
| 2150 | } | ||
| 2151 | |||
| 2152 | static int mtk_remove(struct platform_device *pdev) | ||
| 2153 | { | ||
| 2154 | struct mtk_eth *eth = platform_get_drvdata(pdev); | ||
| 2155 | |||
| 2156 | netif_napi_del(ð->rx_napi); | ||
| 2157 | mtk_cleanup(eth); | ||
| 2158 | platform_set_drvdata(pdev, NULL); | ||
| 2159 | |||
| 2160 | return 0; | ||
| 2161 | } | ||
| 2162 | |||
| 2163 | static struct platform_driver mtk_driver = { | ||
| 2164 | .probe = mtk_probe, | ||
| 2165 | .remove = mtk_remove, | ||
| 2166 | .driver = { | ||
| 2167 | .name = "mtk_soc_eth", | ||
| 2168 | .of_match_table = of_mtk_match, | ||
| 2169 | }, | ||
| 2170 | }; | ||
| 2171 | |||
| 2172 | module_platform_driver(mtk_driver); | ||
| 2173 | |||
| 2174 | MODULE_LICENSE("GPL"); | ||
| 2175 | MODULE_AUTHOR("John Crispin <blogic@openwrt.org>"); | ||
| 2176 | MODULE_DESCRIPTION("Ethernet driver for MediaTek SoC"); | ||
diff --git a/drivers/staging/mt7621-eth/mtk_eth_soc.h b/drivers/staging/mt7621-eth/mtk_eth_soc.h deleted file mode 100644 index e6ed80433f49..000000000000 --- a/drivers/staging/mt7621-eth/mtk_eth_soc.h +++ /dev/null | |||
| @@ -1,716 +0,0 @@ | |||
| 1 | /* This program is free software; you can redistribute it and/or modify | ||
| 2 | * it under the terms of the GNU General Public License as published by | ||
| 3 | * the Free Software Foundation; version 2 of the License | ||
| 4 | * | ||
| 5 | * This program is distributed in the hope that it will be useful, | ||
| 6 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 7 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 8 | * GNU General Public License for more details. | ||
| 9 | * | ||
| 10 | * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> | ||
| 11 | * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> | ||
| 12 | * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef MTK_ETH_H | ||
| 16 | #define MTK_ETH_H | ||
| 17 | |||
| 18 | #include <linux/mii.h> | ||
| 19 | #include <linux/interrupt.h> | ||
| 20 | #include <linux/netdevice.h> | ||
| 21 | #include <linux/dma-mapping.h> | ||
| 22 | #include <linux/phy.h> | ||
| 23 | #include <linux/ethtool.h> | ||
| 24 | #include <linux/version.h> | ||
| 25 | #include <linux/atomic.h> | ||
| 26 | |||
| 27 | /* these registers have different offsets depending on the SoC. we use a lookup | ||
| 28 | * table for these | ||
| 29 | */ | ||
| 30 | enum mtk_reg { | ||
| 31 | MTK_REG_PDMA_GLO_CFG = 0, | ||
| 32 | MTK_REG_PDMA_RST_CFG, | ||
| 33 | MTK_REG_DLY_INT_CFG, | ||
| 34 | MTK_REG_TX_BASE_PTR0, | ||
| 35 | MTK_REG_TX_MAX_CNT0, | ||
| 36 | MTK_REG_TX_CTX_IDX0, | ||
| 37 | MTK_REG_TX_DTX_IDX0, | ||
| 38 | MTK_REG_RX_BASE_PTR0, | ||
| 39 | MTK_REG_RX_MAX_CNT0, | ||
| 40 | MTK_REG_RX_CALC_IDX0, | ||
| 41 | MTK_REG_RX_DRX_IDX0, | ||
| 42 | MTK_REG_MTK_INT_ENABLE, | ||
| 43 | MTK_REG_MTK_INT_STATUS, | ||
| 44 | MTK_REG_MTK_DMA_VID_BASE, | ||
| 45 | MTK_REG_MTK_COUNTER_BASE, | ||
| 46 | MTK_REG_MTK_RST_GL, | ||
| 47 | MTK_REG_MTK_INT_STATUS2, | ||
| 48 | MTK_REG_COUNT | ||
| 49 | }; | ||
| 50 | |||
| 51 | /* delayed interrupt bits */ | ||
| 52 | #define MTK_DELAY_EN_INT 0x80 | ||
| 53 | #define MTK_DELAY_MAX_INT 0x04 | ||
| 54 | #define MTK_DELAY_MAX_TOUT 0x04 | ||
| 55 | #define MTK_DELAY_TIME 20 | ||
| 56 | #define MTK_DELAY_CHAN (((MTK_DELAY_EN_INT | MTK_DELAY_MAX_INT) << 8) \ | ||
| 57 | | MTK_DELAY_MAX_TOUT) | ||
| 58 | #define MTK_DELAY_INIT ((MTK_DELAY_CHAN << 16) | MTK_DELAY_CHAN) | ||
| 59 | #define MTK_PSE_FQFC_CFG_INIT 0x80504000 | ||
| 60 | #define MTK_PSE_FQFC_CFG_256Q 0xff908000 | ||
| 61 | |||
| 62 | /* interrupt bits */ | ||
| 63 | #define MTK_CNT_PPE_AF BIT(31) | ||
| 64 | #define MTK_CNT_GDM_AF BIT(29) | ||
| 65 | #define MTK_PSE_P2_FC BIT(26) | ||
| 66 | #define MTK_PSE_BUF_DROP BIT(24) | ||
| 67 | #define MTK_GDM_OTHER_DROP BIT(23) | ||
| 68 | #define MTK_PSE_P1_FC BIT(22) | ||
| 69 | #define MTK_PSE_P0_FC BIT(21) | ||
| 70 | #define MTK_PSE_FQ_EMPTY BIT(20) | ||
| 71 | #define MTK_GE1_STA_CHG BIT(18) | ||
| 72 | #define MTK_TX_COHERENT BIT(17) | ||
| 73 | #define MTK_RX_COHERENT BIT(16) | ||
| 74 | #define MTK_TX_DONE_INT3 BIT(11) | ||
| 75 | #define MTK_TX_DONE_INT2 BIT(10) | ||
| 76 | #define MTK_TX_DONE_INT1 BIT(9) | ||
| 77 | #define MTK_TX_DONE_INT0 BIT(8) | ||
| 78 | #define MTK_RX_DONE_INT0 BIT(2) | ||
| 79 | #define MTK_TX_DLY_INT BIT(1) | ||
| 80 | #define MTK_RX_DLY_INT BIT(0) | ||
| 81 | |||
| 82 | #define MTK_RX_DONE_INT MTK_RX_DONE_INT0 | ||
| 83 | #define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \ | ||
| 84 | MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3) | ||
| 85 | |||
| 86 | #define RT5350_RX_DLY_INT BIT(30) | ||
| 87 | #define RT5350_TX_DLY_INT BIT(28) | ||
| 88 | #define RT5350_RX_DONE_INT1 BIT(17) | ||
| 89 | #define RT5350_RX_DONE_INT0 BIT(16) | ||
| 90 | #define RT5350_TX_DONE_INT3 BIT(3) | ||
| 91 | #define RT5350_TX_DONE_INT2 BIT(2) | ||
| 92 | #define RT5350_TX_DONE_INT1 BIT(1) | ||
| 93 | #define RT5350_TX_DONE_INT0 BIT(0) | ||
| 94 | |||
| 95 | #define RT5350_RX_DONE_INT (RT5350_RX_DONE_INT0 | RT5350_RX_DONE_INT1) | ||
| 96 | #define RT5350_TX_DONE_INT (RT5350_TX_DONE_INT0 | RT5350_TX_DONE_INT1 | \ | ||
| 97 | RT5350_TX_DONE_INT2 | RT5350_TX_DONE_INT3) | ||
| 98 | |||
| 99 | /* registers */ | ||
| 100 | #define MTK_GDMA_OFFSET 0x0020 | ||
| 101 | #define MTK_PSE_OFFSET 0x0040 | ||
| 102 | #define MTK_GDMA2_OFFSET 0x0060 | ||
| 103 | #define MTK_CDMA_OFFSET 0x0080 | ||
| 104 | #define MTK_DMA_VID0 0x00a8 | ||
| 105 | #define MTK_PDMA_OFFSET 0x0100 | ||
| 106 | #define MTK_PPE_OFFSET 0x0200 | ||
| 107 | #define MTK_CMTABLE_OFFSET 0x0400 | ||
| 108 | #define MTK_POLICYTABLE_OFFSET 0x1000 | ||
| 109 | |||
| 110 | #define MT7621_GDMA_OFFSET 0x0500 | ||
| 111 | #define MT7620_GDMA_OFFSET 0x0600 | ||
| 112 | |||
| 113 | #define RT5350_PDMA_OFFSET 0x0800 | ||
| 114 | #define RT5350_SDM_OFFSET 0x0c00 | ||
| 115 | |||
| 116 | #define MTK_MDIO_ACCESS 0x00 | ||
| 117 | #define MTK_MDIO_CFG 0x04 | ||
| 118 | #define MTK_GLO_CFG 0x08 | ||
| 119 | #define MTK_RST_GL 0x0C | ||
| 120 | #define MTK_INT_STATUS 0x10 | ||
| 121 | #define MTK_INT_ENABLE 0x14 | ||
| 122 | #define MTK_MDIO_CFG2 0x18 | ||
| 123 | #define MTK_FOC_TS_T 0x1C | ||
| 124 | |||
| 125 | #define MTK_GDMA1_FWD_CFG (MTK_GDMA_OFFSET + 0x00) | ||
| 126 | #define MTK_GDMA1_SCH_CFG (MTK_GDMA_OFFSET + 0x04) | ||
| 127 | #define MTK_GDMA1_SHPR_CFG (MTK_GDMA_OFFSET + 0x08) | ||
| 128 | #define MTK_GDMA1_MAC_ADRL (MTK_GDMA_OFFSET + 0x0C) | ||
| 129 | #define MTK_GDMA1_MAC_ADRH (MTK_GDMA_OFFSET + 0x10) | ||
| 130 | |||
| 131 | #define MTK_GDMA2_FWD_CFG (MTK_GDMA2_OFFSET + 0x00) | ||
| 132 | #define MTK_GDMA2_SCH_CFG (MTK_GDMA2_OFFSET + 0x04) | ||
| 133 | #define MTK_GDMA2_SHPR_CFG (MTK_GDMA2_OFFSET + 0x08) | ||
| 134 | #define MTK_GDMA2_MAC_ADRL (MTK_GDMA2_OFFSET + 0x0C) | ||
| 135 | #define MTK_GDMA2_MAC_ADRH (MTK_GDMA2_OFFSET + 0x10) | ||
| 136 | |||
| 137 | #define MTK_PSE_FQ_CFG (MTK_PSE_OFFSET + 0x00) | ||
| 138 | #define MTK_CDMA_FC_CFG (MTK_PSE_OFFSET + 0x04) | ||
| 139 | #define MTK_GDMA1_FC_CFG (MTK_PSE_OFFSET + 0x08) | ||
| 140 | #define MTK_GDMA2_FC_CFG (MTK_PSE_OFFSET + 0x0C) | ||
| 141 | |||
| 142 | #define MTK_CDMA_CSG_CFG (MTK_CDMA_OFFSET + 0x00) | ||
| 143 | #define MTK_CDMA_SCH_CFG (MTK_CDMA_OFFSET + 0x04) | ||
| 144 | |||
| 145 | #define MT7621_GDMA_FWD_CFG(x) (MT7621_GDMA_OFFSET + (x * 0x1000)) | ||
| 146 | |||
| 147 | /* FIXME this might be different for different SOCs */ | ||
| 148 | #define MT7620_GDMA1_FWD_CFG (MT7621_GDMA_OFFSET + 0x00) | ||
| 149 | |||
| 150 | #define RT5350_TX_BASE_PTR0 (RT5350_PDMA_OFFSET + 0x00) | ||
| 151 | #define RT5350_TX_MAX_CNT0 (RT5350_PDMA_OFFSET + 0x04) | ||
| 152 | #define RT5350_TX_CTX_IDX0 (RT5350_PDMA_OFFSET + 0x08) | ||
| 153 | #define RT5350_TX_DTX_IDX0 (RT5350_PDMA_OFFSET + 0x0C) | ||
| 154 | #define RT5350_TX_BASE_PTR1 (RT5350_PDMA_OFFSET + 0x10) | ||
| 155 | #define RT5350_TX_MAX_CNT1 (RT5350_PDMA_OFFSET + 0x14) | ||
| 156 | #define RT5350_TX_CTX_IDX1 (RT5350_PDMA_OFFSET + 0x18) | ||
| 157 | #define RT5350_TX_DTX_IDX1 (RT5350_PDMA_OFFSET + 0x1C) | ||
| 158 | #define RT5350_TX_BASE_PTR2 (RT5350_PDMA_OFFSET + 0x20) | ||
| 159 | #define RT5350_TX_MAX_CNT2 (RT5350_PDMA_OFFSET + 0x24) | ||
| 160 | #define RT5350_TX_CTX_IDX2 (RT5350_PDMA_OFFSET + 0x28) | ||
| 161 | #define RT5350_TX_DTX_IDX2 (RT5350_PDMA_OFFSET + 0x2C) | ||
| 162 | #define RT5350_TX_BASE_PTR3 (RT5350_PDMA_OFFSET + 0x30) | ||
| 163 | #define RT5350_TX_MAX_CNT3 (RT5350_PDMA_OFFSET + 0x34) | ||
| 164 | #define RT5350_TX_CTX_IDX3 (RT5350_PDMA_OFFSET + 0x38) | ||
| 165 | #define RT5350_TX_DTX_IDX3 (RT5350_PDMA_OFFSET + 0x3C) | ||
| 166 | #define RT5350_RX_BASE_PTR0 (RT5350_PDMA_OFFSET + 0x100) | ||
| 167 | #define RT5350_RX_MAX_CNT0 (RT5350_PDMA_OFFSET + 0x104) | ||
| 168 | #define RT5350_RX_CALC_IDX0 (RT5350_PDMA_OFFSET + 0x108) | ||
| 169 | #define RT5350_RX_DRX_IDX0 (RT5350_PDMA_OFFSET + 0x10C) | ||
| 170 | #define RT5350_RX_BASE_PTR1 (RT5350_PDMA_OFFSET + 0x110) | ||
| 171 | #define RT5350_RX_MAX_CNT1 (RT5350_PDMA_OFFSET + 0x114) | ||
| 172 | #define RT5350_RX_CALC_IDX1 (RT5350_PDMA_OFFSET + 0x118) | ||
| 173 | #define RT5350_RX_DRX_IDX1 (RT5350_PDMA_OFFSET + 0x11C) | ||
| 174 | #define RT5350_PDMA_GLO_CFG (RT5350_PDMA_OFFSET + 0x204) | ||
| 175 | #define RT5350_PDMA_RST_CFG (RT5350_PDMA_OFFSET + 0x208) | ||
| 176 | #define RT5350_DLY_INT_CFG (RT5350_PDMA_OFFSET + 0x20c) | ||
| 177 | #define RT5350_MTK_INT_STATUS (RT5350_PDMA_OFFSET + 0x220) | ||
| 178 | #define RT5350_MTK_INT_ENABLE (RT5350_PDMA_OFFSET + 0x228) | ||
| 179 | #define RT5350_PDMA_SCH_CFG (RT5350_PDMA_OFFSET + 0x280) | ||
| 180 | |||
| 181 | #define MTK_PDMA_GLO_CFG (MTK_PDMA_OFFSET + 0x00) | ||
| 182 | #define MTK_PDMA_RST_CFG (MTK_PDMA_OFFSET + 0x04) | ||
| 183 | #define MTK_PDMA_SCH_CFG (MTK_PDMA_OFFSET + 0x08) | ||
| 184 | #define MTK_DLY_INT_CFG (MTK_PDMA_OFFSET + 0x0C) | ||
| 185 | #define MTK_TX_BASE_PTR0 (MTK_PDMA_OFFSET + 0x10) | ||
| 186 | #define MTK_TX_MAX_CNT0 (MTK_PDMA_OFFSET + 0x14) | ||
| 187 | #define MTK_TX_CTX_IDX0 (MTK_PDMA_OFFSET + 0x18) | ||
| 188 | #define MTK_TX_DTX_IDX0 (MTK_PDMA_OFFSET + 0x1C) | ||
| 189 | #define MTK_TX_BASE_PTR1 (MTK_PDMA_OFFSET + 0x20) | ||
| 190 | #define MTK_TX_MAX_CNT1 (MTK_PDMA_OFFSET + 0x24) | ||
| 191 | #define MTK_TX_CTX_IDX1 (MTK_PDMA_OFFSET + 0x28) | ||
| 192 | #define MTK_TX_DTX_IDX1 (MTK_PDMA_OFFSET + 0x2C) | ||
| 193 | #define MTK_RX_BASE_PTR0 (MTK_PDMA_OFFSET + 0x30) | ||
| 194 | #define MTK_RX_MAX_CNT0 (MTK_PDMA_OFFSET + 0x34) | ||
| 195 | #define MTK_RX_CALC_IDX0 (MTK_PDMA_OFFSET + 0x38) | ||
| 196 | #define MTK_RX_DRX_IDX0 (MTK_PDMA_OFFSET + 0x3C) | ||
| 197 | #define MTK_TX_BASE_PTR2 (MTK_PDMA_OFFSET + 0x40) | ||
| 198 | #define MTK_TX_MAX_CNT2 (MTK_PDMA_OFFSET + 0x44) | ||
| 199 | #define MTK_TX_CTX_IDX2 (MTK_PDMA_OFFSET + 0x48) | ||
| 200 | #define MTK_TX_DTX_IDX2 (MTK_PDMA_OFFSET + 0x4C) | ||
| 201 | #define MTK_TX_BASE_PTR3 (MTK_PDMA_OFFSET + 0x50) | ||
| 202 | #define MTK_TX_MAX_CNT3 (MTK_PDMA_OFFSET + 0x54) | ||
| 203 | #define MTK_TX_CTX_IDX3 (MTK_PDMA_OFFSET + 0x58) | ||
| 204 | #define MTK_TX_DTX_IDX3 (MTK_PDMA_OFFSET + 0x5C) | ||
| 205 | #define MTK_RX_BASE_PTR1 (MTK_PDMA_OFFSET + 0x60) | ||
| 206 | #define MTK_RX_MAX_CNT1 (MTK_PDMA_OFFSET + 0x64) | ||
| 207 | #define MTK_RX_CALC_IDX1 (MTK_PDMA_OFFSET + 0x68) | ||
| 208 | #define MTK_RX_DRX_IDX1 (MTK_PDMA_OFFSET + 0x6C) | ||
| 209 | |||
| 210 | /* Switch DMA configuration */ | ||
| 211 | #define RT5350_SDM_CFG (RT5350_SDM_OFFSET + 0x00) | ||
| 212 | #define RT5350_SDM_RRING (RT5350_SDM_OFFSET + 0x04) | ||
| 213 | #define RT5350_SDM_TRING (RT5350_SDM_OFFSET + 0x08) | ||
| 214 | #define RT5350_SDM_MAC_ADRL (RT5350_SDM_OFFSET + 0x0C) | ||
| 215 | #define RT5350_SDM_MAC_ADRH (RT5350_SDM_OFFSET + 0x10) | ||
| 216 | #define RT5350_SDM_TPCNT (RT5350_SDM_OFFSET + 0x100) | ||
| 217 | #define RT5350_SDM_TBCNT (RT5350_SDM_OFFSET + 0x104) | ||
| 218 | #define RT5350_SDM_RPCNT (RT5350_SDM_OFFSET + 0x108) | ||
| 219 | #define RT5350_SDM_RBCNT (RT5350_SDM_OFFSET + 0x10C) | ||
| 220 | #define RT5350_SDM_CS_ERR (RT5350_SDM_OFFSET + 0x110) | ||
| 221 | |||
| 222 | #define RT5350_SDM_ICS_EN BIT(16) | ||
| 223 | #define RT5350_SDM_TCS_EN BIT(17) | ||
| 224 | #define RT5350_SDM_UCS_EN BIT(18) | ||
| 225 | |||
| 226 | /* QDMA registers */ | ||
| 227 | #define MTK_QTX_CFG(x) (0x1800 + (x * 0x10)) | ||
| 228 | #define MTK_QTX_SCH(x) (0x1804 + (x * 0x10)) | ||
| 229 | #define MTK_QRX_BASE_PTR0 0x1900 | ||
| 230 | #define MTK_QRX_MAX_CNT0 0x1904 | ||
| 231 | #define MTK_QRX_CRX_IDX0 0x1908 | ||
| 232 | #define MTK_QRX_DRX_IDX0 0x190C | ||
| 233 | #define MTK_QDMA_GLO_CFG 0x1A04 | ||
| 234 | #define MTK_QDMA_RST_IDX 0x1A08 | ||
| 235 | #define MTK_QDMA_DELAY_INT 0x1A0C | ||
| 236 | #define MTK_QDMA_FC_THRES 0x1A10 | ||
| 237 | #define MTK_QMTK_INT_STATUS 0x1A18 | ||
| 238 | #define MTK_QMTK_INT_ENABLE 0x1A1C | ||
| 239 | #define MTK_QDMA_HRED2 0x1A44 | ||
| 240 | |||
| 241 | #define MTK_QTX_CTX_PTR 0x1B00 | ||
| 242 | #define MTK_QTX_DTX_PTR 0x1B04 | ||
| 243 | |||
| 244 | #define MTK_QTX_CRX_PTR 0x1B10 | ||
| 245 | #define MTK_QTX_DRX_PTR 0x1B14 | ||
| 246 | |||
| 247 | #define MTK_QDMA_FQ_HEAD 0x1B20 | ||
| 248 | #define MTK_QDMA_FQ_TAIL 0x1B24 | ||
| 249 | #define MTK_QDMA_FQ_CNT 0x1B28 | ||
| 250 | #define MTK_QDMA_FQ_BLEN 0x1B2C | ||
| 251 | |||
| 252 | #define QDMA_PAGE_SIZE 2048 | ||
| 253 | #define QDMA_TX_OWNER_CPU BIT(31) | ||
| 254 | #define QDMA_TX_SWC BIT(14) | ||
| 255 | #define TX_QDMA_SDL(_x) (((_x) & 0x3fff) << 16) | ||
| 256 | #define QDMA_RES_THRES 4 | ||
| 257 | |||
| 258 | /* MDIO_CFG register bits */ | ||
| 259 | #define MTK_MDIO_CFG_AUTO_POLL_EN BIT(29) | ||
| 260 | #define MTK_MDIO_CFG_GP1_BP_EN BIT(16) | ||
| 261 | #define MTK_MDIO_CFG_GP1_FRC_EN BIT(15) | ||
| 262 | #define MTK_MDIO_CFG_GP1_SPEED_10 (0 << 13) | ||
| 263 | #define MTK_MDIO_CFG_GP1_SPEED_100 (1 << 13) | ||
| 264 | #define MTK_MDIO_CFG_GP1_SPEED_1000 (2 << 13) | ||
| 265 | #define MTK_MDIO_CFG_GP1_DUPLEX BIT(12) | ||
| 266 | #define MTK_MDIO_CFG_GP1_FC_TX BIT(11) | ||
| 267 | #define MTK_MDIO_CFG_GP1_FC_RX BIT(10) | ||
| 268 | #define MTK_MDIO_CFG_GP1_LNK_DWN BIT(9) | ||
| 269 | #define MTK_MDIO_CFG_GP1_AN_FAIL BIT(8) | ||
| 270 | #define MTK_MDIO_CFG_MDC_CLK_DIV_1 (0 << 6) | ||
| 271 | #define MTK_MDIO_CFG_MDC_CLK_DIV_2 (1 << 6) | ||
| 272 | #define MTK_MDIO_CFG_MDC_CLK_DIV_4 (2 << 6) | ||
| 273 | #define MTK_MDIO_CFG_MDC_CLK_DIV_8 (3 << 6) | ||
| 274 | #define MTK_MDIO_CFG_TURBO_MII_FREQ BIT(5) | ||
| 275 | #define MTK_MDIO_CFG_TURBO_MII_MODE BIT(4) | ||
| 276 | #define MTK_MDIO_CFG_RX_CLK_SKEW_0 (0 << 2) | ||
| 277 | #define MTK_MDIO_CFG_RX_CLK_SKEW_200 (1 << 2) | ||
| 278 | #define MTK_MDIO_CFG_RX_CLK_SKEW_400 (2 << 2) | ||
| 279 | #define MTK_MDIO_CFG_RX_CLK_SKEW_INV (3 << 2) | ||
| 280 | #define MTK_MDIO_CFG_TX_CLK_SKEW_0 0 | ||
| 281 | #define MTK_MDIO_CFG_TX_CLK_SKEW_200 1 | ||
| 282 | #define MTK_MDIO_CFG_TX_CLK_SKEW_400 2 | ||
| 283 | #define MTK_MDIO_CFG_TX_CLK_SKEW_INV 3 | ||
| 284 | |||
| 285 | /* uni-cast port */ | ||
| 286 | #define MTK_GDM1_JMB_LEN_MASK 0xf | ||
| 287 | #define MTK_GDM1_JMB_LEN_SHIFT 28 | ||
| 288 | #define MTK_GDM1_ICS_EN BIT(22) | ||
| 289 | #define MTK_GDM1_TCS_EN BIT(21) | ||
| 290 | #define MTK_GDM1_UCS_EN BIT(20) | ||
| 291 | #define MTK_GDM1_JMB_EN BIT(19) | ||
| 292 | #define MTK_GDM1_STRPCRC BIT(16) | ||
| 293 | #define MTK_GDM1_UFRC_P_CPU (0 << 12) | ||
| 294 | #define MTK_GDM1_UFRC_P_GDMA1 (1 << 12) | ||
| 295 | #define MTK_GDM1_UFRC_P_PPE (6 << 12) | ||
| 296 | |||
| 297 | /* checksums */ | ||
| 298 | #define MTK_ICS_GEN_EN BIT(2) | ||
| 299 | #define MTK_UCS_GEN_EN BIT(1) | ||
| 300 | #define MTK_TCS_GEN_EN BIT(0) | ||
| 301 | |||
| 302 | /* dma mode */ | ||
| 303 | #define MTK_PDMA BIT(0) | ||
| 304 | #define MTK_QDMA BIT(1) | ||
| 305 | #define MTK_PDMA_RX_QDMA_TX (MTK_PDMA | MTK_QDMA) | ||
| 306 | |||
| 307 | /* dma ring */ | ||
| 308 | #define MTK_PST_DRX_IDX0 BIT(16) | ||
| 309 | #define MTK_PST_DTX_IDX3 BIT(3) | ||
| 310 | #define MTK_PST_DTX_IDX2 BIT(2) | ||
| 311 | #define MTK_PST_DTX_IDX1 BIT(1) | ||
| 312 | #define MTK_PST_DTX_IDX0 BIT(0) | ||
| 313 | |||
| 314 | #define MTK_RX_2B_OFFSET BIT(31) | ||
| 315 | #define MTK_TX_WB_DDONE BIT(6) | ||
| 316 | #define MTK_RX_DMA_BUSY BIT(3) | ||
| 317 | #define MTK_TX_DMA_BUSY BIT(1) | ||
| 318 | #define MTK_RX_DMA_EN BIT(2) | ||
| 319 | #define MTK_TX_DMA_EN BIT(0) | ||
| 320 | |||
| 321 | #define MTK_PDMA_SIZE_4DWORDS (0 << 4) | ||
| 322 | #define MTK_PDMA_SIZE_8DWORDS (1 << 4) | ||
| 323 | #define MTK_PDMA_SIZE_16DWORDS (2 << 4) | ||
| 324 | |||
| 325 | #define MTK_US_CYC_CNT_MASK 0xff | ||
| 326 | #define MTK_US_CYC_CNT_SHIFT 0x8 | ||
| 327 | #define MTK_US_CYC_CNT_DIVISOR 1000000 | ||
| 328 | |||
| 329 | /* PDMA descriptor rxd2 */ | ||
| 330 | #define RX_DMA_DONE BIT(31) | ||
| 331 | #define RX_DMA_LSO BIT(30) | ||
| 332 | #define RX_DMA_PLEN0(_x) (((_x) & 0x3fff) << 16) | ||
| 333 | #define RX_DMA_GET_PLEN0(_x) (((_x) >> 16) & 0x3fff) | ||
| 334 | #define RX_DMA_TAG BIT(15) | ||
| 335 | |||
| 336 | /* PDMA descriptor rxd3 */ | ||
| 337 | #define RX_DMA_TPID(_x) (((_x) >> 16) & 0xffff) | ||
| 338 | #define RX_DMA_VID(_x) ((_x) & 0xfff) | ||
| 339 | |||
| 340 | /* PDMA descriptor rxd4 */ | ||
| 341 | #define RX_DMA_L4VALID BIT(30) | ||
| 342 | #define RX_DMA_FPORT_SHIFT 19 | ||
| 343 | #define RX_DMA_FPORT_MASK 0x7 | ||
| 344 | |||
| 345 | struct mtk_rx_dma { | ||
| 346 | unsigned int rxd1; | ||
| 347 | unsigned int rxd2; | ||
| 348 | unsigned int rxd3; | ||
| 349 | unsigned int rxd4; | ||
| 350 | } __packed __aligned(4); | ||
| 351 | |||
| 352 | /* PDMA tx descriptor bits */ | ||
| 353 | #define TX_DMA_BUF_LEN 0x3fff | ||
| 354 | #define TX_DMA_PLEN0_MASK (TX_DMA_BUF_LEN << 16) | ||
| 355 | #define TX_DMA_PLEN0(_x) (((_x) & TX_DMA_BUF_LEN) << 16) | ||
| 356 | #define TX_DMA_PLEN1(_x) ((_x) & TX_DMA_BUF_LEN) | ||
| 357 | #define TX_DMA_GET_PLEN0(_x) (((_x) >> 16) & TX_DMA_BUF_LEN) | ||
| 358 | #define TX_DMA_GET_PLEN1(_x) ((_x) & TX_DMA_BUF_LEN) | ||
| 359 | #define TX_DMA_LS1 BIT(14) | ||
| 360 | #define TX_DMA_LS0 BIT(30) | ||
| 361 | #define TX_DMA_DONE BIT(31) | ||
| 362 | #define TX_DMA_FPORT_SHIFT 25 | ||
| 363 | #define TX_DMA_FPORT_MASK 0x7 | ||
| 364 | #define TX_DMA_INS_VLAN_MT7621 BIT(16) | ||
| 365 | #define TX_DMA_INS_VLAN BIT(7) | ||
| 366 | #define TX_DMA_INS_PPPOE BIT(12) | ||
| 367 | #define TX_DMA_TAG BIT(15) | ||
| 368 | #define TX_DMA_TAG_MASK BIT(15) | ||
| 369 | #define TX_DMA_QN(_x) ((_x) << 16) | ||
| 370 | #define TX_DMA_PN(_x) ((_x) << 24) | ||
| 371 | #define TX_DMA_QN_MASK TX_DMA_QN(0x7) | ||
| 372 | #define TX_DMA_PN_MASK TX_DMA_PN(0x7) | ||
| 373 | #define TX_DMA_UDF BIT(20) | ||
| 374 | #define TX_DMA_CHKSUM (0x7 << 29) | ||
| 375 | #define TX_DMA_TSO BIT(28) | ||
| 376 | #define TX_DMA_DESP4_DEF (TX_DMA_QN(3) | TX_DMA_PN(1)) | ||
| 377 | |||
| 378 | /* frame engine counters */ | ||
| 379 | #define MTK_PPE_AC_BCNT0 (MTK_CMTABLE_OFFSET + 0x00) | ||
| 380 | #define MTK_GDMA1_TX_GBCNT (MTK_CMTABLE_OFFSET + 0x300) | ||
| 381 | #define MTK_GDMA2_TX_GBCNT (MTK_GDMA1_TX_GBCNT + 0x40) | ||
| 382 | |||
| 383 | /* phy device flags */ | ||
| 384 | #define MTK_PHY_FLAG_PORT BIT(0) | ||
| 385 | #define MTK_PHY_FLAG_ATTACH BIT(1) | ||
| 386 | |||
| 387 | struct mtk_tx_dma { | ||
| 388 | unsigned int txd1; | ||
| 389 | unsigned int txd2; | ||
| 390 | unsigned int txd3; | ||
| 391 | unsigned int txd4; | ||
| 392 | } __packed __aligned(4); | ||
| 393 | |||
| 394 | struct mtk_eth; | ||
| 395 | struct mtk_mac; | ||
| 396 | |||
| 397 | /* manage the attached phys */ | ||
| 398 | struct mtk_phy { | ||
| 399 | spinlock_t lock; | ||
| 400 | |||
| 401 | struct phy_device *phy[8]; | ||
| 402 | struct device_node *phy_node[8]; | ||
| 403 | const __be32 *phy_fixed[8]; | ||
| 404 | int duplex[8]; | ||
| 405 | int speed[8]; | ||
| 406 | int tx_fc[8]; | ||
| 407 | int rx_fc[8]; | ||
| 408 | int (*connect)(struct mtk_mac *mac); | ||
| 409 | void (*disconnect)(struct mtk_mac *mac); | ||
| 410 | void (*start)(struct mtk_mac *mac); | ||
| 411 | void (*stop)(struct mtk_mac *mac); | ||
| 412 | }; | ||
| 413 | |||
| 414 | /* struct mtk_soc_data - the structure that holds the SoC specific data | ||
| 415 | * @reg_table: Some of the legacy registers changed their location | ||
| 416 | * over time. Their offsets are stored in this table | ||
| 417 | * | ||
| 418 | * @init_data: Some features depend on the silicon revision. This | ||
| 419 | * callback allows runtime modification of the content of | ||
| 420 | * this struct | ||
| 421 | * @reset_fe: This callback is used to trigger the reset of the frame | ||
| 422 | * engine | ||
| 423 | * @set_mac: This callback is used to set the unicast mac address | ||
| 424 | * filter | ||
| 425 | * @fwd_config: This callback is used to setup the forward config | ||
| 426 | * register of the MAC | ||
| 427 | * @switch_init: This callback is used to bring up the switch core | ||
| 428 | * @port_init: Some SoCs have ports that can be router to a switch port | ||
| 429 | * or an external PHY. This callback is used to setup these | ||
| 430 | * ports. | ||
| 431 | * @has_carrier: This callback allows driver to check if there is a cable | ||
| 432 | * attached. | ||
| 433 | * @mdio_init: This callbck is used to setup the MDIO bus if one is | ||
| 434 | * present | ||
| 435 | * @mdio_cleanup: This callback is used to cleanup the MDIO state. | ||
| 436 | * @mdio_write: This callback is used to write data to the MDIO bus. | ||
| 437 | * @mdio_read: This callback is used to write data to the MDIO bus. | ||
| 438 | * @mdio_adjust_link: This callback is used to apply the PHY settings. | ||
| 439 | * @piac_offset: the PIAC register has a different different base offset | ||
| 440 | * @hw_features: feature set depends on the SoC type | ||
| 441 | * @dma_ring_size: allow GBit SoCs to set bigger rings than FE SoCs | ||
| 442 | * @napi_weight: allow GBit SoCs to set bigger napi weight than FE SoCs | ||
| 443 | * @dma_type: SoCs is PDMA, QDMA or a mix of the 2 | ||
| 444 | * @pdma_glo_cfg: the default DMA configuration | ||
| 445 | * @rx_int: the TX interrupt bits used by the SoC | ||
| 446 | * @tx_int: the TX interrupt bits used by the SoC | ||
| 447 | * @status_int: the Status interrupt bits used by the SoC | ||
| 448 | * @checksum_bit: the bits used to turn on HW checksumming | ||
| 449 | * @txd4: default value of the TXD4 descriptor | ||
| 450 | * @mac_count: the number of MACs that the SoC has | ||
| 451 | * @new_stats: there is a old and new way to read hardware stats | ||
| 452 | * registers | ||
| 453 | * @jumbo_frame: does the SoC support jumbo frames ? | ||
| 454 | * @rx_2b_offset: tell the rx dma to offset the data by 2 bytes | ||
| 455 | * @rx_sg_dma: scatter gather support | ||
| 456 | * @padding_64b enable 64 bit padding | ||
| 457 | * @padding_bug: rt2880 has a padding bug | ||
| 458 | * @has_switch: does the SoC have a built-in switch | ||
| 459 | * | ||
| 460 | * Although all of the supported SoCs share the same basic functionality, there | ||
| 461 | * are several SoC specific functions and features that we need to support. This | ||
| 462 | * struct holds the SoC specific data so that the common core can figure out | ||
| 463 | * how to setup and use these differences. | ||
| 464 | */ | ||
| 465 | struct mtk_soc_data { | ||
| 466 | const u16 *reg_table; | ||
| 467 | |||
| 468 | void (*init_data)(struct mtk_soc_data *data, struct net_device *netdev); | ||
| 469 | void (*reset_fe)(struct mtk_eth *eth); | ||
| 470 | void (*set_mac)(struct mtk_mac *mac, unsigned char *macaddr); | ||
| 471 | int (*fwd_config)(struct mtk_eth *eth); | ||
| 472 | int (*switch_init)(struct mtk_eth *eth); | ||
| 473 | void (*port_init)(struct mtk_eth *eth, struct mtk_mac *mac, | ||
| 474 | struct device_node *port); | ||
| 475 | int (*has_carrier)(struct mtk_eth *eth); | ||
| 476 | int (*mdio_init)(struct mtk_eth *eth); | ||
| 477 | void (*mdio_cleanup)(struct mtk_eth *eth); | ||
| 478 | int (*mdio_write)(struct mii_bus *bus, int phy_addr, int phy_reg, | ||
| 479 | u16 val); | ||
| 480 | int (*mdio_read)(struct mii_bus *bus, int phy_addr, int phy_reg); | ||
| 481 | void (*mdio_adjust_link)(struct mtk_eth *eth, int port); | ||
| 482 | u32 piac_offset; | ||
| 483 | netdev_features_t hw_features; | ||
| 484 | u32 dma_ring_size; | ||
| 485 | u32 napi_weight; | ||
| 486 | u32 dma_type; | ||
| 487 | u32 pdma_glo_cfg; | ||
| 488 | u32 rx_int; | ||
| 489 | u32 tx_int; | ||
| 490 | u32 status_int; | ||
| 491 | u32 checksum_bit; | ||
| 492 | u32 txd4; | ||
| 493 | u32 mac_count; | ||
| 494 | |||
| 495 | u32 new_stats:1; | ||
| 496 | u32 jumbo_frame:1; | ||
| 497 | u32 rx_2b_offset:1; | ||
| 498 | u32 rx_sg_dma:1; | ||
| 499 | u32 padding_64b:1; | ||
| 500 | u32 padding_bug:1; | ||
| 501 | u32 has_switch:1; | ||
| 502 | }; | ||
| 503 | |||
| 504 | #define MTK_STAT_OFFSET 0x40 | ||
| 505 | |||
| 506 | /* struct mtk_hw_stats - the structure that holds the traffic statistics. | ||
| 507 | * @stats_lock: make sure that stats operations are atomic | ||
| 508 | * @reg_offset: the status register offset of the SoC | ||
| 509 | * @syncp: the refcount | ||
| 510 | * | ||
| 511 | * All of the supported SoCs have hardware counters for traffic statstics. | ||
| 512 | * Whenever the status IRQ triggers we can read the latest stats from these | ||
| 513 | * counters and store them in this struct. | ||
| 514 | */ | ||
| 515 | struct mtk_hw_stats { | ||
| 516 | spinlock_t stats_lock; | ||
| 517 | u32 reg_offset; | ||
| 518 | struct u64_stats_sync syncp; | ||
| 519 | |||
| 520 | u64 tx_bytes; | ||
| 521 | u64 tx_packets; | ||
| 522 | u64 tx_skip; | ||
| 523 | u64 tx_collisions; | ||
| 524 | u64 rx_bytes; | ||
| 525 | u64 rx_packets; | ||
| 526 | u64 rx_overflow; | ||
| 527 | u64 rx_fcs_errors; | ||
| 528 | u64 rx_short_errors; | ||
| 529 | u64 rx_long_errors; | ||
| 530 | u64 rx_checksum_errors; | ||
| 531 | u64 rx_flow_control_packets; | ||
| 532 | }; | ||
| 533 | |||
| 534 | /* PDMA descriptor can point at 1-2 segments. This enum allows us to track how | ||
| 535 | * memory was allocated so that it can be freed properly | ||
| 536 | */ | ||
| 537 | enum mtk_tx_flags { | ||
| 538 | MTK_TX_FLAGS_SINGLE0 = 0x01, | ||
| 539 | MTK_TX_FLAGS_PAGE0 = 0x02, | ||
| 540 | MTK_TX_FLAGS_PAGE1 = 0x04, | ||
| 541 | }; | ||
| 542 | |||
| 543 | /* struct mtk_tx_buf - This struct holds the pointers to the memory pointed at | ||
| 544 | * by the TX descriptor s | ||
| 545 | * @skb: The SKB pointer of the packet being sent | ||
| 546 | * @dma_addr0: The base addr of the first segment | ||
| 547 | * @dma_len0: The length of the first segment | ||
| 548 | * @dma_addr1: The base addr of the second segment | ||
| 549 | * @dma_len1: The length of the second segment | ||
| 550 | */ | ||
| 551 | struct mtk_tx_buf { | ||
| 552 | struct sk_buff *skb; | ||
| 553 | u32 flags; | ||
| 554 | DEFINE_DMA_UNMAP_ADDR(dma_addr0); | ||
| 555 | DEFINE_DMA_UNMAP_LEN(dma_len0); | ||
| 556 | DEFINE_DMA_UNMAP_ADDR(dma_addr1); | ||
| 557 | DEFINE_DMA_UNMAP_LEN(dma_len1); | ||
| 558 | }; | ||
| 559 | |||
| 560 | /* struct mtk_tx_ring - This struct holds info describing a TX ring | ||
| 561 | * @tx_dma: The descriptor ring | ||
| 562 | * @tx_buf: The memory pointed at by the ring | ||
| 563 | * @tx_phys: The physical addr of tx_buf | ||
| 564 | * @tx_next_free: Pointer to the next free descriptor | ||
| 565 | * @tx_last_free: Pointer to the last free descriptor | ||
| 566 | * @tx_thresh: The threshold of minimum amount of free descriptors | ||
| 567 | * @tx_map: Callback to map a new packet into the ring | ||
| 568 | * @tx_poll: Callback for the housekeeping function | ||
| 569 | * @tx_clean: Callback for the cleanup function | ||
| 570 | * @tx_ring_size: How many descriptors are in the ring | ||
| 571 | * @tx_free_idx: The index of th next free descriptor | ||
| 572 | * @tx_next_idx: QDMA uses a linked list. This element points to the next | ||
| 573 | * free descriptor in the list | ||
| 574 | * @tx_free_count: QDMA uses a linked list. Track how many free descriptors | ||
| 575 | * are present | ||
| 576 | */ | ||
| 577 | struct mtk_tx_ring { | ||
| 578 | struct mtk_tx_dma *tx_dma; | ||
| 579 | struct mtk_tx_buf *tx_buf; | ||
| 580 | dma_addr_t tx_phys; | ||
| 581 | struct mtk_tx_dma *tx_next_free; | ||
| 582 | struct mtk_tx_dma *tx_last_free; | ||
| 583 | u16 tx_thresh; | ||
| 584 | int (*tx_map)(struct sk_buff *skb, struct net_device *dev, int tx_num, | ||
| 585 | struct mtk_tx_ring *ring, bool gso); | ||
| 586 | int (*tx_poll)(struct mtk_eth *eth, int budget, bool *tx_again); | ||
| 587 | void (*tx_clean)(struct mtk_eth *eth); | ||
| 588 | |||
| 589 | /* PDMA only */ | ||
| 590 | u16 tx_ring_size; | ||
| 591 | u16 tx_free_idx; | ||
| 592 | |||
| 593 | /* QDMA only */ | ||
| 594 | u16 tx_next_idx; | ||
| 595 | atomic_t tx_free_count; | ||
| 596 | }; | ||
| 597 | |||
| 598 | /* struct mtk_rx_ring - This struct holds info describing a RX ring | ||
| 599 | * @rx_dma: The descriptor ring | ||
| 600 | * @rx_data: The memory pointed at by the ring | ||
| 601 | * @trx_phys: The physical addr of rx_buf | ||
| 602 | * @rx_ring_size: How many descriptors are in the ring | ||
| 603 | * @rx_buf_size: The size of each packet buffer | ||
| 604 | * @rx_calc_idx: The current head of ring | ||
| 605 | */ | ||
| 606 | struct mtk_rx_ring { | ||
| 607 | struct mtk_rx_dma *rx_dma; | ||
| 608 | u8 **rx_data; | ||
| 609 | dma_addr_t rx_phys; | ||
| 610 | u16 rx_ring_size; | ||
| 611 | u16 frag_size; | ||
| 612 | u16 rx_buf_size; | ||
| 613 | u16 rx_calc_idx; | ||
| 614 | }; | ||
| 615 | |||
| 616 | /* currently no SoC has more than 2 macs */ | ||
| 617 | #define MTK_MAX_DEVS 2 | ||
| 618 | |||
| 619 | /* struct mtk_eth - This is the main datasructure for holding the state | ||
| 620 | * of the driver | ||
| 621 | * @dev: The device pointer | ||
| 622 | * @base: The mapped register i/o base | ||
| 623 | * @page_lock: Make sure that register operations are atomic | ||
| 624 | * @soc: pointer to our SoC specific data | ||
| 625 | * @dummy_dev: we run 2 netdevs on 1 physical DMA ring and need a | ||
| 626 | * dummy for NAPI to work | ||
| 627 | * @netdev: The netdev instances | ||
| 628 | * @mac: Each netdev is linked to a physical MAC | ||
| 629 | * @switch_np: The phandle for the switch | ||
| 630 | * @irq: The IRQ that we are using | ||
| 631 | * @msg_enable: Ethtool msg level | ||
| 632 | * @ysclk: The sysclk rate - neeed for calibration | ||
| 633 | * @ethsys: The register map pointing at the range used to setup | ||
| 634 | * MII modes | ||
| 635 | * @dma_refcnt: track how many netdevs are using the DMA engine | ||
| 636 | * @tx_ring: Pointer to the memore holding info about the TX ring | ||
| 637 | * @rx_ring: Pointer to the memore holding info about the RX ring | ||
| 638 | * @rx_napi: The NAPI struct | ||
| 639 | * @scratch_ring: Newer SoCs need memory for a second HW managed TX ring | ||
| 640 | * @scratch_head: The scratch memory that scratch_ring points to. | ||
| 641 | * @phy: Info about the attached PHYs | ||
| 642 | * @mii_bus: If there is a bus we need to create an instance for it | ||
| 643 | * @link: Track if the ports have a physical link | ||
| 644 | * @sw_priv: Pointer to the switches private data | ||
| 645 | * @vlan_map: RX VID tracking | ||
| 646 | */ | ||
| 647 | |||
| 648 | struct mtk_eth { | ||
| 649 | struct device *dev; | ||
| 650 | void __iomem *base; | ||
| 651 | spinlock_t page_lock; | ||
| 652 | struct mtk_soc_data *soc; | ||
| 653 | struct net_device dummy_dev; | ||
| 654 | struct net_device *netdev[MTK_MAX_DEVS]; | ||
| 655 | struct mtk_mac *mac[MTK_MAX_DEVS]; | ||
| 656 | struct device_node *switch_np; | ||
| 657 | int irq; | ||
| 658 | u32 msg_enable; | ||
| 659 | unsigned long sysclk; | ||
| 660 | struct regmap *ethsys; | ||
| 661 | atomic_t dma_refcnt; | ||
| 662 | struct mtk_tx_ring tx_ring; | ||
| 663 | struct mtk_rx_ring rx_ring[2]; | ||
| 664 | struct napi_struct rx_napi; | ||
| 665 | struct mtk_tx_dma *scratch_ring; | ||
| 666 | void *scratch_head; | ||
| 667 | struct mtk_phy *phy; | ||
| 668 | struct mii_bus *mii_bus; | ||
| 669 | int link[8]; | ||
| 670 | void *sw_priv; | ||
| 671 | unsigned long vlan_map; | ||
| 672 | }; | ||
| 673 | |||
| 674 | /* struct mtk_mac - the structure that holds the info about the MACs of the | ||
| 675 | * SoC | ||
| 676 | * @id: The number of the MAC | ||
| 677 | * @of_node: Our devicetree node | ||
| 678 | * @hw: Backpointer to our main datastruture | ||
| 679 | * @hw_stats: Packet statistics counter | ||
| 680 | * @phy_dev: The attached PHY if available | ||
| 681 | * @phy_flags: The PHYs flags | ||
| 682 | * @pending_work: The workqueue used to reset the dma ring | ||
| 683 | */ | ||
| 684 | struct mtk_mac { | ||
| 685 | int id; | ||
| 686 | struct device_node *of_node; | ||
| 687 | struct mtk_eth *hw; | ||
| 688 | struct mtk_hw_stats *hw_stats; | ||
| 689 | struct phy_device *phy_dev; | ||
| 690 | u32 phy_flags; | ||
| 691 | struct work_struct pending_work; | ||
| 692 | }; | ||
| 693 | |||
| 694 | /* the struct describing the SoC. these are declared in the soc_xyz.c files */ | ||
| 695 | extern const struct of_device_id of_mtk_match[]; | ||
| 696 | |||
| 697 | /* read the hardware status register */ | ||
| 698 | void mtk_stats_update_mac(struct mtk_mac *mac); | ||
| 699 | |||
| 700 | /* default checksum setup handler */ | ||
| 701 | void mtk_reset(struct mtk_eth *eth, u32 reset_bits); | ||
| 702 | |||
| 703 | /* register i/o wrappers */ | ||
| 704 | void mtk_w32(struct mtk_eth *eth, u32 val, unsigned int reg); | ||
| 705 | u32 mtk_r32(struct mtk_eth *eth, unsigned int reg); | ||
| 706 | |||
| 707 | /* default clock calibration handler */ | ||
| 708 | int mtk_set_clock_cycle(struct mtk_eth *eth); | ||
| 709 | |||
| 710 | /* default checksum setup handler */ | ||
| 711 | void mtk_csum_config(struct mtk_eth *eth); | ||
| 712 | |||
| 713 | /* default forward config handler */ | ||
| 714 | void mtk_fwd_config(struct mtk_eth *eth); | ||
| 715 | |||
| 716 | #endif /* MTK_ETH_H */ | ||
diff --git a/drivers/staging/mt7621-eth/soc_mt7621.c b/drivers/staging/mt7621-eth/soc_mt7621.c deleted file mode 100644 index 5d63b5d96f6b..000000000000 --- a/drivers/staging/mt7621-eth/soc_mt7621.c +++ /dev/null | |||
| @@ -1,161 +0,0 @@ | |||
| 1 | /* This program is free software; you can redistribute it and/or modify | ||
| 2 | * it under the terms of the GNU General Public License as published by | ||
| 3 | * the Free Software Foundation; version 2 of the License | ||
| 4 | * | ||
| 5 | * This program is distributed in the hope that it will be useful, | ||
| 6 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 7 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 8 | * GNU General Public License for more details. | ||
| 9 | * | ||
| 10 | * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org> | ||
| 11 | * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org> | ||
| 12 | * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com> | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/if_vlan.h> | ||
| 18 | #include <linux/of_net.h> | ||
| 19 | |||
| 20 | #include <asm/mach-ralink/ralink_regs.h> | ||
| 21 | |||
| 22 | #include "mtk_eth_soc.h" | ||
| 23 | #include "gsw_mt7620.h" | ||
| 24 | #include "mdio.h" | ||
| 25 | |||
| 26 | #define MT7620_CDMA_CSG_CFG 0x400 | ||
| 27 | #define MT7621_CDMP_IG_CTRL (MT7620_CDMA_CSG_CFG + 0x00) | ||
| 28 | #define MT7621_CDMP_EG_CTRL (MT7620_CDMA_CSG_CFG + 0x04) | ||
| 29 | #define MT7621_RESET_FE BIT(6) | ||
| 30 | #define MT7621_L4_VALID BIT(24) | ||
| 31 | |||
| 32 | #define MT7621_TX_DMA_UDF BIT(19) | ||
| 33 | |||
| 34 | #define CDMA_ICS_EN BIT(2) | ||
| 35 | #define CDMA_UCS_EN BIT(1) | ||
| 36 | #define CDMA_TCS_EN BIT(0) | ||
| 37 | |||
| 38 | #define GDMA_ICS_EN BIT(22) | ||
| 39 | #define GDMA_TCS_EN BIT(21) | ||
| 40 | #define GDMA_UCS_EN BIT(20) | ||
| 41 | |||
| 42 | /* frame engine counters */ | ||
| 43 | #define MT7621_REG_MIB_OFFSET 0x2000 | ||
| 44 | #define MT7621_PPE_AC_BCNT0 (MT7621_REG_MIB_OFFSET + 0x00) | ||
| 45 | #define MT7621_GDM1_TX_GBCNT (MT7621_REG_MIB_OFFSET + 0x400) | ||
| 46 | #define MT7621_GDM2_TX_GBCNT (MT7621_GDM1_TX_GBCNT + 0x40) | ||
| 47 | |||
| 48 | #define GSW_REG_GDMA1_MAC_ADRL 0x508 | ||
| 49 | #define GSW_REG_GDMA1_MAC_ADRH 0x50C | ||
| 50 | #define GSW_REG_GDMA2_MAC_ADRL 0x1508 | ||
| 51 | #define GSW_REG_GDMA2_MAC_ADRH 0x150C | ||
| 52 | |||
| 53 | #define MT7621_MTK_RST_GL 0x04 | ||
| 54 | #define MT7620_MTK_INT_STATUS2 0x08 | ||
| 55 | |||
| 56 | /* MTK_INT_STATUS reg on mt7620 define CNT_GDM1_AF at BIT(29) | ||
| 57 | * but after test it should be BIT(13). | ||
| 58 | */ | ||
| 59 | #define MT7621_MTK_GDM1_AF BIT(28) | ||
| 60 | #define MT7621_MTK_GDM2_AF BIT(29) | ||
| 61 | |||
| 62 | static const u16 mt7621_reg_table[MTK_REG_COUNT] = { | ||
| 63 | [MTK_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG, | ||
| 64 | [MTK_REG_PDMA_RST_CFG] = RT5350_PDMA_RST_CFG, | ||
| 65 | [MTK_REG_DLY_INT_CFG] = RT5350_DLY_INT_CFG, | ||
| 66 | [MTK_REG_TX_BASE_PTR0] = RT5350_TX_BASE_PTR0, | ||
| 67 | [MTK_REG_TX_MAX_CNT0] = RT5350_TX_MAX_CNT0, | ||
| 68 | [MTK_REG_TX_CTX_IDX0] = RT5350_TX_CTX_IDX0, | ||
| 69 | [MTK_REG_TX_DTX_IDX0] = RT5350_TX_DTX_IDX0, | ||
| 70 | [MTK_REG_RX_BASE_PTR0] = RT5350_RX_BASE_PTR0, | ||
| 71 | [MTK_REG_RX_MAX_CNT0] = RT5350_RX_MAX_CNT0, | ||
| 72 | [MTK_REG_RX_CALC_IDX0] = RT5350_RX_CALC_IDX0, | ||
| 73 | [MTK_REG_RX_DRX_IDX0] = RT5350_RX_DRX_IDX0, | ||
| 74 | [MTK_REG_MTK_INT_ENABLE] = RT5350_MTK_INT_ENABLE, | ||
| 75 | [MTK_REG_MTK_INT_STATUS] = RT5350_MTK_INT_STATUS, | ||
| 76 | [MTK_REG_MTK_DMA_VID_BASE] = 0, | ||
| 77 | [MTK_REG_MTK_COUNTER_BASE] = MT7621_GDM1_TX_GBCNT, | ||
| 78 | [MTK_REG_MTK_RST_GL] = MT7621_MTK_RST_GL, | ||
| 79 | [MTK_REG_MTK_INT_STATUS2] = MT7620_MTK_INT_STATUS2, | ||
| 80 | }; | ||
| 81 | |||
| 82 | static void mt7621_mtk_reset(struct mtk_eth *eth) | ||
| 83 | { | ||
| 84 | mtk_reset(eth, MT7621_RESET_FE); | ||
| 85 | } | ||
| 86 | |||
| 87 | static int mt7621_fwd_config(struct mtk_eth *eth) | ||
| 88 | { | ||
| 89 | /* Setup GMAC1 only, there is no support for GMAC2 yet */ | ||
| 90 | mtk_w32(eth, mtk_r32(eth, MT7620_GDMA1_FWD_CFG) & ~0xffff, | ||
| 91 | MT7620_GDMA1_FWD_CFG); | ||
| 92 | |||
| 93 | /* Enable RX checksum */ | ||
| 94 | mtk_w32(eth, mtk_r32(eth, MT7620_GDMA1_FWD_CFG) | (GDMA_ICS_EN | | ||
| 95 | GDMA_TCS_EN | GDMA_UCS_EN), | ||
| 96 | MT7620_GDMA1_FWD_CFG); | ||
| 97 | |||
| 98 | /* Enable RX VLan Offloading */ | ||
| 99 | mtk_w32(eth, 0, MT7621_CDMP_EG_CTRL); | ||
| 100 | |||
| 101 | return 0; | ||
| 102 | } | ||
| 103 | |||
| 104 | static void mt7621_set_mac(struct mtk_mac *mac, unsigned char *hwaddr) | ||
| 105 | { | ||
| 106 | unsigned long flags; | ||
| 107 | |||
| 108 | spin_lock_irqsave(&mac->hw->page_lock, flags); | ||
| 109 | if (mac->id == 0) { | ||
| 110 | mtk_w32(mac->hw, (hwaddr[0] << 8) | hwaddr[1], | ||
| 111 | GSW_REG_GDMA1_MAC_ADRH); | ||
| 112 | mtk_w32(mac->hw, (hwaddr[2] << 24) | (hwaddr[3] << 16) | | ||
| 113 | (hwaddr[4] << 8) | hwaddr[5], | ||
| 114 | GSW_REG_GDMA1_MAC_ADRL); | ||
| 115 | } | ||
| 116 | if (mac->id == 1) { | ||
| 117 | mtk_w32(mac->hw, (hwaddr[0] << 8) | hwaddr[1], | ||
| 118 | GSW_REG_GDMA2_MAC_ADRH); | ||
| 119 | mtk_w32(mac->hw, (hwaddr[2] << 24) | (hwaddr[3] << 16) | | ||
| 120 | (hwaddr[4] << 8) | hwaddr[5], | ||
| 121 | GSW_REG_GDMA2_MAC_ADRL); | ||
| 122 | } | ||
| 123 | spin_unlock_irqrestore(&mac->hw->page_lock, flags); | ||
| 124 | } | ||
| 125 | |||
| 126 | static struct mtk_soc_data mt7621_data = { | ||
| 127 | .hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM | | ||
| 128 | NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | | ||
| 129 | NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | | ||
| 130 | NETIF_F_IPV6_CSUM, | ||
| 131 | .dma_type = MTK_PDMA, | ||
| 132 | .dma_ring_size = 256, | ||
| 133 | .napi_weight = 64, | ||
| 134 | .new_stats = 1, | ||
| 135 | .padding_64b = 1, | ||
| 136 | .rx_2b_offset = 1, | ||
| 137 | .rx_sg_dma = 1, | ||
| 138 | .has_switch = 1, | ||
| 139 | .mac_count = 2, | ||
| 140 | .reset_fe = mt7621_mtk_reset, | ||
| 141 | .set_mac = mt7621_set_mac, | ||
| 142 | .fwd_config = mt7621_fwd_config, | ||
| 143 | .switch_init = mtk_gsw_init, | ||
| 144 | .reg_table = mt7621_reg_table, | ||
| 145 | .pdma_glo_cfg = MTK_PDMA_SIZE_16DWORDS, | ||
| 146 | .rx_int = RT5350_RX_DONE_INT, | ||
| 147 | .tx_int = RT5350_TX_DONE_INT, | ||
| 148 | .status_int = MT7621_MTK_GDM1_AF | MT7621_MTK_GDM2_AF, | ||
| 149 | .checksum_bit = MT7621_L4_VALID, | ||
| 150 | .has_carrier = mt7620_has_carrier, | ||
| 151 | .mdio_read = mt7620_mdio_read, | ||
| 152 | .mdio_write = mt7620_mdio_write, | ||
| 153 | .mdio_adjust_link = mt7620_mdio_link_adjust, | ||
| 154 | }; | ||
| 155 | |||
| 156 | const struct of_device_id of_mtk_match[] = { | ||
| 157 | { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data }, | ||
| 158 | {}, | ||
| 159 | }; | ||
| 160 | |||
| 161 | MODULE_DEVICE_TABLE(of, of_mtk_match); | ||
diff --git a/drivers/staging/mt7621-pci/Kconfig b/drivers/staging/mt7621-pci/Kconfig index d33533872a16..c8fa17cfa807 100644 --- a/drivers/staging/mt7621-pci/Kconfig +++ b/drivers/staging/mt7621-pci/Kconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | config PCI_MT7621 | 1 | config PCI_MT7621 |
| 2 | tristate "MediaTek MT7621 PCI Controller" | 2 | tristate "MediaTek MT7621 PCI Controller" |
| 3 | depends on RALINK | 3 | depends on RALINK |
| 4 | depends on PCI | ||
| 4 | select PCI_DRIVERS_GENERIC | 5 | select PCI_DRIVERS_GENERIC |
| 5 | help | 6 | help |
| 6 | This selects a driver for the MediaTek MT7621 PCI Controller. | 7 | This selects a driver for the MediaTek MT7621 PCI Controller. |
diff --git a/drivers/staging/octeon/ethernet-mdio.c b/drivers/staging/octeon/ethernet-mdio.c index d6248eecf123..2aee64fdaec5 100644 --- a/drivers/staging/octeon/ethernet-mdio.c +++ b/drivers/staging/octeon/ethernet-mdio.c | |||
| @@ -163,7 +163,7 @@ int cvm_oct_phy_setup_device(struct net_device *dev) | |||
| 163 | goto no_phy; | 163 | goto no_phy; |
| 164 | 164 | ||
| 165 | phydev = of_phy_connect(dev, phy_node, cvm_oct_adjust_link, 0, | 165 | phydev = of_phy_connect(dev, phy_node, cvm_oct_adjust_link, 0, |
| 166 | PHY_INTERFACE_MODE_GMII); | 166 | priv->phy_mode); |
| 167 | of_node_put(phy_node); | 167 | of_node_put(phy_node); |
| 168 | 168 | ||
| 169 | if (!phydev) | 169 | if (!phydev) |
diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c index ce61c5670ef6..986db76705cc 100644 --- a/drivers/staging/octeon/ethernet.c +++ b/drivers/staging/octeon/ethernet.c | |||
| @@ -653,14 +653,37 @@ static struct device_node *cvm_oct_node_for_port(struct device_node *pip, | |||
| 653 | return np; | 653 | return np; |
| 654 | } | 654 | } |
| 655 | 655 | ||
| 656 | static void cvm_set_rgmii_delay(struct device_node *np, int iface, int port) | 656 | static void cvm_set_rgmii_delay(struct octeon_ethernet *priv, int iface, |
| 657 | int port) | ||
| 657 | { | 658 | { |
| 659 | struct device_node *np = priv->of_node; | ||
| 658 | u32 delay_value; | 660 | u32 delay_value; |
| 661 | bool rx_delay; | ||
| 662 | bool tx_delay; | ||
| 659 | 663 | ||
| 660 | if (!of_property_read_u32(np, "rx-delay", &delay_value)) | 664 | /* By default, both RX/TX delay is enabled in |
| 665 | * __cvmx_helper_rgmii_enable(). | ||
| 666 | */ | ||
| 667 | rx_delay = true; | ||
| 668 | tx_delay = true; | ||
| 669 | |||
| 670 | if (!of_property_read_u32(np, "rx-delay", &delay_value)) { | ||
| 661 | cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, iface), delay_value); | 671 | cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, iface), delay_value); |
| 662 | if (!of_property_read_u32(np, "tx-delay", &delay_value)) | 672 | rx_delay = delay_value > 0; |
| 673 | } | ||
| 674 | if (!of_property_read_u32(np, "tx-delay", &delay_value)) { | ||
| 663 | cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, iface), delay_value); | 675 | cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, iface), delay_value); |
| 676 | tx_delay = delay_value > 0; | ||
| 677 | } | ||
| 678 | |||
| 679 | if (!rx_delay && !tx_delay) | ||
| 680 | priv->phy_mode = PHY_INTERFACE_MODE_RGMII_ID; | ||
| 681 | else if (!rx_delay) | ||
| 682 | priv->phy_mode = PHY_INTERFACE_MODE_RGMII_RXID; | ||
| 683 | else if (!tx_delay) | ||
| 684 | priv->phy_mode = PHY_INTERFACE_MODE_RGMII_TXID; | ||
| 685 | else | ||
| 686 | priv->phy_mode = PHY_INTERFACE_MODE_RGMII; | ||
| 664 | } | 687 | } |
| 665 | 688 | ||
| 666 | static int cvm_oct_probe(struct platform_device *pdev) | 689 | static int cvm_oct_probe(struct platform_device *pdev) |
| @@ -825,6 +848,7 @@ static int cvm_oct_probe(struct platform_device *pdev) | |||
| 825 | priv->port = port; | 848 | priv->port = port; |
| 826 | priv->queue = cvmx_pko_get_base_queue(priv->port); | 849 | priv->queue = cvmx_pko_get_base_queue(priv->port); |
| 827 | priv->fau = fau - cvmx_pko_get_num_queues(port) * 4; | 850 | priv->fau = fau - cvmx_pko_get_num_queues(port) * 4; |
| 851 | priv->phy_mode = PHY_INTERFACE_MODE_NA; | ||
| 828 | for (qos = 0; qos < 16; qos++) | 852 | for (qos = 0; qos < 16; qos++) |
| 829 | skb_queue_head_init(&priv->tx_free_list[qos]); | 853 | skb_queue_head_init(&priv->tx_free_list[qos]); |
| 830 | for (qos = 0; qos < cvmx_pko_get_num_queues(port); | 854 | for (qos = 0; qos < cvmx_pko_get_num_queues(port); |
| @@ -856,6 +880,7 @@ static int cvm_oct_probe(struct platform_device *pdev) | |||
| 856 | break; | 880 | break; |
| 857 | 881 | ||
| 858 | case CVMX_HELPER_INTERFACE_MODE_SGMII: | 882 | case CVMX_HELPER_INTERFACE_MODE_SGMII: |
| 883 | priv->phy_mode = PHY_INTERFACE_MODE_SGMII; | ||
| 859 | dev->netdev_ops = &cvm_oct_sgmii_netdev_ops; | 884 | dev->netdev_ops = &cvm_oct_sgmii_netdev_ops; |
| 860 | strcpy(dev->name, "eth%d"); | 885 | strcpy(dev->name, "eth%d"); |
| 861 | break; | 886 | break; |
| @@ -865,11 +890,16 @@ static int cvm_oct_probe(struct platform_device *pdev) | |||
| 865 | strcpy(dev->name, "spi%d"); | 890 | strcpy(dev->name, "spi%d"); |
| 866 | break; | 891 | break; |
| 867 | 892 | ||
| 868 | case CVMX_HELPER_INTERFACE_MODE_RGMII: | ||
| 869 | case CVMX_HELPER_INTERFACE_MODE_GMII: | 893 | case CVMX_HELPER_INTERFACE_MODE_GMII: |
| 894 | priv->phy_mode = PHY_INTERFACE_MODE_GMII; | ||
| 895 | dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; | ||
| 896 | strcpy(dev->name, "eth%d"); | ||
| 897 | break; | ||
| 898 | |||
| 899 | case CVMX_HELPER_INTERFACE_MODE_RGMII: | ||
| 870 | dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; | 900 | dev->netdev_ops = &cvm_oct_rgmii_netdev_ops; |
| 871 | strcpy(dev->name, "eth%d"); | 901 | strcpy(dev->name, "eth%d"); |
| 872 | cvm_set_rgmii_delay(priv->of_node, interface, | 902 | cvm_set_rgmii_delay(priv, interface, |
| 873 | port_index); | 903 | port_index); |
| 874 | break; | 904 | break; |
| 875 | } | 905 | } |
diff --git a/drivers/staging/octeon/octeon-ethernet.h b/drivers/staging/octeon/octeon-ethernet.h index 4a07e7f43d12..be570d33685a 100644 --- a/drivers/staging/octeon/octeon-ethernet.h +++ b/drivers/staging/octeon/octeon-ethernet.h | |||
| @@ -12,7 +12,7 @@ | |||
| 12 | #define OCTEON_ETHERNET_H | 12 | #define OCTEON_ETHERNET_H |
| 13 | 13 | ||
| 14 | #include <linux/of.h> | 14 | #include <linux/of.h> |
| 15 | 15 | #include <linux/phy.h> | |
| 16 | #include <asm/octeon/cvmx-helper-board.h> | 16 | #include <asm/octeon/cvmx-helper-board.h> |
| 17 | 17 | ||
| 18 | /** | 18 | /** |
| @@ -33,6 +33,8 @@ struct octeon_ethernet { | |||
| 33 | * cvmx_helper_interface_mode_t | 33 | * cvmx_helper_interface_mode_t |
| 34 | */ | 34 | */ |
| 35 | int imode; | 35 | int imode; |
| 36 | /* PHY mode */ | ||
| 37 | phy_interface_t phy_mode; | ||
| 36 | /* List of outstanding tx buffers per queue */ | 38 | /* List of outstanding tx buffers per queue */ |
| 37 | struct sk_buff_head tx_free_list[16]; | 39 | struct sk_buff_head tx_free_list[16]; |
| 38 | unsigned int last_speed; | 40 | unsigned int last_speed; |
diff --git a/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c b/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c index 80b8d4153414..a54286498a47 100644 --- a/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c +++ b/drivers/staging/olpc_dcon/olpc_dcon_xo_1.c | |||
| @@ -45,7 +45,7 @@ static int dcon_init_xo_1(struct dcon_priv *dcon) | |||
| 45 | { | 45 | { |
| 46 | unsigned char lob; | 46 | unsigned char lob; |
| 47 | int ret, i; | 47 | int ret, i; |
| 48 | struct dcon_gpio *pin = &gpios_asis[0]; | 48 | const struct dcon_gpio *pin = &gpios_asis[0]; |
| 49 | 49 | ||
| 50 | for (i = 0; i < ARRAY_SIZE(gpios_asis); i++) { | 50 | for (i = 0; i < ARRAY_SIZE(gpios_asis); i++) { |
| 51 | gpios[i] = devm_gpiod_get(&dcon->client->dev, pin[i].name, | 51 | gpios[i] = devm_gpiod_get(&dcon->client->dev, pin[i].name, |
diff --git a/drivers/staging/rtl8188eu/core/rtw_xmit.c b/drivers/staging/rtl8188eu/core/rtw_xmit.c index 1723a47a96b4..952f2ab51347 100644 --- a/drivers/staging/rtl8188eu/core/rtw_xmit.c +++ b/drivers/staging/rtl8188eu/core/rtw_xmit.c | |||
| @@ -174,7 +174,9 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter) | |||
| 174 | 174 | ||
| 175 | pxmitpriv->free_xmit_extbuf_cnt = num_xmit_extbuf; | 175 | pxmitpriv->free_xmit_extbuf_cnt = num_xmit_extbuf; |
| 176 | 176 | ||
| 177 | rtw_alloc_hwxmits(padapter); | 177 | res = rtw_alloc_hwxmits(padapter); |
| 178 | if (res == _FAIL) | ||
| 179 | goto exit; | ||
| 178 | rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); | 180 | rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); |
| 179 | 181 | ||
| 180 | for (i = 0; i < 4; i++) | 182 | for (i = 0; i < 4; i++) |
| @@ -1503,7 +1505,7 @@ exit: | |||
| 1503 | return res; | 1505 | return res; |
| 1504 | } | 1506 | } |
| 1505 | 1507 | ||
| 1506 | void rtw_alloc_hwxmits(struct adapter *padapter) | 1508 | s32 rtw_alloc_hwxmits(struct adapter *padapter) |
| 1507 | { | 1509 | { |
| 1508 | struct hw_xmit *hwxmits; | 1510 | struct hw_xmit *hwxmits; |
| 1509 | struct xmit_priv *pxmitpriv = &padapter->xmitpriv; | 1511 | struct xmit_priv *pxmitpriv = &padapter->xmitpriv; |
| @@ -1512,6 +1514,8 @@ void rtw_alloc_hwxmits(struct adapter *padapter) | |||
| 1512 | 1514 | ||
| 1513 | pxmitpriv->hwxmits = kcalloc(pxmitpriv->hwxmit_entry, | 1515 | pxmitpriv->hwxmits = kcalloc(pxmitpriv->hwxmit_entry, |
| 1514 | sizeof(struct hw_xmit), GFP_KERNEL); | 1516 | sizeof(struct hw_xmit), GFP_KERNEL); |
| 1517 | if (!pxmitpriv->hwxmits) | ||
| 1518 | return _FAIL; | ||
| 1515 | 1519 | ||
| 1516 | hwxmits = pxmitpriv->hwxmits; | 1520 | hwxmits = pxmitpriv->hwxmits; |
| 1517 | 1521 | ||
| @@ -1519,6 +1523,7 @@ void rtw_alloc_hwxmits(struct adapter *padapter) | |||
| 1519 | hwxmits[1] .sta_queue = &pxmitpriv->vi_pending; | 1523 | hwxmits[1] .sta_queue = &pxmitpriv->vi_pending; |
| 1520 | hwxmits[2] .sta_queue = &pxmitpriv->be_pending; | 1524 | hwxmits[2] .sta_queue = &pxmitpriv->be_pending; |
| 1521 | hwxmits[3] .sta_queue = &pxmitpriv->bk_pending; | 1525 | hwxmits[3] .sta_queue = &pxmitpriv->bk_pending; |
| 1526 | return _SUCCESS; | ||
| 1522 | } | 1527 | } |
| 1523 | 1528 | ||
| 1524 | void rtw_free_hwxmits(struct adapter *padapter) | 1529 | void rtw_free_hwxmits(struct adapter *padapter) |
diff --git a/drivers/staging/rtl8188eu/include/rtw_xmit.h b/drivers/staging/rtl8188eu/include/rtw_xmit.h index 788f59c74ea1..ba7e15fbde72 100644 --- a/drivers/staging/rtl8188eu/include/rtw_xmit.h +++ b/drivers/staging/rtl8188eu/include/rtw_xmit.h | |||
| @@ -336,7 +336,7 @@ s32 rtw_txframes_sta_ac_pending(struct adapter *padapter, | |||
| 336 | void rtw_init_hwxmits(struct hw_xmit *phwxmit, int entry); | 336 | void rtw_init_hwxmits(struct hw_xmit *phwxmit, int entry); |
| 337 | s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter); | 337 | s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter); |
| 338 | void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv); | 338 | void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv); |
| 339 | void rtw_alloc_hwxmits(struct adapter *padapter); | 339 | s32 rtw_alloc_hwxmits(struct adapter *padapter); |
| 340 | void rtw_free_hwxmits(struct adapter *padapter); | 340 | void rtw_free_hwxmits(struct adapter *padapter); |
| 341 | s32 rtw_xmit(struct adapter *padapter, struct sk_buff **pkt); | 341 | s32 rtw_xmit(struct adapter *padapter, struct sk_buff **pkt); |
| 342 | 342 | ||
diff --git a/drivers/staging/rtl8712/rtl8712_cmd.c b/drivers/staging/rtl8712/rtl8712_cmd.c index 1920d02f7c9f..8c36acedf507 100644 --- a/drivers/staging/rtl8712/rtl8712_cmd.c +++ b/drivers/staging/rtl8712/rtl8712_cmd.c | |||
| @@ -147,17 +147,9 @@ static u8 write_macreg_hdl(struct _adapter *padapter, u8 *pbuf) | |||
| 147 | 147 | ||
| 148 | static u8 read_bbreg_hdl(struct _adapter *padapter, u8 *pbuf) | 148 | static u8 read_bbreg_hdl(struct _adapter *padapter, u8 *pbuf) |
| 149 | { | 149 | { |
| 150 | u32 val; | ||
| 151 | void (*pcmd_callback)(struct _adapter *dev, struct cmd_obj *pcmd); | ||
| 152 | struct cmd_obj *pcmd = (struct cmd_obj *)pbuf; | 150 | struct cmd_obj *pcmd = (struct cmd_obj *)pbuf; |
| 153 | 151 | ||
| 154 | if (pcmd->rsp && pcmd->rspsz > 0) | 152 | r8712_free_cmd_obj(pcmd); |
| 155 | memcpy(pcmd->rsp, (u8 *)&val, pcmd->rspsz); | ||
| 156 | pcmd_callback = cmd_callback[pcmd->cmdcode].callback; | ||
| 157 | if (!pcmd_callback) | ||
| 158 | r8712_free_cmd_obj(pcmd); | ||
| 159 | else | ||
| 160 | pcmd_callback(padapter, pcmd); | ||
| 161 | return H2C_SUCCESS; | 153 | return H2C_SUCCESS; |
| 162 | } | 154 | } |
| 163 | 155 | ||
diff --git a/drivers/staging/rtl8712/rtl8712_cmd.h b/drivers/staging/rtl8712/rtl8712_cmd.h index 92fb77666d44..1ef86b8c592f 100644 --- a/drivers/staging/rtl8712/rtl8712_cmd.h +++ b/drivers/staging/rtl8712/rtl8712_cmd.h | |||
| @@ -140,7 +140,7 @@ enum rtl8712_h2c_cmd { | |||
| 140 | static struct _cmd_callback cmd_callback[] = { | 140 | static struct _cmd_callback cmd_callback[] = { |
| 141 | {GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/ | 141 | {GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/ |
| 142 | {GEN_CMD_CODE(_Write_MACREG), NULL}, | 142 | {GEN_CMD_CODE(_Write_MACREG), NULL}, |
| 143 | {GEN_CMD_CODE(_Read_BBREG), &r8712_getbbrfreg_cmdrsp_callback}, | 143 | {GEN_CMD_CODE(_Read_BBREG), NULL}, |
| 144 | {GEN_CMD_CODE(_Write_BBREG), NULL}, | 144 | {GEN_CMD_CODE(_Write_BBREG), NULL}, |
| 145 | {GEN_CMD_CODE(_Read_RFREG), &r8712_getbbrfreg_cmdrsp_callback}, | 145 | {GEN_CMD_CODE(_Read_RFREG), &r8712_getbbrfreg_cmdrsp_callback}, |
| 146 | {GEN_CMD_CODE(_Write_RFREG), NULL}, /*5*/ | 146 | {GEN_CMD_CODE(_Write_RFREG), NULL}, /*5*/ |
diff --git a/drivers/staging/rtl8723bs/core/rtw_xmit.c b/drivers/staging/rtl8723bs/core/rtw_xmit.c index 094d61bcb469..b87f13a0b563 100644 --- a/drivers/staging/rtl8723bs/core/rtw_xmit.c +++ b/drivers/staging/rtl8723bs/core/rtw_xmit.c | |||
| @@ -260,7 +260,9 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter) | |||
| 260 | } | 260 | } |
| 261 | } | 261 | } |
| 262 | 262 | ||
| 263 | rtw_alloc_hwxmits(padapter); | 263 | res = rtw_alloc_hwxmits(padapter); |
| 264 | if (res == _FAIL) | ||
| 265 | goto exit; | ||
| 264 | rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); | 266 | rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); |
| 265 | 267 | ||
| 266 | for (i = 0; i < 4; i++) { | 268 | for (i = 0; i < 4; i++) { |
| @@ -2144,7 +2146,7 @@ exit: | |||
| 2144 | return res; | 2146 | return res; |
| 2145 | } | 2147 | } |
| 2146 | 2148 | ||
| 2147 | void rtw_alloc_hwxmits(struct adapter *padapter) | 2149 | s32 rtw_alloc_hwxmits(struct adapter *padapter) |
| 2148 | { | 2150 | { |
| 2149 | struct hw_xmit *hwxmits; | 2151 | struct hw_xmit *hwxmits; |
| 2150 | struct xmit_priv *pxmitpriv = &padapter->xmitpriv; | 2152 | struct xmit_priv *pxmitpriv = &padapter->xmitpriv; |
| @@ -2155,10 +2157,8 @@ void rtw_alloc_hwxmits(struct adapter *padapter) | |||
| 2155 | 2157 | ||
| 2156 | pxmitpriv->hwxmits = rtw_zmalloc(sizeof(struct hw_xmit) * pxmitpriv->hwxmit_entry); | 2158 | pxmitpriv->hwxmits = rtw_zmalloc(sizeof(struct hw_xmit) * pxmitpriv->hwxmit_entry); |
| 2157 | 2159 | ||
| 2158 | if (pxmitpriv->hwxmits == NULL) { | 2160 | if (!pxmitpriv->hwxmits) |
| 2159 | DBG_871X("alloc hwxmits fail!...\n"); | 2161 | return _FAIL; |
| 2160 | return; | ||
| 2161 | } | ||
| 2162 | 2162 | ||
| 2163 | hwxmits = pxmitpriv->hwxmits; | 2163 | hwxmits = pxmitpriv->hwxmits; |
| 2164 | 2164 | ||
| @@ -2204,7 +2204,7 @@ void rtw_alloc_hwxmits(struct adapter *padapter) | |||
| 2204 | 2204 | ||
| 2205 | } | 2205 | } |
| 2206 | 2206 | ||
| 2207 | 2207 | return _SUCCESS; | |
| 2208 | } | 2208 | } |
| 2209 | 2209 | ||
| 2210 | void rtw_free_hwxmits(struct adapter *padapter) | 2210 | void rtw_free_hwxmits(struct adapter *padapter) |
diff --git a/drivers/staging/rtl8723bs/include/rtw_xmit.h b/drivers/staging/rtl8723bs/include/rtw_xmit.h index 1b38b9182b31..37f42b2f22f1 100644 --- a/drivers/staging/rtl8723bs/include/rtw_xmit.h +++ b/drivers/staging/rtl8723bs/include/rtw_xmit.h | |||
| @@ -487,7 +487,7 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter); | |||
| 487 | void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv); | 487 | void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv); |
| 488 | 488 | ||
| 489 | 489 | ||
| 490 | void rtw_alloc_hwxmits(struct adapter *padapter); | 490 | s32 rtw_alloc_hwxmits(struct adapter *padapter); |
| 491 | void rtw_free_hwxmits(struct adapter *padapter); | 491 | void rtw_free_hwxmits(struct adapter *padapter); |
| 492 | 492 | ||
| 493 | 493 | ||
diff --git a/drivers/staging/rtlwifi/phydm/rtl_phydm.c b/drivers/staging/rtlwifi/phydm/rtl_phydm.c index 9930ed954abb..4cc77b2016e1 100644 --- a/drivers/staging/rtlwifi/phydm/rtl_phydm.c +++ b/drivers/staging/rtlwifi/phydm/rtl_phydm.c | |||
| @@ -180,6 +180,8 @@ static int rtl_phydm_init_priv(struct rtl_priv *rtlpriv, | |||
| 180 | 180 | ||
| 181 | rtlpriv->phydm.internal = | 181 | rtlpriv->phydm.internal = |
| 182 | kzalloc(sizeof(struct phy_dm_struct), GFP_KERNEL); | 182 | kzalloc(sizeof(struct phy_dm_struct), GFP_KERNEL); |
| 183 | if (!rtlpriv->phydm.internal) | ||
| 184 | return 0; | ||
| 183 | 185 | ||
| 184 | _rtl_phydm_init_com_info(rtlpriv, ic, params); | 186 | _rtl_phydm_init_com_info(rtlpriv, ic, params); |
| 185 | 187 | ||
diff --git a/drivers/staging/rtlwifi/rtl8822be/fw.c b/drivers/staging/rtlwifi/rtl8822be/fw.c index f061dd1382aa..cf6b7a80b753 100644 --- a/drivers/staging/rtlwifi/rtl8822be/fw.c +++ b/drivers/staging/rtlwifi/rtl8822be/fw.c | |||
| @@ -743,6 +743,8 @@ void rtl8822be_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished) | |||
| 743 | u1_rsvd_page_loc, 3); | 743 | u1_rsvd_page_loc, 3); |
| 744 | 744 | ||
| 745 | skb = dev_alloc_skb(totalpacketlen); | 745 | skb = dev_alloc_skb(totalpacketlen); |
| 746 | if (!skb) | ||
| 747 | return; | ||
| 746 | memcpy((u8 *)skb_put(skb, totalpacketlen), &reserved_page_packet, | 748 | memcpy((u8 *)skb_put(skb, totalpacketlen), &reserved_page_packet, |
| 747 | totalpacketlen); | 749 | totalpacketlen); |
| 748 | 750 | ||
diff --git a/drivers/staging/speakup/speakup_soft.c b/drivers/staging/speakup/speakup_soft.c index edff6ce85655..9d85a3a1af4c 100644 --- a/drivers/staging/speakup/speakup_soft.c +++ b/drivers/staging/speakup/speakup_soft.c | |||
| @@ -210,12 +210,15 @@ static ssize_t softsynthx_read(struct file *fp, char __user *buf, size_t count, | |||
| 210 | return -EINVAL; | 210 | return -EINVAL; |
| 211 | 211 | ||
| 212 | spin_lock_irqsave(&speakup_info.spinlock, flags); | 212 | spin_lock_irqsave(&speakup_info.spinlock, flags); |
| 213 | synth_soft.alive = 1; | ||
| 213 | while (1) { | 214 | while (1) { |
| 214 | prepare_to_wait(&speakup_event, &wait, TASK_INTERRUPTIBLE); | 215 | prepare_to_wait(&speakup_event, &wait, TASK_INTERRUPTIBLE); |
| 215 | if (!unicode) | 216 | if (synth_current() == &synth_soft) { |
| 216 | synth_buffer_skip_nonlatin1(); | 217 | if (!unicode) |
| 217 | if (!synth_buffer_empty() || speakup_info.flushing) | 218 | synth_buffer_skip_nonlatin1(); |
| 218 | break; | 219 | if (!synth_buffer_empty() || speakup_info.flushing) |
| 220 | break; | ||
| 221 | } | ||
| 219 | spin_unlock_irqrestore(&speakup_info.spinlock, flags); | 222 | spin_unlock_irqrestore(&speakup_info.spinlock, flags); |
| 220 | if (fp->f_flags & O_NONBLOCK) { | 223 | if (fp->f_flags & O_NONBLOCK) { |
| 221 | finish_wait(&speakup_event, &wait); | 224 | finish_wait(&speakup_event, &wait); |
| @@ -235,6 +238,8 @@ static ssize_t softsynthx_read(struct file *fp, char __user *buf, size_t count, | |||
| 235 | 238 | ||
| 236 | /* Keep 3 bytes available for a 16bit UTF-8-encoded character */ | 239 | /* Keep 3 bytes available for a 16bit UTF-8-encoded character */ |
| 237 | while (chars_sent <= count - bytes_per_ch) { | 240 | while (chars_sent <= count - bytes_per_ch) { |
| 241 | if (synth_current() != &synth_soft) | ||
| 242 | break; | ||
| 238 | if (speakup_info.flushing) { | 243 | if (speakup_info.flushing) { |
| 239 | speakup_info.flushing = 0; | 244 | speakup_info.flushing = 0; |
| 240 | ch = '\x18'; | 245 | ch = '\x18'; |
| @@ -331,7 +336,8 @@ static __poll_t softsynth_poll(struct file *fp, struct poll_table_struct *wait) | |||
| 331 | poll_wait(fp, &speakup_event, wait); | 336 | poll_wait(fp, &speakup_event, wait); |
| 332 | 337 | ||
| 333 | spin_lock_irqsave(&speakup_info.spinlock, flags); | 338 | spin_lock_irqsave(&speakup_info.spinlock, flags); |
| 334 | if (!synth_buffer_empty() || speakup_info.flushing) | 339 | if (synth_current() == &synth_soft && |
| 340 | (!synth_buffer_empty() || speakup_info.flushing)) | ||
| 335 | ret = EPOLLIN | EPOLLRDNORM; | 341 | ret = EPOLLIN | EPOLLRDNORM; |
| 336 | spin_unlock_irqrestore(&speakup_info.spinlock, flags); | 342 | spin_unlock_irqrestore(&speakup_info.spinlock, flags); |
| 337 | return ret; | 343 | return ret; |
diff --git a/drivers/staging/speakup/spk_priv.h b/drivers/staging/speakup/spk_priv.h index c8e688878fc7..ac6a74883af4 100644 --- a/drivers/staging/speakup/spk_priv.h +++ b/drivers/staging/speakup/spk_priv.h | |||
| @@ -74,6 +74,7 @@ int synth_request_region(unsigned long start, unsigned long n); | |||
| 74 | int synth_release_region(unsigned long start, unsigned long n); | 74 | int synth_release_region(unsigned long start, unsigned long n); |
| 75 | int synth_add(struct spk_synth *in_synth); | 75 | int synth_add(struct spk_synth *in_synth); |
| 76 | void synth_remove(struct spk_synth *in_synth); | 76 | void synth_remove(struct spk_synth *in_synth); |
| 77 | struct spk_synth *synth_current(void); | ||
| 77 | 78 | ||
| 78 | extern struct speakup_info_t speakup_info; | 79 | extern struct speakup_info_t speakup_info; |
| 79 | 80 | ||
diff --git a/drivers/staging/speakup/synth.c b/drivers/staging/speakup/synth.c index 25f259ee4ffc..3568bfb89912 100644 --- a/drivers/staging/speakup/synth.c +++ b/drivers/staging/speakup/synth.c | |||
| @@ -481,4 +481,10 @@ void synth_remove(struct spk_synth *in_synth) | |||
| 481 | } | 481 | } |
| 482 | EXPORT_SYMBOL_GPL(synth_remove); | 482 | EXPORT_SYMBOL_GPL(synth_remove); |
| 483 | 483 | ||
| 484 | struct spk_synth *synth_current(void) | ||
| 485 | { | ||
| 486 | return synth; | ||
| 487 | } | ||
| 488 | EXPORT_SYMBOL_GPL(synth_current); | ||
| 489 | |||
| 484 | short spk_punc_masks[] = { 0, SOME, MOST, PUNC, PUNC | B_SYM }; | 490 | short spk_punc_masks[] = { 0, SOME, MOST, PUNC, PUNC | B_SYM }; |
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c index 804daf83be35..064d0db4c51e 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | |||
| @@ -3513,6 +3513,7 @@ static int vchiq_probe(struct platform_device *pdev) | |||
| 3513 | struct device_node *fw_node; | 3513 | struct device_node *fw_node; |
| 3514 | const struct of_device_id *of_id; | 3514 | const struct of_device_id *of_id; |
| 3515 | struct vchiq_drvdata *drvdata; | 3515 | struct vchiq_drvdata *drvdata; |
| 3516 | struct device *vchiq_dev; | ||
| 3516 | int err; | 3517 | int err; |
| 3517 | 3518 | ||
| 3518 | of_id = of_match_node(vchiq_of_match, pdev->dev.of_node); | 3519 | of_id = of_match_node(vchiq_of_match, pdev->dev.of_node); |
| @@ -3547,9 +3548,12 @@ static int vchiq_probe(struct platform_device *pdev) | |||
| 3547 | goto failed_platform_init; | 3548 | goto failed_platform_init; |
| 3548 | } | 3549 | } |
| 3549 | 3550 | ||
| 3550 | if (IS_ERR(device_create(vchiq_class, &pdev->dev, vchiq_devid, | 3551 | vchiq_dev = device_create(vchiq_class, &pdev->dev, vchiq_devid, NULL, |
| 3551 | NULL, "vchiq"))) | 3552 | "vchiq"); |
| 3553 | if (IS_ERR(vchiq_dev)) { | ||
| 3554 | err = PTR_ERR(vchiq_dev); | ||
| 3552 | goto failed_device_create; | 3555 | goto failed_device_create; |
| 3556 | } | ||
| 3553 | 3557 | ||
| 3554 | vchiq_debugfs_init(); | 3558 | vchiq_debugfs_init(); |
| 3555 | 3559 | ||
diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c index b370985b58a1..c6bb4aaf9bd0 100644 --- a/drivers/staging/vt6655/device_main.c +++ b/drivers/staging/vt6655/device_main.c | |||
| @@ -1033,8 +1033,6 @@ static void vnt_interrupt_process(struct vnt_private *priv) | |||
| 1033 | return; | 1033 | return; |
| 1034 | } | 1034 | } |
| 1035 | 1035 | ||
| 1036 | MACvIntDisable(priv->PortOffset); | ||
| 1037 | |||
| 1038 | spin_lock_irqsave(&priv->lock, flags); | 1036 | spin_lock_irqsave(&priv->lock, flags); |
| 1039 | 1037 | ||
| 1040 | /* Read low level stats */ | 1038 | /* Read low level stats */ |
| @@ -1122,8 +1120,6 @@ static void vnt_interrupt_process(struct vnt_private *priv) | |||
| 1122 | } | 1120 | } |
| 1123 | 1121 | ||
| 1124 | spin_unlock_irqrestore(&priv->lock, flags); | 1122 | spin_unlock_irqrestore(&priv->lock, flags); |
| 1125 | |||
| 1126 | MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); | ||
| 1127 | } | 1123 | } |
| 1128 | 1124 | ||
| 1129 | static void vnt_interrupt_work(struct work_struct *work) | 1125 | static void vnt_interrupt_work(struct work_struct *work) |
| @@ -1133,14 +1129,17 @@ static void vnt_interrupt_work(struct work_struct *work) | |||
| 1133 | 1129 | ||
| 1134 | if (priv->vif) | 1130 | if (priv->vif) |
| 1135 | vnt_interrupt_process(priv); | 1131 | vnt_interrupt_process(priv); |
| 1132 | |||
| 1133 | MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE); | ||
| 1136 | } | 1134 | } |
| 1137 | 1135 | ||
| 1138 | static irqreturn_t vnt_interrupt(int irq, void *arg) | 1136 | static irqreturn_t vnt_interrupt(int irq, void *arg) |
| 1139 | { | 1137 | { |
| 1140 | struct vnt_private *priv = arg; | 1138 | struct vnt_private *priv = arg; |
| 1141 | 1139 | ||
| 1142 | if (priv->vif) | 1140 | schedule_work(&priv->interrupt_work); |
| 1143 | schedule_work(&priv->interrupt_work); | 1141 | |
| 1142 | MACvIntDisable(priv->PortOffset); | ||
| 1144 | 1143 | ||
| 1145 | return IRQ_HANDLED; | 1144 | return IRQ_HANDLED; |
| 1146 | } | 1145 | } |
diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c index 0842b6e6af82..48963eab32f5 100644 --- a/drivers/tee/optee/core.c +++ b/drivers/tee/optee/core.c | |||
| @@ -419,9 +419,35 @@ static bool optee_msg_exchange_capabilities(optee_invoke_fn *invoke_fn, | |||
| 419 | return true; | 419 | return true; |
| 420 | } | 420 | } |
| 421 | 421 | ||
| 422 | static struct tee_shm_pool *optee_config_dyn_shm(void) | ||
| 423 | { | ||
| 424 | struct tee_shm_pool_mgr *priv_mgr; | ||
| 425 | struct tee_shm_pool_mgr *dmabuf_mgr; | ||
| 426 | void *rc; | ||
| 427 | |||
| 428 | rc = optee_shm_pool_alloc_pages(); | ||
| 429 | if (IS_ERR(rc)) | ||
| 430 | return rc; | ||
| 431 | priv_mgr = rc; | ||
| 432 | |||
| 433 | rc = optee_shm_pool_alloc_pages(); | ||
| 434 | if (IS_ERR(rc)) { | ||
| 435 | tee_shm_pool_mgr_destroy(priv_mgr); | ||
| 436 | return rc; | ||
| 437 | } | ||
| 438 | dmabuf_mgr = rc; | ||
| 439 | |||
| 440 | rc = tee_shm_pool_alloc(priv_mgr, dmabuf_mgr); | ||
| 441 | if (IS_ERR(rc)) { | ||
| 442 | tee_shm_pool_mgr_destroy(priv_mgr); | ||
| 443 | tee_shm_pool_mgr_destroy(dmabuf_mgr); | ||
| 444 | } | ||
| 445 | |||
| 446 | return rc; | ||
| 447 | } | ||
| 448 | |||
| 422 | static struct tee_shm_pool * | 449 | static struct tee_shm_pool * |
| 423 | optee_config_shm_memremap(optee_invoke_fn *invoke_fn, void **memremaped_shm, | 450 | optee_config_shm_memremap(optee_invoke_fn *invoke_fn, void **memremaped_shm) |
| 424 | u32 sec_caps) | ||
| 425 | { | 451 | { |
| 426 | union { | 452 | union { |
| 427 | struct arm_smccc_res smccc; | 453 | struct arm_smccc_res smccc; |
| @@ -436,10 +462,11 @@ optee_config_shm_memremap(optee_invoke_fn *invoke_fn, void **memremaped_shm, | |||
| 436 | struct tee_shm_pool_mgr *priv_mgr; | 462 | struct tee_shm_pool_mgr *priv_mgr; |
| 437 | struct tee_shm_pool_mgr *dmabuf_mgr; | 463 | struct tee_shm_pool_mgr *dmabuf_mgr; |
| 438 | void *rc; | 464 | void *rc; |
| 465 | const int sz = OPTEE_SHM_NUM_PRIV_PAGES * PAGE_SIZE; | ||
| 439 | 466 | ||
| 440 | invoke_fn(OPTEE_SMC_GET_SHM_CONFIG, 0, 0, 0, 0, 0, 0, 0, &res.smccc); | 467 | invoke_fn(OPTEE_SMC_GET_SHM_CONFIG, 0, 0, 0, 0, 0, 0, 0, &res.smccc); |
| 441 | if (res.result.status != OPTEE_SMC_RETURN_OK) { | 468 | if (res.result.status != OPTEE_SMC_RETURN_OK) { |
| 442 | pr_info("shm service not available\n"); | 469 | pr_err("static shm service not available\n"); |
| 443 | return ERR_PTR(-ENOENT); | 470 | return ERR_PTR(-ENOENT); |
| 444 | } | 471 | } |
| 445 | 472 | ||
| @@ -465,28 +492,15 @@ optee_config_shm_memremap(optee_invoke_fn *invoke_fn, void **memremaped_shm, | |||
| 465 | } | 492 | } |
| 466 | vaddr = (unsigned long)va; | 493 | vaddr = (unsigned long)va; |
| 467 | 494 | ||
| 468 | /* | 495 | rc = tee_shm_pool_mgr_alloc_res_mem(vaddr, paddr, sz, |
| 469 | * If OP-TEE can work with unregistered SHM, we will use own pool | 496 | 3 /* 8 bytes aligned */); |
| 470 | * for private shm | 497 | if (IS_ERR(rc)) |
| 471 | */ | 498 | goto err_memunmap; |
| 472 | if (sec_caps & OPTEE_SMC_SEC_CAP_DYNAMIC_SHM) { | 499 | priv_mgr = rc; |
| 473 | rc = optee_shm_pool_alloc_pages(); | 500 | |
| 474 | if (IS_ERR(rc)) | 501 | vaddr += sz; |
| 475 | goto err_memunmap; | 502 | paddr += sz; |
| 476 | priv_mgr = rc; | 503 | size -= sz; |
| 477 | } else { | ||
| 478 | const size_t sz = OPTEE_SHM_NUM_PRIV_PAGES * PAGE_SIZE; | ||
| 479 | |||
| 480 | rc = tee_shm_pool_mgr_alloc_res_mem(vaddr, paddr, sz, | ||
| 481 | 3 /* 8 bytes aligned */); | ||
| 482 | if (IS_ERR(rc)) | ||
| 483 | goto err_memunmap; | ||
| 484 | priv_mgr = rc; | ||
| 485 | |||
| 486 | vaddr += sz; | ||
| 487 | paddr += sz; | ||
| 488 | size -= sz; | ||
| 489 | } | ||
| 490 | 504 | ||
| 491 | rc = tee_shm_pool_mgr_alloc_res_mem(vaddr, paddr, size, PAGE_SHIFT); | 505 | rc = tee_shm_pool_mgr_alloc_res_mem(vaddr, paddr, size, PAGE_SHIFT); |
| 492 | if (IS_ERR(rc)) | 506 | if (IS_ERR(rc)) |
| @@ -552,7 +566,7 @@ static optee_invoke_fn *get_invoke_func(struct device_node *np) | |||
| 552 | static struct optee *optee_probe(struct device_node *np) | 566 | static struct optee *optee_probe(struct device_node *np) |
| 553 | { | 567 | { |
| 554 | optee_invoke_fn *invoke_fn; | 568 | optee_invoke_fn *invoke_fn; |
| 555 | struct tee_shm_pool *pool; | 569 | struct tee_shm_pool *pool = ERR_PTR(-EINVAL); |
| 556 | struct optee *optee = NULL; | 570 | struct optee *optee = NULL; |
| 557 | void *memremaped_shm = NULL; | 571 | void *memremaped_shm = NULL; |
| 558 | struct tee_device *teedev; | 572 | struct tee_device *teedev; |
| @@ -581,13 +595,17 @@ static struct optee *optee_probe(struct device_node *np) | |||
| 581 | } | 595 | } |
| 582 | 596 | ||
| 583 | /* | 597 | /* |
| 584 | * We have no other option for shared memory, if secure world | 598 | * Try to use dynamic shared memory if possible |
| 585 | * doesn't have any reserved memory we can use we can't continue. | ||
| 586 | */ | 599 | */ |
| 587 | if (!(sec_caps & OPTEE_SMC_SEC_CAP_HAVE_RESERVED_SHM)) | 600 | if (sec_caps & OPTEE_SMC_SEC_CAP_DYNAMIC_SHM) |
| 588 | return ERR_PTR(-EINVAL); | 601 | pool = optee_config_dyn_shm(); |
| 602 | |||
| 603 | /* | ||
| 604 | * If dynamic shared memory is not available or failed - try static one | ||
| 605 | */ | ||
| 606 | if (IS_ERR(pool) && (sec_caps & OPTEE_SMC_SEC_CAP_HAVE_RESERVED_SHM)) | ||
| 607 | pool = optee_config_shm_memremap(invoke_fn, &memremaped_shm); | ||
| 589 | 608 | ||
| 590 | pool = optee_config_shm_memremap(invoke_fn, &memremaped_shm, sec_caps); | ||
| 591 | if (IS_ERR(pool)) | 609 | if (IS_ERR(pool)) |
| 592 | return (void *)pool; | 610 | return (void *)pool; |
| 593 | 611 | ||
diff --git a/drivers/thermal/broadcom/bcm2835_thermal.c b/drivers/thermal/broadcom/bcm2835_thermal.c index 720760cd493f..ba39647a690c 100644 --- a/drivers/thermal/broadcom/bcm2835_thermal.c +++ b/drivers/thermal/broadcom/bcm2835_thermal.c | |||
| @@ -119,8 +119,7 @@ static const struct debugfs_reg32 bcm2835_thermal_regs[] = { | |||
| 119 | 119 | ||
| 120 | static void bcm2835_thermal_debugfs(struct platform_device *pdev) | 120 | static void bcm2835_thermal_debugfs(struct platform_device *pdev) |
| 121 | { | 121 | { |
| 122 | struct thermal_zone_device *tz = platform_get_drvdata(pdev); | 122 | struct bcm2835_thermal_data *data = platform_get_drvdata(pdev); |
| 123 | struct bcm2835_thermal_data *data = tz->devdata; | ||
| 124 | struct debugfs_regset32 *regset; | 123 | struct debugfs_regset32 *regset; |
| 125 | 124 | ||
| 126 | data->debugfsdir = debugfs_create_dir("bcm2835_thermal", NULL); | 125 | data->debugfsdir = debugfs_create_dir("bcm2835_thermal", NULL); |
| @@ -266,7 +265,7 @@ static int bcm2835_thermal_probe(struct platform_device *pdev) | |||
| 266 | 265 | ||
| 267 | data->tz = tz; | 266 | data->tz = tz; |
| 268 | 267 | ||
| 269 | platform_set_drvdata(pdev, tz); | 268 | platform_set_drvdata(pdev, data); |
| 270 | 269 | ||
| 271 | /* | 270 | /* |
| 272 | * Thermal_zone doesn't enable hwmon as default, | 271 | * Thermal_zone doesn't enable hwmon as default, |
| @@ -290,8 +289,8 @@ err_clk: | |||
| 290 | 289 | ||
| 291 | static int bcm2835_thermal_remove(struct platform_device *pdev) | 290 | static int bcm2835_thermal_remove(struct platform_device *pdev) |
| 292 | { | 291 | { |
| 293 | struct thermal_zone_device *tz = platform_get_drvdata(pdev); | 292 | struct bcm2835_thermal_data *data = platform_get_drvdata(pdev); |
| 294 | struct bcm2835_thermal_data *data = tz->devdata; | 293 | struct thermal_zone_device *tz = data->tz; |
| 295 | 294 | ||
| 296 | debugfs_remove_recursive(data->debugfsdir); | 295 | debugfs_remove_recursive(data->debugfsdir); |
| 297 | thermal_zone_of_sensor_unregister(&pdev->dev, tz); | 296 | thermal_zone_of_sensor_unregister(&pdev->dev, tz); |
diff --git a/drivers/thermal/cpu_cooling.c b/drivers/thermal/cpu_cooling.c index 6fff16113628..f7c1f49ec87f 100644 --- a/drivers/thermal/cpu_cooling.c +++ b/drivers/thermal/cpu_cooling.c | |||
| @@ -536,12 +536,11 @@ static int cpufreq_power2state(struct thermal_cooling_device *cdev, | |||
| 536 | struct thermal_zone_device *tz, u32 power, | 536 | struct thermal_zone_device *tz, u32 power, |
| 537 | unsigned long *state) | 537 | unsigned long *state) |
| 538 | { | 538 | { |
| 539 | unsigned int cur_freq, target_freq; | 539 | unsigned int target_freq; |
| 540 | u32 last_load, normalised_power; | 540 | u32 last_load, normalised_power; |
| 541 | struct cpufreq_cooling_device *cpufreq_cdev = cdev->devdata; | 541 | struct cpufreq_cooling_device *cpufreq_cdev = cdev->devdata; |
| 542 | struct cpufreq_policy *policy = cpufreq_cdev->policy; | 542 | struct cpufreq_policy *policy = cpufreq_cdev->policy; |
| 543 | 543 | ||
| 544 | cur_freq = cpufreq_quick_get(policy->cpu); | ||
| 545 | power = power > 0 ? power : 0; | 544 | power = power > 0 ? power : 0; |
| 546 | last_load = cpufreq_cdev->last_load ?: 1; | 545 | last_load = cpufreq_cdev->last_load ?: 1; |
| 547 | normalised_power = (power * 100) / last_load; | 546 | normalised_power = (power * 100) / last_load; |
diff --git a/drivers/thermal/intel/int340x_thermal/int3400_thermal.c b/drivers/thermal/intel/int340x_thermal/int3400_thermal.c index 61ca7ce3624e..5f3ed24e26ec 100644 --- a/drivers/thermal/intel/int340x_thermal/int3400_thermal.c +++ b/drivers/thermal/intel/int340x_thermal/int3400_thermal.c | |||
| @@ -22,6 +22,13 @@ enum int3400_thermal_uuid { | |||
| 22 | INT3400_THERMAL_PASSIVE_1, | 22 | INT3400_THERMAL_PASSIVE_1, |
| 23 | INT3400_THERMAL_ACTIVE, | 23 | INT3400_THERMAL_ACTIVE, |
| 24 | INT3400_THERMAL_CRITICAL, | 24 | INT3400_THERMAL_CRITICAL, |
| 25 | INT3400_THERMAL_ADAPTIVE_PERFORMANCE, | ||
| 26 | INT3400_THERMAL_EMERGENCY_CALL_MODE, | ||
| 27 | INT3400_THERMAL_PASSIVE_2, | ||
| 28 | INT3400_THERMAL_POWER_BOSS, | ||
| 29 | INT3400_THERMAL_VIRTUAL_SENSOR, | ||
| 30 | INT3400_THERMAL_COOLING_MODE, | ||
| 31 | INT3400_THERMAL_HARDWARE_DUTY_CYCLING, | ||
| 25 | INT3400_THERMAL_MAXIMUM_UUID, | 32 | INT3400_THERMAL_MAXIMUM_UUID, |
| 26 | }; | 33 | }; |
| 27 | 34 | ||
| @@ -29,6 +36,13 @@ static char *int3400_thermal_uuids[INT3400_THERMAL_MAXIMUM_UUID] = { | |||
| 29 | "42A441D6-AE6A-462b-A84B-4A8CE79027D3", | 36 | "42A441D6-AE6A-462b-A84B-4A8CE79027D3", |
| 30 | "3A95C389-E4B8-4629-A526-C52C88626BAE", | 37 | "3A95C389-E4B8-4629-A526-C52C88626BAE", |
| 31 | "97C68AE7-15FA-499c-B8C9-5DA81D606E0A", | 38 | "97C68AE7-15FA-499c-B8C9-5DA81D606E0A", |
| 39 | "63BE270F-1C11-48FD-A6F7-3AF253FF3E2D", | ||
| 40 | "5349962F-71E6-431D-9AE8-0A635B710AEE", | ||
| 41 | "9E04115A-AE87-4D1C-9500-0F3E340BFE75", | ||
| 42 | "F5A35014-C209-46A4-993A-EB56DE7530A1", | ||
| 43 | "6ED722A7-9240-48A5-B479-31EEF723D7CF", | ||
| 44 | "16CAF1B7-DD38-40ED-B1C1-1B8A1913D531", | ||
| 45 | "BE84BABF-C4D4-403D-B495-3128FD44dAC1", | ||
| 32 | }; | 46 | }; |
| 33 | 47 | ||
| 34 | struct int3400_thermal_priv { | 48 | struct int3400_thermal_priv { |
| @@ -299,10 +313,9 @@ static int int3400_thermal_probe(struct platform_device *pdev) | |||
| 299 | 313 | ||
| 300 | platform_set_drvdata(pdev, priv); | 314 | platform_set_drvdata(pdev, priv); |
| 301 | 315 | ||
| 302 | if (priv->uuid_bitmap & 1 << INT3400_THERMAL_PASSIVE_1) { | 316 | int3400_thermal_ops.get_mode = int3400_thermal_get_mode; |
| 303 | int3400_thermal_ops.get_mode = int3400_thermal_get_mode; | 317 | int3400_thermal_ops.set_mode = int3400_thermal_set_mode; |
| 304 | int3400_thermal_ops.set_mode = int3400_thermal_set_mode; | 318 | |
| 305 | } | ||
| 306 | priv->thermal = thermal_zone_device_register("INT3400 Thermal", 0, 0, | 319 | priv->thermal = thermal_zone_device_register("INT3400 Thermal", 0, 0, |
| 307 | priv, &int3400_thermal_ops, | 320 | priv, &int3400_thermal_ops, |
| 308 | &int3400_thermal_params, 0, 0); | 321 | &int3400_thermal_params, 0, 0); |
diff --git a/drivers/thermal/intel/intel_powerclamp.c b/drivers/thermal/intel/intel_powerclamp.c index 7571f7c2e7c9..ac7256b5f020 100644 --- a/drivers/thermal/intel/intel_powerclamp.c +++ b/drivers/thermal/intel/intel_powerclamp.c | |||
| @@ -101,7 +101,7 @@ struct powerclamp_worker_data { | |||
| 101 | bool clamping; | 101 | bool clamping; |
| 102 | }; | 102 | }; |
| 103 | 103 | ||
| 104 | static struct powerclamp_worker_data * __percpu worker_data; | 104 | static struct powerclamp_worker_data __percpu *worker_data; |
| 105 | static struct thermal_cooling_device *cooling_dev; | 105 | static struct thermal_cooling_device *cooling_dev; |
| 106 | static unsigned long *cpu_clamping_mask; /* bit map for tracking per cpu | 106 | static unsigned long *cpu_clamping_mask; /* bit map for tracking per cpu |
| 107 | * clamping kthread worker | 107 | * clamping kthread worker |
| @@ -494,7 +494,7 @@ static void start_power_clamp_worker(unsigned long cpu) | |||
| 494 | struct powerclamp_worker_data *w_data = per_cpu_ptr(worker_data, cpu); | 494 | struct powerclamp_worker_data *w_data = per_cpu_ptr(worker_data, cpu); |
| 495 | struct kthread_worker *worker; | 495 | struct kthread_worker *worker; |
| 496 | 496 | ||
| 497 | worker = kthread_create_worker_on_cpu(cpu, 0, "kidle_inject/%ld", cpu); | 497 | worker = kthread_create_worker_on_cpu(cpu, 0, "kidle_inj/%ld", cpu); |
| 498 | if (IS_ERR(worker)) | 498 | if (IS_ERR(worker)) |
| 499 | return; | 499 | return; |
| 500 | 500 | ||
diff --git a/drivers/thermal/mtk_thermal.c b/drivers/thermal/mtk_thermal.c index 5c07a61447d3..e4ea7f6aef20 100644 --- a/drivers/thermal/mtk_thermal.c +++ b/drivers/thermal/mtk_thermal.c | |||
| @@ -199,6 +199,9 @@ enum { | |||
| 199 | #define MT7622_TS1 0 | 199 | #define MT7622_TS1 0 |
| 200 | #define MT7622_NUM_CONTROLLER 1 | 200 | #define MT7622_NUM_CONTROLLER 1 |
| 201 | 201 | ||
| 202 | /* The maximum number of banks */ | ||
| 203 | #define MAX_NUM_ZONES 8 | ||
| 204 | |||
| 202 | /* The calibration coefficient of sensor */ | 205 | /* The calibration coefficient of sensor */ |
| 203 | #define MT7622_CALIBRATION 165 | 206 | #define MT7622_CALIBRATION 165 |
| 204 | 207 | ||
| @@ -249,7 +252,7 @@ struct mtk_thermal_data { | |||
| 249 | const int num_controller; | 252 | const int num_controller; |
| 250 | const int *controller_offset; | 253 | const int *controller_offset; |
| 251 | bool need_switch_bank; | 254 | bool need_switch_bank; |
| 252 | struct thermal_bank_cfg bank_data[]; | 255 | struct thermal_bank_cfg bank_data[MAX_NUM_ZONES]; |
| 253 | }; | 256 | }; |
| 254 | 257 | ||
| 255 | struct mtk_thermal { | 258 | struct mtk_thermal { |
| @@ -268,7 +271,7 @@ struct mtk_thermal { | |||
| 268 | s32 vts[MAX_NUM_VTS]; | 271 | s32 vts[MAX_NUM_VTS]; |
| 269 | 272 | ||
| 270 | const struct mtk_thermal_data *conf; | 273 | const struct mtk_thermal_data *conf; |
| 271 | struct mtk_thermal_bank banks[]; | 274 | struct mtk_thermal_bank banks[MAX_NUM_ZONES]; |
| 272 | }; | 275 | }; |
| 273 | 276 | ||
| 274 | /* MT8183 thermal sensor data */ | 277 | /* MT8183 thermal sensor data */ |
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 48eef552cba4..fc9399d9c082 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c | |||
| @@ -666,7 +666,7 @@ static int exynos_get_temp(void *p, int *temp) | |||
| 666 | struct exynos_tmu_data *data = p; | 666 | struct exynos_tmu_data *data = p; |
| 667 | int value, ret = 0; | 667 | int value, ret = 0; |
| 668 | 668 | ||
| 669 | if (!data || !data->tmu_read || !data->enabled) | 669 | if (!data || !data->tmu_read) |
| 670 | return -EINVAL; | 670 | return -EINVAL; |
| 671 | else if (!data->enabled) | 671 | else if (!data->enabled) |
| 672 | /* | 672 | /* |
diff --git a/drivers/tty/serial/ar933x_uart.c b/drivers/tty/serial/ar933x_uart.c index db5df3d54818..3bdd56a1021b 100644 --- a/drivers/tty/serial/ar933x_uart.c +++ b/drivers/tty/serial/ar933x_uart.c | |||
| @@ -49,11 +49,6 @@ struct ar933x_uart_port { | |||
| 49 | struct clk *clk; | 49 | struct clk *clk; |
| 50 | }; | 50 | }; |
| 51 | 51 | ||
| 52 | static inline bool ar933x_uart_console_enabled(void) | ||
| 53 | { | ||
| 54 | return IS_ENABLED(CONFIG_SERIAL_AR933X_CONSOLE); | ||
| 55 | } | ||
| 56 | |||
| 57 | static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, | 52 | static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, |
| 58 | int offset) | 53 | int offset) |
| 59 | { | 54 | { |
| @@ -508,6 +503,7 @@ static const struct uart_ops ar933x_uart_ops = { | |||
| 508 | .verify_port = ar933x_uart_verify_port, | 503 | .verify_port = ar933x_uart_verify_port, |
| 509 | }; | 504 | }; |
| 510 | 505 | ||
| 506 | #ifdef CONFIG_SERIAL_AR933X_CONSOLE | ||
| 511 | static struct ar933x_uart_port * | 507 | static struct ar933x_uart_port * |
| 512 | ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; | 508 | ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; |
| 513 | 509 | ||
| @@ -604,14 +600,7 @@ static struct console ar933x_uart_console = { | |||
| 604 | .index = -1, | 600 | .index = -1, |
| 605 | .data = &ar933x_uart_driver, | 601 | .data = &ar933x_uart_driver, |
| 606 | }; | 602 | }; |
| 607 | 603 | #endif /* CONFIG_SERIAL_AR933X_CONSOLE */ | |
| 608 | static void ar933x_uart_add_console_port(struct ar933x_uart_port *up) | ||
| 609 | { | ||
| 610 | if (!ar933x_uart_console_enabled()) | ||
| 611 | return; | ||
| 612 | |||
| 613 | ar933x_console_ports[up->port.line] = up; | ||
| 614 | } | ||
| 615 | 604 | ||
| 616 | static struct uart_driver ar933x_uart_driver = { | 605 | static struct uart_driver ar933x_uart_driver = { |
| 617 | .owner = THIS_MODULE, | 606 | .owner = THIS_MODULE, |
| @@ -700,7 +689,9 @@ static int ar933x_uart_probe(struct platform_device *pdev) | |||
| 700 | baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); | 689 | baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); |
| 701 | up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); | 690 | up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); |
| 702 | 691 | ||
| 703 | ar933x_uart_add_console_port(up); | 692 | #ifdef CONFIG_SERIAL_AR933X_CONSOLE |
| 693 | ar933x_console_ports[up->port.line] = up; | ||
| 694 | #endif | ||
| 704 | 695 | ||
| 705 | ret = uart_add_one_port(&ar933x_uart_driver, &up->port); | 696 | ret = uart_add_one_port(&ar933x_uart_driver, &up->port); |
| 706 | if (ret) | 697 | if (ret) |
| @@ -749,8 +740,9 @@ static int __init ar933x_uart_init(void) | |||
| 749 | { | 740 | { |
| 750 | int ret; | 741 | int ret; |
| 751 | 742 | ||
| 752 | if (ar933x_uart_console_enabled()) | 743 | #ifdef CONFIG_SERIAL_AR933X_CONSOLE |
| 753 | ar933x_uart_driver.cons = &ar933x_uart_console; | 744 | ar933x_uart_driver.cons = &ar933x_uart_console; |
| 745 | #endif | ||
| 754 | 746 | ||
| 755 | ret = uart_register_driver(&ar933x_uart_driver); | 747 | ret = uart_register_driver(&ar933x_uart_driver); |
| 756 | if (ret) | 748 | if (ret) |
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index 05147fe24343..0b4f36905321 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c | |||
| @@ -166,6 +166,8 @@ struct atmel_uart_port { | |||
| 166 | unsigned int pending_status; | 166 | unsigned int pending_status; |
| 167 | spinlock_t lock_suspended; | 167 | spinlock_t lock_suspended; |
| 168 | 168 | ||
| 169 | bool hd_start_rx; /* can start RX during half-duplex operation */ | ||
| 170 | |||
| 169 | /* ISO7816 */ | 171 | /* ISO7816 */ |
| 170 | unsigned int fidi_min; | 172 | unsigned int fidi_min; |
| 171 | unsigned int fidi_max; | 173 | unsigned int fidi_max; |
| @@ -231,6 +233,13 @@ static inline void atmel_uart_write_char(struct uart_port *port, u8 value) | |||
| 231 | __raw_writeb(value, port->membase + ATMEL_US_THR); | 233 | __raw_writeb(value, port->membase + ATMEL_US_THR); |
| 232 | } | 234 | } |
| 233 | 235 | ||
| 236 | static inline int atmel_uart_is_half_duplex(struct uart_port *port) | ||
| 237 | { | ||
| 238 | return ((port->rs485.flags & SER_RS485_ENABLED) && | ||
| 239 | !(port->rs485.flags & SER_RS485_RX_DURING_TX)) || | ||
| 240 | (port->iso7816.flags & SER_ISO7816_ENABLED); | ||
| 241 | } | ||
| 242 | |||
| 234 | #ifdef CONFIG_SERIAL_ATMEL_PDC | 243 | #ifdef CONFIG_SERIAL_ATMEL_PDC |
| 235 | static bool atmel_use_pdc_rx(struct uart_port *port) | 244 | static bool atmel_use_pdc_rx(struct uart_port *port) |
| 236 | { | 245 | { |
| @@ -608,10 +617,9 @@ static void atmel_stop_tx(struct uart_port *port) | |||
| 608 | /* Disable interrupts */ | 617 | /* Disable interrupts */ |
| 609 | atmel_uart_writel(port, ATMEL_US_IDR, atmel_port->tx_done_mask); | 618 | atmel_uart_writel(port, ATMEL_US_IDR, atmel_port->tx_done_mask); |
| 610 | 619 | ||
| 611 | if (((port->rs485.flags & SER_RS485_ENABLED) && | 620 | if (atmel_uart_is_half_duplex(port)) |
| 612 | !(port->rs485.flags & SER_RS485_RX_DURING_TX)) || | ||
| 613 | port->iso7816.flags & SER_ISO7816_ENABLED) | ||
| 614 | atmel_start_rx(port); | 621 | atmel_start_rx(port); |
| 622 | |||
| 615 | } | 623 | } |
| 616 | 624 | ||
| 617 | /* | 625 | /* |
| @@ -628,9 +636,7 @@ static void atmel_start_tx(struct uart_port *port) | |||
| 628 | return; | 636 | return; |
| 629 | 637 | ||
| 630 | if (atmel_use_pdc_tx(port) || atmel_use_dma_tx(port)) | 638 | if (atmel_use_pdc_tx(port) || atmel_use_dma_tx(port)) |
| 631 | if (((port->rs485.flags & SER_RS485_ENABLED) && | 639 | if (atmel_uart_is_half_duplex(port)) |
| 632 | !(port->rs485.flags & SER_RS485_RX_DURING_TX)) || | ||
| 633 | port->iso7816.flags & SER_ISO7816_ENABLED) | ||
| 634 | atmel_stop_rx(port); | 640 | atmel_stop_rx(port); |
| 635 | 641 | ||
| 636 | if (atmel_use_pdc_tx(port)) | 642 | if (atmel_use_pdc_tx(port)) |
| @@ -928,11 +934,14 @@ static void atmel_complete_tx_dma(void *arg) | |||
| 928 | */ | 934 | */ |
| 929 | if (!uart_circ_empty(xmit)) | 935 | if (!uart_circ_empty(xmit)) |
| 930 | atmel_tasklet_schedule(atmel_port, &atmel_port->tasklet_tx); | 936 | atmel_tasklet_schedule(atmel_port, &atmel_port->tasklet_tx); |
| 931 | else if (((port->rs485.flags & SER_RS485_ENABLED) && | 937 | else if (atmel_uart_is_half_duplex(port)) { |
| 932 | !(port->rs485.flags & SER_RS485_RX_DURING_TX)) || | 938 | /* |
| 933 | port->iso7816.flags & SER_ISO7816_ENABLED) { | 939 | * DMA done, re-enable TXEMPTY and signal that we can stop |
| 934 | /* DMA done, stop TX, start RX for RS485 */ | 940 | * TX and start RX for RS485 |
| 935 | atmel_start_rx(port); | 941 | */ |
| 942 | atmel_port->hd_start_rx = true; | ||
| 943 | atmel_uart_writel(port, ATMEL_US_IER, | ||
| 944 | atmel_port->tx_done_mask); | ||
| 936 | } | 945 | } |
| 937 | 946 | ||
| 938 | spin_unlock_irqrestore(&port->lock, flags); | 947 | spin_unlock_irqrestore(&port->lock, flags); |
| @@ -1288,6 +1297,10 @@ static int atmel_prepare_rx_dma(struct uart_port *port) | |||
| 1288 | sg_dma_len(&atmel_port->sg_rx)/2, | 1297 | sg_dma_len(&atmel_port->sg_rx)/2, |
| 1289 | DMA_DEV_TO_MEM, | 1298 | DMA_DEV_TO_MEM, |
| 1290 | DMA_PREP_INTERRUPT); | 1299 | DMA_PREP_INTERRUPT); |
| 1300 | if (!desc) { | ||
| 1301 | dev_err(port->dev, "Preparing DMA cyclic failed\n"); | ||
| 1302 | goto chan_err; | ||
| 1303 | } | ||
| 1291 | desc->callback = atmel_complete_rx_dma; | 1304 | desc->callback = atmel_complete_rx_dma; |
| 1292 | desc->callback_param = port; | 1305 | desc->callback_param = port; |
| 1293 | atmel_port->desc_rx = desc; | 1306 | atmel_port->desc_rx = desc; |
| @@ -1376,9 +1389,20 @@ atmel_handle_transmit(struct uart_port *port, unsigned int pending) | |||
| 1376 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); | 1389 | struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); |
| 1377 | 1390 | ||
| 1378 | if (pending & atmel_port->tx_done_mask) { | 1391 | if (pending & atmel_port->tx_done_mask) { |
| 1379 | /* Either PDC or interrupt transmission */ | ||
| 1380 | atmel_uart_writel(port, ATMEL_US_IDR, | 1392 | atmel_uart_writel(port, ATMEL_US_IDR, |
| 1381 | atmel_port->tx_done_mask); | 1393 | atmel_port->tx_done_mask); |
| 1394 | |||
| 1395 | /* Start RX if flag was set and FIFO is empty */ | ||
| 1396 | if (atmel_port->hd_start_rx) { | ||
| 1397 | if (!(atmel_uart_readl(port, ATMEL_US_CSR) | ||
| 1398 | & ATMEL_US_TXEMPTY)) | ||
| 1399 | dev_warn(port->dev, "Should start RX, but TX fifo is not empty\n"); | ||
| 1400 | |||
| 1401 | atmel_port->hd_start_rx = false; | ||
| 1402 | atmel_start_rx(port); | ||
| 1403 | return; | ||
| 1404 | } | ||
| 1405 | |||
| 1382 | atmel_tasklet_schedule(atmel_port, &atmel_port->tasklet_tx); | 1406 | atmel_tasklet_schedule(atmel_port, &atmel_port->tasklet_tx); |
| 1383 | } | 1407 | } |
| 1384 | } | 1408 | } |
| @@ -1508,9 +1532,7 @@ static void atmel_tx_pdc(struct uart_port *port) | |||
| 1508 | atmel_uart_writel(port, ATMEL_US_IER, | 1532 | atmel_uart_writel(port, ATMEL_US_IER, |
| 1509 | atmel_port->tx_done_mask); | 1533 | atmel_port->tx_done_mask); |
| 1510 | } else { | 1534 | } else { |
| 1511 | if (((port->rs485.flags & SER_RS485_ENABLED) && | 1535 | if (atmel_uart_is_half_duplex(port)) { |
| 1512 | !(port->rs485.flags & SER_RS485_RX_DURING_TX)) || | ||
| 1513 | port->iso7816.flags & SER_ISO7816_ENABLED) { | ||
| 1514 | /* DMA done, stop TX, start RX for RS485 */ | 1536 | /* DMA done, stop TX, start RX for RS485 */ |
| 1515 | atmel_start_rx(port); | 1537 | atmel_start_rx(port); |
| 1516 | } | 1538 | } |
diff --git a/drivers/tty/serial/kgdboc.c b/drivers/tty/serial/kgdboc.c index 6fb312e7af71..bfe5e9e034ec 100644 --- a/drivers/tty/serial/kgdboc.c +++ b/drivers/tty/serial/kgdboc.c | |||
| @@ -148,8 +148,10 @@ static int configure_kgdboc(void) | |||
| 148 | char *cptr = config; | 148 | char *cptr = config; |
| 149 | struct console *cons; | 149 | struct console *cons; |
| 150 | 150 | ||
| 151 | if (!strlen(config) || isspace(config[0])) | 151 | if (!strlen(config) || isspace(config[0])) { |
| 152 | err = 0; | ||
| 152 | goto noconfig; | 153 | goto noconfig; |
| 154 | } | ||
| 153 | 155 | ||
| 154 | kgdboc_io_ops.is_console = 0; | 156 | kgdboc_io_ops.is_console = 0; |
| 155 | kgdb_tty_driver = NULL; | 157 | kgdb_tty_driver = NULL; |
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c index f5bdde405627..450ba6d7996c 100644 --- a/drivers/tty/serial/max310x.c +++ b/drivers/tty/serial/max310x.c | |||
| @@ -1415,6 +1415,8 @@ static int max310x_spi_probe(struct spi_device *spi) | |||
| 1415 | if (spi->dev.of_node) { | 1415 | if (spi->dev.of_node) { |
| 1416 | const struct of_device_id *of_id = | 1416 | const struct of_device_id *of_id = |
| 1417 | of_match_device(max310x_dt_ids, &spi->dev); | 1417 | of_match_device(max310x_dt_ids, &spi->dev); |
| 1418 | if (!of_id) | ||
| 1419 | return -ENODEV; | ||
| 1418 | 1420 | ||
| 1419 | devtype = (struct max310x_devtype *)of_id->data; | 1421 | devtype = (struct max310x_devtype *)of_id->data; |
| 1420 | } else { | 1422 | } else { |
diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c index 231f751d1ef4..7e7b1559fa36 100644 --- a/drivers/tty/serial/mvebu-uart.c +++ b/drivers/tty/serial/mvebu-uart.c | |||
| @@ -810,6 +810,9 @@ static int mvebu_uart_probe(struct platform_device *pdev) | |||
| 810 | return -EINVAL; | 810 | return -EINVAL; |
| 811 | } | 811 | } |
| 812 | 812 | ||
| 813 | if (!match) | ||
| 814 | return -ENODEV; | ||
| 815 | |||
| 813 | /* Assume that all UART ports have a DT alias or none has */ | 816 | /* Assume that all UART ports have a DT alias or none has */ |
| 814 | id = of_alias_get_id(pdev->dev.of_node, "serial"); | 817 | id = of_alias_get_id(pdev->dev.of_node, "serial"); |
| 815 | if (!pdev->dev.of_node || id < 0) | 818 | if (!pdev->dev.of_node || id < 0) |
diff --git a/drivers/tty/serial/mxs-auart.c b/drivers/tty/serial/mxs-auart.c index 27235a526cce..4c188f4079b3 100644 --- a/drivers/tty/serial/mxs-auart.c +++ b/drivers/tty/serial/mxs-auart.c | |||
| @@ -1686,6 +1686,10 @@ static int mxs_auart_probe(struct platform_device *pdev) | |||
| 1686 | 1686 | ||
| 1687 | s->port.mapbase = r->start; | 1687 | s->port.mapbase = r->start; |
| 1688 | s->port.membase = ioremap(r->start, resource_size(r)); | 1688 | s->port.membase = ioremap(r->start, resource_size(r)); |
| 1689 | if (!s->port.membase) { | ||
| 1690 | ret = -ENOMEM; | ||
| 1691 | goto out_disable_clks; | ||
| 1692 | } | ||
| 1689 | s->port.ops = &mxs_auart_ops; | 1693 | s->port.ops = &mxs_auart_ops; |
| 1690 | s->port.iotype = UPIO_MEM; | 1694 | s->port.iotype = UPIO_MEM; |
| 1691 | s->port.fifosize = MXS_AUART_FIFO_SIZE; | 1695 | s->port.fifosize = MXS_AUART_FIFO_SIZE; |
diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index 3bcec1c20219..35e5f9c5d5be 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c | |||
| @@ -1050,7 +1050,7 @@ static int __init qcom_geni_console_setup(struct console *co, char *options) | |||
| 1050 | { | 1050 | { |
| 1051 | struct uart_port *uport; | 1051 | struct uart_port *uport; |
| 1052 | struct qcom_geni_serial_port *port; | 1052 | struct qcom_geni_serial_port *port; |
| 1053 | int baud; | 1053 | int baud = 9600; |
| 1054 | int bits = 8; | 1054 | int bits = 8; |
| 1055 | int parity = 'n'; | 1055 | int parity = 'n'; |
| 1056 | int flow = 'n'; | 1056 | int flow = 'n'; |
diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index 635178cf3eed..09a183dfc526 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c | |||
| @@ -1507,7 +1507,7 @@ static int __init sc16is7xx_init(void) | |||
| 1507 | ret = i2c_add_driver(&sc16is7xx_i2c_uart_driver); | 1507 | ret = i2c_add_driver(&sc16is7xx_i2c_uart_driver); |
| 1508 | if (ret < 0) { | 1508 | if (ret < 0) { |
| 1509 | pr_err("failed to init sc16is7xx i2c --> %d\n", ret); | 1509 | pr_err("failed to init sc16is7xx i2c --> %d\n", ret); |
| 1510 | return ret; | 1510 | goto err_i2c; |
| 1511 | } | 1511 | } |
| 1512 | #endif | 1512 | #endif |
| 1513 | 1513 | ||
| @@ -1515,10 +1515,18 @@ static int __init sc16is7xx_init(void) | |||
| 1515 | ret = spi_register_driver(&sc16is7xx_spi_uart_driver); | 1515 | ret = spi_register_driver(&sc16is7xx_spi_uart_driver); |
| 1516 | if (ret < 0) { | 1516 | if (ret < 0) { |
| 1517 | pr_err("failed to init sc16is7xx spi --> %d\n", ret); | 1517 | pr_err("failed to init sc16is7xx spi --> %d\n", ret); |
| 1518 | return ret; | 1518 | goto err_spi; |
| 1519 | } | 1519 | } |
| 1520 | #endif | 1520 | #endif |
| 1521 | return ret; | 1521 | return ret; |
| 1522 | |||
| 1523 | err_spi: | ||
| 1524 | #ifdef CONFIG_SERIAL_SC16IS7XX_I2C | ||
| 1525 | i2c_del_driver(&sc16is7xx_i2c_uart_driver); | ||
| 1526 | #endif | ||
| 1527 | err_i2c: | ||
| 1528 | uart_unregister_driver(&sc16is7xx_uart); | ||
| 1529 | return ret; | ||
| 1522 | } | 1530 | } |
| 1523 | module_init(sc16is7xx_init); | 1531 | module_init(sc16is7xx_init); |
| 1524 | 1532 | ||
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 060fcd42b6d5..2d1c626312cd 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c | |||
| @@ -838,19 +838,9 @@ static void sci_transmit_chars(struct uart_port *port) | |||
| 838 | 838 | ||
| 839 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | 839 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 840 | uart_write_wakeup(port); | 840 | uart_write_wakeup(port); |
| 841 | if (uart_circ_empty(xmit)) { | 841 | if (uart_circ_empty(xmit)) |
| 842 | sci_stop_tx(port); | 842 | sci_stop_tx(port); |
| 843 | } else { | ||
| 844 | ctrl = serial_port_in(port, SCSCR); | ||
| 845 | |||
| 846 | if (port->type != PORT_SCI) { | ||
| 847 | serial_port_in(port, SCxSR); /* Dummy read */ | ||
| 848 | sci_clear_SCxSR(port, SCxSR_TDxE_CLEAR(port)); | ||
| 849 | } | ||
| 850 | 843 | ||
| 851 | ctrl |= SCSCR_TIE; | ||
| 852 | serial_port_out(port, SCSCR, ctrl); | ||
| 853 | } | ||
| 854 | } | 844 | } |
| 855 | 845 | ||
| 856 | /* On SH3, SCIF may read end-of-break as a space->mark char */ | 846 | /* On SH3, SCIF may read end-of-break as a space->mark char */ |
diff --git a/drivers/tty/tty_port.c b/drivers/tty/tty_port.c index 044c3cbdcfa4..a9e12b3bc31d 100644 --- a/drivers/tty/tty_port.c +++ b/drivers/tty/tty_port.c | |||
| @@ -325,7 +325,7 @@ static void tty_port_shutdown(struct tty_port *port, struct tty_struct *tty) | |||
| 325 | if (tty && C_HUPCL(tty)) | 325 | if (tty && C_HUPCL(tty)) |
| 326 | tty_port_lower_dtr_rts(port); | 326 | tty_port_lower_dtr_rts(port); |
| 327 | 327 | ||
| 328 | if (port->ops->shutdown) | 328 | if (port->ops && port->ops->shutdown) |
| 329 | port->ops->shutdown(port); | 329 | port->ops->shutdown(port); |
| 330 | } | 330 | } |
| 331 | out: | 331 | out: |
| @@ -398,7 +398,7 @@ EXPORT_SYMBOL_GPL(tty_port_tty_wakeup); | |||
| 398 | */ | 398 | */ |
| 399 | int tty_port_carrier_raised(struct tty_port *port) | 399 | int tty_port_carrier_raised(struct tty_port *port) |
| 400 | { | 400 | { |
| 401 | if (port->ops->carrier_raised == NULL) | 401 | if (!port->ops || !port->ops->carrier_raised) |
| 402 | return 1; | 402 | return 1; |
| 403 | return port->ops->carrier_raised(port); | 403 | return port->ops->carrier_raised(port); |
| 404 | } | 404 | } |
| @@ -414,7 +414,7 @@ EXPORT_SYMBOL(tty_port_carrier_raised); | |||
| 414 | */ | 414 | */ |
| 415 | void tty_port_raise_dtr_rts(struct tty_port *port) | 415 | void tty_port_raise_dtr_rts(struct tty_port *port) |
| 416 | { | 416 | { |
| 417 | if (port->ops->dtr_rts) | 417 | if (port->ops && port->ops->dtr_rts) |
| 418 | port->ops->dtr_rts(port, 1); | 418 | port->ops->dtr_rts(port, 1); |
| 419 | } | 419 | } |
| 420 | EXPORT_SYMBOL(tty_port_raise_dtr_rts); | 420 | EXPORT_SYMBOL(tty_port_raise_dtr_rts); |
| @@ -429,7 +429,7 @@ EXPORT_SYMBOL(tty_port_raise_dtr_rts); | |||
| 429 | */ | 429 | */ |
| 430 | void tty_port_lower_dtr_rts(struct tty_port *port) | 430 | void tty_port_lower_dtr_rts(struct tty_port *port) |
| 431 | { | 431 | { |
| 432 | if (port->ops->dtr_rts) | 432 | if (port->ops && port->ops->dtr_rts) |
| 433 | port->ops->dtr_rts(port, 0); | 433 | port->ops->dtr_rts(port, 0); |
| 434 | } | 434 | } |
| 435 | EXPORT_SYMBOL(tty_port_lower_dtr_rts); | 435 | EXPORT_SYMBOL(tty_port_lower_dtr_rts); |
| @@ -684,7 +684,7 @@ int tty_port_open(struct tty_port *port, struct tty_struct *tty, | |||
| 684 | 684 | ||
| 685 | if (!tty_port_initialized(port)) { | 685 | if (!tty_port_initialized(port)) { |
| 686 | clear_bit(TTY_IO_ERROR, &tty->flags); | 686 | clear_bit(TTY_IO_ERROR, &tty->flags); |
| 687 | if (port->ops->activate) { | 687 | if (port->ops && port->ops->activate) { |
| 688 | int retval = port->ops->activate(port, tty); | 688 | int retval = port->ops->activate(port, tty); |
| 689 | if (retval) { | 689 | if (retval) { |
| 690 | mutex_unlock(&port->mutex); | 690 | mutex_unlock(&port->mutex); |
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c index 739f8960811a..ec666eb4b7b4 100644 --- a/drivers/usb/class/cdc-acm.c +++ b/drivers/usb/class/cdc-acm.c | |||
| @@ -558,10 +558,8 @@ static void acm_softint(struct work_struct *work) | |||
| 558 | clear_bit(EVENT_RX_STALL, &acm->flags); | 558 | clear_bit(EVENT_RX_STALL, &acm->flags); |
| 559 | } | 559 | } |
| 560 | 560 | ||
| 561 | if (test_bit(EVENT_TTY_WAKEUP, &acm->flags)) { | 561 | if (test_and_clear_bit(EVENT_TTY_WAKEUP, &acm->flags)) |
| 562 | tty_port_tty_wakeup(&acm->port); | 562 | tty_port_tty_wakeup(&acm->port); |
| 563 | clear_bit(EVENT_TTY_WAKEUP, &acm->flags); | ||
| 564 | } | ||
| 565 | } | 563 | } |
| 566 | 564 | ||
| 567 | /* | 565 | /* |
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c index 48277bbc15e4..73c8e6591746 100644 --- a/drivers/usb/common/common.c +++ b/drivers/usb/common/common.c | |||
| @@ -145,6 +145,8 @@ enum usb_dr_mode of_usb_get_dr_mode_by_phy(struct device_node *np, int arg0) | |||
| 145 | 145 | ||
| 146 | do { | 146 | do { |
| 147 | controller = of_find_node_with_property(controller, "phys"); | 147 | controller = of_find_node_with_property(controller, "phys"); |
| 148 | if (!of_device_is_available(controller)) | ||
| 149 | continue; | ||
| 148 | index = 0; | 150 | index = 0; |
| 149 | do { | 151 | do { |
| 150 | if (arg0 == -1) { | 152 | if (arg0 == -1) { |
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c index 3189181bb628..975d7c1288e3 100644 --- a/drivers/usb/core/hcd.c +++ b/drivers/usb/core/hcd.c | |||
| @@ -2742,6 +2742,9 @@ int usb_add_hcd(struct usb_hcd *hcd, | |||
| 2742 | retval = usb_phy_roothub_set_mode(hcd->phy_roothub, | 2742 | retval = usb_phy_roothub_set_mode(hcd->phy_roothub, |
| 2743 | PHY_MODE_USB_HOST_SS); | 2743 | PHY_MODE_USB_HOST_SS); |
| 2744 | if (retval) | 2744 | if (retval) |
| 2745 | retval = usb_phy_roothub_set_mode(hcd->phy_roothub, | ||
| 2746 | PHY_MODE_USB_HOST); | ||
| 2747 | if (retval) | ||
| 2745 | goto err_usb_phy_roothub_power_on; | 2748 | goto err_usb_phy_roothub_power_on; |
| 2746 | 2749 | ||
| 2747 | retval = usb_phy_roothub_power_on(hcd->phy_roothub); | 2750 | retval = usb_phy_roothub_power_on(hcd->phy_roothub); |
diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c index fdc6e4e403e8..8cced3609e24 100644 --- a/drivers/usb/dwc3/dwc3-pci.c +++ b/drivers/usb/dwc3/dwc3-pci.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa | 29 | #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa |
| 30 | #define PCI_DEVICE_ID_INTEL_APL 0x5aaa | 30 | #define PCI_DEVICE_ID_INTEL_APL 0x5aaa |
| 31 | #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0 | 31 | #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0 |
| 32 | #define PCI_DEVICE_ID_INTEL_CMLH 0x02ee | ||
| 32 | #define PCI_DEVICE_ID_INTEL_GLK 0x31aa | 33 | #define PCI_DEVICE_ID_INTEL_GLK 0x31aa |
| 33 | #define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee | 34 | #define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee |
| 34 | #define PCI_DEVICE_ID_INTEL_CNPH 0xa36e | 35 | #define PCI_DEVICE_ID_INTEL_CNPH 0xa36e |
| @@ -305,6 +306,9 @@ static const struct pci_device_id dwc3_pci_id_table[] = { | |||
| 305 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD), | 306 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD), |
| 306 | (kernel_ulong_t) &dwc3_pci_mrfld_properties, }, | 307 | (kernel_ulong_t) &dwc3_pci_mrfld_properties, }, |
| 307 | 308 | ||
| 309 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CMLH), | ||
| 310 | (kernel_ulong_t) &dwc3_pci_intel_properties, }, | ||
| 311 | |||
| 308 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTLP), | 312 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SPTLP), |
| 309 | (kernel_ulong_t) &dwc3_pci_intel_properties, }, | 313 | (kernel_ulong_t) &dwc3_pci_intel_properties, }, |
| 310 | 314 | ||
diff --git a/drivers/usb/gadget/function/f_hid.c b/drivers/usb/gadget/function/f_hid.c index 75b113a5b25c..f3816a5c861e 100644 --- a/drivers/usb/gadget/function/f_hid.c +++ b/drivers/usb/gadget/function/f_hid.c | |||
| @@ -391,20 +391,20 @@ try_again: | |||
| 391 | req->complete = f_hidg_req_complete; | 391 | req->complete = f_hidg_req_complete; |
| 392 | req->context = hidg; | 392 | req->context = hidg; |
| 393 | 393 | ||
| 394 | spin_unlock_irqrestore(&hidg->write_spinlock, flags); | ||
| 395 | |||
| 394 | status = usb_ep_queue(hidg->in_ep, req, GFP_ATOMIC); | 396 | status = usb_ep_queue(hidg->in_ep, req, GFP_ATOMIC); |
| 395 | if (status < 0) { | 397 | if (status < 0) { |
| 396 | ERROR(hidg->func.config->cdev, | 398 | ERROR(hidg->func.config->cdev, |
| 397 | "usb_ep_queue error on int endpoint %zd\n", status); | 399 | "usb_ep_queue error on int endpoint %zd\n", status); |
| 398 | goto release_write_pending_unlocked; | 400 | goto release_write_pending; |
| 399 | } else { | 401 | } else { |
| 400 | status = count; | 402 | status = count; |
| 401 | } | 403 | } |
| 402 | spin_unlock_irqrestore(&hidg->write_spinlock, flags); | ||
| 403 | 404 | ||
| 404 | return status; | 405 | return status; |
| 405 | release_write_pending: | 406 | release_write_pending: |
| 406 | spin_lock_irqsave(&hidg->write_spinlock, flags); | 407 | spin_lock_irqsave(&hidg->write_spinlock, flags); |
| 407 | release_write_pending_unlocked: | ||
| 408 | hidg->write_pending = 0; | 408 | hidg->write_pending = 0; |
| 409 | spin_unlock_irqrestore(&hidg->write_spinlock, flags); | 409 | spin_unlock_irqrestore(&hidg->write_spinlock, flags); |
| 410 | 410 | ||
diff --git a/drivers/usb/gadget/udc/net2272.c b/drivers/usb/gadget/udc/net2272.c index b77f3126580e..c2011cd7df8c 100644 --- a/drivers/usb/gadget/udc/net2272.c +++ b/drivers/usb/gadget/udc/net2272.c | |||
| @@ -945,6 +945,7 @@ net2272_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |||
| 945 | break; | 945 | break; |
| 946 | } | 946 | } |
| 947 | if (&req->req != _req) { | 947 | if (&req->req != _req) { |
| 948 | ep->stopped = stopped; | ||
| 948 | spin_unlock_irqrestore(&ep->dev->lock, flags); | 949 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
| 949 | return -EINVAL; | 950 | return -EINVAL; |
| 950 | } | 951 | } |
diff --git a/drivers/usb/gadget/udc/net2280.c b/drivers/usb/gadget/udc/net2280.c index f63f82450bf4..898339e5df10 100644 --- a/drivers/usb/gadget/udc/net2280.c +++ b/drivers/usb/gadget/udc/net2280.c | |||
| @@ -866,9 +866,6 @@ static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma) | |||
| 866 | (void) readl(&ep->dev->pci->pcimstctl); | 866 | (void) readl(&ep->dev->pci->pcimstctl); |
| 867 | 867 | ||
| 868 | writel(BIT(DMA_START), &dma->dmastat); | 868 | writel(BIT(DMA_START), &dma->dmastat); |
| 869 | |||
| 870 | if (!ep->is_in) | ||
| 871 | stop_out_naking(ep); | ||
| 872 | } | 869 | } |
| 873 | 870 | ||
| 874 | static void start_dma(struct net2280_ep *ep, struct net2280_request *req) | 871 | static void start_dma(struct net2280_ep *ep, struct net2280_request *req) |
| @@ -907,6 +904,7 @@ static void start_dma(struct net2280_ep *ep, struct net2280_request *req) | |||
| 907 | writel(BIT(DMA_START), &dma->dmastat); | 904 | writel(BIT(DMA_START), &dma->dmastat); |
| 908 | return; | 905 | return; |
| 909 | } | 906 | } |
| 907 | stop_out_naking(ep); | ||
| 910 | } | 908 | } |
| 911 | 909 | ||
| 912 | tmp = dmactl_default; | 910 | tmp = dmactl_default; |
| @@ -1275,9 +1273,9 @@ static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |||
| 1275 | break; | 1273 | break; |
| 1276 | } | 1274 | } |
| 1277 | if (&req->req != _req) { | 1275 | if (&req->req != _req) { |
| 1276 | ep->stopped = stopped; | ||
| 1278 | spin_unlock_irqrestore(&ep->dev->lock, flags); | 1277 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
| 1279 | dev_err(&ep->dev->pdev->dev, "%s: Request mismatch\n", | 1278 | ep_dbg(ep->dev, "%s: Request mismatch\n", __func__); |
| 1280 | __func__); | ||
| 1281 | return -EINVAL; | 1279 | return -EINVAL; |
| 1282 | } | 1280 | } |
| 1283 | 1281 | ||
diff --git a/drivers/usb/host/u132-hcd.c b/drivers/usb/host/u132-hcd.c index 934584f0a20a..6343fbacd244 100644 --- a/drivers/usb/host/u132-hcd.c +++ b/drivers/usb/host/u132-hcd.c | |||
| @@ -3204,6 +3204,9 @@ static int __init u132_hcd_init(void) | |||
| 3204 | printk(KERN_INFO "driver %s\n", hcd_name); | 3204 | printk(KERN_INFO "driver %s\n", hcd_name); |
| 3205 | workqueue = create_singlethread_workqueue("u132"); | 3205 | workqueue = create_singlethread_workqueue("u132"); |
| 3206 | retval = platform_driver_register(&u132_platform_driver); | 3206 | retval = platform_driver_register(&u132_platform_driver); |
| 3207 | if (retval) | ||
| 3208 | destroy_workqueue(workqueue); | ||
| 3209 | |||
| 3207 | return retval; | 3210 | return retval; |
| 3208 | } | 3211 | } |
| 3209 | 3212 | ||
diff --git a/drivers/usb/host/xhci-dbgcap.c b/drivers/usb/host/xhci-dbgcap.c index c78be578abb0..d932cc31711e 100644 --- a/drivers/usb/host/xhci-dbgcap.c +++ b/drivers/usb/host/xhci-dbgcap.c | |||
| @@ -516,7 +516,6 @@ static int xhci_do_dbc_stop(struct xhci_hcd *xhci) | |||
| 516 | return -1; | 516 | return -1; |
| 517 | 517 | ||
| 518 | writel(0, &dbc->regs->control); | 518 | writel(0, &dbc->regs->control); |
| 519 | xhci_dbc_mem_cleanup(xhci); | ||
| 520 | dbc->state = DS_DISABLED; | 519 | dbc->state = DS_DISABLED; |
| 521 | 520 | ||
| 522 | return 0; | 521 | return 0; |
| @@ -562,8 +561,10 @@ static void xhci_dbc_stop(struct xhci_hcd *xhci) | |||
| 562 | ret = xhci_do_dbc_stop(xhci); | 561 | ret = xhci_do_dbc_stop(xhci); |
| 563 | spin_unlock_irqrestore(&dbc->lock, flags); | 562 | spin_unlock_irqrestore(&dbc->lock, flags); |
| 564 | 563 | ||
| 565 | if (!ret) | 564 | if (!ret) { |
| 565 | xhci_dbc_mem_cleanup(xhci); | ||
| 566 | pm_runtime_put_sync(xhci_to_hcd(xhci)->self.controller); | 566 | pm_runtime_put_sync(xhci_to_hcd(xhci)->self.controller); |
| 567 | } | ||
| 567 | } | 568 | } |
| 568 | 569 | ||
| 569 | static void | 570 | static void |
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c index e2eece693655..96a740543183 100644 --- a/drivers/usb/host/xhci-hub.c +++ b/drivers/usb/host/xhci-hub.c | |||
| @@ -1545,20 +1545,25 @@ int xhci_bus_suspend(struct usb_hcd *hcd) | |||
| 1545 | port_index = max_ports; | 1545 | port_index = max_ports; |
| 1546 | while (port_index--) { | 1546 | while (port_index--) { |
| 1547 | u32 t1, t2; | 1547 | u32 t1, t2; |
| 1548 | 1548 | int retries = 10; | |
| 1549 | retry: | ||
| 1549 | t1 = readl(ports[port_index]->addr); | 1550 | t1 = readl(ports[port_index]->addr); |
| 1550 | t2 = xhci_port_state_to_neutral(t1); | 1551 | t2 = xhci_port_state_to_neutral(t1); |
| 1551 | portsc_buf[port_index] = 0; | 1552 | portsc_buf[port_index] = 0; |
| 1552 | 1553 | ||
| 1553 | /* Bail out if a USB3 port has a new device in link training */ | 1554 | /* |
| 1554 | if ((hcd->speed >= HCD_USB3) && | 1555 | * Give a USB3 port in link training time to finish, but don't |
| 1556 | * prevent suspend as port might be stuck | ||
| 1557 | */ | ||
| 1558 | if ((hcd->speed >= HCD_USB3) && retries-- && | ||
| 1555 | (t1 & PORT_PLS_MASK) == XDEV_POLLING) { | 1559 | (t1 & PORT_PLS_MASK) == XDEV_POLLING) { |
| 1556 | bus_state->bus_suspended = 0; | ||
| 1557 | spin_unlock_irqrestore(&xhci->lock, flags); | 1560 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 1558 | xhci_dbg(xhci, "Bus suspend bailout, port in polling\n"); | 1561 | msleep(XHCI_PORT_POLLING_LFPS_TIME); |
| 1559 | return -EBUSY; | 1562 | spin_lock_irqsave(&xhci->lock, flags); |
| 1563 | xhci_dbg(xhci, "port %d polling in bus suspend, waiting\n", | ||
| 1564 | port_index); | ||
| 1565 | goto retry; | ||
| 1560 | } | 1566 | } |
| 1561 | |||
| 1562 | /* suspend ports in U0, or bail out for new connect changes */ | 1567 | /* suspend ports in U0, or bail out for new connect changes */ |
| 1563 | if ((t1 & PORT_PE) && (t1 & PORT_PLS_MASK) == XDEV_U0) { | 1568 | if ((t1 & PORT_PE) && (t1 & PORT_PLS_MASK) == XDEV_U0) { |
| 1564 | if ((t1 & PORT_CSC) && wake_enabled) { | 1569 | if ((t1 & PORT_CSC) && wake_enabled) { |
diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c index a6e463715779..671bce18782c 100644 --- a/drivers/usb/host/xhci-rcar.c +++ b/drivers/usb/host/xhci-rcar.c | |||
| @@ -246,6 +246,7 @@ int xhci_rcar_init_quirk(struct usb_hcd *hcd) | |||
| 246 | if (!xhci_rcar_wait_for_pll_active(hcd)) | 246 | if (!xhci_rcar_wait_for_pll_active(hcd)) |
| 247 | return -ETIMEDOUT; | 247 | return -ETIMEDOUT; |
| 248 | 248 | ||
| 249 | xhci->quirks |= XHCI_TRUST_TX_LENGTH; | ||
| 249 | return xhci_rcar_download_firmware(hcd); | 250 | return xhci_rcar_download_firmware(hcd); |
| 250 | } | 251 | } |
| 251 | 252 | ||
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 40fa25c4d041..9215a28dad40 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
| @@ -1647,10 +1647,13 @@ static void handle_port_status(struct xhci_hcd *xhci, | |||
| 1647 | } | 1647 | } |
| 1648 | } | 1648 | } |
| 1649 | 1649 | ||
| 1650 | if ((portsc & PORT_PLC) && (portsc & PORT_PLS_MASK) == XDEV_U0 && | 1650 | if ((portsc & PORT_PLC) && |
| 1651 | DEV_SUPERSPEED_ANY(portsc)) { | 1651 | DEV_SUPERSPEED_ANY(portsc) && |
| 1652 | ((portsc & PORT_PLS_MASK) == XDEV_U0 || | ||
| 1653 | (portsc & PORT_PLS_MASK) == XDEV_U1 || | ||
| 1654 | (portsc & PORT_PLS_MASK) == XDEV_U2)) { | ||
| 1652 | xhci_dbg(xhci, "resume SS port %d finished\n", port_id); | 1655 | xhci_dbg(xhci, "resume SS port %d finished\n", port_id); |
| 1653 | /* We've just brought the device into U0 through either the | 1656 | /* We've just brought the device into U0/1/2 through either the |
| 1654 | * Resume state after a device remote wakeup, or through the | 1657 | * Resume state after a device remote wakeup, or through the |
| 1655 | * U3Exit state after a host-initiated resume. If it's a device | 1658 | * U3Exit state after a host-initiated resume. If it's a device |
| 1656 | * initiated remote wake, don't pass up the link state change, | 1659 | * initiated remote wake, don't pass up the link state change, |
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 652dc36e3012..9334cdee382a 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h | |||
| @@ -452,6 +452,14 @@ struct xhci_op_regs { | |||
| 452 | */ | 452 | */ |
| 453 | #define XHCI_DEFAULT_BESL 4 | 453 | #define XHCI_DEFAULT_BESL 4 |
| 454 | 454 | ||
| 455 | /* | ||
| 456 | * USB3 specification define a 360ms tPollingLFPSTiemout for USB3 ports | ||
| 457 | * to complete link training. usually link trainig completes much faster | ||
| 458 | * so check status 10 times with 36ms sleep in places we need to wait for | ||
| 459 | * polling to complete. | ||
| 460 | */ | ||
| 461 | #define XHCI_PORT_POLLING_LFPS_TIME 36 | ||
| 462 | |||
| 455 | /** | 463 | /** |
| 456 | * struct xhci_intr_reg - Interrupt Register Set | 464 | * struct xhci_intr_reg - Interrupt Register Set |
| 457 | * @irq_pending: IMAN - Interrupt Management Register. Used to enable | 465 | * @irq_pending: IMAN - Interrupt Management Register. Used to enable |
diff --git a/drivers/usb/misc/usb251xb.c b/drivers/usb/misc/usb251xb.c index 4d72b7d1d383..04684849d683 100644 --- a/drivers/usb/misc/usb251xb.c +++ b/drivers/usb/misc/usb251xb.c | |||
| @@ -547,7 +547,7 @@ static int usb251xb_get_ofdata(struct usb251xb *hub, | |||
| 547 | */ | 547 | */ |
| 548 | hub->port_swap = USB251XB_DEF_PORT_SWAP; | 548 | hub->port_swap = USB251XB_DEF_PORT_SWAP; |
| 549 | of_property_for_each_u32(np, "swap-dx-lanes", prop, p, port) { | 549 | of_property_for_each_u32(np, "swap-dx-lanes", prop, p, port) { |
| 550 | if ((port >= 0) && (port <= data->port_cnt)) | 550 | if (port <= data->port_cnt) |
| 551 | hub->port_swap |= BIT(port); | 551 | hub->port_swap |= BIT(port); |
| 552 | } | 552 | } |
| 553 | 553 | ||
| @@ -612,7 +612,7 @@ static int usb251xb_probe(struct usb251xb *hub) | |||
| 612 | dev); | 612 | dev); |
| 613 | int err; | 613 | int err; |
| 614 | 614 | ||
| 615 | if (np) { | 615 | if (np && of_id) { |
| 616 | err = usb251xb_get_ofdata(hub, | 616 | err = usb251xb_get_ofdata(hub, |
| 617 | (struct usb251xb_data *)of_id->data); | 617 | (struct usb251xb_data *)of_id->data); |
| 618 | if (err) { | 618 | if (err) { |
diff --git a/drivers/usb/mtu3/Kconfig b/drivers/usb/mtu3/Kconfig index bcc23486c4ed..928c2cd6fc00 100644 --- a/drivers/usb/mtu3/Kconfig +++ b/drivers/usb/mtu3/Kconfig | |||
| @@ -6,6 +6,7 @@ config USB_MTU3 | |||
| 6 | tristate "MediaTek USB3 Dual Role controller" | 6 | tristate "MediaTek USB3 Dual Role controller" |
| 7 | depends on USB || USB_GADGET | 7 | depends on USB || USB_GADGET |
| 8 | depends on ARCH_MEDIATEK || COMPILE_TEST | 8 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 9 | depends on EXTCON || !EXTCON | ||
| 9 | select USB_XHCI_MTK if USB_SUPPORT && USB_XHCI_HCD | 10 | select USB_XHCI_MTK if USB_SUPPORT && USB_XHCI_HCD |
| 10 | help | 11 | help |
| 11 | Say Y or M here if your system runs on MediaTek SoCs with | 12 | Say Y or M here if your system runs on MediaTek SoCs with |
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c index fffe23ab0189..979bef9bfb6b 100644 --- a/drivers/usb/serial/cp210x.c +++ b/drivers/usb/serial/cp210x.c | |||
| @@ -80,6 +80,7 @@ static const struct usb_device_id id_table[] = { | |||
| 80 | { USB_DEVICE(0x10C4, 0x804E) }, /* Software Bisque Paramount ME build-in converter */ | 80 | { USB_DEVICE(0x10C4, 0x804E) }, /* Software Bisque Paramount ME build-in converter */ |
| 81 | { USB_DEVICE(0x10C4, 0x8053) }, /* Enfora EDG1228 */ | 81 | { USB_DEVICE(0x10C4, 0x8053) }, /* Enfora EDG1228 */ |
| 82 | { USB_DEVICE(0x10C4, 0x8054) }, /* Enfora GSM2228 */ | 82 | { USB_DEVICE(0x10C4, 0x8054) }, /* Enfora GSM2228 */ |
| 83 | { USB_DEVICE(0x10C4, 0x8056) }, /* Lorenz Messtechnik devices */ | ||
| 83 | { USB_DEVICE(0x10C4, 0x8066) }, /* Argussoft In-System Programmer */ | 84 | { USB_DEVICE(0x10C4, 0x8066) }, /* Argussoft In-System Programmer */ |
| 84 | { USB_DEVICE(0x10C4, 0x806F) }, /* IMS USB to RS422 Converter Cable */ | 85 | { USB_DEVICE(0x10C4, 0x806F) }, /* IMS USB to RS422 Converter Cable */ |
| 85 | { USB_DEVICE(0x10C4, 0x807A) }, /* Crumb128 board */ | 86 | { USB_DEVICE(0x10C4, 0x807A) }, /* Crumb128 board */ |
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c index 8f5b17471759..1d8461ae2c34 100644 --- a/drivers/usb/serial/ftdi_sio.c +++ b/drivers/usb/serial/ftdi_sio.c | |||
| @@ -609,6 +609,8 @@ static const struct usb_device_id id_table_combined[] = { | |||
| 609 | .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, | 609 | .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, |
| 610 | { USB_DEVICE(FTDI_VID, FTDI_NT_ORIONLXM_PID), | 610 | { USB_DEVICE(FTDI_VID, FTDI_NT_ORIONLXM_PID), |
| 611 | .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, | 611 | .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, |
| 612 | { USB_DEVICE(FTDI_VID, FTDI_NT_ORIONLX_PLUS_PID) }, | ||
| 613 | { USB_DEVICE(FTDI_VID, FTDI_NT_ORION_IO_PID) }, | ||
| 612 | { USB_DEVICE(FTDI_VID, FTDI_SYNAPSE_SS200_PID) }, | 614 | { USB_DEVICE(FTDI_VID, FTDI_SYNAPSE_SS200_PID) }, |
| 613 | { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX_PID) }, | 615 | { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX_PID) }, |
| 614 | { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX2_PID) }, | 616 | { USB_DEVICE(FTDI_VID, FTDI_CUSTOMWARE_MINIPLEX2_PID) }, |
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h index b863bedb55a1..5755f0df0025 100644 --- a/drivers/usb/serial/ftdi_sio_ids.h +++ b/drivers/usb/serial/ftdi_sio_ids.h | |||
| @@ -567,7 +567,9 @@ | |||
| 567 | /* | 567 | /* |
| 568 | * NovaTech product ids (FTDI_VID) | 568 | * NovaTech product ids (FTDI_VID) |
| 569 | */ | 569 | */ |
| 570 | #define FTDI_NT_ORIONLXM_PID 0x7c90 /* OrionLXm Substation Automation Platform */ | 570 | #define FTDI_NT_ORIONLXM_PID 0x7c90 /* OrionLXm Substation Automation Platform */ |
| 571 | #define FTDI_NT_ORIONLX_PLUS_PID 0x7c91 /* OrionLX+ Substation Automation Platform */ | ||
| 572 | #define FTDI_NT_ORION_IO_PID 0x7c92 /* Orion I/O */ | ||
| 571 | 573 | ||
| 572 | /* | 574 | /* |
| 573 | * Synapse Wireless product ids (FTDI_VID) | 575 | * Synapse Wireless product ids (FTDI_VID) |
diff --git a/drivers/usb/serial/mos7720.c b/drivers/usb/serial/mos7720.c index fc52ac75fbf6..18110225d506 100644 --- a/drivers/usb/serial/mos7720.c +++ b/drivers/usb/serial/mos7720.c | |||
| @@ -366,8 +366,6 @@ static int write_parport_reg_nonblock(struct mos7715_parport *mos_parport, | |||
| 366 | if (!urbtrack) | 366 | if (!urbtrack) |
| 367 | return -ENOMEM; | 367 | return -ENOMEM; |
| 368 | 368 | ||
| 369 | kref_get(&mos_parport->ref_count); | ||
| 370 | urbtrack->mos_parport = mos_parport; | ||
| 371 | urbtrack->urb = usb_alloc_urb(0, GFP_ATOMIC); | 369 | urbtrack->urb = usb_alloc_urb(0, GFP_ATOMIC); |
| 372 | if (!urbtrack->urb) { | 370 | if (!urbtrack->urb) { |
| 373 | kfree(urbtrack); | 371 | kfree(urbtrack); |
| @@ -388,6 +386,8 @@ static int write_parport_reg_nonblock(struct mos7715_parport *mos_parport, | |||
| 388 | usb_sndctrlpipe(usbdev, 0), | 386 | usb_sndctrlpipe(usbdev, 0), |
| 389 | (unsigned char *)urbtrack->setup, | 387 | (unsigned char *)urbtrack->setup, |
| 390 | NULL, 0, async_complete, urbtrack); | 388 | NULL, 0, async_complete, urbtrack); |
| 389 | kref_get(&mos_parport->ref_count); | ||
| 390 | urbtrack->mos_parport = mos_parport; | ||
| 391 | kref_init(&urbtrack->ref_count); | 391 | kref_init(&urbtrack->ref_count); |
| 392 | INIT_LIST_HEAD(&urbtrack->urblist_entry); | 392 | INIT_LIST_HEAD(&urbtrack->urblist_entry); |
| 393 | 393 | ||
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c index 11b21d9410f3..83869065b802 100644 --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c | |||
| @@ -246,6 +246,7 @@ static void option_instat_callback(struct urb *urb); | |||
| 246 | #define QUECTEL_PRODUCT_EC25 0x0125 | 246 | #define QUECTEL_PRODUCT_EC25 0x0125 |
| 247 | #define QUECTEL_PRODUCT_BG96 0x0296 | 247 | #define QUECTEL_PRODUCT_BG96 0x0296 |
| 248 | #define QUECTEL_PRODUCT_EP06 0x0306 | 248 | #define QUECTEL_PRODUCT_EP06 0x0306 |
| 249 | #define QUECTEL_PRODUCT_EM12 0x0512 | ||
| 249 | 250 | ||
| 250 | #define CMOTECH_VENDOR_ID 0x16d8 | 251 | #define CMOTECH_VENDOR_ID 0x16d8 |
| 251 | #define CMOTECH_PRODUCT_6001 0x6001 | 252 | #define CMOTECH_PRODUCT_6001 0x6001 |
| @@ -1066,7 +1067,8 @@ static const struct usb_device_id option_ids[] = { | |||
| 1066 | .driver_info = RSVD(3) }, | 1067 | .driver_info = RSVD(3) }, |
| 1067 | { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */ | 1068 | { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */ |
| 1068 | { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */ | 1069 | { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */ |
| 1069 | { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000)}, /* SIMCom SIM5218 */ | 1070 | { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000), /* SIMCom SIM5218 */ |
| 1071 | .driver_info = NCTRL(0) | NCTRL(1) | NCTRL(2) | NCTRL(3) | RSVD(4) }, | ||
| 1070 | /* Quectel products using Qualcomm vendor ID */ | 1072 | /* Quectel products using Qualcomm vendor ID */ |
| 1071 | { USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC15)}, | 1073 | { USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC15)}, |
| 1072 | { USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC20), | 1074 | { USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC20), |
| @@ -1087,6 +1089,9 @@ static const struct usb_device_id option_ids[] = { | |||
| 1087 | { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0xff, 0xff), | 1089 | { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0xff, 0xff), |
| 1088 | .driver_info = RSVD(1) | RSVD(2) | RSVD(3) | RSVD(4) | NUMEP2 }, | 1090 | .driver_info = RSVD(1) | RSVD(2) | RSVD(3) | RSVD(4) | NUMEP2 }, |
| 1089 | { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0, 0) }, | 1091 | { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0, 0) }, |
| 1092 | { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM12, 0xff, 0xff, 0xff), | ||
| 1093 | .driver_info = RSVD(1) | RSVD(2) | RSVD(3) | RSVD(4) | NUMEP2 }, | ||
| 1094 | { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EM12, 0xff, 0, 0) }, | ||
| 1090 | { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) }, | 1095 | { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) }, |
| 1091 | { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_300) }, | 1096 | { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_300) }, |
| 1092 | { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6003), | 1097 | { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6003), |
| @@ -1940,10 +1945,12 @@ static const struct usb_device_id option_ids[] = { | |||
| 1940 | .driver_info = RSVD(4) }, | 1945 | .driver_info = RSVD(4) }, |
| 1941 | { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7e35, 0xff), /* D-Link DWM-222 */ | 1946 | { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7e35, 0xff), /* D-Link DWM-222 */ |
| 1942 | .driver_info = RSVD(4) }, | 1947 | .driver_info = RSVD(4) }, |
| 1943 | { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e01, 0xff, 0xff, 0xff) }, /* D-Link DWM-152/C1 */ | 1948 | { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e01, 0xff, 0xff, 0xff) }, /* D-Link DWM-152/C1 */ |
| 1944 | { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e02, 0xff, 0xff, 0xff) }, /* D-Link DWM-156/C1 */ | 1949 | { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e02, 0xff, 0xff, 0xff) }, /* D-Link DWM-156/C1 */ |
| 1945 | { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x7e11, 0xff, 0xff, 0xff) }, /* D-Link DWM-156/A3 */ | 1950 | { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x7e11, 0xff, 0xff, 0xff) }, /* D-Link DWM-156/A3 */ |
| 1946 | { USB_DEVICE_INTERFACE_CLASS(0x2020, 0x4000, 0xff) }, /* OLICARD300 - MT6225 */ | 1951 | { USB_DEVICE_INTERFACE_CLASS(0x2020, 0x2031, 0xff), /* Olicard 600 */ |
| 1952 | .driver_info = RSVD(4) }, | ||
| 1953 | { USB_DEVICE_INTERFACE_CLASS(0x2020, 0x4000, 0xff) }, /* OLICARD300 - MT6225 */ | ||
| 1947 | { USB_DEVICE(INOVIA_VENDOR_ID, INOVIA_SEW858) }, | 1954 | { USB_DEVICE(INOVIA_VENDOR_ID, INOVIA_SEW858) }, |
| 1948 | { USB_DEVICE(VIATELECOM_VENDOR_ID, VIATELECOM_PRODUCT_CDS7) }, | 1955 | { USB_DEVICE(VIATELECOM_VENDOR_ID, VIATELECOM_PRODUCT_CDS7) }, |
| 1949 | { USB_DEVICE_AND_INTERFACE_INFO(WETELECOM_VENDOR_ID, WETELECOM_PRODUCT_WMD200, 0xff, 0xff, 0xff) }, | 1956 | { USB_DEVICE_AND_INTERFACE_INFO(WETELECOM_VENDOR_ID, WETELECOM_PRODUCT_WMD200, 0xff, 0xff, 0xff) }, |
diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c index 0f62db091d8d..a2233d72ae7c 100644 --- a/drivers/usb/typec/tcpm/tcpm.c +++ b/drivers/usb/typec/tcpm/tcpm.c | |||
| @@ -37,6 +37,7 @@ | |||
| 37 | S(SRC_ATTACHED), \ | 37 | S(SRC_ATTACHED), \ |
| 38 | S(SRC_STARTUP), \ | 38 | S(SRC_STARTUP), \ |
| 39 | S(SRC_SEND_CAPABILITIES), \ | 39 | S(SRC_SEND_CAPABILITIES), \ |
| 40 | S(SRC_SEND_CAPABILITIES_TIMEOUT), \ | ||
| 40 | S(SRC_NEGOTIATE_CAPABILITIES), \ | 41 | S(SRC_NEGOTIATE_CAPABILITIES), \ |
| 41 | S(SRC_TRANSITION_SUPPLY), \ | 42 | S(SRC_TRANSITION_SUPPLY), \ |
| 42 | S(SRC_READY), \ | 43 | S(SRC_READY), \ |
| @@ -2966,10 +2967,34 @@ static void run_state_machine(struct tcpm_port *port) | |||
| 2966 | /* port->hard_reset_count = 0; */ | 2967 | /* port->hard_reset_count = 0; */ |
| 2967 | port->caps_count = 0; | 2968 | port->caps_count = 0; |
| 2968 | port->pd_capable = true; | 2969 | port->pd_capable = true; |
| 2969 | tcpm_set_state_cond(port, hard_reset_state(port), | 2970 | tcpm_set_state_cond(port, SRC_SEND_CAPABILITIES_TIMEOUT, |
| 2970 | PD_T_SEND_SOURCE_CAP); | 2971 | PD_T_SEND_SOURCE_CAP); |
| 2971 | } | 2972 | } |
| 2972 | break; | 2973 | break; |
| 2974 | case SRC_SEND_CAPABILITIES_TIMEOUT: | ||
| 2975 | /* | ||
| 2976 | * Error recovery for a PD_DATA_SOURCE_CAP reply timeout. | ||
| 2977 | * | ||
| 2978 | * PD 2.0 sinks are supposed to accept src-capabilities with a | ||
| 2979 | * 3.0 header and simply ignore any src PDOs which the sink does | ||
| 2980 | * not understand such as PPS but some 2.0 sinks instead ignore | ||
| 2981 | * the entire PD_DATA_SOURCE_CAP message, causing contract | ||
| 2982 | * negotiation to fail. | ||
| 2983 | * | ||
| 2984 | * After PD_N_HARD_RESET_COUNT hard-reset attempts, we try | ||
| 2985 | * sending src-capabilities with a lower PD revision to | ||
| 2986 | * make these broken sinks work. | ||
| 2987 | */ | ||
| 2988 | if (port->hard_reset_count < PD_N_HARD_RESET_COUNT) { | ||
| 2989 | tcpm_set_state(port, HARD_RESET_SEND, 0); | ||
| 2990 | } else if (port->negotiated_rev > PD_REV20) { | ||
| 2991 | port->negotiated_rev--; | ||
| 2992 | port->hard_reset_count = 0; | ||
| 2993 | tcpm_set_state(port, SRC_SEND_CAPABILITIES, 0); | ||
| 2994 | } else { | ||
| 2995 | tcpm_set_state(port, hard_reset_state(port), 0); | ||
| 2996 | } | ||
| 2997 | break; | ||
| 2973 | case SRC_NEGOTIATE_CAPABILITIES: | 2998 | case SRC_NEGOTIATE_CAPABILITIES: |
| 2974 | ret = tcpm_pd_check_request(port); | 2999 | ret = tcpm_pd_check_request(port); |
| 2975 | if (ret < 0) { | 3000 | if (ret < 0) { |
diff --git a/drivers/usb/typec/tcpm/wcove.c b/drivers/usb/typec/tcpm/wcove.c index 423208e19383..6770afd40765 100644 --- a/drivers/usb/typec/tcpm/wcove.c +++ b/drivers/usb/typec/tcpm/wcove.c | |||
| @@ -615,8 +615,13 @@ static int wcove_typec_probe(struct platform_device *pdev) | |||
| 615 | wcove->dev = &pdev->dev; | 615 | wcove->dev = &pdev->dev; |
| 616 | wcove->regmap = pmic->regmap; | 616 | wcove->regmap = pmic->regmap; |
| 617 | 617 | ||
| 618 | irq = regmap_irq_get_virq(pmic->irq_chip_data_chgr, | 618 | irq = platform_get_irq(pdev, 0); |
| 619 | platform_get_irq(pdev, 0)); | 619 | if (irq < 0) { |
| 620 | dev_err(&pdev->dev, "Failed to get IRQ: %d\n", irq); | ||
| 621 | return irq; | ||
| 622 | } | ||
| 623 | |||
| 624 | irq = regmap_irq_get_virq(pmic->irq_chip_data_chgr, irq); | ||
| 620 | if (irq < 0) | 625 | if (irq < 0) |
| 621 | return irq; | 626 | return irq; |
| 622 | 627 | ||
diff --git a/drivers/virt/vboxguest/vboxguest_core.c b/drivers/virt/vboxguest/vboxguest_core.c index df7d09409efe..8ca333f21292 100644 --- a/drivers/virt/vboxguest/vboxguest_core.c +++ b/drivers/virt/vboxguest/vboxguest_core.c | |||
| @@ -27,6 +27,10 @@ | |||
| 27 | 27 | ||
| 28 | #define GUEST_MAPPINGS_TRIES 5 | 28 | #define GUEST_MAPPINGS_TRIES 5 |
| 29 | 29 | ||
| 30 | #define VBG_KERNEL_REQUEST \ | ||
| 31 | (VMMDEV_REQUESTOR_KERNEL | VMMDEV_REQUESTOR_USR_DRV | \ | ||
| 32 | VMMDEV_REQUESTOR_CON_DONT_KNOW | VMMDEV_REQUESTOR_TRUST_NOT_GIVEN) | ||
| 33 | |||
| 30 | /** | 34 | /** |
| 31 | * Reserves memory in which the VMM can relocate any guest mappings | 35 | * Reserves memory in which the VMM can relocate any guest mappings |
| 32 | * that are floating around. | 36 | * that are floating around. |
| @@ -48,7 +52,8 @@ static void vbg_guest_mappings_init(struct vbg_dev *gdev) | |||
| 48 | int i, rc; | 52 | int i, rc; |
| 49 | 53 | ||
| 50 | /* Query the required space. */ | 54 | /* Query the required space. */ |
| 51 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_GET_HYPERVISOR_INFO); | 55 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_GET_HYPERVISOR_INFO, |
| 56 | VBG_KERNEL_REQUEST); | ||
| 52 | if (!req) | 57 | if (!req) |
| 53 | return; | 58 | return; |
| 54 | 59 | ||
| @@ -135,7 +140,8 @@ static void vbg_guest_mappings_exit(struct vbg_dev *gdev) | |||
| 135 | * Tell the host that we're going to free the memory we reserved for | 140 | * Tell the host that we're going to free the memory we reserved for |
| 136 | * it, the free it up. (Leak the memory if anything goes wrong here.) | 141 | * it, the free it up. (Leak the memory if anything goes wrong here.) |
| 137 | */ | 142 | */ |
| 138 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_SET_HYPERVISOR_INFO); | 143 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_SET_HYPERVISOR_INFO, |
| 144 | VBG_KERNEL_REQUEST); | ||
| 139 | if (!req) | 145 | if (!req) |
| 140 | return; | 146 | return; |
| 141 | 147 | ||
| @@ -172,8 +178,10 @@ static int vbg_report_guest_info(struct vbg_dev *gdev) | |||
| 172 | struct vmmdev_guest_info2 *req2 = NULL; | 178 | struct vmmdev_guest_info2 *req2 = NULL; |
| 173 | int rc, ret = -ENOMEM; | 179 | int rc, ret = -ENOMEM; |
| 174 | 180 | ||
| 175 | req1 = vbg_req_alloc(sizeof(*req1), VMMDEVREQ_REPORT_GUEST_INFO); | 181 | req1 = vbg_req_alloc(sizeof(*req1), VMMDEVREQ_REPORT_GUEST_INFO, |
| 176 | req2 = vbg_req_alloc(sizeof(*req2), VMMDEVREQ_REPORT_GUEST_INFO2); | 182 | VBG_KERNEL_REQUEST); |
| 183 | req2 = vbg_req_alloc(sizeof(*req2), VMMDEVREQ_REPORT_GUEST_INFO2, | ||
| 184 | VBG_KERNEL_REQUEST); | ||
| 177 | if (!req1 || !req2) | 185 | if (!req1 || !req2) |
| 178 | goto out_free; | 186 | goto out_free; |
| 179 | 187 | ||
| @@ -187,8 +195,8 @@ static int vbg_report_guest_info(struct vbg_dev *gdev) | |||
| 187 | req2->additions_minor = VBG_VERSION_MINOR; | 195 | req2->additions_minor = VBG_VERSION_MINOR; |
| 188 | req2->additions_build = VBG_VERSION_BUILD; | 196 | req2->additions_build = VBG_VERSION_BUILD; |
| 189 | req2->additions_revision = VBG_SVN_REV; | 197 | req2->additions_revision = VBG_SVN_REV; |
| 190 | /* (no features defined yet) */ | 198 | req2->additions_features = |
| 191 | req2->additions_features = 0; | 199 | VMMDEV_GUEST_INFO2_ADDITIONS_FEATURES_REQUESTOR_INFO; |
| 192 | strlcpy(req2->name, VBG_VERSION_STRING, | 200 | strlcpy(req2->name, VBG_VERSION_STRING, |
| 193 | sizeof(req2->name)); | 201 | sizeof(req2->name)); |
| 194 | 202 | ||
| @@ -230,7 +238,8 @@ static int vbg_report_driver_status(struct vbg_dev *gdev, bool active) | |||
| 230 | struct vmmdev_guest_status *req; | 238 | struct vmmdev_guest_status *req; |
| 231 | int rc; | 239 | int rc; |
| 232 | 240 | ||
| 233 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_REPORT_GUEST_STATUS); | 241 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_REPORT_GUEST_STATUS, |
| 242 | VBG_KERNEL_REQUEST); | ||
| 234 | if (!req) | 243 | if (!req) |
| 235 | return -ENOMEM; | 244 | return -ENOMEM; |
| 236 | 245 | ||
| @@ -423,7 +432,8 @@ static int vbg_heartbeat_host_config(struct vbg_dev *gdev, bool enabled) | |||
| 423 | struct vmmdev_heartbeat *req; | 432 | struct vmmdev_heartbeat *req; |
| 424 | int rc; | 433 | int rc; |
| 425 | 434 | ||
| 426 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_HEARTBEAT_CONFIGURE); | 435 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_HEARTBEAT_CONFIGURE, |
| 436 | VBG_KERNEL_REQUEST); | ||
| 427 | if (!req) | 437 | if (!req) |
| 428 | return -ENOMEM; | 438 | return -ENOMEM; |
| 429 | 439 | ||
| @@ -457,7 +467,8 @@ static int vbg_heartbeat_init(struct vbg_dev *gdev) | |||
| 457 | 467 | ||
| 458 | gdev->guest_heartbeat_req = vbg_req_alloc( | 468 | gdev->guest_heartbeat_req = vbg_req_alloc( |
| 459 | sizeof(*gdev->guest_heartbeat_req), | 469 | sizeof(*gdev->guest_heartbeat_req), |
| 460 | VMMDEVREQ_GUEST_HEARTBEAT); | 470 | VMMDEVREQ_GUEST_HEARTBEAT, |
| 471 | VBG_KERNEL_REQUEST); | ||
| 461 | if (!gdev->guest_heartbeat_req) | 472 | if (!gdev->guest_heartbeat_req) |
| 462 | return -ENOMEM; | 473 | return -ENOMEM; |
| 463 | 474 | ||
| @@ -528,7 +539,8 @@ static int vbg_reset_host_event_filter(struct vbg_dev *gdev, | |||
| 528 | struct vmmdev_mask *req; | 539 | struct vmmdev_mask *req; |
| 529 | int rc; | 540 | int rc; |
| 530 | 541 | ||
| 531 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_CTL_GUEST_FILTER_MASK); | 542 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_CTL_GUEST_FILTER_MASK, |
| 543 | VBG_KERNEL_REQUEST); | ||
| 532 | if (!req) | 544 | if (!req) |
| 533 | return -ENOMEM; | 545 | return -ENOMEM; |
| 534 | 546 | ||
| @@ -567,8 +579,14 @@ static int vbg_set_session_event_filter(struct vbg_dev *gdev, | |||
| 567 | u32 changed, previous; | 579 | u32 changed, previous; |
| 568 | int rc, ret = 0; | 580 | int rc, ret = 0; |
| 569 | 581 | ||
| 570 | /* Allocate a request buffer before taking the spinlock */ | 582 | /* |
| 571 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_CTL_GUEST_FILTER_MASK); | 583 | * Allocate a request buffer before taking the spinlock, when |
| 584 | * the session is being terminated the requestor is the kernel, | ||
| 585 | * as we're cleaning up. | ||
| 586 | */ | ||
| 587 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_CTL_GUEST_FILTER_MASK, | ||
| 588 | session_termination ? VBG_KERNEL_REQUEST : | ||
| 589 | session->requestor); | ||
| 572 | if (!req) { | 590 | if (!req) { |
| 573 | if (!session_termination) | 591 | if (!session_termination) |
| 574 | return -ENOMEM; | 592 | return -ENOMEM; |
| @@ -627,7 +645,8 @@ static int vbg_reset_host_capabilities(struct vbg_dev *gdev) | |||
| 627 | struct vmmdev_mask *req; | 645 | struct vmmdev_mask *req; |
| 628 | int rc; | 646 | int rc; |
| 629 | 647 | ||
| 630 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_SET_GUEST_CAPABILITIES); | 648 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_SET_GUEST_CAPABILITIES, |
| 649 | VBG_KERNEL_REQUEST); | ||
| 631 | if (!req) | 650 | if (!req) |
| 632 | return -ENOMEM; | 651 | return -ENOMEM; |
| 633 | 652 | ||
| @@ -662,8 +681,14 @@ static int vbg_set_session_capabilities(struct vbg_dev *gdev, | |||
| 662 | u32 changed, previous; | 681 | u32 changed, previous; |
| 663 | int rc, ret = 0; | 682 | int rc, ret = 0; |
| 664 | 683 | ||
| 665 | /* Allocate a request buffer before taking the spinlock */ | 684 | /* |
| 666 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_SET_GUEST_CAPABILITIES); | 685 | * Allocate a request buffer before taking the spinlock, when |
| 686 | * the session is being terminated the requestor is the kernel, | ||
| 687 | * as we're cleaning up. | ||
| 688 | */ | ||
| 689 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_SET_GUEST_CAPABILITIES, | ||
| 690 | session_termination ? VBG_KERNEL_REQUEST : | ||
| 691 | session->requestor); | ||
| 667 | if (!req) { | 692 | if (!req) { |
| 668 | if (!session_termination) | 693 | if (!session_termination) |
| 669 | return -ENOMEM; | 694 | return -ENOMEM; |
| @@ -722,7 +747,8 @@ static int vbg_query_host_version(struct vbg_dev *gdev) | |||
| 722 | struct vmmdev_host_version *req; | 747 | struct vmmdev_host_version *req; |
| 723 | int rc, ret; | 748 | int rc, ret; |
| 724 | 749 | ||
| 725 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_GET_HOST_VERSION); | 750 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_GET_HOST_VERSION, |
| 751 | VBG_KERNEL_REQUEST); | ||
| 726 | if (!req) | 752 | if (!req) |
| 727 | return -ENOMEM; | 753 | return -ENOMEM; |
| 728 | 754 | ||
| @@ -783,19 +809,24 @@ int vbg_core_init(struct vbg_dev *gdev, u32 fixed_events) | |||
| 783 | 809 | ||
| 784 | gdev->mem_balloon.get_req = | 810 | gdev->mem_balloon.get_req = |
| 785 | vbg_req_alloc(sizeof(*gdev->mem_balloon.get_req), | 811 | vbg_req_alloc(sizeof(*gdev->mem_balloon.get_req), |
| 786 | VMMDEVREQ_GET_MEMBALLOON_CHANGE_REQ); | 812 | VMMDEVREQ_GET_MEMBALLOON_CHANGE_REQ, |
| 813 | VBG_KERNEL_REQUEST); | ||
| 787 | gdev->mem_balloon.change_req = | 814 | gdev->mem_balloon.change_req = |
| 788 | vbg_req_alloc(sizeof(*gdev->mem_balloon.change_req), | 815 | vbg_req_alloc(sizeof(*gdev->mem_balloon.change_req), |
| 789 | VMMDEVREQ_CHANGE_MEMBALLOON); | 816 | VMMDEVREQ_CHANGE_MEMBALLOON, |
| 817 | VBG_KERNEL_REQUEST); | ||
| 790 | gdev->cancel_req = | 818 | gdev->cancel_req = |
| 791 | vbg_req_alloc(sizeof(*(gdev->cancel_req)), | 819 | vbg_req_alloc(sizeof(*(gdev->cancel_req)), |
| 792 | VMMDEVREQ_HGCM_CANCEL2); | 820 | VMMDEVREQ_HGCM_CANCEL2, |
| 821 | VBG_KERNEL_REQUEST); | ||
| 793 | gdev->ack_events_req = | 822 | gdev->ack_events_req = |
| 794 | vbg_req_alloc(sizeof(*gdev->ack_events_req), | 823 | vbg_req_alloc(sizeof(*gdev->ack_events_req), |
| 795 | VMMDEVREQ_ACKNOWLEDGE_EVENTS); | 824 | VMMDEVREQ_ACKNOWLEDGE_EVENTS, |
| 825 | VBG_KERNEL_REQUEST); | ||
| 796 | gdev->mouse_status_req = | 826 | gdev->mouse_status_req = |
| 797 | vbg_req_alloc(sizeof(*gdev->mouse_status_req), | 827 | vbg_req_alloc(sizeof(*gdev->mouse_status_req), |
| 798 | VMMDEVREQ_GET_MOUSE_STATUS); | 828 | VMMDEVREQ_GET_MOUSE_STATUS, |
| 829 | VBG_KERNEL_REQUEST); | ||
| 799 | 830 | ||
| 800 | if (!gdev->mem_balloon.get_req || !gdev->mem_balloon.change_req || | 831 | if (!gdev->mem_balloon.get_req || !gdev->mem_balloon.change_req || |
| 801 | !gdev->cancel_req || !gdev->ack_events_req || | 832 | !gdev->cancel_req || !gdev->ack_events_req || |
| @@ -892,9 +923,9 @@ void vbg_core_exit(struct vbg_dev *gdev) | |||
| 892 | * vboxguest_linux.c calls this when userspace opens the char-device. | 923 | * vboxguest_linux.c calls this when userspace opens the char-device. |
| 893 | * Return: A pointer to the new session or an ERR_PTR on error. | 924 | * Return: A pointer to the new session or an ERR_PTR on error. |
| 894 | * @gdev: The Guest extension device. | 925 | * @gdev: The Guest extension device. |
| 895 | * @user: Set if this is a session for the vboxuser device. | 926 | * @requestor: VMMDEV_REQUESTOR_* flags |
| 896 | */ | 927 | */ |
| 897 | struct vbg_session *vbg_core_open_session(struct vbg_dev *gdev, bool user) | 928 | struct vbg_session *vbg_core_open_session(struct vbg_dev *gdev, u32 requestor) |
| 898 | { | 929 | { |
| 899 | struct vbg_session *session; | 930 | struct vbg_session *session; |
| 900 | 931 | ||
| @@ -903,7 +934,7 @@ struct vbg_session *vbg_core_open_session(struct vbg_dev *gdev, bool user) | |||
| 903 | return ERR_PTR(-ENOMEM); | 934 | return ERR_PTR(-ENOMEM); |
| 904 | 935 | ||
| 905 | session->gdev = gdev; | 936 | session->gdev = gdev; |
| 906 | session->user_session = user; | 937 | session->requestor = requestor; |
| 907 | 938 | ||
| 908 | return session; | 939 | return session; |
| 909 | } | 940 | } |
| @@ -924,7 +955,9 @@ void vbg_core_close_session(struct vbg_session *session) | |||
| 924 | if (!session->hgcm_client_ids[i]) | 955 | if (!session->hgcm_client_ids[i]) |
| 925 | continue; | 956 | continue; |
| 926 | 957 | ||
| 927 | vbg_hgcm_disconnect(gdev, session->hgcm_client_ids[i], &rc); | 958 | /* requestor is kernel here, as we're cleaning up. */ |
| 959 | vbg_hgcm_disconnect(gdev, VBG_KERNEL_REQUEST, | ||
| 960 | session->hgcm_client_ids[i], &rc); | ||
| 928 | } | 961 | } |
| 929 | 962 | ||
| 930 | kfree(session); | 963 | kfree(session); |
| @@ -1152,7 +1185,8 @@ static int vbg_req_allowed(struct vbg_dev *gdev, struct vbg_session *session, | |||
| 1152 | return -EPERM; | 1185 | return -EPERM; |
| 1153 | } | 1186 | } |
| 1154 | 1187 | ||
| 1155 | if (trusted_apps_only && session->user_session) { | 1188 | if (trusted_apps_only && |
| 1189 | (session->requestor & VMMDEV_REQUESTOR_USER_DEVICE)) { | ||
| 1156 | vbg_err("Denying userspace vmm call type %#08x through vboxuser device node\n", | 1190 | vbg_err("Denying userspace vmm call type %#08x through vboxuser device node\n", |
| 1157 | req->request_type); | 1191 | req->request_type); |
| 1158 | return -EPERM; | 1192 | return -EPERM; |
| @@ -1209,8 +1243,8 @@ static int vbg_ioctl_hgcm_connect(struct vbg_dev *gdev, | |||
| 1209 | if (i >= ARRAY_SIZE(session->hgcm_client_ids)) | 1243 | if (i >= ARRAY_SIZE(session->hgcm_client_ids)) |
| 1210 | return -EMFILE; | 1244 | return -EMFILE; |
| 1211 | 1245 | ||
| 1212 | ret = vbg_hgcm_connect(gdev, &conn->u.in.loc, &client_id, | 1246 | ret = vbg_hgcm_connect(gdev, session->requestor, &conn->u.in.loc, |
| 1213 | &conn->hdr.rc); | 1247 | &client_id, &conn->hdr.rc); |
| 1214 | 1248 | ||
| 1215 | mutex_lock(&gdev->session_mutex); | 1249 | mutex_lock(&gdev->session_mutex); |
| 1216 | if (ret == 0 && conn->hdr.rc >= 0) { | 1250 | if (ret == 0 && conn->hdr.rc >= 0) { |
| @@ -1251,7 +1285,8 @@ static int vbg_ioctl_hgcm_disconnect(struct vbg_dev *gdev, | |||
| 1251 | if (i >= ARRAY_SIZE(session->hgcm_client_ids)) | 1285 | if (i >= ARRAY_SIZE(session->hgcm_client_ids)) |
| 1252 | return -EINVAL; | 1286 | return -EINVAL; |
| 1253 | 1287 | ||
| 1254 | ret = vbg_hgcm_disconnect(gdev, client_id, &disconn->hdr.rc); | 1288 | ret = vbg_hgcm_disconnect(gdev, session->requestor, client_id, |
| 1289 | &disconn->hdr.rc); | ||
| 1255 | 1290 | ||
| 1256 | mutex_lock(&gdev->session_mutex); | 1291 | mutex_lock(&gdev->session_mutex); |
| 1257 | if (ret == 0 && disconn->hdr.rc >= 0) | 1292 | if (ret == 0 && disconn->hdr.rc >= 0) |
| @@ -1313,12 +1348,12 @@ static int vbg_ioctl_hgcm_call(struct vbg_dev *gdev, | |||
| 1313 | } | 1348 | } |
| 1314 | 1349 | ||
| 1315 | if (IS_ENABLED(CONFIG_COMPAT) && f32bit) | 1350 | if (IS_ENABLED(CONFIG_COMPAT) && f32bit) |
| 1316 | ret = vbg_hgcm_call32(gdev, client_id, | 1351 | ret = vbg_hgcm_call32(gdev, session->requestor, client_id, |
| 1317 | call->function, call->timeout_ms, | 1352 | call->function, call->timeout_ms, |
| 1318 | VBG_IOCTL_HGCM_CALL_PARMS32(call), | 1353 | VBG_IOCTL_HGCM_CALL_PARMS32(call), |
| 1319 | call->parm_count, &call->hdr.rc); | 1354 | call->parm_count, &call->hdr.rc); |
| 1320 | else | 1355 | else |
| 1321 | ret = vbg_hgcm_call(gdev, client_id, | 1356 | ret = vbg_hgcm_call(gdev, session->requestor, client_id, |
| 1322 | call->function, call->timeout_ms, | 1357 | call->function, call->timeout_ms, |
| 1323 | VBG_IOCTL_HGCM_CALL_PARMS(call), | 1358 | VBG_IOCTL_HGCM_CALL_PARMS(call), |
| 1324 | call->parm_count, &call->hdr.rc); | 1359 | call->parm_count, &call->hdr.rc); |
| @@ -1408,6 +1443,7 @@ static int vbg_ioctl_check_balloon(struct vbg_dev *gdev, | |||
| 1408 | } | 1443 | } |
| 1409 | 1444 | ||
| 1410 | static int vbg_ioctl_write_core_dump(struct vbg_dev *gdev, | 1445 | static int vbg_ioctl_write_core_dump(struct vbg_dev *gdev, |
| 1446 | struct vbg_session *session, | ||
| 1411 | struct vbg_ioctl_write_coredump *dump) | 1447 | struct vbg_ioctl_write_coredump *dump) |
| 1412 | { | 1448 | { |
| 1413 | struct vmmdev_write_core_dump *req; | 1449 | struct vmmdev_write_core_dump *req; |
| @@ -1415,7 +1451,8 @@ static int vbg_ioctl_write_core_dump(struct vbg_dev *gdev, | |||
| 1415 | if (vbg_ioctl_chk(&dump->hdr, sizeof(dump->u.in), 0)) | 1451 | if (vbg_ioctl_chk(&dump->hdr, sizeof(dump->u.in), 0)) |
| 1416 | return -EINVAL; | 1452 | return -EINVAL; |
| 1417 | 1453 | ||
| 1418 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_WRITE_COREDUMP); | 1454 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_WRITE_COREDUMP, |
| 1455 | session->requestor); | ||
| 1419 | if (!req) | 1456 | if (!req) |
| 1420 | return -ENOMEM; | 1457 | return -ENOMEM; |
| 1421 | 1458 | ||
| @@ -1476,7 +1513,7 @@ int vbg_core_ioctl(struct vbg_session *session, unsigned int req, void *data) | |||
| 1476 | case VBG_IOCTL_CHECK_BALLOON: | 1513 | case VBG_IOCTL_CHECK_BALLOON: |
| 1477 | return vbg_ioctl_check_balloon(gdev, data); | 1514 | return vbg_ioctl_check_balloon(gdev, data); |
| 1478 | case VBG_IOCTL_WRITE_CORE_DUMP: | 1515 | case VBG_IOCTL_WRITE_CORE_DUMP: |
| 1479 | return vbg_ioctl_write_core_dump(gdev, data); | 1516 | return vbg_ioctl_write_core_dump(gdev, session, data); |
| 1480 | } | 1517 | } |
| 1481 | 1518 | ||
| 1482 | /* Variable sized requests. */ | 1519 | /* Variable sized requests. */ |
| @@ -1508,7 +1545,8 @@ int vbg_core_set_mouse_status(struct vbg_dev *gdev, u32 features) | |||
| 1508 | struct vmmdev_mouse_status *req; | 1545 | struct vmmdev_mouse_status *req; |
| 1509 | int rc; | 1546 | int rc; |
| 1510 | 1547 | ||
| 1511 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_SET_MOUSE_STATUS); | 1548 | req = vbg_req_alloc(sizeof(*req), VMMDEVREQ_SET_MOUSE_STATUS, |
| 1549 | VBG_KERNEL_REQUEST); | ||
| 1512 | if (!req) | 1550 | if (!req) |
| 1513 | return -ENOMEM; | 1551 | return -ENOMEM; |
| 1514 | 1552 | ||
diff --git a/drivers/virt/vboxguest/vboxguest_core.h b/drivers/virt/vboxguest/vboxguest_core.h index 7ad9ec45bfa9..4188c12b839f 100644 --- a/drivers/virt/vboxguest/vboxguest_core.h +++ b/drivers/virt/vboxguest/vboxguest_core.h | |||
| @@ -154,15 +154,15 @@ struct vbg_session { | |||
| 154 | * host. Protected by vbg_gdev.session_mutex. | 154 | * host. Protected by vbg_gdev.session_mutex. |
| 155 | */ | 155 | */ |
| 156 | u32 guest_caps; | 156 | u32 guest_caps; |
| 157 | /** Does this session belong to a root process or a user one? */ | 157 | /** VMMDEV_REQUESTOR_* flags */ |
| 158 | bool user_session; | 158 | u32 requestor; |
| 159 | /** Set on CANCEL_ALL_WAITEVENTS, protected by vbg_devevent_spinlock. */ | 159 | /** Set on CANCEL_ALL_WAITEVENTS, protected by vbg_devevent_spinlock. */ |
| 160 | bool cancel_waiters; | 160 | bool cancel_waiters; |
| 161 | }; | 161 | }; |
| 162 | 162 | ||
| 163 | int vbg_core_init(struct vbg_dev *gdev, u32 fixed_events); | 163 | int vbg_core_init(struct vbg_dev *gdev, u32 fixed_events); |
| 164 | void vbg_core_exit(struct vbg_dev *gdev); | 164 | void vbg_core_exit(struct vbg_dev *gdev); |
| 165 | struct vbg_session *vbg_core_open_session(struct vbg_dev *gdev, bool user); | 165 | struct vbg_session *vbg_core_open_session(struct vbg_dev *gdev, u32 requestor); |
| 166 | void vbg_core_close_session(struct vbg_session *session); | 166 | void vbg_core_close_session(struct vbg_session *session); |
| 167 | int vbg_core_ioctl(struct vbg_session *session, unsigned int req, void *data); | 167 | int vbg_core_ioctl(struct vbg_session *session, unsigned int req, void *data); |
| 168 | int vbg_core_set_mouse_status(struct vbg_dev *gdev, u32 features); | 168 | int vbg_core_set_mouse_status(struct vbg_dev *gdev, u32 features); |
| @@ -172,12 +172,13 @@ irqreturn_t vbg_core_isr(int irq, void *dev_id); | |||
| 172 | void vbg_linux_mouse_event(struct vbg_dev *gdev); | 172 | void vbg_linux_mouse_event(struct vbg_dev *gdev); |
| 173 | 173 | ||
| 174 | /* Private (non exported) functions form vboxguest_utils.c */ | 174 | /* Private (non exported) functions form vboxguest_utils.c */ |
| 175 | void *vbg_req_alloc(size_t len, enum vmmdev_request_type req_type); | 175 | void *vbg_req_alloc(size_t len, enum vmmdev_request_type req_type, |
| 176 | u32 requestor); | ||
| 176 | void vbg_req_free(void *req, size_t len); | 177 | void vbg_req_free(void *req, size_t len); |
| 177 | int vbg_req_perform(struct vbg_dev *gdev, void *req); | 178 | int vbg_req_perform(struct vbg_dev *gdev, void *req); |
| 178 | int vbg_hgcm_call32( | 179 | int vbg_hgcm_call32( |
| 179 | struct vbg_dev *gdev, u32 client_id, u32 function, u32 timeout_ms, | 180 | struct vbg_dev *gdev, u32 requestor, u32 client_id, u32 function, |
| 180 | struct vmmdev_hgcm_function_parameter32 *parm32, u32 parm_count, | 181 | u32 timeout_ms, struct vmmdev_hgcm_function_parameter32 *parm32, |
| 181 | int *vbox_status); | 182 | u32 parm_count, int *vbox_status); |
| 182 | 183 | ||
| 183 | #endif | 184 | #endif |
diff --git a/drivers/virt/vboxguest/vboxguest_linux.c b/drivers/virt/vboxguest/vboxguest_linux.c index 6e2a9619192d..6e8c0f1c1056 100644 --- a/drivers/virt/vboxguest/vboxguest_linux.c +++ b/drivers/virt/vboxguest/vboxguest_linux.c | |||
| @@ -5,6 +5,7 @@ | |||
| 5 | * Copyright (C) 2006-2016 Oracle Corporation | 5 | * Copyright (C) 2006-2016 Oracle Corporation |
| 6 | */ | 6 | */ |
| 7 | 7 | ||
| 8 | #include <linux/cred.h> | ||
| 8 | #include <linux/input.h> | 9 | #include <linux/input.h> |
| 9 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
| 10 | #include <linux/miscdevice.h> | 11 | #include <linux/miscdevice.h> |
| @@ -28,6 +29,23 @@ static DEFINE_MUTEX(vbg_gdev_mutex); | |||
| 28 | /** Global vbg_gdev pointer used by vbg_get/put_gdev. */ | 29 | /** Global vbg_gdev pointer used by vbg_get/put_gdev. */ |
| 29 | static struct vbg_dev *vbg_gdev; | 30 | static struct vbg_dev *vbg_gdev; |
| 30 | 31 | ||
| 32 | static u32 vbg_misc_device_requestor(struct inode *inode) | ||
| 33 | { | ||
| 34 | u32 requestor = VMMDEV_REQUESTOR_USERMODE | | ||
| 35 | VMMDEV_REQUESTOR_CON_DONT_KNOW | | ||
| 36 | VMMDEV_REQUESTOR_TRUST_NOT_GIVEN; | ||
| 37 | |||
| 38 | if (from_kuid(current_user_ns(), current->cred->uid) == 0) | ||
| 39 | requestor |= VMMDEV_REQUESTOR_USR_ROOT; | ||
| 40 | else | ||
| 41 | requestor |= VMMDEV_REQUESTOR_USR_USER; | ||
| 42 | |||
| 43 | if (in_egroup_p(inode->i_gid)) | ||
| 44 | requestor |= VMMDEV_REQUESTOR_GRP_VBOX; | ||
| 45 | |||
| 46 | return requestor; | ||
| 47 | } | ||
| 48 | |||
| 31 | static int vbg_misc_device_open(struct inode *inode, struct file *filp) | 49 | static int vbg_misc_device_open(struct inode *inode, struct file *filp) |
| 32 | { | 50 | { |
| 33 | struct vbg_session *session; | 51 | struct vbg_session *session; |
| @@ -36,7 +54,7 @@ static int vbg_misc_device_open(struct inode *inode, struct file *filp) | |||
| 36 | /* misc_open sets filp->private_data to our misc device */ | 54 | /* misc_open sets filp->private_data to our misc device */ |
| 37 | gdev = container_of(filp->private_data, struct vbg_dev, misc_device); | 55 | gdev = container_of(filp->private_data, struct vbg_dev, misc_device); |
| 38 | 56 | ||
| 39 | session = vbg_core_open_session(gdev, false); | 57 | session = vbg_core_open_session(gdev, vbg_misc_device_requestor(inode)); |
| 40 | if (IS_ERR(session)) | 58 | if (IS_ERR(session)) |
| 41 | return PTR_ERR(session); | 59 | return PTR_ERR(session); |
| 42 | 60 | ||
| @@ -53,7 +71,8 @@ static int vbg_misc_device_user_open(struct inode *inode, struct file *filp) | |||
| 53 | gdev = container_of(filp->private_data, struct vbg_dev, | 71 | gdev = container_of(filp->private_data, struct vbg_dev, |
| 54 | misc_device_user); | 72 | misc_device_user); |
| 55 | 73 | ||
| 56 | session = vbg_core_open_session(gdev, false); | 74 | session = vbg_core_open_session(gdev, vbg_misc_device_requestor(inode) | |
| 75 | VMMDEV_REQUESTOR_USER_DEVICE); | ||
| 57 | if (IS_ERR(session)) | 76 | if (IS_ERR(session)) |
| 58 | return PTR_ERR(session); | 77 | return PTR_ERR(session); |
| 59 | 78 | ||
| @@ -115,7 +134,8 @@ static long vbg_misc_device_ioctl(struct file *filp, unsigned int req, | |||
| 115 | req == VBG_IOCTL_VMMDEV_REQUEST_BIG; | 134 | req == VBG_IOCTL_VMMDEV_REQUEST_BIG; |
| 116 | 135 | ||
| 117 | if (is_vmmdev_req) | 136 | if (is_vmmdev_req) |
| 118 | buf = vbg_req_alloc(size, VBG_IOCTL_HDR_TYPE_DEFAULT); | 137 | buf = vbg_req_alloc(size, VBG_IOCTL_HDR_TYPE_DEFAULT, |
| 138 | session->requestor); | ||
| 119 | else | 139 | else |
| 120 | buf = kmalloc(size, GFP_KERNEL); | 140 | buf = kmalloc(size, GFP_KERNEL); |
| 121 | if (!buf) | 141 | if (!buf) |
diff --git a/drivers/virt/vboxguest/vboxguest_utils.c b/drivers/virt/vboxguest/vboxguest_utils.c index bf4474214b4d..75fd140b02ff 100644 --- a/drivers/virt/vboxguest/vboxguest_utils.c +++ b/drivers/virt/vboxguest/vboxguest_utils.c | |||
| @@ -62,7 +62,8 @@ VBG_LOG(vbg_err, pr_err); | |||
| 62 | VBG_LOG(vbg_debug, pr_debug); | 62 | VBG_LOG(vbg_debug, pr_debug); |
| 63 | #endif | 63 | #endif |
| 64 | 64 | ||
| 65 | void *vbg_req_alloc(size_t len, enum vmmdev_request_type req_type) | 65 | void *vbg_req_alloc(size_t len, enum vmmdev_request_type req_type, |
| 66 | u32 requestor) | ||
| 66 | { | 67 | { |
| 67 | struct vmmdev_request_header *req; | 68 | struct vmmdev_request_header *req; |
| 68 | int order = get_order(PAGE_ALIGN(len)); | 69 | int order = get_order(PAGE_ALIGN(len)); |
| @@ -78,7 +79,7 @@ void *vbg_req_alloc(size_t len, enum vmmdev_request_type req_type) | |||
| 78 | req->request_type = req_type; | 79 | req->request_type = req_type; |
| 79 | req->rc = VERR_GENERAL_FAILURE; | 80 | req->rc = VERR_GENERAL_FAILURE; |
| 80 | req->reserved1 = 0; | 81 | req->reserved1 = 0; |
| 81 | req->reserved2 = 0; | 82 | req->requestor = requestor; |
| 82 | 83 | ||
| 83 | return req; | 84 | return req; |
| 84 | } | 85 | } |
| @@ -119,7 +120,7 @@ static bool hgcm_req_done(struct vbg_dev *gdev, | |||
| 119 | return done; | 120 | return done; |
| 120 | } | 121 | } |
| 121 | 122 | ||
| 122 | int vbg_hgcm_connect(struct vbg_dev *gdev, | 123 | int vbg_hgcm_connect(struct vbg_dev *gdev, u32 requestor, |
| 123 | struct vmmdev_hgcm_service_location *loc, | 124 | struct vmmdev_hgcm_service_location *loc, |
| 124 | u32 *client_id, int *vbox_status) | 125 | u32 *client_id, int *vbox_status) |
| 125 | { | 126 | { |
| @@ -127,7 +128,7 @@ int vbg_hgcm_connect(struct vbg_dev *gdev, | |||
| 127 | int rc; | 128 | int rc; |
| 128 | 129 | ||
| 129 | hgcm_connect = vbg_req_alloc(sizeof(*hgcm_connect), | 130 | hgcm_connect = vbg_req_alloc(sizeof(*hgcm_connect), |
| 130 | VMMDEVREQ_HGCM_CONNECT); | 131 | VMMDEVREQ_HGCM_CONNECT, requestor); |
| 131 | if (!hgcm_connect) | 132 | if (!hgcm_connect) |
| 132 | return -ENOMEM; | 133 | return -ENOMEM; |
| 133 | 134 | ||
| @@ -153,13 +154,15 @@ int vbg_hgcm_connect(struct vbg_dev *gdev, | |||
| 153 | } | 154 | } |
| 154 | EXPORT_SYMBOL(vbg_hgcm_connect); | 155 | EXPORT_SYMBOL(vbg_hgcm_connect); |
| 155 | 156 | ||
| 156 | int vbg_hgcm_disconnect(struct vbg_dev *gdev, u32 client_id, int *vbox_status) | 157 | int vbg_hgcm_disconnect(struct vbg_dev *gdev, u32 requestor, |
| 158 | u32 client_id, int *vbox_status) | ||
| 157 | { | 159 | { |
| 158 | struct vmmdev_hgcm_disconnect *hgcm_disconnect = NULL; | 160 | struct vmmdev_hgcm_disconnect *hgcm_disconnect = NULL; |
| 159 | int rc; | 161 | int rc; |
| 160 | 162 | ||
| 161 | hgcm_disconnect = vbg_req_alloc(sizeof(*hgcm_disconnect), | 163 | hgcm_disconnect = vbg_req_alloc(sizeof(*hgcm_disconnect), |
| 162 | VMMDEVREQ_HGCM_DISCONNECT); | 164 | VMMDEVREQ_HGCM_DISCONNECT, |
| 165 | requestor); | ||
| 163 | if (!hgcm_disconnect) | 166 | if (!hgcm_disconnect) |
| 164 | return -ENOMEM; | 167 | return -ENOMEM; |
| 165 | 168 | ||
| @@ -593,9 +596,10 @@ static int hgcm_call_copy_back_result( | |||
| 593 | return 0; | 596 | return 0; |
| 594 | } | 597 | } |
| 595 | 598 | ||
| 596 | int vbg_hgcm_call(struct vbg_dev *gdev, u32 client_id, u32 function, | 599 | int vbg_hgcm_call(struct vbg_dev *gdev, u32 requestor, u32 client_id, |
| 597 | u32 timeout_ms, struct vmmdev_hgcm_function_parameter *parms, | 600 | u32 function, u32 timeout_ms, |
| 598 | u32 parm_count, int *vbox_status) | 601 | struct vmmdev_hgcm_function_parameter *parms, u32 parm_count, |
| 602 | int *vbox_status) | ||
| 599 | { | 603 | { |
| 600 | struct vmmdev_hgcm_call *call; | 604 | struct vmmdev_hgcm_call *call; |
| 601 | void **bounce_bufs = NULL; | 605 | void **bounce_bufs = NULL; |
| @@ -615,7 +619,7 @@ int vbg_hgcm_call(struct vbg_dev *gdev, u32 client_id, u32 function, | |||
| 615 | goto free_bounce_bufs; | 619 | goto free_bounce_bufs; |
| 616 | } | 620 | } |
| 617 | 621 | ||
| 618 | call = vbg_req_alloc(size, VMMDEVREQ_HGCM_CALL); | 622 | call = vbg_req_alloc(size, VMMDEVREQ_HGCM_CALL, requestor); |
| 619 | if (!call) { | 623 | if (!call) { |
| 620 | ret = -ENOMEM; | 624 | ret = -ENOMEM; |
| 621 | goto free_bounce_bufs; | 625 | goto free_bounce_bufs; |
| @@ -647,9 +651,9 @@ EXPORT_SYMBOL(vbg_hgcm_call); | |||
| 647 | 651 | ||
| 648 | #ifdef CONFIG_COMPAT | 652 | #ifdef CONFIG_COMPAT |
| 649 | int vbg_hgcm_call32( | 653 | int vbg_hgcm_call32( |
| 650 | struct vbg_dev *gdev, u32 client_id, u32 function, u32 timeout_ms, | 654 | struct vbg_dev *gdev, u32 requestor, u32 client_id, u32 function, |
| 651 | struct vmmdev_hgcm_function_parameter32 *parm32, u32 parm_count, | 655 | u32 timeout_ms, struct vmmdev_hgcm_function_parameter32 *parm32, |
| 652 | int *vbox_status) | 656 | u32 parm_count, int *vbox_status) |
| 653 | { | 657 | { |
| 654 | struct vmmdev_hgcm_function_parameter *parm64 = NULL; | 658 | struct vmmdev_hgcm_function_parameter *parm64 = NULL; |
| 655 | u32 i, size; | 659 | u32 i, size; |
| @@ -689,7 +693,7 @@ int vbg_hgcm_call32( | |||
| 689 | goto out_free; | 693 | goto out_free; |
| 690 | } | 694 | } |
| 691 | 695 | ||
| 692 | ret = vbg_hgcm_call(gdev, client_id, function, timeout_ms, | 696 | ret = vbg_hgcm_call(gdev, requestor, client_id, function, timeout_ms, |
| 693 | parm64, parm_count, vbox_status); | 697 | parm64, parm_count, vbox_status); |
| 694 | if (ret < 0) | 698 | if (ret < 0) |
| 695 | goto out_free; | 699 | goto out_free; |
diff --git a/drivers/virt/vboxguest/vboxguest_version.h b/drivers/virt/vboxguest/vboxguest_version.h index 77f0c8f8a231..84834dad38d5 100644 --- a/drivers/virt/vboxguest/vboxguest_version.h +++ b/drivers/virt/vboxguest/vboxguest_version.h | |||
| @@ -9,11 +9,10 @@ | |||
| 9 | #ifndef __VBOX_VERSION_H__ | 9 | #ifndef __VBOX_VERSION_H__ |
| 10 | #define __VBOX_VERSION_H__ | 10 | #define __VBOX_VERSION_H__ |
| 11 | 11 | ||
| 12 | /* Last synced October 4th 2017 */ | 12 | #define VBG_VERSION_MAJOR 6 |
| 13 | #define VBG_VERSION_MAJOR 5 | 13 | #define VBG_VERSION_MINOR 0 |
| 14 | #define VBG_VERSION_MINOR 2 | ||
| 15 | #define VBG_VERSION_BUILD 0 | 14 | #define VBG_VERSION_BUILD 0 |
| 16 | #define VBG_SVN_REV 68940 | 15 | #define VBG_SVN_REV 127566 |
| 17 | #define VBG_VERSION_STRING "5.2.0" | 16 | #define VBG_VERSION_STRING "6.0.0" |
| 18 | 17 | ||
| 19 | #endif | 18 | #endif |
diff --git a/drivers/virt/vboxguest/vmmdev.h b/drivers/virt/vboxguest/vmmdev.h index 5e2ae978935d..6337b8d75d96 100644 --- a/drivers/virt/vboxguest/vmmdev.h +++ b/drivers/virt/vboxguest/vmmdev.h | |||
| @@ -98,8 +98,8 @@ struct vmmdev_request_header { | |||
| 98 | s32 rc; | 98 | s32 rc; |
| 99 | /** Reserved field no.1. MBZ. */ | 99 | /** Reserved field no.1. MBZ. */ |
| 100 | u32 reserved1; | 100 | u32 reserved1; |
| 101 | /** Reserved field no.2. MBZ. */ | 101 | /** IN: Requestor information (VMMDEV_REQUESTOR_*) */ |
| 102 | u32 reserved2; | 102 | u32 requestor; |
| 103 | }; | 103 | }; |
| 104 | VMMDEV_ASSERT_SIZE(vmmdev_request_header, 24); | 104 | VMMDEV_ASSERT_SIZE(vmmdev_request_header, 24); |
| 105 | 105 | ||
| @@ -247,6 +247,8 @@ struct vmmdev_guest_info { | |||
| 247 | }; | 247 | }; |
| 248 | VMMDEV_ASSERT_SIZE(vmmdev_guest_info, 24 + 8); | 248 | VMMDEV_ASSERT_SIZE(vmmdev_guest_info, 24 + 8); |
| 249 | 249 | ||
| 250 | #define VMMDEV_GUEST_INFO2_ADDITIONS_FEATURES_REQUESTOR_INFO BIT(0) | ||
| 251 | |||
| 250 | /** struct vmmdev_guestinfo2 - Guest information report, version 2. */ | 252 | /** struct vmmdev_guestinfo2 - Guest information report, version 2. */ |
| 251 | struct vmmdev_guest_info2 { | 253 | struct vmmdev_guest_info2 { |
| 252 | /** Header. */ | 254 | /** Header. */ |
| @@ -259,7 +261,7 @@ struct vmmdev_guest_info2 { | |||
| 259 | u32 additions_build; | 261 | u32 additions_build; |
| 260 | /** SVN revision. */ | 262 | /** SVN revision. */ |
| 261 | u32 additions_revision; | 263 | u32 additions_revision; |
| 262 | /** Feature mask, currently unused. */ | 264 | /** Feature mask. */ |
| 263 | u32 additions_features; | 265 | u32 additions_features; |
| 264 | /** | 266 | /** |
| 265 | * The intentional meaning of this field was: | 267 | * The intentional meaning of this field was: |
