diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 26 |
1 files changed, 17 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c index 20ccbc73a8f7..d23dcce6c03c 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | |||
| @@ -98,6 +98,7 @@ | |||
| 98 | #define PCIE_BUS_CLK 10000 | 98 | #define PCIE_BUS_CLK 10000 |
| 99 | #define TCLK (PCIE_BUS_CLK / 10) | 99 | #define TCLK (PCIE_BUS_CLK / 10) |
| 100 | 100 | ||
| 101 | #define CEILING_UCHAR(double) ((double-(uint8_t)(double)) > 0 ? (uint8_t)(double+1) : (uint8_t)(double)) | ||
| 101 | 102 | ||
| 102 | static const uint16_t polaris10_clock_stretcher_lookup_table[2][4] = | 103 | static const uint16_t polaris10_clock_stretcher_lookup_table[2][4] = |
| 103 | { {600, 1050, 3, 0}, {600, 1050, 6, 1} }; | 104 | { {600, 1050, 3, 0}, {600, 1050, 6, 1} }; |
| @@ -1787,20 +1788,27 @@ static int polaris10_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr) | |||
| 1787 | 1788 | ||
| 1788 | ro = efuse * (max -min)/255 + min; | 1789 | ro = efuse * (max -min)/255 + min; |
| 1789 | 1790 | ||
| 1790 | /* Populate Sclk_CKS_masterEn0_7 and Sclk_voltageOffset */ | 1791 | /* Populate Sclk_CKS_masterEn0_7 and Sclk_voltageOffset |
| 1792 | * there is a little difference in calculating | ||
| 1793 | * volt_with_cks with windows */ | ||
| 1791 | for (i = 0; i < sclk_table->count; i++) { | 1794 | for (i = 0; i < sclk_table->count; i++) { |
| 1792 | data->smc_state_table.Sclk_CKS_masterEn0_7 |= | 1795 | data->smc_state_table.Sclk_CKS_masterEn0_7 |= |
| 1793 | sclk_table->entries[i].cks_enable << i; | 1796 | sclk_table->entries[i].cks_enable << i; |
| 1794 | 1797 | if (hwmgr->chip_id == CHIP_POLARIS10) { | |
| 1795 | volt_without_cks = (uint32_t)(((ro - 40) * 1000 - 2753594 - sclk_table->entries[i].clk/100 * 136418 /1000) / \ | 1798 | volt_without_cks = (uint32_t)((2753594000 + (sclk_table->entries[i].clk/100) * 136418 -(ro - 70) * 1000000) / \ |
| 1796 | (sclk_table->entries[i].clk/100 * 1132925 /10000 - 242418)/100); | 1799 | (2424180 - (sclk_table->entries[i].clk/100) * 1132925/1000)); |
| 1797 | 1800 | volt_with_cks = (uint32_t)((279720200 + sclk_table->entries[i].clk * 3232 - (ro - 65) * 100000000) / \ | |
| 1798 | volt_with_cks = (uint32_t)((ro * 1000 -2396351 - sclk_table->entries[i].clk/100 * 329021/1000) / \ | 1801 | (252248000 - sclk_table->entries[i].clk/100 * 115764)); |
| 1799 | (sclk_table->entries[i].clk/10000 * 649434 /1000 - 18005)/10); | 1802 | } else { |
| 1803 | volt_without_cks = (uint32_t)((2416794800 + (sclk_table->entries[i].clk/100) * 1476925/10 -(ro - 50) * 1000000) / \ | ||
| 1804 | (2625416 - (sclk_table->entries[i].clk/100) * 12586807/10000)); | ||
| 1805 | volt_with_cks = (uint32_t)((2999656000 + sclk_table->entries[i].clk * 392803/100 - (ro - 44) * 1000000) / \ | ||
| 1806 | (3422454 - sclk_table->entries[i].clk/100 * 18886376/10000)); | ||
| 1807 | } | ||
| 1800 | 1808 | ||
| 1801 | if (volt_without_cks >= volt_with_cks) | 1809 | if (volt_without_cks >= volt_with_cks) |
| 1802 | volt_offset = (uint8_t)(((volt_without_cks - volt_with_cks + | 1810 | volt_offset = (uint8_t)CEILING_UCHAR((volt_without_cks - volt_with_cks + |
| 1803 | sclk_table->entries[i].cks_voffset) * 100 / 625) + 1); | 1811 | sclk_table->entries[i].cks_voffset) * 100 / 625); |
| 1804 | 1812 | ||
| 1805 | data->smc_state_table.Sclk_voltageOffset[i] = volt_offset; | 1813 | data->smc_state_table.Sclk_voltageOffset[i] = volt_offset; |
| 1806 | } | 1814 | } |
