diff options
Diffstat (limited to 'drivers/usb/host/xhci.c')
| -rw-r--r-- | drivers/usb/host/xhci.c | 38 |
1 files changed, 23 insertions, 15 deletions
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index ad364394885a..6fe577d46fa2 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c | |||
| @@ -611,7 +611,7 @@ int xhci_run(struct usb_hcd *hcd) | |||
| 611 | xhci_dbg(xhci, "Event ring:\n"); | 611 | xhci_dbg(xhci, "Event ring:\n"); |
| 612 | xhci_debug_ring(xhci, xhci->event_ring); | 612 | xhci_debug_ring(xhci, xhci->event_ring); |
| 613 | xhci_dbg_ring_ptrs(xhci, xhci->event_ring); | 613 | xhci_dbg_ring_ptrs(xhci, xhci->event_ring); |
| 614 | temp_64 = readq(&xhci->ir_set->erst_dequeue); | 614 | temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); |
| 615 | temp_64 &= ~ERST_PTR_MASK; | 615 | temp_64 &= ~ERST_PTR_MASK; |
| 616 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, | 616 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 617 | "ERST deq = 64'h%0lx", (long unsigned int) temp_64); | 617 | "ERST deq = 64'h%0lx", (long unsigned int) temp_64); |
| @@ -756,11 +756,11 @@ static void xhci_save_registers(struct xhci_hcd *xhci) | |||
| 756 | { | 756 | { |
| 757 | xhci->s3.command = readl(&xhci->op_regs->command); | 757 | xhci->s3.command = readl(&xhci->op_regs->command); |
| 758 | xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification); | 758 | xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification); |
| 759 | xhci->s3.dcbaa_ptr = readq(&xhci->op_regs->dcbaa_ptr); | 759 | xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); |
| 760 | xhci->s3.config_reg = readl(&xhci->op_regs->config_reg); | 760 | xhci->s3.config_reg = readl(&xhci->op_regs->config_reg); |
| 761 | xhci->s3.erst_size = readl(&xhci->ir_set->erst_size); | 761 | xhci->s3.erst_size = readl(&xhci->ir_set->erst_size); |
| 762 | xhci->s3.erst_base = readq(&xhci->ir_set->erst_base); | 762 | xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base); |
| 763 | xhci->s3.erst_dequeue = readq(&xhci->ir_set->erst_dequeue); | 763 | xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); |
| 764 | xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending); | 764 | xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending); |
| 765 | xhci->s3.irq_control = readl(&xhci->ir_set->irq_control); | 765 | xhci->s3.irq_control = readl(&xhci->ir_set->irq_control); |
| 766 | } | 766 | } |
| @@ -769,11 +769,11 @@ static void xhci_restore_registers(struct xhci_hcd *xhci) | |||
| 769 | { | 769 | { |
| 770 | writel(xhci->s3.command, &xhci->op_regs->command); | 770 | writel(xhci->s3.command, &xhci->op_regs->command); |
| 771 | writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification); | 771 | writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification); |
| 772 | writeq(xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr); | 772 | xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr); |
| 773 | writel(xhci->s3.config_reg, &xhci->op_regs->config_reg); | 773 | writel(xhci->s3.config_reg, &xhci->op_regs->config_reg); |
| 774 | writel(xhci->s3.erst_size, &xhci->ir_set->erst_size); | 774 | writel(xhci->s3.erst_size, &xhci->ir_set->erst_size); |
| 775 | writeq(xhci->s3.erst_base, &xhci->ir_set->erst_base); | 775 | xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base); |
| 776 | writeq(xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue); | 776 | xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue); |
| 777 | writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending); | 777 | writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending); |
| 778 | writel(xhci->s3.irq_control, &xhci->ir_set->irq_control); | 778 | writel(xhci->s3.irq_control, &xhci->ir_set->irq_control); |
| 779 | } | 779 | } |
| @@ -783,7 +783,7 @@ static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci) | |||
| 783 | u64 val_64; | 783 | u64 val_64; |
| 784 | 784 | ||
| 785 | /* step 2: initialize command ring buffer */ | 785 | /* step 2: initialize command ring buffer */ |
| 786 | val_64 = readq(&xhci->op_regs->cmd_ring); | 786 | val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); |
| 787 | val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) | | 787 | val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) | |
| 788 | (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, | 788 | (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, |
| 789 | xhci->cmd_ring->dequeue) & | 789 | xhci->cmd_ring->dequeue) & |
| @@ -792,7 +792,7 @@ static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci) | |||
| 792 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, | 792 | xhci_dbg_trace(xhci, trace_xhci_dbg_init, |
| 793 | "// Setting command ring address to 0x%llx", | 793 | "// Setting command ring address to 0x%llx", |
| 794 | (long unsigned long) val_64); | 794 | (long unsigned long) val_64); |
| 795 | writeq(val_64, &xhci->op_regs->cmd_ring); | 795 | xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); |
| 796 | } | 796 | } |
| 797 | 797 | ||
| 798 | /* | 798 | /* |
| @@ -3842,7 +3842,7 @@ static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev, | |||
| 3842 | if (ret) { | 3842 | if (ret) { |
| 3843 | return ret; | 3843 | return ret; |
| 3844 | } | 3844 | } |
| 3845 | temp_64 = readq(&xhci->op_regs->dcbaa_ptr); | 3845 | temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); |
| 3846 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, | 3846 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, |
| 3847 | "Op regs DCBAA ptr = %#016llx", temp_64); | 3847 | "Op regs DCBAA ptr = %#016llx", temp_64); |
| 3848 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, | 3848 | xhci_dbg_trace(xhci, trace_xhci_dbg_address, |
| @@ -4730,11 +4730,8 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks) | |||
| 4730 | struct device *dev = hcd->self.controller; | 4730 | struct device *dev = hcd->self.controller; |
| 4731 | int retval; | 4731 | int retval; |
| 4732 | 4732 | ||
| 4733 | /* Limit the block layer scatter-gather lists to half a segment. */ | 4733 | /* Accept arbitrarily long scatter-gather lists */ |
| 4734 | hcd->self.sg_tablesize = TRBS_PER_SEGMENT / 2; | 4734 | hcd->self.sg_tablesize = ~0; |
| 4735 | |||
| 4736 | /* support to build packet from discontinuous buffers */ | ||
| 4737 | hcd->self.no_sg_constraint = 1; | ||
| 4738 | 4735 | ||
| 4739 | /* XHCI controllers don't stop the ep queue on short packets :| */ | 4736 | /* XHCI controllers don't stop the ep queue on short packets :| */ |
| 4740 | hcd->self.no_stop_on_short = 1; | 4737 | hcd->self.no_stop_on_short = 1; |
| @@ -4760,6 +4757,14 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks) | |||
| 4760 | /* xHCI private pointer was set in xhci_pci_probe for the second | 4757 | /* xHCI private pointer was set in xhci_pci_probe for the second |
| 4761 | * registered roothub. | 4758 | * registered roothub. |
| 4762 | */ | 4759 | */ |
| 4760 | xhci = hcd_to_xhci(hcd); | ||
| 4761 | /* | ||
| 4762 | * Support arbitrarily aligned sg-list entries on hosts without | ||
| 4763 | * TD fragment rules (which are currently unsupported). | ||
| 4764 | */ | ||
| 4765 | if (xhci->hci_version < 0x100) | ||
| 4766 | hcd->self.no_sg_constraint = 1; | ||
| 4767 | |||
| 4763 | return 0; | 4768 | return 0; |
| 4764 | } | 4769 | } |
| 4765 | 4770 | ||
| @@ -4788,6 +4793,9 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks) | |||
| 4788 | if (xhci->hci_version > 0x96) | 4793 | if (xhci->hci_version > 0x96) |
| 4789 | xhci->quirks |= XHCI_SPURIOUS_SUCCESS; | 4794 | xhci->quirks |= XHCI_SPURIOUS_SUCCESS; |
| 4790 | 4795 | ||
| 4796 | if (xhci->hci_version < 0x100) | ||
| 4797 | hcd->self.no_sg_constraint = 1; | ||
| 4798 | |||
| 4791 | /* Make sure the HC is halted. */ | 4799 | /* Make sure the HC is halted. */ |
| 4792 | retval = xhci_halt(xhci); | 4800 | retval = xhci_halt(xhci); |
| 4793 | if (retval) | 4801 | if (retval) |
