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path: root/drivers/usb/dwc2
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Diffstat (limited to 'drivers/usb/dwc2')
-rw-r--r--drivers/usb/dwc2/gadget.c23
1 files changed, 18 insertions, 5 deletions
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index e9940dd004e4..818f158232bb 100644
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2254,6 +2254,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
2254{ 2254{
2255 u32 intmsk; 2255 u32 intmsk;
2256 u32 val; 2256 u32 val;
2257 u32 usbcfg;
2257 2258
2258 /* Kill any ep0 requests as controller will be reinitialized */ 2259 /* Kill any ep0 requests as controller will be reinitialized */
2259 kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET); 2260 kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET);
@@ -2267,10 +2268,16 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
2267 * set configuration. 2268 * set configuration.
2268 */ 2269 */
2269 2270
2271 /* keep other bits untouched (so e.g. forced modes are not lost) */
2272 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
2273 usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
2274 GUSBCFG_HNPCAP);
2275
2270 /* set the PLL on, remove the HNP/SRP and set the PHY */ 2276 /* set the PLL on, remove the HNP/SRP and set the PHY */
2271 val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; 2277 val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
2272 dwc2_writel(hsotg->phyif | GUSBCFG_TOUTCAL(7) | 2278 usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) |
2273 (val << GUSBCFG_USBTRDTIM_SHIFT), hsotg->regs + GUSBCFG); 2279 (val << GUSBCFG_USBTRDTIM_SHIFT);
2280 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
2274 2281
2275 dwc2_hsotg_init_fifo(hsotg); 2282 dwc2_hsotg_init_fifo(hsotg);
2276 2283
@@ -3031,6 +3038,7 @@ static struct usb_ep_ops dwc2_hsotg_ep_ops = {
3031static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg) 3038static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
3032{ 3039{
3033 u32 trdtim; 3040 u32 trdtim;
3041 u32 usbcfg;
3034 /* unmask subset of endpoint interrupts */ 3042 /* unmask subset of endpoint interrupts */
3035 3043
3036 dwc2_writel(DIEPMSK_TIMEOUTMSK | DIEPMSK_AHBERRMSK | 3044 dwc2_writel(DIEPMSK_TIMEOUTMSK | DIEPMSK_AHBERRMSK |
@@ -3054,11 +3062,16 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
3054 3062
3055 dwc2_hsotg_init_fifo(hsotg); 3063 dwc2_hsotg_init_fifo(hsotg);
3056 3064
3065 /* keep other bits untouched (so e.g. forced modes are not lost) */
3066 usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
3067 usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
3068 GUSBCFG_HNPCAP);
3069
3057 /* set the PLL on, remove the HNP/SRP and set the PHY */ 3070 /* set the PLL on, remove the HNP/SRP and set the PHY */
3058 trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; 3071 trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
3059 dwc2_writel(hsotg->phyif | GUSBCFG_TOUTCAL(7) | 3072 usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) |
3060 (trdtim << GUSBCFG_USBTRDTIM_SHIFT), 3073 (trdtim << GUSBCFG_USBTRDTIM_SHIFT);
3061 hsotg->regs + GUSBCFG); 3074 dwc2_writel(usbcfg, hsotg->regs + GUSBCFG);
3062 3075
3063 if (using_dma(hsotg)) 3076 if (using_dma(hsotg))
3064 __orr32(hsotg->regs + GAHBCFG, GAHBCFG_DMA_EN); 3077 __orr32(hsotg->regs + GAHBCFG, GAHBCFG_DMA_EN);